./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 06:56:09,048 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 06:56:09,111 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf [2023-11-29 06:56:09,116 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 06:56:09,116 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 06:56:09,141 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 06:56:09,141 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 06:56:09,142 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 06:56:09,143 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 06:56:09,143 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 06:56:09,144 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 06:56:09,145 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 06:56:09,145 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 06:56:09,146 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-29 06:56:09,146 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-29 06:56:09,147 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-29 06:56:09,147 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-29 06:56:09,148 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-29 06:56:09,148 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-29 06:56:09,149 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 06:56:09,149 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-29 06:56:09,150 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 06:56:09,150 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 06:56:09,151 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-29 06:56:09,151 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-29 06:56:09,152 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-29 06:56:09,152 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-29 06:56:09,153 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 06:56:09,153 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-29 06:56:09,153 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 06:56:09,154 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 06:56:09,154 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 06:56:09,155 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 06:56:09,155 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 06:56:09,156 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-29 06:56:09,156 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 [2023-11-29 06:56:09,361 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 06:56:09,383 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 06:56:09,386 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 06:56:09,388 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 06:56:09,388 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 06:56:09,389 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2023-11-29 06:56:12,056 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 06:56:12,271 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 06:56:12,271 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2023-11-29 06:56:12,286 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/data/475dcdfae/ac8f516451ca4f08a5b19e0f2cc7f350/FLAGfed33a4b7 [2023-11-29 06:56:12,301 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/data/475dcdfae/ac8f516451ca4f08a5b19e0f2cc7f350 [2023-11-29 06:56:12,304 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 06:56:12,305 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 06:56:12,306 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 06:56:12,307 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 06:56:12,312 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 06:56:12,313 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,314 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@50c94275 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12, skipping insertion in model container [2023-11-29 06:56:12,314 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,362 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 06:56:12,615 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 06:56:12,627 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 06:56:12,665 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 06:56:12,691 INFO L206 MainTranslator]: Completed translation [2023-11-29 06:56:12,692 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12 WrapperNode [2023-11-29 06:56:12,692 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 06:56:12,693 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 06:56:12,693 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 06:56:12,693 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 06:56:12,701 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,713 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,732 INFO L138 Inliner]: procedures = 110, calls = 24, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 76 [2023-11-29 06:56:12,733 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 06:56:12,733 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 06:56:12,733 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 06:56:12,734 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 06:56:12,744 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,744 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,747 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,760 INFO L175 MemorySlicer]: Split 14 memory accesses to 3 slices as follows [6, 3, 5]. 43 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0, 0]. The 5 writes are split as follows [3, 1, 1]. [2023-11-29 06:56:12,760 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,760 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,766 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,769 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,770 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,772 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,774 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 06:56:12,775 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 06:56:12,775 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 06:56:12,776 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 06:56:12,776 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (1/1) ... [2023-11-29 06:56:12,784 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:12,795 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:12,810 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:12,818 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-29 06:56:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-29 06:56:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-29 06:56:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-29 06:56:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-29 06:56:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-29 06:56:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-29 06:56:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 06:56:12,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 06:56:12,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 06:56:12,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 06:56:12,951 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 06:56:12,953 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 06:56:13,071 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 06:56:13,080 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 06:56:13,080 INFO L309 CfgBuilder]: Removed 1 assume(true) statements. [2023-11-29 06:56:13,082 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 06:56:13 BoogieIcfgContainer [2023-11-29 06:56:13,082 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 06:56:13,083 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-29 06:56:13,083 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-29 06:56:13,087 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-29 06:56:13,088 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 06:56:13,088 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.11 06:56:12" (1/3) ... [2023-11-29 06:56:13,089 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6311c6b1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 06:56:13, skipping insertion in model container [2023-11-29 06:56:13,089 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 06:56:13,089 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 06:56:12" (2/3) ... [2023-11-29 06:56:13,090 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6311c6b1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 06:56:13, skipping insertion in model container [2023-11-29 06:56:13,090 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 06:56:13,090 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 06:56:13" (3/3) ... [2023-11-29 06:56:13,091 INFO L332 chiAutomizerObserver]: Analyzing ICFG GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2023-11-29 06:56:13,139 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-29 06:56:13,139 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-29 06:56:13,139 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-29 06:56:13,139 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-29 06:56:13,139 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-29 06:56:13,139 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-29 06:56:13,140 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-29 06:56:13,140 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-29 06:56:13,143 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:13,159 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:13,159 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:13,159 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:13,163 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-29 06:56:13,163 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:13,163 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-29 06:56:13,164 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:13,165 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:13,165 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:13,165 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:13,165 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-29 06:56:13,165 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:13,173 INFO L748 eck$LassoCheckResult]: Stem: 12#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 9#L552true assume !main_#t~short9#1; 10#L552-2true assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 6#L556-2true [2023-11-29 06:56:13,174 INFO L750 eck$LassoCheckResult]: Loop: 6#L556-2true call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13#L555-1true assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4#L555-3true assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5#L556true assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 6#L556-2true [2023-11-29 06:56:13,179 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:13,180 INFO L85 PathProgramCache]: Analyzing trace with hash 925671, now seen corresponding path program 1 times [2023-11-29 06:56:13,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:13,190 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476096831] [2023-11-29 06:56:13,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:13,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:13,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:13,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:13,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:13,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476096831] [2023-11-29 06:56:13,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [476096831] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 06:56:13,413 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 06:56:13,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-29 06:56:13,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390098522] [2023-11-29 06:56:13,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 06:56:13,420 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:13,420 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:13,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1419305, now seen corresponding path program 1 times [2023-11-29 06:56:13,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:13,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [278936479] [2023-11-29 06:56:13,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:13,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:13,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:13,441 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:13,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:13,490 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:13,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:13,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-29 06:56:13,811 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-29 06:56:13,813 INFO L87 Difference]: Start difference. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:13,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:13,834 INFO L93 Difference]: Finished difference Result 14 states and 18 transitions. [2023-11-29 06:56:13,836 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 18 transitions. [2023-11-29 06:56:13,837 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:13,840 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 8 states and 10 transitions. [2023-11-29 06:56:13,841 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 06:56:13,841 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 06:56:13,842 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2023-11-29 06:56:13,842 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 06:56:13,843 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2023-11-29 06:56:13,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2023-11-29 06:56:13,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2023-11-29 06:56:13,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:13,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2023-11-29 06:56:13,869 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2023-11-29 06:56:13,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-29 06:56:13,874 INFO L428 stractBuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2023-11-29 06:56:13,874 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-29 06:56:13,874 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2023-11-29 06:56:13,875 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:13,875 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:13,875 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:13,876 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-29 06:56:13,876 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:13,876 INFO L748 eck$LassoCheckResult]: Stem: 40#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 41#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 43#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 36#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 37#L556-2 [2023-11-29 06:56:13,876 INFO L750 eck$LassoCheckResult]: Loop: 37#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 42#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 38#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 39#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 37#L556-2 [2023-11-29 06:56:13,877 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:13,877 INFO L85 PathProgramCache]: Analyzing trace with hash 925609, now seen corresponding path program 1 times [2023-11-29 06:56:13,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:13,878 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1746824276] [2023-11-29 06:56:13,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:13,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:13,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:13,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:13,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:13,952 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:13,953 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:13,953 INFO L85 PathProgramCache]: Analyzing trace with hash 1419305, now seen corresponding path program 2 times [2023-11-29 06:56:13,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:13,954 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985919254] [2023-11-29 06:56:13,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:13,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:13,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:13,967 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:13,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:13,977 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:13,977 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:13,978 INFO L85 PathProgramCache]: Analyzing trace with hash 121353169, now seen corresponding path program 1 times [2023-11-29 06:56:13,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:13,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371588026] [2023-11-29 06:56:13,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:13,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:14,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:14,020 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:14,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:14,050 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:15,107 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 06:56:15,107 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 06:56:15,107 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 06:56:15,107 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 06:56:15,108 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 06:56:15,108 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:15,108 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 06:56:15,108 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 06:56:15,108 INFO L133 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration2_Lasso [2023-11-29 06:56:15,108 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 06:56:15,109 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 06:56:15,129 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,137 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,139 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,141 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,144 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,681 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,684 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,687 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,693 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,695 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,698 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,701 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,703 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,707 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,710 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,714 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,718 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,721 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,724 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,726 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,729 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:15,735 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:16,172 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 06:56:16,177 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 06:56:16,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:16,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:16,180 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:16,189 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-29 06:56:16,192 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:16,206 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:16,206 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:16,207 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:16,207 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:16,207 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:16,209 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:16,209 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:16,211 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:16,215 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:16,216 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:16,216 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:16,217 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:16,220 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-29 06:56:16,221 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:16,233 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:16,233 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:16,234 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:16,234 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:16,234 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:16,235 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:16,235 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:16,240 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:16,244 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2023-11-29 06:56:16,245 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:16,245 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:16,246 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:16,248 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-29 06:56:16,249 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:16,259 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:16,259 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:16,259 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:16,259 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:16,259 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:16,260 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:16,260 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:16,262 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:16,267 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2023-11-29 06:56:16,267 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:16,267 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:16,268 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:16,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-29 06:56:16,272 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:16,284 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:16,284 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:16,284 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:16,284 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:16,284 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:16,285 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:16,285 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:16,286 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:16,290 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2023-11-29 06:56:16,290 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:16,290 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:16,291 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:16,292 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-29 06:56:16,294 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:16,304 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:16,304 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:16,304 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2023-11-29 06:56:16,305 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:16,330 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2023-11-29 06:56:16,330 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2023-11-29 06:56:16,374 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 06:56:16,516 INFO L443 ModelExtractionUtils]: Simplification made 28 calls to the SMT solver. [2023-11-29 06:56:16,516 INFO L444 ModelExtractionUtils]: 2 out of 31 variables were initially zero. Simplification set additionally 20 variables to zero. [2023-11-29 06:56:16,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:16,518 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:16,549 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:16,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-29 06:56:16,553 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 06:56:16,569 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 4. [2023-11-29 06:56:16,569 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 06:56:16,570 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) 0)_1, v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) 0)_1) = 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) 0)_1 + 2*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) 0)_1 Supporting invariants [1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_1 - 1 >= 0, 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) ULTIMATE.start_main_~id~0#1.offset)_1 >= 0, 1*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) 0)_1 >= 0, -1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) 0)_1 + 2*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_1 >= 0] [2023-11-29 06:56:16,574 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2023-11-29 06:56:16,707 INFO L156 tatePredicateManager]: 23 out of 27 supporting invariants were superfluous and have been removed [2023-11-29 06:56:16,722 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#2[~id~0!base][0] could not be translated [2023-11-29 06:56:16,724 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#0[~tmp~0!base][0] could not be translated [2023-11-29 06:56:16,758 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:16,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:16,794 INFO L262 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 19 conjunts are in the unsatisfiable core [2023-11-29 06:56:16,796 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:16,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 06:56:16,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:16,970 INFO L262 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-29 06:56:16,972 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:17,112 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2023-11-29 06:56:17,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:17,197 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.3 stem predicates 4 loop predicates [2023-11-29 06:56:17,199 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:17,373 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 18 states and 24 transitions. Complement of second has 11 states. [2023-11-29 06:56:17,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 7 states 3 stem states 3 non-accepting loop states 1 accepting loop states [2023-11-29 06:56:17,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:17,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 10 transitions. [2023-11-29 06:56:17,377 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 10 transitions. Stem has 4 letters. Loop has 4 letters. [2023-11-29 06:56:17,377 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:17,377 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 10 transitions. Stem has 8 letters. Loop has 4 letters. [2023-11-29 06:56:17,378 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:17,378 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 10 transitions. Stem has 4 letters. Loop has 8 letters. [2023-11-29 06:56:17,378 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:17,378 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 24 transitions. [2023-11-29 06:56:17,379 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:17,380 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 18 states and 24 transitions. [2023-11-29 06:56:17,380 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2023-11-29 06:56:17,380 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2023-11-29 06:56:17,380 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2023-11-29 06:56:17,380 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:17,381 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2023-11-29 06:56:17,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2023-11-29 06:56:17,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 16. [2023-11-29 06:56:17,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:17,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2023-11-29 06:56:17,383 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2023-11-29 06:56:17,383 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2023-11-29 06:56:17,383 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-29 06:56:17,383 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2023-11-29 06:56:17,384 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:17,384 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:17,384 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:17,385 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 06:56:17,385 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:17,385 INFO L748 eck$LassoCheckResult]: Stem: 244#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 245#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 246#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 233#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 234#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 243#L555-1 assume !main_#t~short15#1; 235#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 236#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 239#L556-2 [2023-11-29 06:56:17,385 INFO L750 eck$LassoCheckResult]: Loop: 239#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 241#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 248#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 247#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 239#L556-2 [2023-11-29 06:56:17,386 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:17,386 INFO L85 PathProgramCache]: Analyzing trace with hash 121355089, now seen corresponding path program 1 times [2023-11-29 06:56:17,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:17,386 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049545307] [2023-11-29 06:56:17,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:17,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:17,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:17,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:17,525 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:17,525 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049545307] [2023-11-29 06:56:17,525 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1049545307] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 06:56:17,525 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 06:56:17,525 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-29 06:56:17,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079501760] [2023-11-29 06:56:17,526 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 06:56:17,526 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:17,526 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:17,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1419305, now seen corresponding path program 3 times [2023-11-29 06:56:17,527 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:17,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462101799] [2023-11-29 06:56:17,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:17,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:17,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,533 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:17,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,539 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:17,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:17,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-29 06:56:17,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-29 06:56:17,706 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 8 Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:17,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:17,740 INFO L93 Difference]: Finished difference Result 22 states and 28 transitions. [2023-11-29 06:56:17,741 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 28 transitions. [2023-11-29 06:56:17,742 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:17,744 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 22 states and 28 transitions. [2023-11-29 06:56:17,744 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2023-11-29 06:56:17,744 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2023-11-29 06:56:17,744 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 28 transitions. [2023-11-29 06:56:17,744 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:17,744 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 28 transitions. [2023-11-29 06:56:17,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 28 transitions. [2023-11-29 06:56:17,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 18. [2023-11-29 06:56:17,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:17,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2023-11-29 06:56:17,747 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2023-11-29 06:56:17,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 06:56:17,749 INFO L428 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2023-11-29 06:56:17,749 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-29 06:56:17,749 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2023-11-29 06:56:17,750 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:17,750 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:17,750 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:17,750 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 06:56:17,750 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:17,751 INFO L748 eck$LassoCheckResult]: Stem: 288#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 293#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 280#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 281#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 294#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 282#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 283#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 286#L556-2 [2023-11-29 06:56:17,751 INFO L750 eck$LassoCheckResult]: Loop: 286#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 290#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 297#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 296#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 286#L556-2 [2023-11-29 06:56:17,751 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:17,751 INFO L85 PathProgramCache]: Analyzing trace with hash 121353167, now seen corresponding path program 1 times [2023-11-29 06:56:17,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:17,752 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419768789] [2023-11-29 06:56:17,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:17,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:17,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:17,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,788 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:17,789 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:17,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1419305, now seen corresponding path program 4 times [2023-11-29 06:56:17,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:17,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902139682] [2023-11-29 06:56:17,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:17,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:17,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,795 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:17,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,801 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:17,801 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:17,801 INFO L85 PathProgramCache]: Analyzing trace with hash -677985033, now seen corresponding path program 1 times [2023-11-29 06:56:17,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:17,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468339672] [2023-11-29 06:56:17,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:17,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:17,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,826 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:17,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:17,846 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:18,980 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 06:56:18,981 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 06:56:18,981 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 06:56:18,981 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 06:56:18,981 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 06:56:18,981 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:18,981 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 06:56:18,981 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 06:56:18,981 INFO L133 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration4_Lasso [2023-11-29 06:56:18,981 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 06:56:18,981 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 06:56:18,985 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:18,987 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:18,990 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:18,991 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:18,993 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:18,995 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:18,997 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:18,999 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,002 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,004 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,006 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,007 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,502 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,504 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,505 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,508 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,510 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,512 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,515 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,516 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,519 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,521 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:19,883 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 06:56:19,883 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 06:56:19,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:19,883 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:19,884 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:19,885 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-29 06:56:19,886 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:19,896 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:19,897 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:19,897 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:19,897 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:19,897 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:19,897 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:19,897 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:19,899 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:19,901 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2023-11-29 06:56:19,902 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:19,902 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:19,903 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:19,903 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-29 06:56:19,905 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:19,915 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:19,915 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:19,915 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:19,915 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:19,915 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:19,915 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:19,915 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:19,916 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:19,920 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2023-11-29 06:56:19,924 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:19,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:19,925 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:19,926 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-29 06:56:19,927 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:19,937 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:19,937 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:19,937 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:19,937 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:19,937 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:19,938 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:19,938 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:19,939 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:19,942 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2023-11-29 06:56:19,943 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:19,943 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:19,944 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:19,944 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-29 06:56:19,946 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:19,956 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:19,956 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:19,956 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:19,956 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:19,956 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:19,957 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:19,957 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:19,958 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:19,961 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2023-11-29 06:56:19,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:19,961 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:19,962 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:19,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-29 06:56:19,964 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:19,974 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:19,974 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:19,974 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:19,974 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:19,974 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:19,975 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:19,975 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:19,976 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:19,978 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:19,979 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:19,979 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:19,980 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:19,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-29 06:56:19,982 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:19,992 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:19,992 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:19,992 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:19,992 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:19,992 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:19,993 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:19,993 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:19,994 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:19,997 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2023-11-29 06:56:19,997 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:19,997 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:19,998 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:19,999 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-29 06:56:20,001 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,011 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,011 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:20,011 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,011 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,011 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,012 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:20,012 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:20,013 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,015 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2023-11-29 06:56:20,016 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,016 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,017 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-29 06:56:20,019 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,030 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,030 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,030 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,030 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,031 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:20,031 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:20,035 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,037 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2023-11-29 06:56:20,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,038 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,038 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,040 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-29 06:56:20,041 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,051 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,051 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:20,051 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,051 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,051 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,052 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:20,052 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:20,053 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,057 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2023-11-29 06:56:20,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,057 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,058 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,060 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2023-11-29 06:56:20,061 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,073 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,073 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:20,073 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,073 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,073 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,074 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:20,074 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:20,075 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,078 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2023-11-29 06:56:20,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,079 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,080 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,080 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2023-11-29 06:56:20,082 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,092 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,092 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:20,092 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,092 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,092 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,092 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:20,092 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:20,094 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,097 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:20,097 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,097 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,098 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,099 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2023-11-29 06:56:20,100 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,111 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,111 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,111 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,112 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,114 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:20,114 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:20,121 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,124 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2023-11-29 06:56:20,124 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,125 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,125 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,128 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2023-11-29 06:56:20,129 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,139 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,139 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,139 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,139 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,142 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:20,142 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:20,149 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,152 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:20,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,153 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,153 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2023-11-29 06:56:20,156 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,169 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,169 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,169 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:20,169 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,174 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:20,174 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:20,185 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:20,188 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:20,189 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,189 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,190 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,190 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2023-11-29 06:56:20,192 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:20,202 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:20,202 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:20,202 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2023-11-29 06:56:20,202 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:20,215 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2023-11-29 06:56:20,215 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2023-11-29 06:56:20,245 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 06:56:20,304 INFO L443 ModelExtractionUtils]: Simplification made 15 calls to the SMT solver. [2023-11-29 06:56:20,304 INFO L444 ModelExtractionUtils]: 3 out of 31 variables were initially zero. Simplification set additionally 20 variables to zero. [2023-11-29 06:56:20,305 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:20,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:20,306 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:20,308 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2023-11-29 06:56:20,309 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 06:56:20,323 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 4. [2023-11-29 06:56:20,323 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 06:56:20,323 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) 0)_2, v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_2) = 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) 0)_2 + 2*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_2 Supporting invariants [1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) ULTIMATE.start_main_~id~0#1.offset)_2 >= 0, 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~id~0#1.base) 0)_2 >= 0, 1*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_2 >= 0, 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_2 - 1 >= 0] [2023-11-29 06:56:20,328 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2023-11-29 06:56:20,395 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2023-11-29 06:56:20,430 INFO L156 tatePredicateManager]: 25 out of 27 supporting invariants were superfluous and have been removed [2023-11-29 06:56:20,434 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#2[~id~0!base][0] could not be translated [2023-11-29 06:56:20,434 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#0[~tmp~0!base][~tmp~0!offset] could not be translated [2023-11-29 06:56:20,456 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:20,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:20,490 INFO L262 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-29 06:56:20,492 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:20,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 06:56:20,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:56:20,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:20,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:20,648 INFO L262 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 10 conjunts are in the unsatisfiable core [2023-11-29 06:56:20,649 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:20,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:20,707 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.5 stem predicates 2 loop predicates [2023-11-29 06:56:20,707 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 18 states and 24 transitions. cyclomatic complexity: 8 Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:20,867 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 18 states and 24 transitions. cyclomatic complexity: 8. Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 32 states and 43 transitions. Complement of second has 12 states. [2023-11-29 06:56:20,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 9 states 5 stem states 2 non-accepting loop states 2 accepting loop states [2023-11-29 06:56:20,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:20,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 20 transitions. [2023-11-29 06:56:20,869 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 20 transitions. Stem has 8 letters. Loop has 4 letters. [2023-11-29 06:56:20,870 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:20,870 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 20 transitions. Stem has 12 letters. Loop has 4 letters. [2023-11-29 06:56:20,870 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:20,870 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 20 transitions. Stem has 8 letters. Loop has 8 letters. [2023-11-29 06:56:20,870 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:20,870 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 43 transitions. [2023-11-29 06:56:20,871 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:20,872 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 43 transitions. [2023-11-29 06:56:20,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2023-11-29 06:56:20,873 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2023-11-29 06:56:20,873 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 43 transitions. [2023-11-29 06:56:20,873 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:20,873 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 43 transitions. [2023-11-29 06:56:20,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 43 transitions. [2023-11-29 06:56:20,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 21. [2023-11-29 06:56:20,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.3333333333333333) internal successors, (28), 20 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:20,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 28 transitions. [2023-11-29 06:56:20,875 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 28 transitions. [2023-11-29 06:56:20,875 INFO L428 stractBuchiCegarLoop]: Abstraction has 21 states and 28 transitions. [2023-11-29 06:56:20,875 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-29 06:56:20,876 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 28 transitions. [2023-11-29 06:56:20,876 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:20,876 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:20,876 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:20,877 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 06:56:20,877 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:20,877 INFO L748 eck$LassoCheckResult]: Stem: 531#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 532#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 533#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 520#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 521#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 534#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 524#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 525#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 527#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 530#L555-1 assume !main_#t~short15#1; 522#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 523#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 526#L556-2 [2023-11-29 06:56:20,877 INFO L750 eck$LassoCheckResult]: Loop: 526#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 528#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 540#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 539#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 526#L556-2 [2023-11-29 06:56:20,877 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:20,878 INFO L85 PathProgramCache]: Analyzing trace with hash -676136071, now seen corresponding path program 1 times [2023-11-29 06:56:20,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:20,878 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947517249] [2023-11-29 06:56:20,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:20,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:20,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:20,909 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2023-11-29 06:56:20,909 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:20,909 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947517249] [2023-11-29 06:56:20,909 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1947517249] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 06:56:20,909 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 06:56:20,909 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-29 06:56:20,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005238592] [2023-11-29 06:56:20,910 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 06:56:20,910 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:20,910 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:20,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1419305, now seen corresponding path program 5 times [2023-11-29 06:56:20,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:20,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180712081] [2023-11-29 06:56:20,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:20,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:20,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:20,916 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:20,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:20,921 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:21,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:21,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-29 06:56:21,073 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-29 06:56:21,073 INFO L87 Difference]: Start difference. First operand 21 states and 28 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:21,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:21,080 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2023-11-29 06:56:21,080 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 28 transitions. [2023-11-29 06:56:21,081 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:21,082 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 21 states and 25 transitions. [2023-11-29 06:56:21,082 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2023-11-29 06:56:21,082 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2023-11-29 06:56:21,082 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 25 transitions. [2023-11-29 06:56:21,082 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:21,082 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 25 transitions. [2023-11-29 06:56:21,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 25 transitions. [2023-11-29 06:56:21,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2023-11-29 06:56:21,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.2) internal successors, (24), 19 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:21,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2023-11-29 06:56:21,085 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 24 transitions. [2023-11-29 06:56:21,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-29 06:56:21,086 INFO L428 stractBuchiCegarLoop]: Abstraction has 20 states and 24 transitions. [2023-11-29 06:56:21,086 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-29 06:56:21,086 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 24 transitions. [2023-11-29 06:56:21,087 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 06:56:21,087 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:21,087 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:21,087 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1] [2023-11-29 06:56:21,087 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:21,088 INFO L748 eck$LassoCheckResult]: Stem: 579#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 580#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 584#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 571#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 572#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 582#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 575#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 576#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 578#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 583#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 573#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 574#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 577#L556-2 [2023-11-29 06:56:21,088 INFO L750 eck$LassoCheckResult]: Loop: 577#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 581#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 589#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 587#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 577#L556-2 [2023-11-29 06:56:21,088 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:21,088 INFO L85 PathProgramCache]: Analyzing trace with hash -676137993, now seen corresponding path program 2 times [2023-11-29 06:56:21,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:21,089 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322716328] [2023-11-29 06:56:21,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:21,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:21,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:21,106 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:21,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:21,122 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:21,123 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:21,123 INFO L85 PathProgramCache]: Analyzing trace with hash 1419305, now seen corresponding path program 6 times [2023-11-29 06:56:21,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:21,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171933686] [2023-11-29 06:56:21,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:21,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:21,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:21,128 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:21,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:21,132 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:21,133 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:21,133 INFO L85 PathProgramCache]: Analyzing trace with hash 480358687, now seen corresponding path program 3 times [2023-11-29 06:56:21,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:21,133 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019644877] [2023-11-29 06:56:21,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:21,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:21,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:21,563 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:21,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:21,563 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019644877] [2023-11-29 06:56:21,563 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019644877] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:21,563 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1585826173] [2023-11-29 06:56:21,563 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 06:56:21,563 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:21,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:21,564 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:21,567 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2023-11-29 06:56:21,679 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2023-11-29 06:56:21,679 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:56:21,681 INFO L262 TraceCheckSpWp]: Trace formula consists of 208 conjuncts, 22 conjunts are in the unsatisfiable core [2023-11-29 06:56:21,683 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:21,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 06:56:21,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2023-11-29 06:56:21,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 33 [2023-11-29 06:56:22,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2023-11-29 06:56:22,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:56:22,078 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:22,078 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:56:22,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:22,294 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:22,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1585826173] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:56:22,294 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:56:22,294 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 21 [2023-11-29 06:56:22,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [465803097] [2023-11-29 06:56:22,294 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:56:22,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:22,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2023-11-29 06:56:22,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=369, Unknown=0, NotChecked=0, Total=462 [2023-11-29 06:56:22,448 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. cyclomatic complexity: 6 Second operand has 22 states, 21 states have (on average 1.9047619047619047) internal successors, (40), 22 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:22,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:22,720 INFO L93 Difference]: Finished difference Result 34 states and 37 transitions. [2023-11-29 06:56:22,720 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 37 transitions. [2023-11-29 06:56:22,721 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2023-11-29 06:56:22,722 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 31 states and 34 transitions. [2023-11-29 06:56:22,722 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2023-11-29 06:56:22,722 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2023-11-29 06:56:22,722 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 34 transitions. [2023-11-29 06:56:22,722 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:22,722 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 34 transitions. [2023-11-29 06:56:22,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 34 transitions. [2023-11-29 06:56:22,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 24. [2023-11-29 06:56:22,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.125) internal successors, (27), 23 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:22,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 27 transitions. [2023-11-29 06:56:22,725 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 27 transitions. [2023-11-29 06:56:22,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-29 06:56:22,726 INFO L428 stractBuchiCegarLoop]: Abstraction has 24 states and 27 transitions. [2023-11-29 06:56:22,726 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-29 06:56:22,726 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 27 transitions. [2023-11-29 06:56:22,727 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2023-11-29 06:56:22,727 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:22,727 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:22,727 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 06:56:22,728 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 1] [2023-11-29 06:56:22,728 INFO L748 eck$LassoCheckResult]: Stem: 759#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 760#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 763#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 754#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 755#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 769#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 767#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 764#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 761#L556-2 [2023-11-29 06:56:22,728 INFO L750 eck$LassoCheckResult]: Loop: 761#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 762#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 756#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 757#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 758#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 772#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 777#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 773#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 766#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 770#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 768#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 765#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 761#L556-2 [2023-11-29 06:56:22,728 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:22,728 INFO L85 PathProgramCache]: Analyzing trace with hash 121353169, now seen corresponding path program 2 times [2023-11-29 06:56:22,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:22,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010972741] [2023-11-29 06:56:22,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:22,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:22,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:22,754 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:22,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:22,765 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:22,767 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:22,767 INFO L85 PathProgramCache]: Analyzing trace with hash 893710197, now seen corresponding path program 1 times [2023-11-29 06:56:22,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:22,767 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [231521050] [2023-11-29 06:56:22,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:22,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:22,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:22,777 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:22,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:22,785 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:22,785 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:22,785 INFO L85 PathProgramCache]: Analyzing trace with hash -1543410875, now seen corresponding path program 4 times [2023-11-29 06:56:22,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:22,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707186072] [2023-11-29 06:56:22,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:22,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:22,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:23,417 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:23,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:23,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707186072] [2023-11-29 06:56:23,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [707186072] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:23,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [884723168] [2023-11-29 06:56:23,418 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 06:56:23,418 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:23,418 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:23,419 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:23,420 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2023-11-29 06:56:23,505 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 06:56:23,505 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:56:23,506 INFO L262 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-29 06:56:23,509 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:23,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:56:23,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:23,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:56:23,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:56:23,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:23,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:56:23,738 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 06:56:23,738 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:56:23,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:56:23,891 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 06:56:23,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [884723168] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:56:23,892 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:56:23,892 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 19 [2023-11-29 06:56:23,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1662902299] [2023-11-29 06:56:23,892 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:56:24,288 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:24,288 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2023-11-29 06:56:24,289 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=320, Unknown=0, NotChecked=0, Total=380 [2023-11-29 06:56:24,289 INFO L87 Difference]: Start difference. First operand 24 states and 27 transitions. cyclomatic complexity: 4 Second operand has 20 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 20 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:24,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:24,578 INFO L93 Difference]: Finished difference Result 39 states and 42 transitions. [2023-11-29 06:56:24,578 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 42 transitions. [2023-11-29 06:56:24,579 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 06:56:24,579 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 39 states and 42 transitions. [2023-11-29 06:56:24,579 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39 [2023-11-29 06:56:24,579 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39 [2023-11-29 06:56:24,580 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 42 transitions. [2023-11-29 06:56:24,580 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:24,580 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 42 transitions. [2023-11-29 06:56:24,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 42 transitions. [2023-11-29 06:56:24,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 31. [2023-11-29 06:56:24,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.096774193548387) internal successors, (34), 30 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:24,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 34 transitions. [2023-11-29 06:56:24,590 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 34 transitions. [2023-11-29 06:56:24,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2023-11-29 06:56:24,591 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 34 transitions. [2023-11-29 06:56:24,591 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-29 06:56:24,592 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 34 transitions. [2023-11-29 06:56:24,592 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 06:56:24,592 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:24,592 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:24,592 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 06:56:24,592 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:24,592 INFO L748 eck$LassoCheckResult]: Stem: 980#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 981#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 982#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 974#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 975#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1000#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1004#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 983#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 978#L556-2 [2023-11-29 06:56:24,592 INFO L750 eck$LassoCheckResult]: Loop: 978#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 979#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 976#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 977#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 978#L556-2 [2023-11-29 06:56:24,593 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:24,593 INFO L85 PathProgramCache]: Analyzing trace with hash 121353169, now seen corresponding path program 3 times [2023-11-29 06:56:24,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:24,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664912762] [2023-11-29 06:56:24,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:24,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:24,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:24,609 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:24,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:24,621 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:24,621 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:24,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1419303, now seen corresponding path program 1 times [2023-11-29 06:56:24,621 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:24,622 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212696617] [2023-11-29 06:56:24,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:24,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:24,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:24,627 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:24,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:24,632 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:24,633 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:24,633 INFO L85 PathProgramCache]: Analyzing trace with hash -676137993, now seen corresponding path program 5 times [2023-11-29 06:56:24,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:24,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101045721] [2023-11-29 06:56:24,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:24,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:24,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:24,650 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:24,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:24,663 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:25,808 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 06:56:25,809 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 06:56:25,809 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 06:56:25,809 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 06:56:25,809 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 06:56:25,809 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:25,809 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 06:56:25,809 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 06:56:25,809 INFO L133 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration8_Lasso [2023-11-29 06:56:25,809 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 06:56:25,809 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 06:56:25,812 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:25,813 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:25,815 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:25,816 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:25,826 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:25,828 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:25,830 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,212 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,214 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,216 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,217 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,219 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,220 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,222 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,224 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,225 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,227 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,229 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,231 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,232 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,235 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:26,501 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 06:56:26,502 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 06:56:26,502 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,502 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,503 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,504 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2023-11-29 06:56:26,505 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,515 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,515 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:26,515 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,515 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,515 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,516 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:26,516 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:26,517 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,519 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2023-11-29 06:56:26,520 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,520 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,521 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,521 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2023-11-29 06:56:26,523 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,533 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,533 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:26,533 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,533 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,533 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,533 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:26,533 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:26,535 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,537 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2023-11-29 06:56:26,537 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,537 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,538 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,539 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2023-11-29 06:56:26,540 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,553 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,553 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:26,553 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,553 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,553 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,553 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:26,553 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:26,555 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,557 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2023-11-29 06:56:26,558 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,558 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,559 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,559 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2023-11-29 06:56:26,561 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,573 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,573 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:26,573 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,573 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,574 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,574 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:26,574 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:26,575 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,578 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Ended with exit code 0 [2023-11-29 06:56:26,578 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,578 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,579 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,580 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2023-11-29 06:56:26,582 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,591 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,591 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:26,592 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,592 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,592 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,592 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:26,592 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:26,593 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,596 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:26,596 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,596 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,597 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,598 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2023-11-29 06:56:26,599 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,609 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,609 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,610 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,610 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,611 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,611 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,614 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,617 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:26,617 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,617 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,618 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,628 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2023-11-29 06:56:26,629 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,642 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,642 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,642 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,642 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,644 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,644 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,650 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,652 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:26,652 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,652 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,653 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,654 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2023-11-29 06:56:26,655 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,665 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,665 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,665 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,665 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,667 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,667 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,670 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,673 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:26,673 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,673 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,674 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,674 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2023-11-29 06:56:26,676 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,686 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,686 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,686 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,686 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,688 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,688 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,693 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,695 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Ended with exit code 0 [2023-11-29 06:56:26,695 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,696 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,696 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,697 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2023-11-29 06:56:26,698 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,709 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,709 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,709 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,709 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,713 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,713 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,723 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,726 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Ended with exit code 0 [2023-11-29 06:56:26,726 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,727 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,728 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2023-11-29 06:56:26,730 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,739 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,740 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,740 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,740 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,742 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,743 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,750 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,753 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Ended with exit code 0 [2023-11-29 06:56:26,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,753 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,754 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,754 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2023-11-29 06:56:26,756 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,768 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,769 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,769 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,769 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,771 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,771 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,779 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,782 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2023-11-29 06:56:26,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,782 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,783 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,784 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2023-11-29 06:56:26,785 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,795 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,795 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,796 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,796 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,797 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,797 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,800 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,803 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2023-11-29 06:56:26,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,803 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,804 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,804 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2023-11-29 06:56:26,806 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,815 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,816 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,816 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:26,816 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,818 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:26,818 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:26,823 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:26,826 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Ended with exit code 0 [2023-11-29 06:56:26,826 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,826 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,827 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,828 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2023-11-29 06:56:26,829 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:26,839 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:26,839 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:26,839 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2023-11-29 06:56:26,839 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:26,846 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2023-11-29 06:56:26,846 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2023-11-29 06:56:26,872 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 06:56:26,924 INFO L443 ModelExtractionUtils]: Simplification made 24 calls to the SMT solver. [2023-11-29 06:56:26,924 INFO L444 ModelExtractionUtils]: 6 out of 26 variables were initially zero. Simplification set additionally 17 variables to zero. [2023-11-29 06:56:26,924 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:26,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:26,925 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:26,926 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2023-11-29 06:56:26,927 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 06:56:26,939 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2023-11-29 06:56:26,939 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 06:56:26,939 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_3, v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_3) = -1*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_3 + 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_3 Supporting invariants [] [2023-11-29 06:56:26,942 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Ended with exit code 0 [2023-11-29 06:56:27,001 INFO L156 tatePredicateManager]: 22 out of 22 supporting invariants were superfluous and have been removed [2023-11-29 06:56:27,002 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#1[~maxId~0!base][~maxId~0!offset] could not be translated [2023-11-29 06:56:27,002 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#0[~tmp~0!base][~tmp~0!offset] could not be translated [2023-11-29 06:56:27,010 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:27,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:27,034 INFO L262 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 06:56:27,035 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:27,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:27,051 INFO L262 TraceCheckSpWp]: Trace formula consists of 39 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-29 06:56:27,052 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:27,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:27,070 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 06:56:27,070 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 31 states and 34 transitions. cyclomatic complexity: 5 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:27,090 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 31 states and 34 transitions. cyclomatic complexity: 5. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 63 states and 69 transitions. Complement of second has 7 states. [2023-11-29 06:56:27,091 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-29 06:56:27,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:27,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 13 transitions. [2023-11-29 06:56:27,092 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 8 letters. Loop has 4 letters. [2023-11-29 06:56:27,092 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:27,092 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 12 letters. Loop has 4 letters. [2023-11-29 06:56:27,092 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:27,092 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 8 letters. Loop has 8 letters. [2023-11-29 06:56:27,092 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:27,093 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 69 transitions. [2023-11-29 06:56:27,094 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 06:56:27,094 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 46 states and 50 transitions. [2023-11-29 06:56:27,094 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2023-11-29 06:56:27,094 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2023-11-29 06:56:27,095 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 50 transitions. [2023-11-29 06:56:27,095 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:27,095 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 50 transitions. [2023-11-29 06:56:27,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 50 transitions. [2023-11-29 06:56:27,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 43. [2023-11-29 06:56:27,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.0930232558139534) internal successors, (47), 42 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:27,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2023-11-29 06:56:27,098 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43 states and 47 transitions. [2023-11-29 06:56:27,098 INFO L428 stractBuchiCegarLoop]: Abstraction has 43 states and 47 transitions. [2023-11-29 06:56:27,098 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-29 06:56:27,098 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 47 transitions. [2023-11-29 06:56:27,099 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2023-11-29 06:56:27,099 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:27,099 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:27,100 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1] [2023-11-29 06:56:27,100 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 06:56:27,100 INFO L748 eck$LassoCheckResult]: Stem: 1226#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1227#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1228#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1215#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1216#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1245#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1244#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1239#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1240#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1241#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1243#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1242#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1237#L556-2 [2023-11-29 06:56:27,100 INFO L750 eck$LassoCheckResult]: Loop: 1237#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1238#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1233#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1234#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1237#L556-2 [2023-11-29 06:56:27,100 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:27,100 INFO L85 PathProgramCache]: Analyzing trace with hash -677985035, now seen corresponding path program 2 times [2023-11-29 06:56:27,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:27,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092101287] [2023-11-29 06:56:27,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:27,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:27,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:27,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:27,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:27,131 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:27,131 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:27,132 INFO L85 PathProgramCache]: Analyzing trace with hash 1419303, now seen corresponding path program 2 times [2023-11-29 06:56:27,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:27,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541960826] [2023-11-29 06:56:27,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:27,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:27,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:27,137 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:27,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:27,142 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:27,142 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:27,143 INFO L85 PathProgramCache]: Analyzing trace with hash -199699685, now seen corresponding path program 3 times [2023-11-29 06:56:27,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:27,143 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803028103] [2023-11-29 06:56:27,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:27,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:27,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:27,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:27,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:27,178 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:27,543 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Ended with exit code 0 [2023-11-29 06:56:28,796 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 06:56:28,796 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 06:56:28,796 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 06:56:28,796 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 06:56:28,796 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 06:56:28,796 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:28,796 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 06:56:28,796 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 06:56:28,796 INFO L133 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration9_Lasso [2023-11-29 06:56:28,796 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 06:56:28,796 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 06:56:28,799 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:28,801 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:28,803 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:28,805 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:28,807 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:28,809 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,221 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,223 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,224 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,225 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,227 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,228 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,230 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,231 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,232 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,233 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,235 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,236 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,238 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,239 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,240 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 06:56:29,543 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 06:56:29,544 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 06:56:29,544 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,544 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,545 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,547 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2023-11-29 06:56:29,547 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,557 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,557 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:29,557 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,557 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:29,557 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,558 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:29,558 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:29,559 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:29,561 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:29,562 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,562 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,562 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,563 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2023-11-29 06:56:29,565 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,575 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,575 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,575 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:29,575 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,576 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:29,576 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:29,580 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:29,582 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Ended with exit code 0 [2023-11-29 06:56:29,583 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,583 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,583 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,584 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2023-11-29 06:56:29,586 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,595 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,595 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:29,596 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,596 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:29,596 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,596 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:29,596 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:29,597 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:29,599 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Ended with exit code 0 [2023-11-29 06:56:29,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,600 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,600 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,601 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2023-11-29 06:56:29,603 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,612 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,612 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,613 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:29,613 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,614 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:29,614 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:29,617 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:29,619 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:29,619 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,620 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,620 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,621 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2023-11-29 06:56:29,623 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,632 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,633 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 06:56:29,633 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,633 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:29,633 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,633 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 06:56:29,633 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 06:56:29,634 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:29,637 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:29,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,637 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,638 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,638 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2023-11-29 06:56:29,640 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,650 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,650 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,650 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:29,650 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,651 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:29,651 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:29,654 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:29,656 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:29,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,656 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,657 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,658 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2023-11-29 06:56:29,659 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,670 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,670 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,670 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 06:56:29,670 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,671 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 06:56:29,671 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 06:56:29,675 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 06:56:29,677 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:29,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,677 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,678 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,679 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2023-11-29 06:56:29,680 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 06:56:29,690 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 06:56:29,690 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 06:56:29,690 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2023-11-29 06:56:29,691 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 06:56:29,700 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2023-11-29 06:56:29,700 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2023-11-29 06:56:29,731 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 06:56:29,801 INFO L443 ModelExtractionUtils]: Simplification made 22 calls to the SMT solver. [2023-11-29 06:56:29,801 INFO L444 ModelExtractionUtils]: 3 out of 31 variables were initially zero. Simplification set additionally 25 variables to zero. [2023-11-29 06:56:29,801 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 06:56:29,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:29,802 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 06:56:29,803 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2023-11-29 06:56:29,804 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 06:56:29,815 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2023-11-29 06:56:29,816 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 06:56:29,816 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_4, v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_4) = 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_4 - 1*v_rep(select (select #memory_int#0 ULTIMATE.start_main_~tmp~0#1.base) ULTIMATE.start_main_~tmp~0#1.offset)_4 Supporting invariants [] [2023-11-29 06:56:29,819 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Ended with exit code 0 [2023-11-29 06:56:29,851 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Forceful destruction successful, exit code 0 [2023-11-29 06:56:29,889 INFO L156 tatePredicateManager]: 23 out of 23 supporting invariants were superfluous and have been removed [2023-11-29 06:56:29,890 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#1[~maxId~0!base][~maxId~0!offset] could not be translated [2023-11-29 06:56:29,890 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#0[~tmp~0!base][~tmp~0!offset] could not be translated [2023-11-29 06:56:29,899 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:29,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:29,931 INFO L262 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 06:56:29,931 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:29,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:29,949 INFO L262 TraceCheckSpWp]: Trace formula consists of 39 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-29 06:56:29,950 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:29,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:29,967 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 06:56:29,967 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 43 states and 47 transitions. cyclomatic complexity: 7 Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:29,994 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 43 states and 47 transitions. cyclomatic complexity: 7. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 52 states and 56 transitions. Complement of second has 7 states. [2023-11-29 06:56:29,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-29 06:56:29,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:29,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 12 transitions. [2023-11-29 06:56:29,995 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 12 transitions. Stem has 12 letters. Loop has 4 letters. [2023-11-29 06:56:29,995 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:29,995 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 12 transitions. Stem has 16 letters. Loop has 4 letters. [2023-11-29 06:56:29,996 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:29,996 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 12 transitions. Stem has 12 letters. Loop has 8 letters. [2023-11-29 06:56:29,996 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 06:56:29,996 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 56 transitions. [2023-11-29 06:56:29,997 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2023-11-29 06:56:29,998 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 46 states and 50 transitions. [2023-11-29 06:56:29,998 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2023-11-29 06:56:29,998 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2023-11-29 06:56:29,999 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 50 transitions. [2023-11-29 06:56:29,999 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:29,999 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 50 transitions. [2023-11-29 06:56:29,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 50 transitions. [2023-11-29 06:56:30,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 40. [2023-11-29 06:56:30,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.1) internal successors, (44), 39 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:30,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 44 transitions. [2023-11-29 06:56:30,003 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 44 transitions. [2023-11-29 06:56:30,003 INFO L428 stractBuchiCegarLoop]: Abstraction has 40 states and 44 transitions. [2023-11-29 06:56:30,003 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-29 06:56:30,003 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 44 transitions. [2023-11-29 06:56:30,003 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2023-11-29 06:56:30,003 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:30,003 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:30,004 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 3, 2, 1, 1, 1, 1] [2023-11-29 06:56:30,004 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 1] [2023-11-29 06:56:30,004 INFO L748 eck$LassoCheckResult]: Stem: 1482#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1483#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1487#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1473#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1474#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1495#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1494#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1492#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1493#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1497#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1496#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1491#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1489#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1490#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1512#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1480#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1481#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1486#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1499#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1500#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1508#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1507#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1505#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1501#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1484#L556-2 [2023-11-29 06:56:30,005 INFO L750 eck$LassoCheckResult]: Loop: 1484#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1485#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1475#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1476#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1479#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1511#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1510#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1509#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1503#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1506#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1504#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1502#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1484#L556-2 [2023-11-29 06:56:30,005 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:30,005 INFO L85 PathProgramCache]: Analyzing trace with hash -557976725, now seen corresponding path program 6 times [2023-11-29 06:56:30,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:30,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398955812] [2023-11-29 06:56:30,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:30,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:30,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:30,595 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 2 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:30,595 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:30,596 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398955812] [2023-11-29 06:56:30,596 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [398955812] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:30,596 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [880560493] [2023-11-29 06:56:30,596 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 06:56:30,596 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:30,596 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:30,597 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:30,600 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2023-11-29 06:56:30,730 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2023-11-29 06:56:30,730 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:56:30,732 INFO L262 TraceCheckSpWp]: Trace formula consists of 282 conjuncts, 26 conjunts are in the unsatisfiable core [2023-11-29 06:56:30,735 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:30,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:56:30,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:30,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 06:56:30,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 38 [2023-11-29 06:56:31,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 33 [2023-11-29 06:56:31,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 33 [2023-11-29 06:56:31,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2023-11-29 06:56:31,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:56:31,215 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:31,215 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:56:31,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 37 [2023-11-29 06:56:31,505 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:31,505 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [880560493] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:56:31,505 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:56:31,505 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 26 [2023-11-29 06:56:31,506 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1776440463] [2023-11-29 06:56:31,506 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:56:31,506 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:31,506 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:31,506 INFO L85 PathProgramCache]: Analyzing trace with hash 893710197, now seen corresponding path program 2 times [2023-11-29 06:56:31,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:31,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653580498] [2023-11-29 06:56:31,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:31,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:31,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:31,517 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:31,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:31,525 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:31,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:31,938 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2023-11-29 06:56:31,939 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=588, Unknown=0, NotChecked=0, Total=702 [2023-11-29 06:56:31,939 INFO L87 Difference]: Start difference. First operand 40 states and 44 transitions. cyclomatic complexity: 7 Second operand has 27 states, 26 states have (on average 2.1153846153846154) internal successors, (55), 27 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:32,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:32,301 INFO L93 Difference]: Finished difference Result 54 states and 58 transitions. [2023-11-29 06:56:32,301 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 54 states and 58 transitions. [2023-11-29 06:56:32,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2023-11-29 06:56:32,302 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 54 states to 51 states and 55 transitions. [2023-11-29 06:56:32,302 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2023-11-29 06:56:32,303 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2023-11-29 06:56:32,303 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 55 transitions. [2023-11-29 06:56:32,303 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:32,303 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 55 transitions. [2023-11-29 06:56:32,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 55 transitions. [2023-11-29 06:56:32,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 48. [2023-11-29 06:56:32,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 1.0833333333333333) internal successors, (52), 47 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:32,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 52 transitions. [2023-11-29 06:56:32,307 INFO L240 hiAutomatonCegarLoop]: Abstraction has 48 states and 52 transitions. [2023-11-29 06:56:32,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2023-11-29 06:56:32,308 INFO L428 stractBuchiCegarLoop]: Abstraction has 48 states and 52 transitions. [2023-11-29 06:56:32,308 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-29 06:56:32,308 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 48 states and 52 transitions. [2023-11-29 06:56:32,309 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2023-11-29 06:56:32,309 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:32,309 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:32,310 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 4, 2, 1, 1, 1, 1] [2023-11-29 06:56:32,310 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 3, 1] [2023-11-29 06:56:32,310 INFO L748 eck$LassoCheckResult]: Stem: 1764#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1765#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1769#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1755#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1756#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1778#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1776#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1773#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1774#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1777#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1775#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1772#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1770#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1771#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1802#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1801#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1800#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1798#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1796#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1762#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1763#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1768#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1759#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1760#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1790#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1788#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1786#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1783#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1766#L556-2 [2023-11-29 06:56:32,310 INFO L750 eck$LassoCheckResult]: Loop: 1766#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1767#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1757#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1758#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1761#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1799#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1797#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1795#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1794#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1793#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1792#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1791#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1785#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1789#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1787#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1784#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1766#L556-2 [2023-11-29 06:56:32,310 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:32,311 INFO L85 PathProgramCache]: Analyzing trace with hash -1638160495, now seen corresponding path program 7 times [2023-11-29 06:56:32,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:32,311 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159505251] [2023-11-29 06:56:32,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:32,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:32,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:33,175 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 7 proven. 53 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:33,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:33,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159505251] [2023-11-29 06:56:33,175 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159505251] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:33,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [370624613] [2023-11-29 06:56:33,176 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 06:56:33,176 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:33,176 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:33,177 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:33,179 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2023-11-29 06:56:33,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:33,300 INFO L262 TraceCheckSpWp]: Trace formula consists of 319 conjuncts, 30 conjunts are in the unsatisfiable core [2023-11-29 06:56:33,303 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:33,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:56:33,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:56:33,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:33,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:56:33,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:56:33,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:56:33,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:33,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:56:33,572 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 59 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 06:56:33,572 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:56:33,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:56:33,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:56:33,790 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 11 proven. 48 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 06:56:33,790 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [370624613] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:56:33,790 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:56:33,790 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 24 [2023-11-29 06:56:33,790 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617518885] [2023-11-29 06:56:33,790 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:56:33,790 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:33,791 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:33,791 INFO L85 PathProgramCache]: Analyzing trace with hash 563187355, now seen corresponding path program 3 times [2023-11-29 06:56:33,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:33,791 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328650168] [2023-11-29 06:56:33,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:33,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:33,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:33,803 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:33,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:33,813 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:34,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:34,427 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-29 06:56:34,427 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=527, Unknown=0, NotChecked=0, Total=600 [2023-11-29 06:56:34,427 INFO L87 Difference]: Start difference. First operand 48 states and 52 transitions. cyclomatic complexity: 7 Second operand has 25 states, 24 states have (on average 2.1666666666666665) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:35,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:35,012 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2023-11-29 06:56:35,012 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 74 transitions. [2023-11-29 06:56:35,013 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2023-11-29 06:56:35,014 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 51 states and 54 transitions. [2023-11-29 06:56:35,014 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2023-11-29 06:56:35,014 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2023-11-29 06:56:35,014 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 54 transitions. [2023-11-29 06:56:35,014 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:35,014 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 54 transitions. [2023-11-29 06:56:35,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 54 transitions. [2023-11-29 06:56:35,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 48. [2023-11-29 06:56:35,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 1.0625) internal successors, (51), 47 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:35,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2023-11-29 06:56:35,018 INFO L240 hiAutomatonCegarLoop]: Abstraction has 48 states and 51 transitions. [2023-11-29 06:56:35,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-29 06:56:35,018 INFO L428 stractBuchiCegarLoop]: Abstraction has 48 states and 51 transitions. [2023-11-29 06:56:35,019 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-29 06:56:35,019 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 48 states and 51 transitions. [2023-11-29 06:56:35,019 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2023-11-29 06:56:35,019 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:35,019 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:35,020 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 2, 1, 1, 1, 1] [2023-11-29 06:56:35,020 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 3, 1] [2023-11-29 06:56:35,020 INFO L748 eck$LassoCheckResult]: Stem: 2105#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2106#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2107#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2093#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2094#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2116#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2114#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2111#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2112#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2118#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2120#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2119#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2117#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2115#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2113#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2110#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2108#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2109#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2138#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2136#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2103#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2104#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2097#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2098#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2100#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2129#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2132#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2130#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2128#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2126#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2124#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2121#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2101#L556-2 [2023-11-29 06:56:35,021 INFO L750 eck$LassoCheckResult]: Loop: 2101#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2102#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2095#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2096#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2099#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2140#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2139#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2137#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2135#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2134#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2133#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2131#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2123#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2127#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2125#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2122#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2101#L556-2 [2023-11-29 06:56:35,021 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:35,021 INFO L85 PathProgramCache]: Analyzing trace with hash -1170691657, now seen corresponding path program 8 times [2023-11-29 06:56:35,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:35,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [574604846] [2023-11-29 06:56:35,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:35,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:35,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:35,855 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 2 proven. 82 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:35,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:35,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [574604846] [2023-11-29 06:56:35,856 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [574604846] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:35,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1250568551] [2023-11-29 06:56:35,856 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 06:56:35,856 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:35,856 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:35,859 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:35,862 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2023-11-29 06:56:36,003 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 06:56:36,003 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:56:36,006 INFO L262 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 47 conjunts are in the unsatisfiable core [2023-11-29 06:56:36,010 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:36,032 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 06:56:36,035 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 06:56:36,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2023-11-29 06:56:36,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 06:56:36,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:56:36,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2023-11-29 06:56:36,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:36,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 06:56:36,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2023-11-29 06:56:36,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 06:56:36,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 06:56:36,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 06:56:36,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 06:56:36,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 06:56:36,537 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 1 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:36,537 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:56:36,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:36,844 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 4 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:36,844 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1250568551] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:56:36,845 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:56:36,845 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 31 [2023-11-29 06:56:36,845 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786740415] [2023-11-29 06:56:36,845 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:56:36,845 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:36,846 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:36,846 INFO L85 PathProgramCache]: Analyzing trace with hash 563187355, now seen corresponding path program 4 times [2023-11-29 06:56:36,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:36,846 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171541442] [2023-11-29 06:56:36,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:36,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:36,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:36,859 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:36,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:36,871 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:37,654 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:37,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2023-11-29 06:56:37,655 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=152, Invalid=840, Unknown=0, NotChecked=0, Total=992 [2023-11-29 06:56:37,655 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. cyclomatic complexity: 6 Second operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 32 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:38,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:38,059 INFO L93 Difference]: Finished difference Result 65 states and 68 transitions. [2023-11-29 06:56:38,059 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 68 transitions. [2023-11-29 06:56:38,060 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2023-11-29 06:56:38,061 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 62 states and 65 transitions. [2023-11-29 06:56:38,061 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2023-11-29 06:56:38,061 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2023-11-29 06:56:38,061 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 65 transitions. [2023-11-29 06:56:38,062 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:38,062 INFO L218 hiAutomatonCegarLoop]: Abstraction has 62 states and 65 transitions. [2023-11-29 06:56:38,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 65 transitions. [2023-11-29 06:56:38,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 56. [2023-11-29 06:56:38,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 55 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:38,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 59 transitions. [2023-11-29 06:56:38,066 INFO L240 hiAutomatonCegarLoop]: Abstraction has 56 states and 59 transitions. [2023-11-29 06:56:38,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-29 06:56:38,066 INFO L428 stractBuchiCegarLoop]: Abstraction has 56 states and 59 transitions. [2023-11-29 06:56:38,067 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-29 06:56:38,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 59 transitions. [2023-11-29 06:56:38,067 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2023-11-29 06:56:38,067 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:38,067 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:38,068 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 8, 8, 6, 2, 1, 1, 1, 1] [2023-11-29 06:56:38,069 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 5, 4, 1] [2023-11-29 06:56:38,069 INFO L748 eck$LassoCheckResult]: Stem: 2461#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2462#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2463#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2451#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2452#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2473#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2471#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2468#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2469#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2475#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2477#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2476#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2474#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2472#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2470#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2467#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2466#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2465#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2455#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2456#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2458#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2460#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2506#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2505#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2504#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2503#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2502#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2501#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2500#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2487#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2498#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2488#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2486#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2484#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2482#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2478#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2479#L556-2 [2023-11-29 06:56:38,069 INFO L750 eck$LassoCheckResult]: Loop: 2479#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2499#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2453#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2454#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2457#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2459#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2464#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2497#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2496#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2495#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2494#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2493#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2492#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2491#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2490#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2489#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2481#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2485#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2483#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2480#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2479#L556-2 [2023-11-29 06:56:38,070 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:38,070 INFO L85 PathProgramCache]: Analyzing trace with hash 901404637, now seen corresponding path program 9 times [2023-11-29 06:56:38,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:38,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708112374] [2023-11-29 06:56:38,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:38,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:38,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:39,217 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 11 proven. 101 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:39,217 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:39,217 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708112374] [2023-11-29 06:56:39,218 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708112374] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:39,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1554040966] [2023-11-29 06:56:39,218 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 06:56:39,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:39,218 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:39,219 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:39,222 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2023-11-29 06:56:39,372 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2023-11-29 06:56:39,372 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:56:39,375 INFO L262 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 63 conjunts are in the unsatisfiable core [2023-11-29 06:56:39,380 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:39,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 06:56:39,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 06:56:39,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 06:56:39,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 06:56:40,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 06:56:40,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 46 [2023-11-29 06:56:40,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2023-11-29 06:56:40,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2023-11-29 06:56:40,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2023-11-29 06:56:40,507 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 39 proven. 61 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-29 06:56:40,507 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:56:41,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:41,889 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2023-11-29 06:56:41,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1554040966] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:56:41,889 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:56:41,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 19, 19] total 49 [2023-11-29 06:56:41,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182854722] [2023-11-29 06:56:41,889 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:56:41,890 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:41,890 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:41,890 INFO L85 PathProgramCache]: Analyzing trace with hash -896652607, now seen corresponding path program 5 times [2023-11-29 06:56:41,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:41,890 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859953710] [2023-11-29 06:56:41,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:41,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:41,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:41,900 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:41,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:41,908 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:43,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:43,087 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2023-11-29 06:56:43,088 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=2093, Unknown=0, NotChecked=0, Total=2450 [2023-11-29 06:56:43,088 INFO L87 Difference]: Start difference. First operand 56 states and 59 transitions. cyclomatic complexity: 6 Second operand has 50 states, 49 states have (on average 1.816326530612245) internal successors, (89), 50 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:45,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:45,405 INFO L93 Difference]: Finished difference Result 128 states and 132 transitions. [2023-11-29 06:56:45,405 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 128 states and 132 transitions. [2023-11-29 06:56:45,406 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:56:45,407 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 128 states to 116 states and 120 transitions. [2023-11-29 06:56:45,407 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2023-11-29 06:56:45,407 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2023-11-29 06:56:45,407 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 120 transitions. [2023-11-29 06:56:45,408 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:45,408 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 120 transitions. [2023-11-29 06:56:45,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 120 transitions. [2023-11-29 06:56:45,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 88. [2023-11-29 06:56:45,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 88 states have (on average 1.0340909090909092) internal successors, (91), 87 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:45,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 91 transitions. [2023-11-29 06:56:45,412 INFO L240 hiAutomatonCegarLoop]: Abstraction has 88 states and 91 transitions. [2023-11-29 06:56:45,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2023-11-29 06:56:45,413 INFO L428 stractBuchiCegarLoop]: Abstraction has 88 states and 91 transitions. [2023-11-29 06:56:45,413 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-29 06:56:45,413 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 88 states and 91 transitions. [2023-11-29 06:56:45,413 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:56:45,413 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:45,414 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:45,415 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [12, 12, 12, 10, 2, 1, 1, 1, 1] [2023-11-29 06:56:45,415 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 8, 1] [2023-11-29 06:56:45,415 INFO L748 eck$LassoCheckResult]: Stem: 2992#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2993#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2994#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2980#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2981#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3004#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3003#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3002#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2989#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2990#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2984#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2985#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3007#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3006#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3005#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3000#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3001#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3034#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3033#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2987#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2988#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2991#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3032#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3031#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3030#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3029#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3028#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3027#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3026#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3025#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3024#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3023#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3022#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3021#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3020#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3019#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3018#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3017#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3016#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3015#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3014#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3013#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3012#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3011#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3010#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2999#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3009#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3008#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2997#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2998#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3038#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3035#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2996#L556-2 [2023-11-29 06:56:45,416 INFO L750 eck$LassoCheckResult]: Loop: 2996#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2995#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2982#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2983#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2986#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3067#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3066#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3065#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3064#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3063#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3062#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3061#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3060#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3059#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3058#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3057#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3056#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3055#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3054#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3053#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3052#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3051#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3050#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3049#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3048#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3047#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3046#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3045#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3044#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3043#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3042#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3041#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3037#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3040#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3039#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3036#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2996#L556-2 [2023-11-29 06:56:45,416 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:45,416 INFO L85 PathProgramCache]: Analyzing trace with hash 241496693, now seen corresponding path program 10 times [2023-11-29 06:56:45,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:45,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041776994] [2023-11-29 06:56:45,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:45,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:45,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:46,841 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 4 proven. 236 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2023-11-29 06:56:46,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:46,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041776994] [2023-11-29 06:56:46,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2041776994] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:46,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1939643789] [2023-11-29 06:56:46,842 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 06:56:46,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:46,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:46,843 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:46,844 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2023-11-29 06:56:46,992 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 06:56:46,992 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:56:46,995 INFO L262 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 38 conjunts are in the unsatisfiable core [2023-11-29 06:56:46,999 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:47,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:56:47,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:56:47,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:56:47,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:47,204 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:56:47,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:56:47,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:56:47,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:56:47,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:47,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:56:47,334 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 219 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2023-11-29 06:56:47,335 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:56:47,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:56:47,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:56:47,621 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 31 proven. 188 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2023-11-29 06:56:47,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1939643789] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:56:47,621 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:56:47,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14] total 25 [2023-11-29 06:56:47,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993229670] [2023-11-29 06:56:47,622 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:56:47,622 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:56:47,622 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:47,622 INFO L85 PathProgramCache]: Analyzing trace with hash -862028455, now seen corresponding path program 6 times [2023-11-29 06:56:47,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:47,623 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761649912] [2023-11-29 06:56:47,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:47,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:47,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:47,644 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:56:47,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:56:47,661 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:56:55,886 WARN L293 SmtUtils]: Spent 8.22s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 06:56:56,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:56:56,044 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2023-11-29 06:56:56,045 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=574, Unknown=0, NotChecked=0, Total=650 [2023-11-29 06:56:56,045 INFO L87 Difference]: Start difference. First operand 88 states and 91 transitions. cyclomatic complexity: 6 Second operand has 26 states, 25 states have (on average 2.4) internal successors, (60), 26 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:56,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:56:56,650 INFO L93 Difference]: Finished difference Result 134 states and 138 transitions. [2023-11-29 06:56:56,651 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 134 states and 138 transitions. [2023-11-29 06:56:56,651 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:56:56,652 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 134 states to 95 states and 98 transitions. [2023-11-29 06:56:56,652 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2023-11-29 06:56:56,652 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2023-11-29 06:56:56,652 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 98 transitions. [2023-11-29 06:56:56,652 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:56:56,652 INFO L218 hiAutomatonCegarLoop]: Abstraction has 95 states and 98 transitions. [2023-11-29 06:56:56,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 98 transitions. [2023-11-29 06:56:56,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 92. [2023-11-29 06:56:56,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 91 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:56:56,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 95 transitions. [2023-11-29 06:56:56,656 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 95 transitions. [2023-11-29 06:56:56,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2023-11-29 06:56:56,659 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 95 transitions. [2023-11-29 06:56:56,659 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2023-11-29 06:56:56,659 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 95 transitions. [2023-11-29 06:56:56,659 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:56:56,660 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:56:56,660 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:56:56,661 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [13, 13, 13, 11, 2, 1, 1, 1, 1] [2023-11-29 06:56:56,661 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 8, 1] [2023-11-29 06:56:56,661 INFO L748 eck$LassoCheckResult]: Stem: 3578#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3579#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 3580#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 3567#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 3568#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3589#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3587#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3584#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3585#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3597#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3596#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3595#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3594#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3591#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3593#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3592#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3590#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3588#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3586#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3583#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3582#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3581#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3571#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3572#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3574#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3577#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3656#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3654#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3652#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3650#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3648#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3646#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3644#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3642#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3640#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3638#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3636#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3634#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3632#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3630#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3628#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3626#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3624#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3622#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3620#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3618#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3616#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3614#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3612#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3606#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3609#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3607#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3605#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3603#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3601#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3598#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3575#L556-2 [2023-11-29 06:56:56,661 INFO L750 eck$LassoCheckResult]: Loop: 3575#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3576#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3569#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3570#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3573#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3658#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3657#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3655#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3653#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3651#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3649#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3647#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3645#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3643#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3641#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3639#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3637#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3635#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3633#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3631#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3629#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3627#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3625#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3623#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3621#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3619#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3617#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3615#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3613#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3611#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3610#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3608#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3600#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3604#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3602#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3599#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3575#L556-2 [2023-11-29 06:56:56,661 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:56:56,662 INFO L85 PathProgramCache]: Analyzing trace with hash -1559797093, now seen corresponding path program 11 times [2023-11-29 06:56:56,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:56:56,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330979836] [2023-11-29 06:56:56,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:56:56,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:56:56,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:56:59,061 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 0 proven. 312 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:56:59,061 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:56:59,061 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330979836] [2023-11-29 06:56:59,061 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1330979836] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:56:59,061 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [708221387] [2023-11-29 06:56:59,061 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 06:56:59,061 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:56:59,061 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:56:59,063 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:56:59,064 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2023-11-29 06:56:59,314 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2023-11-29 06:56:59,314 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:56:59,317 INFO L262 TraceCheckSpWp]: Trace formula consists of 578 conjuncts, 46 conjunts are in the unsatisfiable core [2023-11-29 06:56:59,321 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:56:59,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:56:59,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:56:59,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:56:59,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:56:59,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:59,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:56:59,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:56:59,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:56:59,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:56:59,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:56:59,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:56:59,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:56:59,911 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 0 proven. 284 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2023-11-29 06:56:59,911 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:57:00,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:57:00,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:57:00,284 INFO L134 CoverageAnalysis]: Checked inductivity of 312 backedges. 26 proven. 258 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2023-11-29 06:57:00,284 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [708221387] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:57:00,284 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:57:00,285 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 16, 16] total 38 [2023-11-29 06:57:00,285 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624859925] [2023-11-29 06:57:00,285 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:57:00,285 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:57:00,285 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:00,286 INFO L85 PathProgramCache]: Analyzing trace with hash -862028455, now seen corresponding path program 7 times [2023-11-29 06:57:00,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:00,286 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018472355] [2023-11-29 06:57:00,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:00,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:00,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:00,312 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:57:00,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:00,325 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:57:07,968 WARN L293 SmtUtils]: Spent 7.64s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 06:57:08,107 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:57:08,108 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2023-11-29 06:57:08,109 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=1373, Unknown=0, NotChecked=0, Total=1482 [2023-11-29 06:57:08,109 INFO L87 Difference]: Start difference. First operand 92 states and 95 transitions. cyclomatic complexity: 6 Second operand has 39 states, 38 states have (on average 2.6315789473684212) internal successors, (100), 39 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:10,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:57:10,555 INFO L93 Difference]: Finished difference Result 153 states and 158 transitions. [2023-11-29 06:57:10,555 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 153 states and 158 transitions. [2023-11-29 06:57:10,556 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:10,557 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 153 states to 99 states and 102 transitions. [2023-11-29 06:57:10,557 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2023-11-29 06:57:10,557 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2023-11-29 06:57:10,557 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 102 transitions. [2023-11-29 06:57:10,557 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:57:10,557 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 102 transitions. [2023-11-29 06:57:10,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 102 transitions. [2023-11-29 06:57:10,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 96. [2023-11-29 06:57:10,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 96 states have (on average 1.03125) internal successors, (99), 95 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:10,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 99 transitions. [2023-11-29 06:57:10,560 INFO L240 hiAutomatonCegarLoop]: Abstraction has 96 states and 99 transitions. [2023-11-29 06:57:10,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-29 06:57:10,561 INFO L428 stractBuchiCegarLoop]: Abstraction has 96 states and 99 transitions. [2023-11-29 06:57:10,561 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2023-11-29 06:57:10,561 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 96 states and 99 transitions. [2023-11-29 06:57:10,561 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:10,561 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:57:10,561 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:57:10,562 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 14, 14, 12, 2, 1, 1, 1, 1] [2023-11-29 06:57:10,562 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 8, 1] [2023-11-29 06:57:10,563 INFO L748 eck$LassoCheckResult]: Stem: 4278#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4279#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 4280#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 4266#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 4267#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4295#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4293#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4291#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4275#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4276#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4270#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4271#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4274#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4277#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4328#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4327#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4326#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4282#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4283#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4287#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4288#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4294#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4292#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4289#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 4290#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4325#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4324#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4323#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4322#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4321#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4320#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4319#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4318#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4317#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4316#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4315#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4314#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4313#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4312#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4311#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4310#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4309#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4308#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4307#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4306#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4305#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4304#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4303#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4302#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4301#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4300#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4299#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4298#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4286#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4297#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4296#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4284#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4285#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4333#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4329#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 4330#L556-2 [2023-11-29 06:57:10,563 INFO L750 eck$LassoCheckResult]: Loop: 4330#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4361#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4360#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4272#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4273#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4281#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4268#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4269#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4359#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4358#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4357#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4356#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4355#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4354#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4353#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4352#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4351#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4350#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4349#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4348#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4347#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4346#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4345#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4344#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4343#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4342#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4341#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4340#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4339#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4338#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4337#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4336#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4332#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4335#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4334#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4331#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 4330#L556-2 [2023-11-29 06:57:10,563 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:10,563 INFO L85 PathProgramCache]: Analyzing trace with hash 1124683713, now seen corresponding path program 12 times [2023-11-29 06:57:10,563 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:10,563 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114814189] [2023-11-29 06:57:10,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:10,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:10,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:57:12,774 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 364 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:57:12,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:57:12,775 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114814189] [2023-11-29 06:57:12,775 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1114814189] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:57:12,775 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [267255659] [2023-11-29 06:57:12,775 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 06:57:12,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:57:12,775 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:57:12,776 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:57:12,777 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2023-11-29 06:57:13,046 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2023-11-29 06:57:13,046 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:57:13,049 INFO L262 TraceCheckSpWp]: Trace formula consists of 615 conjuncts, 54 conjunts are in the unsatisfiable core [2023-11-29 06:57:13,053 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:57:13,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:57:13,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:13,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:13,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:13,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:57:13,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:57:13,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:57:13,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:13,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:13,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:13,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:13,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:57:13,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:57:13,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:57:13,714 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 349 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2023-11-29 06:57:13,715 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:57:13,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:57:14,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:57:14,157 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 21 proven. 328 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2023-11-29 06:57:14,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [267255659] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:57:14,157 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:57:14,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 18, 18] total 41 [2023-11-29 06:57:14,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256900111] [2023-11-29 06:57:14,158 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:57:14,158 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:57:14,158 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:14,159 INFO L85 PathProgramCache]: Analyzing trace with hash -862028455, now seen corresponding path program 8 times [2023-11-29 06:57:14,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:14,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52014767] [2023-11-29 06:57:14,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:14,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:14,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:14,173 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:57:14,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:14,185 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:57:22,435 WARN L293 SmtUtils]: Spent 8.25s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 06:57:22,607 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:57:22,608 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2023-11-29 06:57:22,608 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=1607, Unknown=0, NotChecked=0, Total=1722 [2023-11-29 06:57:22,608 INFO L87 Difference]: Start difference. First operand 96 states and 99 transitions. cyclomatic complexity: 6 Second operand has 42 states, 41 states have (on average 2.731707317073171) internal successors, (112), 42 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:25,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:57:25,500 INFO L93 Difference]: Finished difference Result 157 states and 162 transitions. [2023-11-29 06:57:25,500 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 157 states and 162 transitions. [2023-11-29 06:57:25,501 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:25,502 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 157 states to 103 states and 106 transitions. [2023-11-29 06:57:25,502 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2023-11-29 06:57:25,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2023-11-29 06:57:25,502 INFO L73 IsDeterministic]: Start isDeterministic. Operand 103 states and 106 transitions. [2023-11-29 06:57:25,502 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:57:25,502 INFO L218 hiAutomatonCegarLoop]: Abstraction has 103 states and 106 transitions. [2023-11-29 06:57:25,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states and 106 transitions. [2023-11-29 06:57:25,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 100. [2023-11-29 06:57:25,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.03) internal successors, (103), 99 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:25,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2023-11-29 06:57:25,504 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-29 06:57:25,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-29 06:57:25,505 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-29 06:57:25,505 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2023-11-29 06:57:25,505 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 103 transitions. [2023-11-29 06:57:25,505 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:25,505 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:57:25,506 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:57:25,507 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 15, 15, 13, 2, 1, 1, 1, 1] [2023-11-29 06:57:25,507 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 8, 1] [2023-11-29 06:57:25,507 INFO L748 eck$LassoCheckResult]: Stem: 5013#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5014#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 5015#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 5000#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 5001#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5026#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5024#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5022#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5010#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5011#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5066#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5008#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5009#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5012#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5004#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5005#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5065#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5064#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5063#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5062#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5061#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5028#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5060#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5030#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5027#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5025#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5023#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5020#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5021#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5059#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5058#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5057#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5056#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5055#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5054#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5053#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5052#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5051#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5050#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5049#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5048#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5047#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5046#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5045#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5044#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5043#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5042#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5041#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5040#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5039#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5038#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5037#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5036#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5035#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5034#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5033#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5032#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5019#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5031#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5029#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5017#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5018#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5071#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5067#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5068#L556-2 [2023-11-29 06:57:25,507 INFO L750 eck$LassoCheckResult]: Loop: 5068#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5099#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5098#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5006#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5007#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5016#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5002#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5003#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5097#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5096#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5095#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5094#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5093#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5092#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5091#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5090#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5089#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5088#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5087#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5086#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5085#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5084#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5083#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5082#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5081#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5080#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5079#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5078#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5077#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5076#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5075#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5074#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5070#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5073#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5072#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5069#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5068#L556-2 [2023-11-29 06:57:25,507 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:25,507 INFO L85 PathProgramCache]: Analyzing trace with hash 140786151, now seen corresponding path program 13 times [2023-11-29 06:57:25,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:25,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031467758] [2023-11-29 06:57:25,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:25,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:25,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:57:27,061 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 4 proven. 412 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2023-11-29 06:57:27,061 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:57:27,061 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031467758] [2023-11-29 06:57:27,061 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031467758] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:57:27,061 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [218229304] [2023-11-29 06:57:27,061 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 06:57:27,061 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:57:27,062 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:57:27,062 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:57:27,064 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2023-11-29 06:57:27,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:57:27,226 INFO L262 TraceCheckSpWp]: Trace formula consists of 652 conjuncts, 62 conjunts are in the unsatisfiable core [2023-11-29 06:57:27,230 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:57:27,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:57:27,240 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:27,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:27,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:27,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:27,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:57:27,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:57:27,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:57:27,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:27,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:27,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:27,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:27,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:27,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:57:27,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:57:27,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:57:27,559 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 414 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2023-11-29 06:57:27,559 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:57:27,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:57:27,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:57:27,859 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 16 proven. 398 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2023-11-29 06:57:27,859 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [218229304] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:57:27,859 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:57:27,859 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 20] total 30 [2023-11-29 06:57:27,859 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [348948495] [2023-11-29 06:57:27,860 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:57:27,860 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:57:27,860 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:27,860 INFO L85 PathProgramCache]: Analyzing trace with hash -862028455, now seen corresponding path program 9 times [2023-11-29 06:57:27,860 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:27,860 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423080760] [2023-11-29 06:57:27,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:27,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:27,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:27,874 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:57:27,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:27,886 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:57:35,157 WARN L293 SmtUtils]: Spent 7.26s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 06:57:35,287 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:57:35,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2023-11-29 06:57:35,288 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=845, Unknown=0, NotChecked=0, Total=930 [2023-11-29 06:57:35,288 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. cyclomatic complexity: 6 Second operand has 31 states, 30 states have (on average 2.6666666666666665) internal successors, (80), 31 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:36,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:57:36,509 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2023-11-29 06:57:36,509 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 146 states and 150 transitions. [2023-11-29 06:57:36,510 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:36,511 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 146 states to 107 states and 110 transitions. [2023-11-29 06:57:36,511 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2023-11-29 06:57:36,511 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2023-11-29 06:57:36,511 INFO L73 IsDeterministic]: Start isDeterministic. Operand 107 states and 110 transitions. [2023-11-29 06:57:36,511 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:57:36,511 INFO L218 hiAutomatonCegarLoop]: Abstraction has 107 states and 110 transitions. [2023-11-29 06:57:36,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states and 110 transitions. [2023-11-29 06:57:36,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 104. [2023-11-29 06:57:36,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 103 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:36,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 107 transitions. [2023-11-29 06:57:36,513 INFO L240 hiAutomatonCegarLoop]: Abstraction has 104 states and 107 transitions. [2023-11-29 06:57:36,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2023-11-29 06:57:36,514 INFO L428 stractBuchiCegarLoop]: Abstraction has 104 states and 107 transitions. [2023-11-29 06:57:36,514 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2023-11-29 06:57:36,514 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 104 states and 107 transitions. [2023-11-29 06:57:36,514 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:36,514 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:57:36,514 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:57:36,515 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [16, 16, 16, 14, 2, 1, 1, 1, 1] [2023-11-29 06:57:36,515 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 8, 1] [2023-11-29 06:57:36,516 INFO L748 eck$LassoCheckResult]: Stem: 5718#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5719#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 5720#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 5706#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 5707#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5733#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5731#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5729#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5714#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5715#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5722#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5776#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5716#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5717#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5710#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5711#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5713#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5775#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5774#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5773#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5772#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5771#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5770#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5769#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5768#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5735#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5767#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5737#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5734#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5732#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5730#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5727#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5728#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5766#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5765#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5764#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5763#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5762#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5761#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5760#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5759#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5758#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5757#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5756#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5755#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5754#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5753#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5752#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5751#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5750#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5749#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5748#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5747#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5746#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5745#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5744#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5743#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5742#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5741#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5740#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5739#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5726#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5738#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5736#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5724#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5725#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5780#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5777#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5723#L556-2 [2023-11-29 06:57:36,516 INFO L750 eck$LassoCheckResult]: Loop: 5723#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5721#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5708#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5709#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5712#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5809#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5808#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5807#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5806#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5805#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5804#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5803#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5802#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5801#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5800#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5799#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5798#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5797#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5796#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5795#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5794#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5793#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5792#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5791#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5790#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5789#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5788#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5787#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5786#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5785#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5784#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5783#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5779#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5782#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5781#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5778#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5723#L556-2 [2023-11-29 06:57:36,516 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:36,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1951506701, now seen corresponding path program 14 times [2023-11-29 06:57:36,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:36,516 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9234025] [2023-11-29 06:57:36,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:36,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:36,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:57:38,353 INFO L134 CoverageAnalysis]: Checked inductivity of 480 backedges. 26 proven. 454 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:57:38,353 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:57:38,353 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9234025] [2023-11-29 06:57:38,353 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [9234025] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:57:38,353 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [800098886] [2023-11-29 06:57:38,353 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 06:57:38,353 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:57:38,354 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:57:38,355 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:57:38,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2023-11-29 06:57:38,536 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 06:57:38,536 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:57:38,540 INFO L262 TraceCheckSpWp]: Trace formula consists of 689 conjuncts, 70 conjunts are in the unsatisfiable core [2023-11-29 06:57:38,545 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:57:38,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:57:38,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:38,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:38,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:38,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:38,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:57:38,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:57:38,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:57:38,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:57:39,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:39,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:39,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:39,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:39,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:39,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:57:39,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:57:39,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:57:39,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:57:39,123 INFO L134 CoverageAnalysis]: Checked inductivity of 480 backedges. 0 proven. 479 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 06:57:39,123 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:57:39,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:57:39,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:57:39,427 INFO L134 CoverageAnalysis]: Checked inductivity of 480 backedges. 11 proven. 468 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 06:57:39,428 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [800098886] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:57:39,428 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:57:39,428 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22] total 37 [2023-11-29 06:57:39,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640694252] [2023-11-29 06:57:39,428 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:57:39,428 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:57:39,429 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:39,429 INFO L85 PathProgramCache]: Analyzing trace with hash -862028455, now seen corresponding path program 10 times [2023-11-29 06:57:39,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:39,429 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391738024] [2023-11-29 06:57:39,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:39,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:39,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:39,443 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:57:39,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:39,455 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:57:47,057 WARN L293 SmtUtils]: Spent 7.60s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 06:57:47,194 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:57:47,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2023-11-29 06:57:47,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=1300, Unknown=0, NotChecked=0, Total=1406 [2023-11-29 06:57:47,195 INFO L87 Difference]: Start difference. First operand 104 states and 107 transitions. cyclomatic complexity: 6 Second operand has 38 states, 37 states have (on average 2.918918918918919) internal successors, (108), 38 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:50,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:57:50,079 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2023-11-29 06:57:50,079 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 150 states and 154 transitions. [2023-11-29 06:57:50,080 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:50,081 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 150 states to 111 states and 114 transitions. [2023-11-29 06:57:50,081 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2023-11-29 06:57:50,081 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2023-11-29 06:57:50,081 INFO L73 IsDeterministic]: Start isDeterministic. Operand 111 states and 114 transitions. [2023-11-29 06:57:50,081 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:57:50,081 INFO L218 hiAutomatonCegarLoop]: Abstraction has 111 states and 114 transitions. [2023-11-29 06:57:50,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states and 114 transitions. [2023-11-29 06:57:50,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 108. [2023-11-29 06:57:50,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.0277777777777777) internal successors, (111), 107 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:57:50,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 111 transitions. [2023-11-29 06:57:50,084 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 111 transitions. [2023-11-29 06:57:50,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2023-11-29 06:57:50,085 INFO L428 stractBuchiCegarLoop]: Abstraction has 108 states and 111 transitions. [2023-11-29 06:57:50,085 INFO L335 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2023-11-29 06:57:50,085 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 111 transitions. [2023-11-29 06:57:50,085 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2023-11-29 06:57:50,085 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:57:50,085 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:57:50,086 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [17, 17, 17, 15, 2, 1, 1, 1, 1] [2023-11-29 06:57:50,086 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 9, 8, 1] [2023-11-29 06:57:50,087 INFO L748 eck$LassoCheckResult]: Stem: 6506#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6507#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 6508#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 6493#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 6494#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6520#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6518#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6516#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6502#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6503#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6510#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6567#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6504#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6505#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6497#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6498#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6501#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6566#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6565#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6564#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6563#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6562#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6561#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6560#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6559#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6558#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6557#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6556#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6555#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6522#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6554#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6524#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6521#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6519#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6517#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6514#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 6515#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6553#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6552#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6551#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6550#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6549#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6548#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6547#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6546#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6545#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6544#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6543#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6542#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6541#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6540#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6539#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6538#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6537#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6536#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6535#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6534#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6533#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6532#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6531#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6530#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6529#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6528#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6527#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6526#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6513#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6525#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6523#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6511#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6512#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6572#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6568#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 6569#L556-2 [2023-11-29 06:57:50,087 INFO L750 eck$LassoCheckResult]: Loop: 6569#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6600#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6599#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6499#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6500#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6509#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6495#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6496#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6598#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6597#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6596#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6595#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6594#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6593#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6592#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6591#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6590#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6589#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6588#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6587#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6586#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6585#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6584#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6583#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6582#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6581#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6580#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6579#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6578#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6577#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6576#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6575#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6571#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6574#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6573#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6570#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 6569#L556-2 [2023-11-29 06:57:50,087 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:50,087 INFO L85 PathProgramCache]: Analyzing trace with hash -817167053, now seen corresponding path program 15 times [2023-11-29 06:57:50,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:50,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390972087] [2023-11-29 06:57:50,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:50,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:50,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:57:51,720 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 58 proven. 486 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 06:57:51,720 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:57:51,720 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390972087] [2023-11-29 06:57:51,720 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [390972087] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:57:51,721 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [45000875] [2023-11-29 06:57:51,721 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 06:57:51,721 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:57:51,721 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:57:51,722 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:57:51,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2023-11-29 06:57:52,017 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2023-11-29 06:57:52,017 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:57:52,021 INFO L262 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 89 conjunts are in the unsatisfiable core [2023-11-29 06:57:52,025 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:57:52,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 06:57:52,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 06:57:52,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 21 [2023-11-29 06:57:52,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2023-11-29 06:57:53,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2023-11-29 06:57:53,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2023-11-29 06:57:53,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2023-11-29 06:57:53,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2023-11-29 06:57:53,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 45 [2023-11-29 06:57:53,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2023-11-29 06:57:53,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2023-11-29 06:57:53,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2023-11-29 06:57:53,883 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 232 proven. 200 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2023-11-29 06:57:53,883 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:57:55,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:57:55,911 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 0 proven. 432 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2023-11-29 06:57:55,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [45000875] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:57:55,911 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:57:55,911 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 30, 30] total 78 [2023-11-29 06:57:55,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1060702529] [2023-11-29 06:57:55,911 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:57:55,912 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:57:55,912 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:57:55,912 INFO L85 PathProgramCache]: Analyzing trace with hash -862028455, now seen corresponding path program 11 times [2023-11-29 06:57:55,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:57:55,912 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327896391] [2023-11-29 06:57:55,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:57:55,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:57:55,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:55,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:57:55,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:57:55,937 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:58:04,136 WARN L293 SmtUtils]: Spent 8.20s on a formula simplification. DAG size of input: 315 DAG size of output: 236 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 06:58:04,261 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:58:04,262 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2023-11-29 06:58:04,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1169, Invalid=4993, Unknown=0, NotChecked=0, Total=6162 [2023-11-29 06:58:04,265 INFO L87 Difference]: Start difference. First operand 108 states and 111 transitions. cyclomatic complexity: 6 Second operand has 79 states, 78 states have (on average 1.9615384615384615) internal successors, (153), 79 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:58:07,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:58:07,594 INFO L93 Difference]: Finished difference Result 202 states and 205 transitions. [2023-11-29 06:58:07,594 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 202 states and 205 transitions. [2023-11-29 06:58:07,595 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 06:58:07,597 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 202 states to 178 states and 181 transitions. [2023-11-29 06:58:07,597 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-29 06:58:07,597 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-29 06:58:07,597 INFO L73 IsDeterministic]: Start isDeterministic. Operand 178 states and 181 transitions. [2023-11-29 06:58:07,597 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:58:07,597 INFO L218 hiAutomatonCegarLoop]: Abstraction has 178 states and 181 transitions. [2023-11-29 06:58:07,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states and 181 transitions. [2023-11-29 06:58:07,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 172. [2023-11-29 06:58:07,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 172 states have (on average 1.0174418604651163) internal successors, (175), 171 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:58:07,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 175 transitions. [2023-11-29 06:58:07,600 INFO L240 hiAutomatonCegarLoop]: Abstraction has 172 states and 175 transitions. [2023-11-29 06:58:07,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2023-11-29 06:58:07,602 INFO L428 stractBuchiCegarLoop]: Abstraction has 172 states and 175 transitions. [2023-11-29 06:58:07,602 INFO L335 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2023-11-29 06:58:07,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 175 transitions. [2023-11-29 06:58:07,603 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 06:58:07,603 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:58:07,603 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:58:07,604 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [25, 25, 25, 23, 2, 1, 1, 1, 1] [2023-11-29 06:58:07,604 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [17, 17, 17, 16, 1] [2023-11-29 06:58:07,604 INFO L748 eck$LassoCheckResult]: Stem: 7470#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7471#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 7472#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 7457#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 7458#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7484#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7482#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7480#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7466#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7467#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7474#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7563#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7468#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7469#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7461#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7462#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7465#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7562#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7561#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7560#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7559#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7558#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7557#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7556#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7555#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7554#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7553#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7552#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7551#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7486#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7490#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7488#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7485#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7483#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7481#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7478#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 7479#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7550#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7549#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7548#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7547#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7546#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7545#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7544#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7543#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7542#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7541#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7540#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7539#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7538#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7537#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7536#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7535#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7534#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7533#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7532#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7531#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7530#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7529#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7528#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7527#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7526#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7525#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7524#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7523#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7522#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7521#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7520#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7519#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7518#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7517#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7516#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7515#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7514#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7513#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7512#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7511#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7510#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7509#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7508#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7507#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7506#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7505#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7504#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7503#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7502#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7501#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7500#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7499#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7498#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7497#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7496#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7495#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7494#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7493#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7492#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7491#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7477#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7489#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7487#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7475#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7476#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7568#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7564#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 7565#L556-2 [2023-11-29 06:58:07,604 INFO L750 eck$LassoCheckResult]: Loop: 7565#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7628#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7627#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7463#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7464#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7473#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7459#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7460#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7626#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7625#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7624#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7623#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7622#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7621#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7620#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7619#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7618#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7617#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7616#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7615#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7614#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7613#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7612#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7611#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7610#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7609#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7608#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7607#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7606#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7605#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7604#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7603#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7602#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7601#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7600#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7599#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7598#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7597#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7596#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7595#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7594#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7593#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7592#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7591#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7590#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7589#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7588#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7587#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7586#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7585#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7584#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7583#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7582#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7581#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7580#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7579#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7578#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7577#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7576#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7575#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7574#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7573#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7572#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7571#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7567#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7570#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7569#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7566#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 7565#L556-2 [2023-11-29 06:58:07,605 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:58:07,605 INFO L85 PathProgramCache]: Analyzing trace with hash -779275677, now seen corresponding path program 16 times [2023-11-29 06:58:07,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:58:07,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1440494962] [2023-11-29 06:58:07,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:58:07,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:58:07,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:58:10,304 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 4 proven. 1084 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2023-11-29 06:58:10,304 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:58:10,304 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1440494962] [2023-11-29 06:58:10,304 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1440494962] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:58:10,304 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1198648545] [2023-11-29 06:58:10,304 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 06:58:10,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:58:10,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:58:10,305 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:58:10,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2023-11-29 06:58:10,557 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 06:58:10,557 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:58:10,561 INFO L262 TraceCheckSpWp]: Trace formula consists of 1022 conjuncts, 78 conjunts are in the unsatisfiable core [2023-11-29 06:58:10,568 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:58:10,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:58:10,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:58:10,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:58:10,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:58:10,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:58:10,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:58:10,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:58:10,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:58:10,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:58:10,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:58:10,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:58:10,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:58:10,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:58:10,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:58:10,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:58:10,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:58:10,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:58:10,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:58:10,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:58:10,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:58:10,965 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2023-11-29 06:58:10,965 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:58:11,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:58:11,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:58:11,316 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 46 proven. 1034 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2023-11-29 06:58:11,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1198648545] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:58:11,316 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:58:11,316 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24, 24] total 34 [2023-11-29 06:58:11,316 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [567909029] [2023-11-29 06:58:11,316 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:58:11,317 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:58:11,317 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:58:11,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1861840247, now seen corresponding path program 12 times [2023-11-29 06:58:11,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:58:11,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517655310] [2023-11-29 06:58:11,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:58:11,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:58:11,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:58:11,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:58:11,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:58:11,357 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 06:59:43,647 WARN L293 SmtUtils]: Spent 1.54m on a formula simplification. DAG size of input: 563 DAG size of output: 412 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 06:59:43,931 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 06:59:43,931 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2023-11-29 06:59:43,932 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1096, Unknown=0, NotChecked=0, Total=1190 [2023-11-29 06:59:43,932 INFO L87 Difference]: Start difference. First operand 172 states and 175 transitions. cyclomatic complexity: 6 Second operand has 35 states, 34 states have (on average 2.823529411764706) internal successors, (96), 35 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:59:45,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 06:59:45,775 INFO L93 Difference]: Finished difference Result 250 states and 254 transitions. [2023-11-29 06:59:45,775 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 250 states and 254 transitions. [2023-11-29 06:59:45,776 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 06:59:45,777 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 250 states to 179 states and 182 transitions. [2023-11-29 06:59:45,777 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-29 06:59:45,777 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-29 06:59:45,777 INFO L73 IsDeterministic]: Start isDeterministic. Operand 179 states and 182 transitions. [2023-11-29 06:59:45,778 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 06:59:45,778 INFO L218 hiAutomatonCegarLoop]: Abstraction has 179 states and 182 transitions. [2023-11-29 06:59:45,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states and 182 transitions. [2023-11-29 06:59:45,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2023-11-29 06:59:45,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 175 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 06:59:45,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 179 transitions. [2023-11-29 06:59:45,780 INFO L240 hiAutomatonCegarLoop]: Abstraction has 176 states and 179 transitions. [2023-11-29 06:59:45,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2023-11-29 06:59:45,781 INFO L428 stractBuchiCegarLoop]: Abstraction has 176 states and 179 transitions. [2023-11-29 06:59:45,781 INFO L335 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2023-11-29 06:59:45,781 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 176 states and 179 transitions. [2023-11-29 06:59:45,782 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 06:59:45,782 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 06:59:45,782 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 06:59:45,783 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [26, 26, 26, 24, 2, 1, 1, 1, 1] [2023-11-29 06:59:45,783 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [17, 17, 17, 16, 1] [2023-11-29 06:59:45,784 INFO L748 eck$LassoCheckResult]: Stem: 8606#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 8607#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 8608#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 8593#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 8594#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8620#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8618#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8616#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8602#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8603#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8610#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8703#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8604#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8605#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8597#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8598#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8601#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8702#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8701#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8700#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8699#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8698#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8697#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8696#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8695#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8694#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8693#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8692#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8691#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8690#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8689#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8688#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8687#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8622#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8686#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8624#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8621#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8619#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8617#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8614#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 8615#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8685#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8684#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8683#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8682#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8681#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8680#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8679#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8678#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8677#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8676#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8675#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8674#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8673#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8672#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8671#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8670#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8669#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8668#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8667#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8666#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8665#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8664#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8663#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8662#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8661#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8660#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8659#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8658#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8657#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8656#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8655#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8654#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8653#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8652#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8651#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8650#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8649#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8648#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8647#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8646#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8645#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8644#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8643#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8642#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8641#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8640#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8639#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8638#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8637#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8636#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8635#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8634#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8633#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8632#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8631#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8630#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8629#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8628#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8627#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8626#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8613#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8625#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8623#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8611#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8612#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8708#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8704#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 8705#L556-2 [2023-11-29 06:59:45,784 INFO L750 eck$LassoCheckResult]: Loop: 8705#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8768#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8767#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8599#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8600#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8609#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8595#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8596#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8766#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8765#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8764#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8763#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8762#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8761#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8760#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8759#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8758#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8757#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8756#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8755#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8754#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8753#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8752#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8751#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8750#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8749#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8748#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8747#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8746#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8745#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8744#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8743#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8742#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8741#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8740#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8739#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8738#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8737#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8736#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8735#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8734#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8733#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8732#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8731#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8730#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8729#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8728#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8727#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8726#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8725#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8724#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8723#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8722#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8721#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8720#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8719#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8718#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8717#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8716#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8715#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8714#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8713#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8712#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8711#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8707#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8710#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8709#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8706#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 8705#L556-2 [2023-11-29 06:59:45,784 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:59:45,784 INFO L85 PathProgramCache]: Analyzing trace with hash 1569586057, now seen corresponding path program 17 times [2023-11-29 06:59:45,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:59:45,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677367372] [2023-11-29 06:59:45,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:59:45,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:59:45,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 06:59:48,737 INFO L134 CoverageAnalysis]: Checked inductivity of 1300 backedges. 4 proven. 1212 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2023-11-29 06:59:48,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 06:59:48,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677367372] [2023-11-29 06:59:48,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1677367372] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 06:59:48,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [264431249] [2023-11-29 06:59:48,737 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 06:59:48,737 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 06:59:48,737 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 06:59:48,738 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 06:59:48,739 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2023-11-29 06:59:50,068 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2023-11-29 06:59:50,068 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 06:59:50,075 INFO L262 TraceCheckSpWp]: Trace formula consists of 1059 conjuncts, 86 conjunts are in the unsatisfiable core [2023-11-29 06:59:50,080 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 06:59:50,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 06:59:50,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:59:50,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:59:50,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:59:50,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:59:50,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:59:50,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:59:50,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 06:59:50,204 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 06:59:50,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:59:50,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 06:59:50,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 06:59:50,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 06:59:50,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 06:59:50,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 06:59:50,529 INFO L134 CoverageAnalysis]: Checked inductivity of 1300 backedges. 0 proven. 1209 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2023-11-29 06:59:50,529 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 06:59:50,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 06:59:50,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 06:59:50,921 INFO L134 CoverageAnalysis]: Checked inductivity of 1300 backedges. 41 proven. 1168 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2023-11-29 06:59:50,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [264431249] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 06:59:50,921 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 06:59:50,921 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 26, 26] total 36 [2023-11-29 06:59:50,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446244828] [2023-11-29 06:59:50,922 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 06:59:50,922 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 06:59:50,922 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 06:59:50,922 INFO L85 PathProgramCache]: Analyzing trace with hash -1861840247, now seen corresponding path program 13 times [2023-11-29 06:59:50,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 06:59:50,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482559962] [2023-11-29 06:59:50,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 06:59:50,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 06:59:50,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:59:50,946 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 06:59:50,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 06:59:50,965 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 07:01:30,152 WARN L293 SmtUtils]: Spent 1.65m on a formula simplification. DAG size of input: 563 DAG size of output: 412 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 07:01:30,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 07:01:30,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2023-11-29 07:01:30,398 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=1235, Unknown=0, NotChecked=0, Total=1332 [2023-11-29 07:01:30,398 INFO L87 Difference]: Start difference. First operand 176 states and 179 transitions. cyclomatic complexity: 6 Second operand has 37 states, 36 states have (on average 2.888888888888889) internal successors, (104), 37 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:01:32,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 07:01:32,739 INFO L93 Difference]: Finished difference Result 254 states and 258 transitions. [2023-11-29 07:01:32,739 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 254 states and 258 transitions. [2023-11-29 07:01:32,740 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:01:32,741 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 254 states to 183 states and 186 transitions. [2023-11-29 07:01:32,741 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-29 07:01:32,741 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-29 07:01:32,741 INFO L73 IsDeterministic]: Start isDeterministic. Operand 183 states and 186 transitions. [2023-11-29 07:01:32,741 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 07:01:32,741 INFO L218 hiAutomatonCegarLoop]: Abstraction has 183 states and 186 transitions. [2023-11-29 07:01:32,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states and 186 transitions. [2023-11-29 07:01:32,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2023-11-29 07:01:32,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 180 states have (on average 1.0166666666666666) internal successors, (183), 179 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:01:32,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 183 transitions. [2023-11-29 07:01:32,744 INFO L240 hiAutomatonCegarLoop]: Abstraction has 180 states and 183 transitions. [2023-11-29 07:01:32,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2023-11-29 07:01:32,745 INFO L428 stractBuchiCegarLoop]: Abstraction has 180 states and 183 transitions. [2023-11-29 07:01:32,745 INFO L335 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2023-11-29 07:01:32,745 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 183 transitions. [2023-11-29 07:01:32,746 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:01:32,746 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 07:01:32,746 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 07:01:32,747 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [27, 27, 27, 25, 2, 1, 1, 1, 1] [2023-11-29 07:01:32,747 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [17, 17, 17, 16, 1] [2023-11-29 07:01:32,747 INFO L748 eck$LassoCheckResult]: Stem: 9784#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9785#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 9786#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 9771#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 9772#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9798#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9796#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9794#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9780#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9781#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9788#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9885#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9782#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9783#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9775#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9776#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9779#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9884#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9883#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9882#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9881#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9880#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9879#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9878#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9877#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9876#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9875#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9874#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9873#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9872#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9871#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9870#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9869#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9868#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9867#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9866#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9865#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9800#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9864#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9802#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9799#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9797#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9795#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9792#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 9793#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9863#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9862#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9861#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9860#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9859#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9858#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9857#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9856#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9855#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9854#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9853#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9852#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9851#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9850#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9849#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9848#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9847#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9846#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9845#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9844#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9843#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9842#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9841#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9840#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9839#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9838#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9837#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9836#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9835#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9834#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9833#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9832#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9831#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9830#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9829#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9828#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9827#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9826#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9825#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9824#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9823#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9822#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9821#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9820#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9819#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9818#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9817#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9816#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9815#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9814#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9813#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9812#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9811#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9810#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9809#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9808#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9807#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9806#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9805#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9804#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9791#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9803#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9801#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9789#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9790#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9890#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9886#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 9887#L556-2 [2023-11-29 07:01:32,748 INFO L750 eck$LassoCheckResult]: Loop: 9887#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9950#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9949#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9777#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9778#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9787#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9773#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9774#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9948#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9947#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9946#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9945#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9944#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9943#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9942#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9941#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9940#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9939#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9938#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9937#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9936#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9935#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9934#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9933#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9932#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9931#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9930#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9929#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9928#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9927#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9926#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9925#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9924#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9923#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9922#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9921#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9920#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9919#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9918#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9917#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9916#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9915#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9914#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9913#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9912#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9911#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9910#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9909#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9908#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9907#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9906#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9905#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9904#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9903#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9902#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9901#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9900#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9899#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9898#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9897#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9896#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9895#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9894#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9893#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9889#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9892#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9891#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9888#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 9887#L556-2 [2023-11-29 07:01:32,748 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:01:32,748 INFO L85 PathProgramCache]: Analyzing trace with hash -65420881, now seen corresponding path program 18 times [2023-11-29 07:01:32,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:01:32,748 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087833033] [2023-11-29 07:01:32,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:01:32,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:01:32,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 07:01:36,215 INFO L134 CoverageAnalysis]: Checked inductivity of 1404 backedges. 4 proven. 1360 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2023-11-29 07:01:36,215 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 07:01:36,215 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087833033] [2023-11-29 07:01:36,216 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2087833033] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 07:01:36,216 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1401285647] [2023-11-29 07:01:36,216 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 07:01:36,216 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 07:01:36,216 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 07:01:36,217 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 07:01:36,218 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2023-11-29 07:01:38,017 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 27 check-sat command(s) [2023-11-29 07:01:38,017 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 07:01:38,026 INFO L262 TraceCheckSpWp]: Trace formula consists of 1096 conjuncts, 112 conjunts are in the unsatisfiable core [2023-11-29 07:01:38,033 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 07:01:38,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 07:01:38,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:01:38,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 07:01:38,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2023-11-29 07:01:38,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 07:01:38,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 07:01:38,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 07:01:38,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2023-11-29 07:01:38,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 07:01:38,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:01:38,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 07:01:38,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:01:38,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 07:01:38,759 INFO L134 CoverageAnalysis]: Checked inductivity of 1404 backedges. 0 proven. 1398 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2023-11-29 07:01:38,759 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 07:01:38,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 07:01:39,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 07:01:39,236 INFO L134 CoverageAnalysis]: Checked inductivity of 1404 backedges. 36 proven. 1302 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2023-11-29 07:01:39,236 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1401285647] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 07:01:39,236 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 07:01:39,236 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 32, 28] total 43 [2023-11-29 07:01:39,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19817827] [2023-11-29 07:01:39,236 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 07:01:39,237 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 07:01:39,237 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:01:39,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1861840247, now seen corresponding path program 14 times [2023-11-29 07:01:39,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:01:39,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [940470624] [2023-11-29 07:01:39,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:01:39,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:01:39,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:01:39,265 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 07:01:39,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:01:39,288 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 07:03:12,992 WARN L293 SmtUtils]: Spent 1.56m on a formula simplification. DAG size of input: 563 DAG size of output: 412 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 07:03:13,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 07:03:13,265 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2023-11-29 07:03:13,266 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=1753, Unknown=0, NotChecked=0, Total=1892 [2023-11-29 07:03:13,266 INFO L87 Difference]: Start difference. First operand 180 states and 183 transitions. cyclomatic complexity: 6 Second operand has 44 states, 43 states have (on average 3.0697674418604652) internal successors, (132), 44 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:03:16,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 07:03:16,015 INFO L93 Difference]: Finished difference Result 258 states and 262 transitions. [2023-11-29 07:03:16,015 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 258 states and 262 transitions. [2023-11-29 07:03:16,016 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:03:16,017 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 258 states to 187 states and 190 transitions. [2023-11-29 07:03:16,017 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-29 07:03:16,017 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-29 07:03:16,017 INFO L73 IsDeterministic]: Start isDeterministic. Operand 187 states and 190 transitions. [2023-11-29 07:03:16,017 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 07:03:16,017 INFO L218 hiAutomatonCegarLoop]: Abstraction has 187 states and 190 transitions. [2023-11-29 07:03:16,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states and 190 transitions. [2023-11-29 07:03:16,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 184. [2023-11-29 07:03:16,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 184 states, 184 states have (on average 1.016304347826087) internal successors, (187), 183 states have internal predecessors, (187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:03:16,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 187 transitions. [2023-11-29 07:03:16,020 INFO L240 hiAutomatonCegarLoop]: Abstraction has 184 states and 187 transitions. [2023-11-29 07:03:16,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2023-11-29 07:03:16,021 INFO L428 stractBuchiCegarLoop]: Abstraction has 184 states and 187 transitions. [2023-11-29 07:03:16,021 INFO L335 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2023-11-29 07:03:16,021 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 184 states and 187 transitions. [2023-11-29 07:03:16,022 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:03:16,022 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 07:03:16,022 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 07:03:16,023 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [28, 28, 28, 26, 2, 1, 1, 1, 1] [2023-11-29 07:03:16,023 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [17, 17, 17, 16, 1] [2023-11-29 07:03:16,023 INFO L748 eck$LassoCheckResult]: Stem: 11005#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11006#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 11007#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 10992#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 10993#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11019#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11017#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11015#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11001#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11002#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11009#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11110#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11003#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11004#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10996#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10997#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11000#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11109#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11108#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11107#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11106#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11105#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11104#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11103#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11102#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11101#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11100#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11099#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11098#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11097#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11096#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11095#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11094#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11093#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11092#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11091#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11090#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11089#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11088#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11087#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11086#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11021#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11085#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11023#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11020#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11018#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11016#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11013#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 11014#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11084#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11083#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11082#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11081#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11080#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11079#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11078#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11077#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11076#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11075#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11074#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11073#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11072#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11071#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11070#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11069#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11068#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11067#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11066#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11065#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11064#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11063#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11062#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11061#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11060#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11059#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11058#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11057#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11056#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11055#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11054#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11053#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11052#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11051#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11050#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11049#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11048#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11047#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11046#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11045#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11044#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11043#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11042#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11041#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11040#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11039#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11038#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11037#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11036#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11035#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11034#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11033#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11032#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11031#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11030#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11029#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11028#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11027#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11026#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11025#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11012#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11024#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11022#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11010#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11011#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11115#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11111#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 11112#L556-2 [2023-11-29 07:03:16,023 INFO L750 eck$LassoCheckResult]: Loop: 11112#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11175#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11174#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10998#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10999#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11008#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10994#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10995#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11173#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11172#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11171#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11170#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11169#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11168#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11167#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11166#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11165#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11164#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11163#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11162#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11161#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11160#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11159#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11158#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11157#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11156#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11155#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11154#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11153#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11152#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11151#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11150#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11149#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11148#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11147#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11146#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11145#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11144#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11143#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11142#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11141#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11140#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11139#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11138#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11137#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11136#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11135#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11134#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11133#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11132#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11131#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11130#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11129#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11128#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11127#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11126#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11125#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11124#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11123#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11122#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11121#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11120#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11119#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11118#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11114#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11117#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11116#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 11113#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 11112#L556-2 [2023-11-29 07:03:16,023 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:03:16,023 INFO L85 PathProgramCache]: Analyzing trace with hash 1164575957, now seen corresponding path program 19 times [2023-11-29 07:03:16,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:03:16,024 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [399232525] [2023-11-29 07:03:16,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:03:16,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:03:16,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 07:03:19,716 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 4 proven. 1468 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2023-11-29 07:03:19,716 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 07:03:19,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [399232525] [2023-11-29 07:03:19,717 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [399232525] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 07:03:19,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [791653503] [2023-11-29 07:03:19,717 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 07:03:19,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 07:03:19,717 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 07:03:19,718 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 07:03:19,719 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2023-11-29 07:03:19,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 07:03:19,976 INFO L262 TraceCheckSpWp]: Trace formula consists of 1133 conjuncts, 102 conjunts are in the unsatisfiable core [2023-11-29 07:03:19,982 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 07:03:19,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 07:03:19,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:03:20,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 07:03:20,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:03:20,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 07:03:20,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:03:20,487 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 07:03:20,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:03:20,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 07:03:20,504 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 0 proven. 1467 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2023-11-29 07:03:20,504 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 07:03:20,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 07:03:20,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 07:03:20,948 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 31 proven. 1436 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2023-11-29 07:03:20,948 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [791653503] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 07:03:20,948 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 07:03:20,948 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 30, 30] total 40 [2023-11-29 07:03:20,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [718338830] [2023-11-29 07:03:20,948 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 07:03:20,949 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 07:03:20,949 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:03:20,949 INFO L85 PathProgramCache]: Analyzing trace with hash -1861840247, now seen corresponding path program 15 times [2023-11-29 07:03:20,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:03:20,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663322057] [2023-11-29 07:03:20,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:03:20,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:03:20,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:03:20,978 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 07:03:20,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:03:21,003 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 07:04:48,926 WARN L293 SmtUtils]: Spent 1.47m on a formula simplification. DAG size of input: 563 DAG size of output: 412 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 07:04:49,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 07:04:49,205 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2023-11-29 07:04:49,206 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=1535, Unknown=0, NotChecked=0, Total=1640 [2023-11-29 07:04:49,206 INFO L87 Difference]: Start difference. First operand 184 states and 187 transitions. cyclomatic complexity: 6 Second operand has 41 states, 40 states have (on average 3.0) internal successors, (120), 41 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:04:52,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 07:04:52,386 INFO L93 Difference]: Finished difference Result 262 states and 266 transitions. [2023-11-29 07:04:52,386 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 262 states and 266 transitions. [2023-11-29 07:04:52,387 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:04:52,388 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 262 states to 191 states and 194 transitions. [2023-11-29 07:04:52,389 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-29 07:04:52,389 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-29 07:04:52,389 INFO L73 IsDeterministic]: Start isDeterministic. Operand 191 states and 194 transitions. [2023-11-29 07:04:52,389 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 07:04:52,389 INFO L218 hiAutomatonCegarLoop]: Abstraction has 191 states and 194 transitions. [2023-11-29 07:04:52,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states and 194 transitions. [2023-11-29 07:04:52,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 188. [2023-11-29 07:04:52,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 188 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 187 states have internal predecessors, (191), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:04:52,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 191 transitions. [2023-11-29 07:04:52,392 INFO L240 hiAutomatonCegarLoop]: Abstraction has 188 states and 191 transitions. [2023-11-29 07:04:52,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2023-11-29 07:04:52,393 INFO L428 stractBuchiCegarLoop]: Abstraction has 188 states and 191 transitions. [2023-11-29 07:04:52,393 INFO L335 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2023-11-29 07:04:52,393 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 188 states and 191 transitions. [2023-11-29 07:04:52,394 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:04:52,394 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 07:04:52,394 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 07:04:52,395 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [29, 29, 29, 27, 2, 1, 1, 1, 1] [2023-11-29 07:04:52,395 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [17, 17, 17, 16, 1] [2023-11-29 07:04:52,395 INFO L748 eck$LassoCheckResult]: Stem: 12263#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 12264#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 12265#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 12250#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 12251#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12277#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12275#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12273#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12259#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12260#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12267#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12372#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12261#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12262#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12254#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12255#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12258#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12371#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12370#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12369#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12368#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12367#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12366#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12365#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12364#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12363#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12362#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12361#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12360#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12359#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12358#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12357#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12356#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12355#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12354#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12353#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12352#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12351#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12350#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12349#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12348#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12347#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12346#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12345#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12344#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12279#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12343#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12281#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12278#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12276#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12274#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12271#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 12272#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12342#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12341#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12340#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12339#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12338#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12337#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12336#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12335#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12334#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12333#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12332#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12331#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12330#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12329#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12328#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12327#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12326#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12325#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12324#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12323#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12322#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12321#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12320#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12319#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12318#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12317#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12316#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12315#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12314#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12313#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12312#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12311#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12310#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12309#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12308#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12307#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12306#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12305#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12304#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12303#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12302#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12301#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12300#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12299#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12298#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12297#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12296#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12295#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12294#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12293#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12292#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12291#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12290#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12289#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12288#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12287#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12286#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12285#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12284#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12283#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12270#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12282#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12280#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12268#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12269#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12377#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12373#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 12374#L556-2 [2023-11-29 07:04:52,396 INFO L750 eck$LassoCheckResult]: Loop: 12374#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12437#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12436#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12256#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12257#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12266#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12252#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12253#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12435#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12434#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12433#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12432#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12431#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12430#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12429#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12428#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12427#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12426#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12425#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12424#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12423#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12422#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12421#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12420#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12419#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12418#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12417#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12416#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12415#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12414#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12413#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12412#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12411#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12410#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12409#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12408#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12407#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12406#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12405#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12404#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12403#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12402#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12401#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12400#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12399#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12398#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12397#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12396#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12395#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12394#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12393#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12392#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12391#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12390#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12389#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12388#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12387#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12386#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12385#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12384#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12383#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12382#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12381#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12380#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12376#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12379#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12378#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12375#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 12374#L556-2 [2023-11-29 07:04:52,396 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:04:52,396 INFO L85 PathProgramCache]: Analyzing trace with hash 418923771, now seen corresponding path program 20 times [2023-11-29 07:04:52,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:04:52,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56913747] [2023-11-29 07:04:52,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:04:52,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:04:52,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 07:04:57,478 INFO L134 CoverageAnalysis]: Checked inductivity of 1624 backedges. 47 proven. 1577 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 07:04:57,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 07:04:57,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [56913747] [2023-11-29 07:04:57,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [56913747] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 07:04:57,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [818262359] [2023-11-29 07:04:57,479 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 07:04:57,479 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 07:04:57,479 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 07:04:57,480 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 07:04:57,481 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2023-11-29 07:04:57,754 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 07:04:57,755 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 07:04:57,760 INFO L262 TraceCheckSpWp]: Trace formula consists of 1170 conjuncts, 110 conjunts are in the unsatisfiable core [2023-11-29 07:04:57,767 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 07:04:57,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 07:04:57,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:57,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:57,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:57,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:57,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:58,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:58,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:58,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:58,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:58,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:04:58,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 07:04:58,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:04:58,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 07:04:58,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,652 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:04:58,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 07:04:58,806 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:04:58,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 07:04:58,813 INFO L134 CoverageAnalysis]: Checked inductivity of 1624 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2023-11-29 07:04:58,813 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 07:04:59,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 07:04:59,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 07:04:59,325 INFO L134 CoverageAnalysis]: Checked inductivity of 1624 backedges. 26 proven. 1570 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2023-11-29 07:04:59,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [818262359] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 07:04:59,325 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 07:04:59,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 32, 32] total 57 [2023-11-29 07:04:59,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285037214] [2023-11-29 07:04:59,325 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 07:04:59,326 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 07:04:59,326 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:04:59,326 INFO L85 PathProgramCache]: Analyzing trace with hash -1861840247, now seen corresponding path program 16 times [2023-11-29 07:04:59,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:04:59,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535732218] [2023-11-29 07:04:59,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:04:59,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:04:59,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:04:59,348 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 07:04:59,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:04:59,366 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 07:06:30,343 WARN L293 SmtUtils]: Spent 1.52m on a formula simplification. DAG size of input: 563 DAG size of output: 412 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 07:06:30,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 07:06:30,614 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2023-11-29 07:06:30,615 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=3144, Unknown=0, NotChecked=0, Total=3306 [2023-11-29 07:06:30,616 INFO L87 Difference]: Start difference. First operand 188 states and 191 transitions. cyclomatic complexity: 6 Second operand has 58 states, 57 states have (on average 3.245614035087719) internal successors, (185), 58 states have internal predecessors, (185), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:06:39,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 07:06:39,294 INFO L93 Difference]: Finished difference Result 266 states and 270 transitions. [2023-11-29 07:06:39,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 266 states and 270 transitions. [2023-11-29 07:06:39,295 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:06:39,297 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 266 states to 195 states and 198 transitions. [2023-11-29 07:06:39,297 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2023-11-29 07:06:39,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2023-11-29 07:06:39,297 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 198 transitions. [2023-11-29 07:06:39,297 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 07:06:39,297 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 198 transitions. [2023-11-29 07:06:39,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 198 transitions. [2023-11-29 07:06:39,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 192. [2023-11-29 07:06:39,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 192 states, 192 states have (on average 1.015625) internal successors, (195), 191 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:06:39,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 195 transitions. [2023-11-29 07:06:39,301 INFO L240 hiAutomatonCegarLoop]: Abstraction has 192 states and 195 transitions. [2023-11-29 07:06:39,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2023-11-29 07:06:39,302 INFO L428 stractBuchiCegarLoop]: Abstraction has 192 states and 195 transitions. [2023-11-29 07:06:39,302 INFO L335 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2023-11-29 07:06:39,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 192 states and 195 transitions. [2023-11-29 07:06:39,303 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2023-11-29 07:06:39,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 07:06:39,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 07:06:39,304 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [30, 30, 30, 28, 2, 1, 1, 1, 1] [2023-11-29 07:06:39,304 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [17, 17, 17, 16, 1] [2023-11-29 07:06:39,305 INFO L748 eck$LassoCheckResult]: Stem: 13668#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 13669#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 13670#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 13655#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 13656#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13682#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13680#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13678#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13664#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13665#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13672#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13781#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13666#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13667#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13659#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13660#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13663#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13780#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13779#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13778#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13777#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13776#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13775#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13774#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13773#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13772#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13771#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13770#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13769#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13768#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13767#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13766#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13765#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13764#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13763#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13762#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13761#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13760#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13759#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13758#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13757#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13756#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13755#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13754#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13753#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13752#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13751#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13750#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13749#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13684#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13748#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13686#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13683#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13681#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13679#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13676#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 13677#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13747#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13746#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13745#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13744#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13743#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13742#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13741#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13740#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13739#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13738#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13737#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13736#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13735#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13734#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13733#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13732#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13731#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13730#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13729#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13728#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13727#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13726#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13725#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13724#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13723#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13722#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13721#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13720#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13719#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13718#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13717#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13716#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13715#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13714#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13713#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13712#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13711#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13710#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13709#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13708#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13707#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13706#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13705#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13704#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13703#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13702#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13701#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13700#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13699#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13698#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13697#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13696#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13695#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13694#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13693#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13692#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13691#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13690#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13689#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13688#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13675#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13687#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13685#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13673#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13674#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13786#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13782#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 13783#L556-2 [2023-11-29 07:06:39,305 INFO L750 eck$LassoCheckResult]: Loop: 13783#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13846#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13845#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13661#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13662#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13671#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13657#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13658#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13844#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13843#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13842#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13841#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13840#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13839#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13838#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13837#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13836#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13835#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13834#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13833#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13832#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13831#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13830#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13829#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13828#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13827#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13826#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13825#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13824#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13823#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13822#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13821#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13820#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13819#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13818#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13817#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13816#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13815#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13814#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13813#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13812#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13811#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13810#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13809#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13808#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13807#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13806#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13805#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13804#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13803#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13802#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13801#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13800#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13799#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13798#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13797#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13796#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13795#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13794#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13793#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13792#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13791#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13790#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13789#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13785#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13788#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13787#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13784#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 13783#L556-2 [2023-11-29 07:06:39,305 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:06:39,305 INFO L85 PathProgramCache]: Analyzing trace with hash -42073567, now seen corresponding path program 21 times [2023-11-29 07:06:39,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:06:39,305 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552287595] [2023-11-29 07:06:39,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:06:39,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:06:39,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 07:06:45,410 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 0 proven. 1740 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 07:06:45,410 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 07:06:45,410 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552287595] [2023-11-29 07:06:45,410 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552287595] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 07:06:45,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [597754855] [2023-11-29 07:06:45,411 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 07:06:45,411 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 07:06:45,411 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 07:06:45,412 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 07:06:45,413 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2023-11-29 07:06:46,726 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2023-11-29 07:06:46,726 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 07:06:46,733 INFO L262 TraceCheckSpWp]: Trace formula consists of 948 conjuncts, 180 conjunts are in the unsatisfiable core [2023-11-29 07:06:46,740 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 07:06:46,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 07:06:46,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:06:47,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2023-11-29 07:06:47,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 07:06:47,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 07:06:47,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 21 [2023-11-29 07:06:48,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 28 [2023-11-29 07:06:48,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 40 [2023-11-29 07:06:48,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 50 [2023-11-29 07:06:49,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 60 [2023-11-29 07:06:49,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 70 [2023-11-29 07:06:50,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 28 [2023-11-29 07:06:50,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 40 [2023-11-29 07:06:50,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 50 [2023-11-29 07:06:51,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 60 [2023-11-29 07:06:51,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 70 [2023-11-29 07:06:52,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 131 treesize of output 80 [2023-11-29 07:06:52,413 WARN L667 sPolynomialRelations]: Constructing 64(two to the power of 6 dual juncts. [2023-11-29 07:06:52,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2023-11-29 07:06:53,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2023-11-29 07:06:53,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 45 [2023-11-29 07:06:53,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2023-11-29 07:06:53,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2023-11-29 07:06:53,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2023-11-29 07:06:53,648 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 671 proven. 849 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2023-11-29 07:06:53,648 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 07:06:57,317 WARN L667 sPolynomialRelations]: Constructing 64(two to the power of 6 dual juncts. [2023-11-29 07:06:57,325 WARN L667 sPolynomialRelations]: Constructing 64(two to the power of 6 dual juncts. [2023-11-29 07:07:01,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:07:01,377 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 312 trivial. 0 not checked. [2023-11-29 07:07:01,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [597754855] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 07:07:01,377 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 07:07:01,377 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 56, 54] total 144 [2023-11-29 07:07:01,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955029107] [2023-11-29 07:07:01,377 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 07:07:01,378 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 07:07:01,378 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:07:01,378 INFO L85 PathProgramCache]: Analyzing trace with hash -1861840247, now seen corresponding path program 17 times [2023-11-29 07:07:01,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:07:01,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605753512] [2023-11-29 07:07:01,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:07:01,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:07:01,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:07:01,401 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 07:07:01,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:07:01,419 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 07:08:30,351 WARN L293 SmtUtils]: Spent 1.48m on a formula simplification. DAG size of input: 563 DAG size of output: 412 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2023-11-29 07:08:30,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 07:08:30,583 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 145 interpolants. [2023-11-29 07:08:30,588 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3011, Invalid=17869, Unknown=0, NotChecked=0, Total=20880 [2023-11-29 07:08:30,588 INFO L87 Difference]: Start difference. First operand 192 states and 195 transitions. cyclomatic complexity: 6 Second operand has 145 states, 144 states have (on average 1.9513888888888888) internal successors, (281), 145 states have internal predecessors, (281), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:08:54,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 07:08:54,658 INFO L93 Difference]: Finished difference Result 459 states and 463 transitions. [2023-11-29 07:08:54,658 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 459 states and 463 transitions. [2023-11-29 07:08:54,660 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 132 [2023-11-29 07:08:54,662 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 459 states to 405 states and 409 transitions. [2023-11-29 07:08:54,662 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 152 [2023-11-29 07:08:54,662 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 152 [2023-11-29 07:08:54,663 INFO L73 IsDeterministic]: Start isDeterministic. Operand 405 states and 409 transitions. [2023-11-29 07:08:54,663 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 07:08:54,663 INFO L218 hiAutomatonCegarLoop]: Abstraction has 405 states and 409 transitions. [2023-11-29 07:08:54,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states and 409 transitions. [2023-11-29 07:08:54,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 320. [2023-11-29 07:08:54,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 320 states have (on average 1.009375) internal successors, (323), 319 states have internal predecessors, (323), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 07:08:54,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 323 transitions. [2023-11-29 07:08:54,668 INFO L240 hiAutomatonCegarLoop]: Abstraction has 320 states and 323 transitions. [2023-11-29 07:08:54,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 218 states. [2023-11-29 07:08:54,669 INFO L428 stractBuchiCegarLoop]: Abstraction has 320 states and 323 transitions. [2023-11-29 07:08:54,669 INFO L335 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2023-11-29 07:08:54,669 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 320 states and 323 transitions. [2023-11-29 07:08:54,670 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 132 [2023-11-29 07:08:54,670 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 07:08:54,670 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 07:08:54,672 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 46, 44, 2, 1, 1, 1, 1] [2023-11-29 07:08:54,672 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [33, 33, 33, 32, 1] [2023-11-29 07:08:54,672 INFO L748 eck$LassoCheckResult]: Stem: 15535#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 15536#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#2(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 15537#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 15522#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#0(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 15523#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15547#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15546#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15545#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15531#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15532#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15539#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15712#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15533#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15534#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15526#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15527#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15530#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15711#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15710#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15709#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15708#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15707#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15706#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15705#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15704#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15703#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15702#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15701#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15700#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15699#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15698#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15697#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15696#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15695#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15694#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15693#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15692#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15691#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15690#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15689#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15688#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15687#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15686#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15685#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15684#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15683#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15682#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15681#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15680#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15551#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15679#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15553#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15550#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15549#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15548#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15543#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 15544#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15678#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15677#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15676#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15675#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15674#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15673#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15672#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15671#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15670#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15669#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15668#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15667#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15666#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15665#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15664#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15663#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15662#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15661#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15660#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15659#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15658#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15657#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15656#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15655#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15654#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15653#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15652#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15651#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15650#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15649#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15648#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15647#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15646#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15645#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15644#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15643#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15642#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15641#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15640#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15639#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15638#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15637#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15636#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15635#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15634#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15633#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15632#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15631#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15630#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15629#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15628#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15627#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15626#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15625#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15624#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15623#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15622#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15621#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15620#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15619#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15618#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15617#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15616#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15615#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15614#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15613#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15612#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15611#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15610#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15609#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15608#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15607#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15606#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15605#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15604#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15603#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15602#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15601#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15600#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15599#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15598#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15597#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15596#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15595#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15594#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15593#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15592#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15591#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15590#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15589#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15588#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15587#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15586#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15585#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15584#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15583#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15582#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15581#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15580#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15579#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15578#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15577#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15576#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15575#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15574#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15573#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15572#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15571#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15570#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15569#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15568#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15567#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15566#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15565#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15564#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15563#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15562#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15561#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15560#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15559#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15558#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15557#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15556#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15555#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15542#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15554#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15552#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15540#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15541#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15717#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15713#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 15714#L556-2 [2023-11-29 07:08:54,673 INFO L750 eck$LassoCheckResult]: Loop: 15714#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15841#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15840#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15528#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15529#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15538#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15524#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15525#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15839#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15838#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15837#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15836#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15835#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15834#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15833#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15832#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15831#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15830#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15829#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15828#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15827#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15826#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15825#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15824#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15823#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15822#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15821#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15820#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15819#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15818#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15817#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15816#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15815#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15814#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15813#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15812#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15811#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15810#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15809#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15808#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15807#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15806#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15805#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15804#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15803#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15802#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15801#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15800#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15799#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15798#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15797#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15796#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15795#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15794#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15793#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15792#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15791#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15790#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15789#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15788#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15787#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15786#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15785#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15784#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15783#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15782#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15781#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15780#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15779#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15778#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15777#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15776#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15775#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15774#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15773#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15772#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15771#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15770#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15769#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15768#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15767#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15766#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15765#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15764#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15763#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15762#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15761#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15760#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15759#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15758#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15757#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15756#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15755#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15754#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15753#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15752#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15751#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15750#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15749#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15748#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15747#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15746#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15745#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15744#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15743#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15742#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15741#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15740#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15739#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15738#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15737#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15736#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15735#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15734#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15733#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15732#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15731#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15730#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15729#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15728#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15727#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15726#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15725#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15724#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15723#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15722#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15721#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15720#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#0(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15716#L556-2 call main_#t~mem12#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#2(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15719#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15718#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#0(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15715#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#0(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 15714#L556-2 [2023-11-29 07:08:54,673 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:08:54,673 INFO L85 PathProgramCache]: Analyzing trace with hash 816000129, now seen corresponding path program 22 times [2023-11-29 07:08:54,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:08:54,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865668060] [2023-11-29 07:08:54,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:08:54,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:08:54,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 07:09:01,178 INFO L134 CoverageAnalysis]: Checked inductivity of 4140 backedges. 4 proven. 3452 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2023-11-29 07:09:01,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 07:09:01,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865668060] [2023-11-29 07:09:01,179 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [865668060] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 07:09:01,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [560861972] [2023-11-29 07:09:01,179 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 07:09:01,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 07:09:01,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 07:09:01,180 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 07:09:01,180 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a36602cc-b215-473f-8702-658c2f7d6ebb/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Waiting until timeout for monitored process [2023-11-29 07:09:01,557 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 07:09:01,557 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 07:09:01,564 INFO L262 TraceCheckSpWp]: Trace formula consists of 1799 conjuncts, 118 conjunts are in the unsatisfiable core [2023-11-29 07:09:01,572 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 07:09:01,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2023-11-29 07:09:01,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2023-11-29 07:09:01,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2023-11-29 07:09:01,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:09:02,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2023-11-29 07:09:02,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2023-11-29 07:09:02,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2023-11-29 07:09:02,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2023-11-29 07:09:02,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2023-11-29 07:09:02,256 INFO L134 CoverageAnalysis]: Checked inductivity of 4140 backedges. 0 proven. 3437 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2023-11-29 07:09:02,256 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 07:09:02,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2023-11-29 07:09:02,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 07:09:02,877 INFO L134 CoverageAnalysis]: Checked inductivity of 4140 backedges. 101 proven. 3336 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2023-11-29 07:09:02,877 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [560861972] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 07:09:02,877 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 07:09:02,878 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 34, 34] total 44 [2023-11-29 07:09:02,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975108020] [2023-11-29 07:09:02,878 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 07:09:02,878 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 07:09:02,879 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 07:09:02,879 INFO L85 PathProgramCache]: Analyzing trace with hash -848003863, now seen corresponding path program 18 times [2023-11-29 07:09:02,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 07:09:02,879 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1848540684] [2023-11-29 07:09:02,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 07:09:02,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 07:09:02,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:09:02,944 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 07:09:03,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 07:09:03,020 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace