./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d69e4513fb8989bf305d8f9ce21862e8623f2a3d0c8146e8e7fb7e8c658a7eff --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 02:56:39,353 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 02:56:39,422 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf [2023-11-29 02:56:39,428 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 02:56:39,428 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 02:56:39,456 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 02:56:39,456 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 02:56:39,457 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 02:56:39,458 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 02:56:39,458 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 02:56:39,459 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 02:56:39,459 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 02:56:39,460 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 02:56:39,461 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-29 02:56:39,461 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-29 02:56:39,462 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-29 02:56:39,462 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-29 02:56:39,463 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-29 02:56:39,463 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-29 02:56:39,464 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 02:56:39,464 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-29 02:56:39,465 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 02:56:39,466 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 02:56:39,466 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-29 02:56:39,466 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-29 02:56:39,467 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-29 02:56:39,467 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-29 02:56:39,468 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 02:56:39,468 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-29 02:56:39,469 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 02:56:39,469 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 02:56:39,469 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 02:56:39,470 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 02:56:39,470 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 02:56:39,471 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-29 02:56:39,471 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d69e4513fb8989bf305d8f9ce21862e8623f2a3d0c8146e8e7fb7e8c658a7eff [2023-11-29 02:56:39,700 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 02:56:39,728 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 02:56:39,731 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 02:56:39,732 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 02:56:39,733 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 02:56:39,734 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c [2023-11-29 02:56:42,502 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 02:56:42,674 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 02:56:42,674 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c [2023-11-29 02:56:42,680 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/data/a0f569f3f/ada351bdd6a54c5c8daf0dba2fd76d34/FLAG18dd4f52f [2023-11-29 02:56:42,690 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/data/a0f569f3f/ada351bdd6a54c5c8daf0dba2fd76d34 [2023-11-29 02:56:42,692 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 02:56:42,693 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 02:56:42,694 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 02:56:42,695 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 02:56:42,699 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 02:56:42,700 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,700 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1e5bd94 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42, skipping insertion in model container [2023-11-29 02:56:42,701 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,714 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 02:56:42,843 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:56:42,849 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 02:56:42,864 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:56:42,882 INFO L206 MainTranslator]: Completed translation [2023-11-29 02:56:42,883 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42 WrapperNode [2023-11-29 02:56:42,883 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 02:56:42,884 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 02:56:42,885 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 02:56:42,885 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 02:56:42,893 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,899 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,918 INFO L138 Inliner]: procedures = 8, calls = 9, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 48 [2023-11-29 02:56:42,919 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 02:56:42,919 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 02:56:42,920 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 02:56:42,920 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 02:56:42,931 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,931 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,933 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,945 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2023-11-29 02:56:42,945 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,946 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,950 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,953 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,954 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,955 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,957 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 02:56:42,958 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 02:56:42,958 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 02:56:42,959 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 02:56:42,960 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (1/1) ... [2023-11-29 02:56:42,966 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:56:42,977 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:42,988 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:56:42,991 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-29 02:56:43,017 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-29 02:56:43,017 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 02:56:43,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 02:56:43,018 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-29 02:56:43,018 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 02:56:43,018 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 02:56:43,081 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 02:56:43,083 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 02:56:43,181 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 02:56:43,188 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 02:56:43,188 INFO L309 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-29 02:56:43,190 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:56:43 BoogieIcfgContainer [2023-11-29 02:56:43,190 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 02:56:43,191 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-29 02:56:43,191 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-29 02:56:43,194 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-29 02:56:43,195 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:56:43,195 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.11 02:56:42" (1/3) ... [2023-11-29 02:56:43,195 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@49919cc6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 02:56:43, skipping insertion in model container [2023-11-29 02:56:43,196 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:56:43,196 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:56:42" (2/3) ... [2023-11-29 02:56:43,196 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@49919cc6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 02:56:43, skipping insertion in model container [2023-11-29 02:56:43,196 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:56:43,196 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:56:43" (3/3) ... [2023-11-29 02:56:43,197 INFO L332 chiAutomizerObserver]: Analyzing ICFG LexIndexValue-Array-1.c [2023-11-29 02:56:43,245 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-29 02:56:43,245 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-29 02:56:43,245 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-29 02:56:43,245 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-29 02:56:43,245 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-29 02:56:43,245 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-29 02:56:43,246 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-29 02:56:43,246 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-29 02:56:43,249 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:43,261 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-29 02:56:43,261 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:43,261 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:43,265 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 02:56:43,265 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 02:56:43,265 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-29 02:56:43,266 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:43,267 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-29 02:56:43,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:43,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:43,268 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 02:56:43,268 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 02:56:43,275 INFO L748 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 8#L14-3true [2023-11-29 02:56:43,276 INFO L750 eck$LassoCheckResult]: Loop: 8#L14-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 13#L14-2true main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 8#L14-3true [2023-11-29 02:56:43,281 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:43,282 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-29 02:56:43,291 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:43,292 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123529765] [2023-11-29 02:56:43,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:43,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:43,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:43,372 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:43,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:43,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:43,398 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:43,398 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-29 02:56:43,398 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:43,398 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104499840] [2023-11-29 02:56:43,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:43,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:43,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:43,410 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:43,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:43,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:43,420 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:43,420 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-29 02:56:43,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:43,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002861341] [2023-11-29 02:56:43,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:43,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:43,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:43,439 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:43,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:43,454 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:43,683 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 02:56:43,684 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 02:56:43,684 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 02:56:43,684 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 02:56:43,684 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 02:56:43,685 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:56:43,685 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 02:56:43,685 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 02:56:43,685 INFO L133 ssoRankerPreferences]: Filename of dumped script: LexIndexValue-Array-1.c_Iteration1_Lasso [2023-11-29 02:56:43,685 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 02:56:43,685 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 02:56:43,703 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,821 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,824 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,827 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,829 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,833 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,835 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,838 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,841 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,843 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,846 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:56:43,985 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 02:56:43,989 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 02:56:43,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:56:43,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:43,992 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:56:43,993 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-29 02:56:43,994 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:56:44,005 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:56:44,005 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:56:44,005 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:56:44,005 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:56:44,011 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:56:44,011 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:56:44,017 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:56:44,021 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-29 02:56:44,032 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:56:44,033 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:44,034 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:56:44,036 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-29 02:56:44,037 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:56:44,047 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:56:44,047 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:56:44,047 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:56:44,047 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:56:44,054 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:56:44,055 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:56:44,066 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 02:56:44,107 INFO L443 ModelExtractionUtils]: Simplification made 16 calls to the SMT solver. [2023-11-29 02:56:44,107 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2023-11-29 02:56:44,109 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:56:44,109 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:44,137 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:56:44,140 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-29 02:56:44,140 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 02:56:44,156 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-29 02:56:44,156 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 02:56:44,157 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2023-11-29 02:56:44,160 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2023-11-29 02:56:44,167 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2023-11-29 02:56:44,174 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #length[~#a~0!base] could not be translated [2023-11-29 02:56:44,193 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:44,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:44,208 INFO L262 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 02:56:44,209 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:44,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:44,224 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 02:56:44,225 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:44,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:44,288 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 02:56:44,290 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:44,336 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 25 states and 37 transitions. Complement of second has 8 states. [2023-11-29 02:56:44,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-29 02:56:44,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:44,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 18 transitions. [2023-11-29 02:56:44,345 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-29 02:56:44,345 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:56:44,346 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-29 02:56:44,346 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:56:44,346 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-29 02:56:44,346 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:56:44,347 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 37 transitions. [2023-11-29 02:56:44,350 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:44,353 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 10 states and 14 transitions. [2023-11-29 02:56:44,354 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-29 02:56:44,354 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:56:44,355 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 14 transitions. [2023-11-29 02:56:44,355 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:56:44,355 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2023-11-29 02:56:44,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 14 transitions. [2023-11-29 02:56:44,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2023-11-29 02:56:44,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.4) internal successors, (14), 9 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:44,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 14 transitions. [2023-11-29 02:56:44,380 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2023-11-29 02:56:44,381 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 14 transitions. [2023-11-29 02:56:44,381 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-29 02:56:44,381 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 14 transitions. [2023-11-29 02:56:44,381 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:44,382 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:44,382 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:44,382 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-29 02:56:44,382 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 02:56:44,382 INFO L748 eck$LassoCheckResult]: Stem: 86#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 87#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 88#L14-3 assume !(main_~i~0#1 < 1048); 84#L14-4 havoc main_~i~0#1; 81#L19-2 [2023-11-29 02:56:44,383 INFO L750 eck$LassoCheckResult]: Loop: 81#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 82#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 83#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 85#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 81#L19-2 [2023-11-29 02:56:44,383 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:44,383 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-29 02:56:44,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:44,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034805592] [2023-11-29 02:56:44,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:44,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:44,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:44,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:44,439 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:56:44,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034805592] [2023-11-29 02:56:44,440 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034805592] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:56:44,440 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:56:44,440 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-29 02:56:44,441 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78638785] [2023-11-29 02:56:44,441 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:56:44,443 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:56:44,444 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:44,444 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 1 times [2023-11-29 02:56:44,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:44,444 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211615474] [2023-11-29 02:56:44,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:44,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:44,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:44,451 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:44,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:44,459 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:44,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:56:44,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-29 02:56:44,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-29 02:56:44,553 INFO L87 Difference]: Start difference. First operand 10 states and 14 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:44,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:56:44,565 INFO L93 Difference]: Finished difference Result 11 states and 14 transitions. [2023-11-29 02:56:44,565 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 14 transitions. [2023-11-29 02:56:44,566 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:44,567 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 14 transitions. [2023-11-29 02:56:44,567 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:56:44,567 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:56:44,567 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 14 transitions. [2023-11-29 02:56:44,567 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:56:44,567 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 14 transitions. [2023-11-29 02:56:44,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 14 transitions. [2023-11-29 02:56:44,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2023-11-29 02:56:44,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:44,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2023-11-29 02:56:44,569 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-29 02:56:44,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-29 02:56:44,570 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2023-11-29 02:56:44,570 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-29 02:56:44,571 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2023-11-29 02:56:44,571 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:44,571 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:44,571 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:44,572 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2023-11-29 02:56:44,572 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 02:56:44,572 INFO L748 eck$LassoCheckResult]: Stem: 113#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 114#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 115#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 116#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 117#L14-3 assume !(main_~i~0#1 < 1048); 111#L14-4 havoc main_~i~0#1; 108#L19-2 [2023-11-29 02:56:44,572 INFO L750 eck$LassoCheckResult]: Loop: 108#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 109#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 110#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 112#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 108#L19-2 [2023-11-29 02:56:44,572 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:44,572 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2023-11-29 02:56:44,573 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:44,573 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126688052] [2023-11-29 02:56:44,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:44,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:44,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:44,622 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:44,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:56:44,623 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126688052] [2023-11-29 02:56:44,623 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1126688052] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:56:44,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2025508100] [2023-11-29 02:56:44,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:44,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:56:44,624 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:44,629 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:56:44,633 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-29 02:56:44,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:44,674 INFO L262 TraceCheckSpWp]: Trace formula consists of 34 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-29 02:56:44,675 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:44,687 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:44,687 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:56:44,706 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:44,706 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2025508100] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:56:44,706 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:56:44,707 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2023-11-29 02:56:44,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [322854130] [2023-11-29 02:56:44,707 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:56:44,707 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:56:44,708 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:44,708 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 2 times [2023-11-29 02:56:44,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:44,709 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752336344] [2023-11-29 02:56:44,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:44,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:44,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:44,715 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:44,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:44,721 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:44,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:56:44,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-29 02:56:44,806 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2023-11-29 02:56:44,807 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:44,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:56:44,839 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2023-11-29 02:56:44,839 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 19 transitions. [2023-11-29 02:56:44,840 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:44,840 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 19 transitions. [2023-11-29 02:56:44,840 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:56:44,841 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:56:44,841 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 19 transitions. [2023-11-29 02:56:44,841 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:56:44,841 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2023-11-29 02:56:44,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 19 transitions. [2023-11-29 02:56:44,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2023-11-29 02:56:44,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.1875) internal successors, (19), 15 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:44,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2023-11-29 02:56:44,843 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2023-11-29 02:56:44,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-29 02:56:44,844 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 19 transitions. [2023-11-29 02:56:44,844 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-29 02:56:44,844 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 19 transitions. [2023-11-29 02:56:44,845 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:44,845 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:44,845 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:44,846 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2023-11-29 02:56:44,846 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 02:56:44,846 INFO L748 eck$LassoCheckResult]: Stem: 179#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 180#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 181#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 182#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 183#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 184#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 185#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 189#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 188#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 187#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 186#L14-3 assume !(main_~i~0#1 < 1048); 177#L14-4 havoc main_~i~0#1; 174#L19-2 [2023-11-29 02:56:44,846 INFO L750 eck$LassoCheckResult]: Loop: 174#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 175#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 176#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 178#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 174#L19-2 [2023-11-29 02:56:44,847 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:44,847 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2023-11-29 02:56:44,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:44,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090889079] [2023-11-29 02:56:44,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:44,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:44,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:44,954 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:44,955 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:56:44,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090889079] [2023-11-29 02:56:44,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1090889079] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:56:44,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1066249109] [2023-11-29 02:56:44,955 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:56:44,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:56:44,956 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:44,957 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:56:44,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-29 02:56:45,009 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:56:45,009 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:56:45,010 INFO L262 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 02:56:45,011 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:45,036 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:45,036 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:56:45,069 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2023-11-29 02:56:45,121 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:45,122 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1066249109] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:56:45,122 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:56:45,122 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2023-11-29 02:56:45,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184884532] [2023-11-29 02:56:45,123 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:56:45,123 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:56:45,123 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:45,124 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 3 times [2023-11-29 02:56:45,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:45,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676073487] [2023-11-29 02:56:45,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:45,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:45,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:45,130 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:45,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:45,135 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:45,215 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:56:45,216 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2023-11-29 02:56:45,216 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2023-11-29 02:56:45,216 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. cyclomatic complexity: 5 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:45,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:56:45,263 INFO L93 Difference]: Finished difference Result 28 states and 31 transitions. [2023-11-29 02:56:45,263 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 31 transitions. [2023-11-29 02:56:45,264 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:45,265 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 31 transitions. [2023-11-29 02:56:45,265 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:56:45,266 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:56:45,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 31 transitions. [2023-11-29 02:56:45,266 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:56:45,266 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2023-11-29 02:56:45,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 31 transitions. [2023-11-29 02:56:45,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2023-11-29 02:56:45,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1071428571428572) internal successors, (31), 27 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:45,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2023-11-29 02:56:45,269 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2023-11-29 02:56:45,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-29 02:56:45,270 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 31 transitions. [2023-11-29 02:56:45,271 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-29 02:56:45,271 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 31 transitions. [2023-11-29 02:56:45,272 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:45,272 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:45,272 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:45,273 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2023-11-29 02:56:45,273 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 02:56:45,273 INFO L748 eck$LassoCheckResult]: Stem: 305#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 306#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 307#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 308#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 309#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 310#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 311#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 327#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 326#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 325#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 324#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 323#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 322#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 321#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 320#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 319#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 318#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 317#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 316#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 315#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 314#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 313#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 312#L14-3 assume !(main_~i~0#1 < 1048); 303#L14-4 havoc main_~i~0#1; 300#L19-2 [2023-11-29 02:56:45,273 INFO L750 eck$LassoCheckResult]: Loop: 300#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 301#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 302#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 304#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 300#L19-2 [2023-11-29 02:56:45,274 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:45,274 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2023-11-29 02:56:45,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:45,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [124835041] [2023-11-29 02:56:45,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:45,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:45,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:45,553 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:45,554 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:56:45,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [124835041] [2023-11-29 02:56:45,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [124835041] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:56:45,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1453598318] [2023-11-29 02:56:45,554 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:56:45,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:56:45,555 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:45,556 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:56:45,561 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-29 02:56:45,731 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-29 02:56:45,731 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:56:45,732 INFO L262 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-29 02:56:45,734 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:45,788 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:45,789 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:56:46,060 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:46,060 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1453598318] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:56:46,060 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:56:46,060 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2023-11-29 02:56:46,061 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143829485] [2023-11-29 02:56:46,061 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:56:46,061 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:56:46,062 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:46,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 4 times [2023-11-29 02:56:46,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:46,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437704311] [2023-11-29 02:56:46,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:46,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:46,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:46,068 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:46,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:46,073 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:46,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:56:46,152 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2023-11-29 02:56:46,152 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2023-11-29 02:56:46,153 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. cyclomatic complexity: 5 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:46,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:56:46,258 INFO L93 Difference]: Finished difference Result 52 states and 55 transitions. [2023-11-29 02:56:46,258 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 55 transitions. [2023-11-29 02:56:46,260 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:46,261 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 55 transitions. [2023-11-29 02:56:46,262 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:56:46,262 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:56:46,262 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 55 transitions. [2023-11-29 02:56:46,262 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:56:46,262 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2023-11-29 02:56:46,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 55 transitions. [2023-11-29 02:56:46,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2023-11-29 02:56:46,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0576923076923077) internal successors, (55), 51 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:46,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2023-11-29 02:56:46,267 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2023-11-29 02:56:46,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-29 02:56:46,268 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 55 transitions. [2023-11-29 02:56:46,268 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-29 02:56:46,268 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 55 transitions. [2023-11-29 02:56:46,270 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:46,270 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:46,270 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:46,271 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2023-11-29 02:56:46,272 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 02:56:46,272 INFO L748 eck$LassoCheckResult]: Stem: 551#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 552#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 553#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 554#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 555#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 556#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 557#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 597#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 596#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 595#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 594#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 593#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 592#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 591#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 590#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 589#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 588#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 587#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 586#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 585#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 584#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 583#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 582#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 581#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 580#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 579#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 578#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 577#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 576#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 575#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 574#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 573#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 572#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 571#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 570#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 569#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 568#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 567#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 566#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 565#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 564#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 563#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 562#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 561#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 560#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 559#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 558#L14-3 assume !(main_~i~0#1 < 1048); 549#L14-4 havoc main_~i~0#1; 546#L19-2 [2023-11-29 02:56:46,272 INFO L750 eck$LassoCheckResult]: Loop: 546#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 547#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 548#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 550#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 546#L19-2 [2023-11-29 02:56:46,272 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:46,272 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2023-11-29 02:56:46,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:46,273 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680650226] [2023-11-29 02:56:46,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:46,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:46,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:46,960 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:46,960 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:56:46,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680650226] [2023-11-29 02:56:46,961 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1680650226] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:56:46,961 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [529295988] [2023-11-29 02:56:46,961 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:56:46,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:56:46,961 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:46,967 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:56:46,968 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-29 02:56:47,082 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:56:47,083 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:56:47,084 INFO L262 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-29 02:56:47,089 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:47,199 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:47,199 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:56:48,025 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:48,025 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [529295988] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:56:48,025 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:56:48,026 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2023-11-29 02:56:48,026 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120095714] [2023-11-29 02:56:48,026 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:56:48,027 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:56:48,027 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:48,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 5 times [2023-11-29 02:56:48,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:48,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955671366] [2023-11-29 02:56:48,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:48,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:48,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:48,033 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:56:48,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:56:48,037 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:56:48,108 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:56:48,110 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2023-11-29 02:56:48,111 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2023-11-29 02:56:48,111 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. cyclomatic complexity: 5 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:48,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:56:48,313 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2023-11-29 02:56:48,313 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 103 transitions. [2023-11-29 02:56:48,315 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:48,317 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 103 transitions. [2023-11-29 02:56:48,317 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:56:48,317 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:56:48,317 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 103 transitions. [2023-11-29 02:56:48,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:56:48,318 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-29 02:56:48,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 103 transitions. [2023-11-29 02:56:48,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2023-11-29 02:56:48,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.03) internal successors, (103), 99 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:48,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2023-11-29 02:56:48,325 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-29 02:56:48,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-29 02:56:48,326 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2023-11-29 02:56:48,326 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-29 02:56:48,326 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 103 transitions. [2023-11-29 02:56:48,328 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:56:48,328 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:56:48,328 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:56:48,332 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2023-11-29 02:56:48,332 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 02:56:48,333 INFO L748 eck$LassoCheckResult]: Stem: 1037#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1038#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 1039#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1040#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1041#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1042#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1043#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1131#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1130#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1129#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1128#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1127#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1126#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1125#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1124#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1123#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1122#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1121#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1120#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1119#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1118#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1117#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1116#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1115#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1114#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1113#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1112#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1111#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1110#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1109#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1108#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1107#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1106#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1105#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1104#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1103#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1102#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1101#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1100#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1099#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1098#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1097#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1096#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1095#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1094#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1093#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1092#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1091#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1090#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1089#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1088#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1087#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1086#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1085#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1084#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1083#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1082#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1081#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1080#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1079#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1078#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1077#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1076#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1075#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1074#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1073#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1072#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1071#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1070#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1069#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1068#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1067#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1066#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1065#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1064#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1063#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1062#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1061#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1060#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1059#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1058#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1057#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1056#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1055#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1054#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1053#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1052#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1051#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1050#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1049#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1048#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1047#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1046#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1045#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1044#L14-3 assume !(main_~i~0#1 < 1048); 1035#L14-4 havoc main_~i~0#1; 1032#L19-2 [2023-11-29 02:56:48,333 INFO L750 eck$LassoCheckResult]: Loop: 1032#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 1033#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 1034#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 1036#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1032#L19-2 [2023-11-29 02:56:48,333 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:48,333 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2023-11-29 02:56:48,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:56:48,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792857118] [2023-11-29 02:56:48,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:56:48,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:56:48,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:56:50,323 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:50,323 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:56:50,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792857118] [2023-11-29 02:56:50,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1792857118] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:56:50,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2129729488] [2023-11-29 02:56:50,323 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:56:50,324 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:56:50,324 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:56:50,325 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:56:50,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-29 02:57:30,187 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-29 02:57:30,187 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:57:30,212 INFO L262 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-29 02:57:30,216 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:57:30,389 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:57:30,389 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:57:32,878 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:57:32,878 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2129729488] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:57:32,878 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:57:32,878 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2023-11-29 02:57:32,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276664883] [2023-11-29 02:57:32,878 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:57:32,879 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:57:32,880 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:57:32,880 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 6 times [2023-11-29 02:57:32,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:57:32,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499206954] [2023-11-29 02:57:32,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:57:32,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:57:32,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:57:32,884 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:57:32,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:57:32,887 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:57:32,942 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:57:32,943 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2023-11-29 02:57:32,948 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2023-11-29 02:57:32,948 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. cyclomatic complexity: 5 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:57:33,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:57:33,294 INFO L93 Difference]: Finished difference Result 196 states and 199 transitions. [2023-11-29 02:57:33,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 199 transitions. [2023-11-29 02:57:33,298 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:57:33,300 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 199 transitions. [2023-11-29 02:57:33,300 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:57:33,300 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:57:33,300 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 199 transitions. [2023-11-29 02:57:33,301 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 02:57:33,302 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2023-11-29 02:57:33,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 199 transitions. [2023-11-29 02:57:33,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2023-11-29 02:57:33,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0153061224489797) internal successors, (199), 195 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:57:33,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 199 transitions. [2023-11-29 02:57:33,311 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2023-11-29 02:57:33,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-29 02:57:33,312 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 199 transitions. [2023-11-29 02:57:33,313 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-29 02:57:33,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 199 transitions. [2023-11-29 02:57:33,314 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2023-11-29 02:57:33,314 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:57:33,314 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:57:33,317 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2023-11-29 02:57:33,317 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2023-11-29 02:57:33,318 INFO L748 eck$LassoCheckResult]: Stem: 2003#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2004#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_#t~mem2#1, main_#t~short3#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 2005#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2006#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2007#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2008#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2009#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2193#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2192#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2191#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2190#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2189#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2188#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2187#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2186#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2185#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2184#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2183#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2182#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2181#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2180#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2179#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2178#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2177#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2176#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2175#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2174#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2173#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2172#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2171#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2170#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2169#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2168#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2167#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2166#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2165#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2164#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2163#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2162#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2161#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2160#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2159#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2158#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2157#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2156#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2155#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2154#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2153#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2152#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2151#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2150#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2149#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2148#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2147#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2146#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2145#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2144#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2143#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2142#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2141#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2140#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2139#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2138#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2137#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2136#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2135#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2134#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2133#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2132#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2131#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2130#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2129#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2128#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2127#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2126#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2125#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2124#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2123#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2122#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2121#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2120#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2119#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2118#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2117#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2116#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2115#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2114#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2113#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2112#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2111#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2110#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2109#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2108#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2107#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2106#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2105#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2104#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2103#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2102#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2101#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2100#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2099#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2098#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2097#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2096#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2095#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2094#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2093#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2092#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2091#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2090#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2089#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2088#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2087#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2086#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2085#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2084#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2083#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2082#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2081#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2080#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2079#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2078#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2077#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2076#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2075#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2074#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2073#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2072#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2071#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2070#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2069#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2068#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2067#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2066#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2065#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2064#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2063#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2062#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2061#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2060#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2059#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2058#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2057#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2056#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2055#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2054#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2053#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2052#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2051#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2050#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2049#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2048#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2047#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2046#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2045#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2044#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2043#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2042#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2041#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2040#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2039#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2038#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2037#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2036#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2035#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2034#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2033#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2032#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2031#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2030#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2029#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2028#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2027#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2026#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2025#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2024#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2023#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2022#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2021#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2020#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2019#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2018#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2017#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2016#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2015#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2014#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2013#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2012#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2011#L14-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2010#L14-3 assume !(main_~i~0#1 < 1048); 2001#L14-4 havoc main_~i~0#1; 1998#L19-2 [2023-11-29 02:57:33,318 INFO L750 eck$LassoCheckResult]: Loop: 1998#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 1999#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 2000#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 2002#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1998#L19-2 [2023-11-29 02:57:33,318 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:57:33,318 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2023-11-29 02:57:33,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:57:33,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082019186] [2023-11-29 02:57:33,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:57:33,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:57:33,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:57:38,846 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:57:38,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:57:38,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1082019186] [2023-11-29 02:57:38,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1082019186] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:57:38,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [299286759] [2023-11-29 02:57:38,847 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:57:38,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:57:38,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:57:38,848 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:57:38,850 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ee2b19d4-f062-4a58-b3ba-54b5d9e909cf/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process