./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d628f3524885345eb9e2318f2d0dbb026e233c3bcc51319b2ad8fc1a71d35580 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 02:44:52,472 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 02:44:52,569 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-64bit-Automizer_Default.epf [2023-11-29 02:44:52,574 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 02:44:52,575 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 02:44:52,602 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 02:44:52,603 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 02:44:52,604 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 02:44:52,604 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 02:44:52,605 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 02:44:52,606 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 02:44:52,606 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 02:44:52,607 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 02:44:52,607 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-29 02:44:52,608 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-29 02:44:52,608 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-29 02:44:52,609 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-29 02:44:52,609 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-29 02:44:52,610 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-29 02:44:52,610 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 02:44:52,611 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-29 02:44:52,612 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 02:44:52,612 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 02:44:52,613 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-29 02:44:52,613 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-29 02:44:52,614 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-29 02:44:52,614 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-29 02:44:52,614 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 02:44:52,615 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-29 02:44:52,615 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 02:44:52,616 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 02:44:52,616 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 02:44:52,616 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 02:44:52,617 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 02:44:52,618 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-29 02:44:52,618 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d628f3524885345eb9e2318f2d0dbb026e233c3bcc51319b2ad8fc1a71d35580 [2023-11-29 02:44:52,911 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 02:44:52,940 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 02:44:52,943 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 02:44:52,944 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 02:44:52,944 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 02:44:52,946 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i [2023-11-29 02:44:56,293 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 02:44:56,587 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 02:44:56,588 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/sv-benchmarks/c/termination-memory-alloca/java_Sequence-alloca.i [2023-11-29 02:44:56,605 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/data/8bd7e413b/22aeb0d956844085bcd7f6b6fd02d64f/FLAGca9b90d1d [2023-11-29 02:44:56,625 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/data/8bd7e413b/22aeb0d956844085bcd7f6b6fd02d64f [2023-11-29 02:44:56,628 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 02:44:56,630 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 02:44:56,632 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 02:44:56,632 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 02:44:56,638 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 02:44:56,638 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:44:56" (1/1) ... [2023-11-29 02:44:56,639 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f2a81e1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:56, skipping insertion in model container [2023-11-29 02:44:56,640 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:44:56" (1/1) ... [2023-11-29 02:44:56,692 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 02:44:57,010 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:44:57,026 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 02:44:57,073 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:44:57,107 INFO L206 MainTranslator]: Completed translation [2023-11-29 02:44:57,108 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57 WrapperNode [2023-11-29 02:44:57,108 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 02:44:57,110 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 02:44:57,110 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 02:44:57,110 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 02:44:57,117 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,130 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,151 INFO L138 Inliner]: procedures = 109, calls = 25, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 57 [2023-11-29 02:44:57,152 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 02:44:57,153 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 02:44:57,153 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 02:44:57,153 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 02:44:57,163 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,164 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,167 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,182 INFO L175 MemorySlicer]: Split 14 memory accesses to 3 slices as follows [4, 6, 4]. 43 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0, 0]. The 7 writes are split as follows [2, 3, 2]. [2023-11-29 02:44:57,182 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,183 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,189 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,192 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,195 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,196 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,199 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 02:44:57,201 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 02:44:57,201 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 02:44:57,201 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 02:44:57,202 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (1/1) ... [2023-11-29 02:44:57,210 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:57,224 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:57,239 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:57,248 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-29 02:44:57,289 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-29 02:44:57,289 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-29 02:44:57,290 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-29 02:44:57,290 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-29 02:44:57,290 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-29 02:44:57,290 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-29 02:44:57,290 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 02:44:57,291 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 02:44:57,291 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 02:44:57,291 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 02:44:57,413 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 02:44:57,416 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 02:44:57,557 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 02:44:57,568 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 02:44:57,569 INFO L309 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-29 02:44:57,571 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:44:57 BoogieIcfgContainer [2023-11-29 02:44:57,571 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 02:44:57,572 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-29 02:44:57,572 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-29 02:44:57,576 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-29 02:44:57,577 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:44:57,578 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.11 02:44:56" (1/3) ... [2023-11-29 02:44:57,579 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7467346e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 02:44:57, skipping insertion in model container [2023-11-29 02:44:57,579 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:44:57,579 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:57" (2/3) ... [2023-11-29 02:44:57,580 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7467346e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 02:44:57, skipping insertion in model container [2023-11-29 02:44:57,580 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 02:44:57,580 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:44:57" (3/3) ... [2023-11-29 02:44:57,582 INFO L332 chiAutomizerObserver]: Analyzing ICFG java_Sequence-alloca.i [2023-11-29 02:44:57,641 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-29 02:44:57,641 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-29 02:44:57,641 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-29 02:44:57,641 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-29 02:44:57,641 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-29 02:44:57,642 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-29 02:44:57,642 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-29 02:44:57,642 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-29 02:44:57,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:57,666 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-29 02:44:57,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:44:57,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:44:57,671 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 02:44:57,671 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:44:57,671 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-29 02:44:57,672 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:57,673 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2023-11-29 02:44:57,673 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:44:57,673 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:44:57,674 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 02:44:57,674 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:44:57,681 INFO L748 eck$LassoCheckResult]: Stem: 12#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 4#L552-4true [2023-11-29 02:44:57,682 INFO L750 eck$LassoCheckResult]: Loop: 4#L552-4true call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 9#L552-1true assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3#L552-3true call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 4#L552-4true [2023-11-29 02:44:57,687 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:57,687 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-29 02:44:57,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:57,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310773308] [2023-11-29 02:44:57,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:57,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:57,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:44:57,849 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:44:57,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:44:57,896 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:44:57,900 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:57,900 INFO L85 PathProgramCache]: Analyzing trace with hash 35911, now seen corresponding path program 1 times [2023-11-29 02:44:57,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:57,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207793302] [2023-11-29 02:44:57,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:57,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:57,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:44:57,923 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:44:57,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:44:57,939 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:44:57,941 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:57,941 INFO L85 PathProgramCache]: Analyzing trace with hash 28694853, now seen corresponding path program 1 times [2023-11-29 02:44:57,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:57,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614520136] [2023-11-29 02:44:57,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:57,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:58,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:44:58,017 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:44:58,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:44:58,052 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:44:58,811 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 02:44:58,812 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 02:44:58,813 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 02:44:58,813 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 02:44:58,813 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 02:44:58,813 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:58,813 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 02:44:58,813 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 02:44:58,814 INFO L133 ssoRankerPreferences]: Filename of dumped script: java_Sequence-alloca.i_Iteration1_Lasso [2023-11-29 02:44:58,814 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 02:44:58,814 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 02:44:58,840 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,851 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,855 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,859 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,863 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,866 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,870 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,874 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,877 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,881 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,884 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:58,887 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:59,339 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:59,343 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:59,345 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:59,348 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:59,352 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 02:44:59,714 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 02:44:59,718 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 02:44:59,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,721 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,722 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,725 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-29 02:44:59,731 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,745 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,745 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:44:59,746 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,746 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,746 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,749 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:44:59,749 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:44:59,752 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,765 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-29 02:44:59,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,765 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,766 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,768 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-29 02:44:59,769 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,781 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,781 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:44:59,781 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,781 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,781 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,782 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:44:59,782 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:44:59,788 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,791 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2023-11-29 02:44:59,792 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,793 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-29 02:44:59,796 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,811 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,811 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,811 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,811 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,816 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:44:59,816 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:44:59,821 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,825 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2023-11-29 02:44:59,826 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,826 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,827 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,830 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-29 02:44:59,833 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,848 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,848 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,848 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,848 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,852 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:44:59,852 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:44:59,858 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,864 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2023-11-29 02:44:59,865 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,865 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,867 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,869 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-29 02:44:59,874 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,889 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,889 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:44:59,890 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,890 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,890 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,891 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:44:59,891 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:44:59,893 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,897 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2023-11-29 02:44:59,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,898 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,899 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,902 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-29 02:44:59,903 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,918 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,918 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:44:59,918 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,919 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,919 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,919 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:44:59,920 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:44:59,922 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,927 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2023-11-29 02:44:59,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,929 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,931 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-29 02:44:59,932 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,947 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,947 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,947 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,947 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,951 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:44:59,951 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:44:59,956 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,961 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2023-11-29 02:44:59,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,962 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,963 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,965 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-29 02:44:59,966 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:44:59,982 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:44:59,982 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:44:59,982 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:44:59,982 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:44:59,982 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:44:59,983 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:44:59,983 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:44:59,985 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:44:59,990 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2023-11-29 02:44:59,990 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:44:59,990 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:59,992 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:59,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-29 02:44:59,995 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:45:00,010 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:45:00,010 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:45:00,010 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:45:00,010 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:45:00,014 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:45:00,014 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:45:00,024 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:45:00,028 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2023-11-29 02:45:00,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:45:00,029 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:00,030 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:45:00,033 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:45:00,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-29 02:45:00,045 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:45:00,045 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:45:00,045 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:45:00,046 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:45:00,046 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:45:00,046 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:45:00,046 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:45:00,048 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:45:00,051 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2023-11-29 02:45:00,052 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:45:00,052 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:00,053 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:45:00,056 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2023-11-29 02:45:00,056 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:45:00,069 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:45:00,069 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 02:45:00,069 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:45:00,069 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:45:00,070 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:45:00,070 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 02:45:00,070 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 02:45:00,072 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:45:00,076 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2023-11-29 02:45:00,076 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:45:00,077 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:00,078 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:45:00,079 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2023-11-29 02:45:00,081 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:45:00,093 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:45:00,094 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:45:00,094 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:45:00,094 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:45:00,100 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:45:00,100 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:45:00,110 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:45:00,113 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2023-11-29 02:45:00,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:45:00,114 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:00,115 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:45:00,118 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2023-11-29 02:45:00,119 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:45:00,131 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:45:00,132 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:45:00,132 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:45:00,132 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:45:00,137 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:45:00,137 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:45:00,145 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 02:45:00,149 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2023-11-29 02:45:00,150 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:45:00,150 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:00,151 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:45:00,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2023-11-29 02:45:00,155 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 02:45:00,168 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 02:45:00,168 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 02:45:00,168 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 02:45:00,168 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 02:45:00,173 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 02:45:00,173 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 02:45:00,180 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 02:45:00,194 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2023-11-29 02:45:00,195 INFO L444 ModelExtractionUtils]: 1 out of 7 variables were initially zero. Simplification set additionally 3 variables to zero. [2023-11-29 02:45:00,197 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 02:45:00,197 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:00,217 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 02:45:00,232 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2023-11-29 02:45:00,232 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 02:45:00,249 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-29 02:45:00,249 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 02:45:00,250 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#2 ULTIMATE.start_main_~i~0#1.base) ULTIMATE.start_main_~i~0#1.offset)_1) = -2*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~i~0#1.base) ULTIMATE.start_main_~i~0#1.offset)_1 + 199 Supporting invariants [] [2023-11-29 02:45:00,255 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2023-11-29 02:45:00,325 INFO L156 tatePredicateManager]: 15 out of 15 supporting invariants were superfluous and have been removed [2023-11-29 02:45:00,334 WARN L1572 BoogieBacktranslator]: Unfinished Backtranslation: ArrayAccessExpression #memory_int#2[~i~0!base][~i~0!offset] could not be translated [2023-11-29 02:45:00,351 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:00,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:00,386 INFO L262 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 02:45:00,387 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:45:00,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:00,408 INFO L262 TraceCheckSpWp]: Trace formula consists of 25 conjuncts, 7 conjunts are in the unsatisfiable core [2023-11-29 02:45:00,409 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:45:00,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:00,498 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2023-11-29 02:45:00,500 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:00,572 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 30 states and 37 transitions. Complement of second has 10 states. [2023-11-29 02:45:00,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 1 stem states 3 non-accepting loop states 1 accepting loop states [2023-11-29 02:45:00,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:00,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 23 transitions. [2023-11-29 02:45:00,582 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 23 transitions. Stem has 2 letters. Loop has 3 letters. [2023-11-29 02:45:00,582 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:45:00,582 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 23 transitions. Stem has 5 letters. Loop has 3 letters. [2023-11-29 02:45:00,583 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:45:00,583 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 23 transitions. Stem has 2 letters. Loop has 6 letters. [2023-11-29 02:45:00,583 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 02:45:00,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 37 transitions. [2023-11-29 02:45:00,586 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:00,589 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 11 states and 13 transitions. [2023-11-29 02:45:00,590 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2023-11-29 02:45:00,590 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:45:00,591 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 13 transitions. [2023-11-29 02:45:00,591 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:45:00,591 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2023-11-29 02:45:00,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 13 transitions. [2023-11-29 02:45:00,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2023-11-29 02:45:00,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:00,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 13 transitions. [2023-11-29 02:45:00,612 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2023-11-29 02:45:00,612 INFO L428 stractBuchiCegarLoop]: Abstraction has 11 states and 13 transitions. [2023-11-29 02:45:00,613 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-29 02:45:00,613 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 13 transitions. [2023-11-29 02:45:00,613 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:00,613 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:45:00,614 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:45:00,614 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2023-11-29 02:45:00,614 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:45:00,614 INFO L748 eck$LassoCheckResult]: Stem: 157#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 158#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 151#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 153#L552-1 assume !(main_#t~mem7#1 < 100);havoc main_#t~mem7#1; 154#L552-5 call write~int#0(5, main_~j~0#1.base, main_~j~0#1.offset, 4); 155#L553-4 [2023-11-29 02:45:00,614 INFO L750 eck$LassoCheckResult]: Loop: 155#L553-4 call main_#t~mem10#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4); 159#L553-1 assume !!(main_#t~mem10#1 < 21);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 156#L553-3 call main_#t~mem9#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#0(3 + main_#t~mem9#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem9#1; 155#L553-4 [2023-11-29 02:45:00,615 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:00,615 INFO L85 PathProgramCache]: Analyzing trace with hash 28694795, now seen corresponding path program 1 times [2023-11-29 02:45:00,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:00,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353585350] [2023-11-29 02:45:00,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:00,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:00,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:00,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:00,782 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:45:00,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1353585350] [2023-11-29 02:45:00,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1353585350] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:45:00,783 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:45:00,784 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-29 02:45:00,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136016300] [2023-11-29 02:45:00,785 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:45:00,787 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:45:00,788 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:00,788 INFO L85 PathProgramCache]: Analyzing trace with hash 50806, now seen corresponding path program 1 times [2023-11-29 02:45:00,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:00,788 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488473864] [2023-11-29 02:45:00,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:00,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:00,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:00,799 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:45:00,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:00,807 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:45:00,910 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:45:00,912 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-29 02:45:00,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-29 02:45:00,914 INFO L87 Difference]: Start difference. First operand 11 states and 13 transitions. cyclomatic complexity: 4 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:00,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:45:00,950 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2023-11-29 02:45:00,950 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 15 transitions. [2023-11-29 02:45:00,951 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:00,952 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 13 states and 14 transitions. [2023-11-29 02:45:00,952 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:45:00,952 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:45:00,952 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 14 transitions. [2023-11-29 02:45:00,952 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:45:00,952 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 14 transitions. [2023-11-29 02:45:00,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 14 transitions. [2023-11-29 02:45:00,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 11. [2023-11-29 02:45:00,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 10 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:00,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 12 transitions. [2023-11-29 02:45:00,954 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions. [2023-11-29 02:45:00,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 02:45:00,956 INFO L428 stractBuchiCegarLoop]: Abstraction has 11 states and 12 transitions. [2023-11-29 02:45:00,956 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-29 02:45:00,956 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 12 transitions. [2023-11-29 02:45:00,957 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:00,957 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:45:00,957 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:45:00,958 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1] [2023-11-29 02:45:00,958 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:45:00,958 INFO L748 eck$LassoCheckResult]: Stem: 191#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 192#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 185#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 186#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 183#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 184#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 187#L552-1 assume !(main_#t~mem7#1 < 100);havoc main_#t~mem7#1; 188#L552-5 call write~int#0(5, main_~j~0#1.base, main_~j~0#1.offset, 4); 189#L553-4 [2023-11-29 02:45:00,958 INFO L750 eck$LassoCheckResult]: Loop: 189#L553-4 call main_#t~mem10#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4); 193#L553-1 assume !!(main_#t~mem10#1 < 21);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 190#L553-3 call main_#t~mem9#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#0(3 + main_#t~mem9#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem9#1; 189#L553-4 [2023-11-29 02:45:00,959 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:00,959 INFO L85 PathProgramCache]: Analyzing trace with hash 149879881, now seen corresponding path program 1 times [2023-11-29 02:45:00,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:00,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502861970] [2023-11-29 02:45:00,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:00,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:00,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:01,184 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:01,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:45:01,185 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502861970] [2023-11-29 02:45:01,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [502861970] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:45:01,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1961358494] [2023-11-29 02:45:01,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:01,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:45:01,187 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:01,188 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:45:01,192 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2023-11-29 02:45:01,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:01,276 INFO L262 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 7 conjunts are in the unsatisfiable core [2023-11-29 02:45:01,278 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:45:01,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:45:01,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 02:45:01,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:45:01,370 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2023-11-29 02:45:01,373 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:01,373 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:45:01,420 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:01,421 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1961358494] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:45:01,421 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:45:01,421 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 10 [2023-11-29 02:45:01,421 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133444506] [2023-11-29 02:45:01,421 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:45:01,422 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:45:01,422 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:01,423 INFO L85 PathProgramCache]: Analyzing trace with hash 50806, now seen corresponding path program 2 times [2023-11-29 02:45:01,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:01,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1583895989] [2023-11-29 02:45:01,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:01,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:01,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:01,431 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:45:01,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:01,437 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:45:01,540 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:45:01,540 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2023-11-29 02:45:01,541 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2023-11-29 02:45:01,541 INFO L87 Difference]: Start difference. First operand 11 states and 12 transitions. cyclomatic complexity: 3 Second operand has 10 states, 10 states have (on average 1.7) internal successors, (17), 10 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:01,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:45:01,630 INFO L93 Difference]: Finished difference Result 25 states and 26 transitions. [2023-11-29 02:45:01,630 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 26 transitions. [2023-11-29 02:45:01,632 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:01,633 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 22 states and 23 transitions. [2023-11-29 02:45:01,633 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:45:01,633 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:45:01,633 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 23 transitions. [2023-11-29 02:45:01,634 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:45:01,634 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 23 transitions. [2023-11-29 02:45:01,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 23 transitions. [2023-11-29 02:45:01,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 20. [2023-11-29 02:45:01,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.05) internal successors, (21), 19 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:01,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2023-11-29 02:45:01,637 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 21 transitions. [2023-11-29 02:45:01,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-29 02:45:01,639 INFO L428 stractBuchiCegarLoop]: Abstraction has 20 states and 21 transitions. [2023-11-29 02:45:01,639 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-29 02:45:01,639 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 21 transitions. [2023-11-29 02:45:01,640 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:01,640 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:45:01,640 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:45:01,641 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 4, 1, 1, 1, 1] [2023-11-29 02:45:01,641 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:45:01,642 INFO L748 eck$LassoCheckResult]: Stem: 288#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 282#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 283#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 280#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 281#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 284#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 299#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 298#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 297#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 296#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 295#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 293#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 294#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 292#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 291#L552-1 assume !(main_#t~mem7#1 < 100);havoc main_#t~mem7#1; 285#L552-5 call write~int#0(5, main_~j~0#1.base, main_~j~0#1.offset, 4); 286#L553-4 [2023-11-29 02:45:01,642 INFO L750 eck$LassoCheckResult]: Loop: 286#L553-4 call main_#t~mem10#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4); 290#L553-1 assume !!(main_#t~mem10#1 < 21);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 287#L553-3 call main_#t~mem9#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#0(3 + main_#t~mem9#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem9#1; 286#L553-4 [2023-11-29 02:45:01,642 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:01,643 INFO L85 PathProgramCache]: Analyzing trace with hash 446171019, now seen corresponding path program 2 times [2023-11-29 02:45:01,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:01,643 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27569551] [2023-11-29 02:45:01,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:01,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:01,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:02,292 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:02,293 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:45:02,293 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27569551] [2023-11-29 02:45:02,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [27569551] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:45:02,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [317366673] [2023-11-29 02:45:02,294 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:45:02,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:45:02,295 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:02,296 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:45:02,299 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2023-11-29 02:45:02,420 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:45:02,420 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:45:02,422 INFO L262 TraceCheckSpWp]: Trace formula consists of 172 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-29 02:45:02,426 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:45:02,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:45:02,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 02:45:02,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:02,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:02,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:02,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:45:02,520 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:02,520 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:45:02,658 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:02,659 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [317366673] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:45:02,659 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:45:02,659 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 8, 8] total 19 [2023-11-29 02:45:02,660 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033898284] [2023-11-29 02:45:02,660 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:45:02,660 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:45:02,661 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:02,661 INFO L85 PathProgramCache]: Analyzing trace with hash 50806, now seen corresponding path program 3 times [2023-11-29 02:45:02,661 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:02,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113811434] [2023-11-29 02:45:02,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:02,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:02,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:02,669 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:45:02,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:02,675 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:45:02,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:45:02,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2023-11-29 02:45:02,779 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=202, Unknown=0, NotChecked=0, Total=342 [2023-11-29 02:45:02,779 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. cyclomatic complexity: 3 Second operand has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 19 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:02,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:45:02,978 INFO L93 Difference]: Finished difference Result 46 states and 47 transitions. [2023-11-29 02:45:02,978 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 47 transitions. [2023-11-29 02:45:02,980 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:02,982 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 40 states and 41 transitions. [2023-11-29 02:45:02,982 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:45:02,982 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:45:02,982 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 41 transitions. [2023-11-29 02:45:02,983 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:45:02,983 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 41 transitions. [2023-11-29 02:45:02,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 41 transitions. [2023-11-29 02:45:02,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 38. [2023-11-29 02:45:02,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.0263157894736843) internal successors, (39), 37 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:02,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 39 transitions. [2023-11-29 02:45:02,988 INFO L240 hiAutomatonCegarLoop]: Abstraction has 38 states and 39 transitions. [2023-11-29 02:45:02,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2023-11-29 02:45:02,989 INFO L428 stractBuchiCegarLoop]: Abstraction has 38 states and 39 transitions. [2023-11-29 02:45:02,990 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-29 02:45:02,990 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 39 transitions. [2023-11-29 02:45:02,991 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:02,991 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:45:02,992 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:45:02,993 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 10, 1, 1, 1, 1] [2023-11-29 02:45:02,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:45:02,994 INFO L748 eck$LassoCheckResult]: Stem: 484#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 485#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 478#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 479#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 476#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 477#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 480#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 513#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 512#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 511#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 510#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 509#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 508#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 507#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 506#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 505#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 504#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 503#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 502#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 501#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 500#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 499#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 498#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 497#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 496#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 495#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 494#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 493#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 492#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 491#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 489#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 490#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 488#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 487#L552-1 assume !(main_#t~mem7#1 < 100);havoc main_#t~mem7#1; 481#L552-5 call write~int#0(5, main_~j~0#1.base, main_~j~0#1.offset, 4); 482#L553-4 [2023-11-29 02:45:02,994 INFO L750 eck$LassoCheckResult]: Loop: 482#L553-4 call main_#t~mem10#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4); 486#L553-1 assume !!(main_#t~mem10#1 < 21);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 483#L553-3 call main_#t~mem9#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#0(3 + main_#t~mem9#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem9#1; 482#L553-4 [2023-11-29 02:45:02,994 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:02,994 INFO L85 PathProgramCache]: Analyzing trace with hash -1419508405, now seen corresponding path program 3 times [2023-11-29 02:45:02,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:02,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903110708] [2023-11-29 02:45:02,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:02,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:03,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:04,801 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:04,801 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:45:04,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [903110708] [2023-11-29 02:45:04,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [903110708] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:45:04,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1140385515] [2023-11-29 02:45:04,802 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:45:04,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:45:04,803 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:04,806 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:45:04,832 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2023-11-29 02:45:05,363 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2023-11-29 02:45:05,363 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:45:05,367 INFO L262 TraceCheckSpWp]: Trace formula consists of 310 conjuncts, 34 conjunts are in the unsatisfiable core [2023-11-29 02:45:05,373 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:45:05,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:45:05,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 02:45:05,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,510 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:05,531 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:45:05,534 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:05,535 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:45:05,899 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:05,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1140385515] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:45:05,899 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:45:05,899 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 14, 14] total 37 [2023-11-29 02:45:05,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1767413019] [2023-11-29 02:45:05,900 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:45:05,901 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:45:05,901 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:05,901 INFO L85 PathProgramCache]: Analyzing trace with hash 50806, now seen corresponding path program 4 times [2023-11-29 02:45:05,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:05,902 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830405513] [2023-11-29 02:45:05,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:05,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:05,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:05,910 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:45:05,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:05,916 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:45:06,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:45:06,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2023-11-29 02:45:06,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=566, Invalid=766, Unknown=0, NotChecked=0, Total=1332 [2023-11-29 02:45:06,007 INFO L87 Difference]: Start difference. First operand 38 states and 39 transitions. cyclomatic complexity: 3 Second operand has 37 states, 37 states have (on average 2.4054054054054053) internal successors, (89), 37 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:06,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:45:06,413 INFO L93 Difference]: Finished difference Result 88 states and 89 transitions. [2023-11-29 02:45:06,413 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 88 states and 89 transitions. [2023-11-29 02:45:06,416 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:06,418 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 88 states to 76 states and 77 transitions. [2023-11-29 02:45:06,418 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:45:06,418 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:45:06,418 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 77 transitions. [2023-11-29 02:45:06,419 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:45:06,419 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 77 transitions. [2023-11-29 02:45:06,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 77 transitions. [2023-11-29 02:45:06,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 74. [2023-11-29 02:45:06,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 74 states have (on average 1.0135135135135136) internal successors, (75), 73 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:06,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 75 transitions. [2023-11-29 02:45:06,426 INFO L240 hiAutomatonCegarLoop]: Abstraction has 74 states and 75 transitions. [2023-11-29 02:45:06,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2023-11-29 02:45:06,427 INFO L428 stractBuchiCegarLoop]: Abstraction has 74 states and 75 transitions. [2023-11-29 02:45:06,427 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-29 02:45:06,427 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 75 transitions. [2023-11-29 02:45:06,429 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:06,429 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:45:06,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:45:06,432 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 22, 1, 1, 1, 1] [2023-11-29 02:45:06,433 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:45:06,433 INFO L748 eck$LassoCheckResult]: Stem: 878#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 879#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 872#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 873#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 870#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 871#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 874#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 943#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 942#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 941#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 940#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 939#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 938#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 937#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 936#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 935#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 934#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 933#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 932#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 931#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 930#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 929#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 928#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 927#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 926#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 925#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 924#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 923#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 922#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 921#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 920#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 919#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 918#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 917#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 916#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 915#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 914#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 913#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 912#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 911#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 910#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 909#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 908#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 907#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 906#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 905#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 904#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 903#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 902#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 901#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 900#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 899#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 898#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 897#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 896#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 895#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 894#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 893#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 892#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 891#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 890#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 889#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 888#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 887#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 886#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 885#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 883#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 884#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 882#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 881#L552-1 assume !(main_#t~mem7#1 < 100);havoc main_#t~mem7#1; 875#L552-5 call write~int#0(5, main_~j~0#1.base, main_~j~0#1.offset, 4); 876#L553-4 [2023-11-29 02:45:06,434 INFO L750 eck$LassoCheckResult]: Loop: 876#L553-4 call main_#t~mem10#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4); 880#L553-1 assume !!(main_#t~mem10#1 < 21);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 877#L553-3 call main_#t~mem9#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#0(3 + main_#t~mem9#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem9#1; 876#L553-4 [2023-11-29 02:45:06,434 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:06,434 INFO L85 PathProgramCache]: Analyzing trace with hash 1124348107, now seen corresponding path program 4 times [2023-11-29 02:45:06,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:06,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1736243916] [2023-11-29 02:45:06,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:06,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:06,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:11,480 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:11,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:45:11,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1736243916] [2023-11-29 02:45:11,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1736243916] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:45:11,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [678121158] [2023-11-29 02:45:11,481 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:45:11,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:45:11,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:11,483 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:45:11,488 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2023-11-29 02:45:12,123 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:45:12,124 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:45:12,129 INFO L262 TraceCheckSpWp]: Trace formula consists of 586 conjuncts, 70 conjunts are in the unsatisfiable core [2023-11-29 02:45:12,142 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:45:12,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:45:12,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 02:45:12,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,280 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:45:12,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:45:12,438 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:12,439 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:45:13,429 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:13,430 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [678121158] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:45:13,430 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:45:13,430 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 26, 26] total 73 [2023-11-29 02:45:13,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115308997] [2023-11-29 02:45:13,430 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:45:13,431 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:45:13,431 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:13,431 INFO L85 PathProgramCache]: Analyzing trace with hash 50806, now seen corresponding path program 5 times [2023-11-29 02:45:13,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:13,432 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027641142] [2023-11-29 02:45:13,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:13,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:13,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:13,438 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:45:13,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:45:13,442 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:45:13,515 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:45:13,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2023-11-29 02:45:13,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2282, Invalid=2974, Unknown=0, NotChecked=0, Total=5256 [2023-11-29 02:45:13,521 INFO L87 Difference]: Start difference. First operand 74 states and 75 transitions. cyclomatic complexity: 3 Second operand has 73 states, 73 states have (on average 2.5342465753424657) internal successors, (185), 73 states have internal predecessors, (185), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:14,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:45:14,713 INFO L93 Difference]: Finished difference Result 172 states and 173 transitions. [2023-11-29 02:45:14,714 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 172 states and 173 transitions. [2023-11-29 02:45:14,717 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:14,719 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 172 states to 148 states and 149 transitions. [2023-11-29 02:45:14,720 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:45:14,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:45:14,720 INFO L73 IsDeterministic]: Start isDeterministic. Operand 148 states and 149 transitions. [2023-11-29 02:45:14,721 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:45:14,721 INFO L218 hiAutomatonCegarLoop]: Abstraction has 148 states and 149 transitions. [2023-11-29 02:45:14,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states and 149 transitions. [2023-11-29 02:45:14,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 146. [2023-11-29 02:45:14,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 146 states have (on average 1.0068493150684932) internal successors, (147), 145 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:45:14,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 147 transitions. [2023-11-29 02:45:14,733 INFO L240 hiAutomatonCegarLoop]: Abstraction has 146 states and 147 transitions. [2023-11-29 02:45:14,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2023-11-29 02:45:14,734 INFO L428 stractBuchiCegarLoop]: Abstraction has 146 states and 147 transitions. [2023-11-29 02:45:14,734 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-29 02:45:14,734 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 146 states and 147 transitions. [2023-11-29 02:45:14,736 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:45:14,736 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:45:14,736 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:45:14,739 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 46, 1, 1, 1, 1] [2023-11-29 02:45:14,740 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:45:14,740 INFO L748 eck$LassoCheckResult]: Stem: 1668#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1669#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 1662#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1663#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1660#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1661#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1664#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1805#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1804#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1803#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1802#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1801#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1800#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1799#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1798#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1797#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1796#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1795#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1794#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1793#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1792#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1791#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1790#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1789#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1788#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1787#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1786#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1785#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1784#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1783#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1782#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1781#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1780#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1779#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1778#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1777#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1776#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1775#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1774#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1773#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1772#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1771#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1770#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1769#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1768#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1767#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1766#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1765#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1764#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1763#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1762#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1761#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1760#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1759#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1758#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1757#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1756#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1755#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1754#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1753#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1752#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1751#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1750#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1749#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1748#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1747#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1746#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1745#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1744#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1743#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1742#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1741#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1740#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1739#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1738#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1737#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1736#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1735#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1734#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1733#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1732#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1731#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1730#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1729#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1728#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1727#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1726#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1725#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1724#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1723#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1722#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1721#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1720#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1719#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1718#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1717#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1716#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1715#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1714#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1713#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1712#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1711#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1710#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1709#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1708#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1707#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1706#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1705#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1704#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1703#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1702#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1701#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1700#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1699#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1698#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1697#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1696#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1695#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1694#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1693#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1692#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1691#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1690#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1689#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1688#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1687#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1686#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1685#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1684#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1683#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1682#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1681#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1680#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1679#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1678#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1677#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1676#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1675#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1673#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 1674#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1672#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 1671#L552-1 assume !(main_#t~mem7#1 < 100);havoc main_#t~mem7#1; 1665#L552-5 call write~int#0(5, main_~j~0#1.base, main_~j~0#1.offset, 4); 1666#L553-4 [2023-11-29 02:45:14,740 INFO L750 eck$LassoCheckResult]: Loop: 1666#L553-4 call main_#t~mem10#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4); 1670#L553-1 assume !!(main_#t~mem10#1 < 21);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 1667#L553-3 call main_#t~mem9#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#0(3 + main_#t~mem9#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem9#1; 1666#L553-4 [2023-11-29 02:45:14,741 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:45:14,741 INFO L85 PathProgramCache]: Analyzing trace with hash 209012683, now seen corresponding path program 5 times [2023-11-29 02:45:14,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:45:14,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581068555] [2023-11-29 02:45:14,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:45:14,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:45:14,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:45:26,993 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:45:26,993 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:45:26,993 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581068555] [2023-11-29 02:45:26,993 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [581068555] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:45:26,993 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2067983362] [2023-11-29 02:45:26,993 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:45:26,993 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:45:26,993 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:45:26,994 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:45:26,995 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2023-11-29 02:47:12,846 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2023-11-29 02:47:12,847 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:47:12,878 INFO L262 TraceCheckSpWp]: Trace formula consists of 1138 conjuncts, 142 conjunts are in the unsatisfiable core [2023-11-29 02:47:12,909 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:47:12,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:47:12,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2023-11-29 02:47:12,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:12,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:12,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:12,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:12,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:12,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:12,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,279 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,308 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:47:13,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:47:13,359 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:47:13,359 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:47:16,306 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:47:16,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2067983362] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:47:16,306 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:47:16,306 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [97, 50, 50] total 145 [2023-11-29 02:47:16,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1575487224] [2023-11-29 02:47:16,307 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:47:16,308 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 02:47:16,308 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:47:16,308 INFO L85 PathProgramCache]: Analyzing trace with hash 50806, now seen corresponding path program 6 times [2023-11-29 02:47:16,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:47:16,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359656099] [2023-11-29 02:47:16,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:47:16,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:47:16,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:47:16,314 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 02:47:16,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 02:47:16,319 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 02:47:16,379 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:47:16,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 145 interpolants. [2023-11-29 02:47:16,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9170, Invalid=11710, Unknown=0, NotChecked=0, Total=20880 [2023-11-29 02:47:16,390 INFO L87 Difference]: Start difference. First operand 146 states and 147 transitions. cyclomatic complexity: 3 Second operand has 145 states, 145 states have (on average 2.6) internal successors, (377), 145 states have internal predecessors, (377), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:47:20,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:47:20,079 INFO L93 Difference]: Finished difference Result 340 states and 341 transitions. [2023-11-29 02:47:20,079 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 340 states and 341 transitions. [2023-11-29 02:47:20,082 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:47:20,086 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 340 states to 292 states and 293 transitions. [2023-11-29 02:47:20,086 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2023-11-29 02:47:20,086 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2023-11-29 02:47:20,086 INFO L73 IsDeterministic]: Start isDeterministic. Operand 292 states and 293 transitions. [2023-11-29 02:47:20,087 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2023-11-29 02:47:20,087 INFO L218 hiAutomatonCegarLoop]: Abstraction has 292 states and 293 transitions. [2023-11-29 02:47:20,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states and 293 transitions. [2023-11-29 02:47:20,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 290. [2023-11-29 02:47:20,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 290 states have (on average 1.0034482758620689) internal successors, (291), 289 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:47:20,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 291 transitions. [2023-11-29 02:47:20,106 INFO L240 hiAutomatonCegarLoop]: Abstraction has 290 states and 291 transitions. [2023-11-29 02:47:20,107 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2023-11-29 02:47:20,107 INFO L428 stractBuchiCegarLoop]: Abstraction has 290 states and 291 transitions. [2023-11-29 02:47:20,108 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-29 02:47:20,108 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 290 states and 291 transitions. [2023-11-29 02:47:20,110 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2023-11-29 02:47:20,110 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 02:47:20,110 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 02:47:20,118 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 94, 1, 1, 1, 1] [2023-11-29 02:47:20,118 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 02:47:20,119 INFO L748 eck$LassoCheckResult]: Stem: 3250#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3251#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem8#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem11#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int#1(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#2(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 3244#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3245#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3242#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3243#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3246#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3531#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3530#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3529#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3528#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3527#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3526#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3525#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3524#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3523#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3522#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3521#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3520#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3519#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3518#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3517#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3516#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3515#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3514#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3513#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3512#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3511#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3510#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3509#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3508#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3507#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3506#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3505#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3504#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3503#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3502#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3501#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3500#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3499#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3498#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3497#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3496#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3495#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3494#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3493#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3492#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3491#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3490#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3489#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3488#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3487#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3486#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3485#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3484#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3483#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3482#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3481#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3480#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3479#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3478#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3477#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3476#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3475#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3474#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3473#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3472#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3471#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3470#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3469#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3468#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3467#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3466#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3465#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3464#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3463#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3462#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3461#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3460#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3459#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3458#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3457#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3456#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3455#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3454#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3453#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3452#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3451#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3450#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3449#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3448#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3447#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3446#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3445#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3444#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3443#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3442#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3441#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3440#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3439#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3438#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3437#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3436#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3435#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3434#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3433#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3432#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3431#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3430#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3429#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3428#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3427#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3426#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3425#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3424#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3423#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3422#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3421#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3420#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3419#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3418#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3417#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3416#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3415#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3414#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3413#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3412#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3411#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3410#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3409#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3408#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3407#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3406#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3405#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3404#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3403#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3402#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3401#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3400#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3399#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3398#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3397#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3396#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3395#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3394#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3393#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3392#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3391#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3390#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3389#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3388#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3387#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3386#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3385#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3384#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3383#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3382#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3381#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3380#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3379#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3378#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3377#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3376#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3375#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3374#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3373#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3372#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3371#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3370#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3369#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3368#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3367#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3366#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3365#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3364#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3363#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3362#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3361#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3360#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3359#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3358#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3357#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3356#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3355#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3354#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3353#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3352#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3351#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3350#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3349#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3348#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3347#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3346#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3345#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3344#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3343#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3342#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3341#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3340#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3339#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3338#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3337#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3336#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3335#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3334#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3333#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3332#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3331#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3330#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3329#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3328#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3327#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3326#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3325#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3324#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3323#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3322#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3321#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3320#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3319#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3318#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3317#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3316#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3315#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3314#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3313#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3312#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3311#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3310#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3309#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3308#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3307#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3306#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3305#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3304#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3303#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3302#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3301#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3300#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3299#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3298#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3297#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3296#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3295#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3294#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3293#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3292#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3291#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3290#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3289#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3288#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3287#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3286#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3285#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3284#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3283#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3282#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3281#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3280#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3279#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3278#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3277#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3276#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3275#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3274#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3273#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3272#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3271#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3270#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3269#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3268#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3267#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3266#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3265#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3264#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3263#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3262#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3261#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3260#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3259#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3258#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3257#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3255#L552-1 assume !!(main_#t~mem7#1 < 100);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem8#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem8#1; 3256#L552-3 call main_#t~mem5#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int#2(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3254#L552-4 call main_#t~mem7#1 := read~int#2(main_~i~0#1.base, main_~i~0#1.offset, 4); 3253#L552-1 assume !(main_#t~mem7#1 < 100);havoc main_#t~mem7#1; 3247#L552-5 call write~int#0(5, main_~j~0#1.base, main_~j~0#1.offset, 4); 3248#L553-4 [2023-11-29 02:47:20,119 INFO L750 eck$LassoCheckResult]: Loop: 3248#L553-4 call main_#t~mem10#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4); 3252#L553-1 assume !!(main_#t~mem10#1 < 21);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int#1(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int#1(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 3249#L553-3 call main_#t~mem9#1 := read~int#0(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int#0(3 + main_#t~mem9#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem9#1; 3248#L553-4 [2023-11-29 02:47:20,120 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:47:20,120 INFO L85 PathProgramCache]: Analyzing trace with hash -526748213, now seen corresponding path program 6 times [2023-11-29 02:47:20,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:47:20,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320453919] [2023-11-29 02:47:20,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:47:20,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:47:20,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:48:08,585 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 0 proven. 13301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:48:08,585 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:48:08,585 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [320453919] [2023-11-29 02:48:08,585 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [320453919] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:48:08,585 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1856900970] [2023-11-29 02:48:08,585 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:48:08,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:48:08,585 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:48:08,586 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:48:08,587 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_36ab7cc7-d174-44b4-9367-25d9204f3dd1/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process