./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-examples/sanfoundry_24-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-examples/sanfoundry_24-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e0a16588b251f5de7b3febde43795c7086835cc989637b8bd82aa8d6af355c6b --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 01:23:48,930 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 01:23:48,996 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-29 01:23:49,001 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 01:23:49,002 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 01:23:49,028 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 01:23:49,028 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 01:23:49,029 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 01:23:49,030 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 01:23:49,030 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 01:23:49,031 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 01:23:49,032 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 01:23:49,032 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 01:23:49,033 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-29 01:23:49,033 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-29 01:23:49,034 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-29 01:23:49,034 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-29 01:23:49,035 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-29 01:23:49,035 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-29 01:23:49,036 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 01:23:49,036 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-29 01:23:49,037 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-29 01:23:49,037 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 01:23:49,037 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-29 01:23:49,038 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 01:23:49,038 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-29 01:23:49,039 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-29 01:23:49,039 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-29 01:23:49,039 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-29 01:23:49,040 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-29 01:23:49,040 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 01:23:49,041 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-29 01:23:49,041 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 01:23:49,041 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 01:23:49,042 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 01:23:49,042 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 01:23:49,043 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 01:23:49,043 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-29 01:23:49,043 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e0a16588b251f5de7b3febde43795c7086835cc989637b8bd82aa8d6af355c6b [2023-11-29 01:23:49,254 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 01:23:49,275 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 01:23:49,278 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 01:23:49,279 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 01:23:49,280 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 01:23:49,281 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/array-examples/sanfoundry_24-1.i [2023-11-29 01:23:52,088 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 01:23:52,290 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 01:23:52,291 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/sv-benchmarks/c/array-examples/sanfoundry_24-1.i [2023-11-29 01:23:52,297 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/data/ad21d6a70/a3de4f6f16754e6b969dcb206a4ac1e8/FLAG23e583cbf [2023-11-29 01:23:52,309 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/data/ad21d6a70/a3de4f6f16754e6b969dcb206a4ac1e8 [2023-11-29 01:23:52,312 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 01:23:52,313 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 01:23:52,315 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 01:23:52,315 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 01:23:52,321 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 01:23:52,322 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,323 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6f8d3678 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52, skipping insertion in model container [2023-11-29 01:23:52,323 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,347 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 01:23:52,519 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 01:23:52,532 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 01:23:52,552 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 01:23:52,568 INFO L206 MainTranslator]: Completed translation [2023-11-29 01:23:52,568 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52 WrapperNode [2023-11-29 01:23:52,569 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 01:23:52,570 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 01:23:52,570 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 01:23:52,570 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 01:23:52,578 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,585 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,608 INFO L138 Inliner]: procedures = 18, calls = 19, calls flagged for inlining = 7, calls inlined = 8, statements flattened = 80 [2023-11-29 01:23:52,609 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 01:23:52,610 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 01:23:52,610 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 01:23:52,610 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 01:23:52,623 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,623 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,626 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,642 INFO L175 MemorySlicer]: Split 7 memory accesses to 2 slices as follows [2, 5]. 71 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 1 writes are split as follows [0, 1]. [2023-11-29 01:23:52,642 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,643 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,648 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,652 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,654 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,655 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,659 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 01:23:52,660 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 01:23:52,660 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 01:23:52,660 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 01:23:52,661 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (1/1) ... [2023-11-29 01:23:52,667 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:52,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:52,691 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:52,694 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-29 01:23:52,730 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-29 01:23:52,730 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-29 01:23:52,730 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-29 01:23:52,730 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 01:23:52,731 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-29 01:23:52,731 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-29 01:23:52,731 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 01:23:52,731 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 01:23:52,731 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-29 01:23:52,731 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-29 01:23:52,732 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 01:23:52,816 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 01:23:52,818 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 01:23:52,972 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 01:23:52,982 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 01:23:52,982 INFO L309 CfgBuilder]: Removed 3 assume(true) statements. [2023-11-29 01:23:52,984 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 01:23:52 BoogieIcfgContainer [2023-11-29 01:23:52,984 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 01:23:52,985 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-29 01:23:52,985 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-29 01:23:52,989 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-29 01:23:52,990 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 01:23:52,990 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.11 01:23:52" (1/3) ... [2023-11-29 01:23:52,991 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5130524d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 01:23:52, skipping insertion in model container [2023-11-29 01:23:52,992 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 01:23:52,992 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 01:23:52" (2/3) ... [2023-11-29 01:23:52,992 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5130524d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 01:23:52, skipping insertion in model container [2023-11-29 01:23:52,992 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 01:23:52,993 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 01:23:52" (3/3) ... [2023-11-29 01:23:52,994 INFO L332 chiAutomizerObserver]: Analyzing ICFG sanfoundry_24-1.i [2023-11-29 01:23:53,050 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-29 01:23:53,050 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-29 01:23:53,050 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-29 01:23:53,051 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-29 01:23:53,051 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-29 01:23:53,051 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-29 01:23:53,051 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-29 01:23:53,052 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-29 01:23:53,056 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:53,075 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 20 [2023-11-29 01:23:53,076 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:53,076 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:53,081 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 01:23:53,081 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 01:23:53,081 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-29 01:23:53,082 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 28 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:53,084 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 20 [2023-11-29 01:23:53,084 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:53,084 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:53,085 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-29 01:23:53,085 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-11-29 01:23:53,093 INFO L748 eck$LassoCheckResult]: Stem: 27#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 4#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 28#L27-3true [2023-11-29 01:23:53,094 INFO L750 eck$LassoCheckResult]: Loop: 28#L27-3true assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5#L27-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28#L27-3true [2023-11-29 01:23:53,099 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:53,099 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2023-11-29 01:23:53,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:53,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513060310] [2023-11-29 01:23:53,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:53,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:53,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:53,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:53,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:53,236 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:53,239 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:53,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2023-11-29 01:23:53,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:53,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712525811] [2023-11-29 01:23:53,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:53,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:53,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:53,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:53,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:53,262 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:53,264 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:53,264 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2023-11-29 01:23:53,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:53,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261876125] [2023-11-29 01:23:53,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:53,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:53,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:53,291 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:53,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:53,309 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:53,645 INFO L210 LassoAnalysis]: Preferences: [2023-11-29 01:23:53,646 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2023-11-29 01:23:53,646 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2023-11-29 01:23:53,646 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2023-11-29 01:23:53,646 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2023-11-29 01:23:53,647 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:53,647 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2023-11-29 01:23:53,647 INFO L132 ssoRankerPreferences]: Path of dumped script: [2023-11-29 01:23:53,647 INFO L133 ssoRankerPreferences]: Filename of dumped script: sanfoundry_24-1.i_Iteration1_Lasso [2023-11-29 01:23:53,647 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2023-11-29 01:23:53,647 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2023-11-29 01:23:53,667 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,677 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,680 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,697 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,700 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,703 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,705 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,884 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,889 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,892 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,895 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:53,898 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2023-11-29 01:23:54,117 INFO L294 LassoAnalysis]: Preprocessing complete. [2023-11-29 01:23:54,121 INFO L490 LassoAnalysis]: Using template 'affine'. [2023-11-29 01:23:54,122 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,123 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,124 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,127 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2023-11-29 01:23:54,127 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,147 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,147 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 01:23:54,147 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,148 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,148 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,150 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 01:23:54,150 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 01:23:54,153 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,158 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2023-11-29 01:23:54,159 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,160 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,163 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2023-11-29 01:23:54,170 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,183 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,184 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 01:23:54,184 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,184 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,184 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,185 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 01:23:54,185 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 01:23:54,187 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,190 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2023-11-29 01:23:54,191 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,191 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,192 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,195 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2023-11-29 01:23:54,196 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,208 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,209 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,209 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,209 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,213 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 01:23:54,213 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 01:23:54,219 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,222 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2023-11-29 01:23:54,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,223 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,224 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,227 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2023-11-29 01:23:54,227 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,238 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,238 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,238 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,239 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,242 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 01:23:54,242 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 01:23:54,249 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,251 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2023-11-29 01:23:54,252 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,252 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,254 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,257 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2023-11-29 01:23:54,258 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,269 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,269 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 01:23:54,269 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,269 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,269 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,270 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 01:23:54,270 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 01:23:54,274 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,277 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2023-11-29 01:23:54,277 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,277 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,278 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,281 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2023-11-29 01:23:54,281 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,292 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,292 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 01:23:54,292 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,292 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,293 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,293 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 01:23:54,293 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 01:23:54,295 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,298 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2023-11-29 01:23:54,299 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,299 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,300 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,302 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2023-11-29 01:23:54,303 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,313 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,313 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2023-11-29 01:23:54,314 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,314 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,314 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,314 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2023-11-29 01:23:54,315 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2023-11-29 01:23:54,318 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,320 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2023-11-29 01:23:54,321 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,321 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,322 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,324 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2023-11-29 01:23:54,325 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,335 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,336 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,336 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,336 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,339 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 01:23:54,339 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 01:23:54,345 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2023-11-29 01:23:54,348 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2023-11-29 01:23:54,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,349 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,350 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,352 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2023-11-29 01:23:54,354 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2023-11-29 01:23:54,366 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2023-11-29 01:23:54,367 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2023-11-29 01:23:54,367 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2023-11-29 01:23:54,367 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2023-11-29 01:23:54,376 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2023-11-29 01:23:54,376 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2023-11-29 01:23:54,389 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2023-11-29 01:23:54,424 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2023-11-29 01:23:54,424 INFO L444 ModelExtractionUtils]: 2 out of 16 variables were initially zero. Simplification set additionally 11 variables to zero. [2023-11-29 01:23:54,425 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 01:23:54,426 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:54,447 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 01:23:54,449 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2023-11-29 01:23:54,450 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2023-11-29 01:23:54,462 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2023-11-29 01:23:54,462 INFO L513 LassoAnalysis]: Proved termination. [2023-11-29 01:23:54,462 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~num~0#1) = -1*ULTIMATE.start_main_~i~0#1 + 1*ULTIMATE.start_main_~num~0#1 Supporting invariants [] [2023-11-29 01:23:54,465 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2023-11-29 01:23:54,484 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2023-11-29 01:23:54,508 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:54,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:54,531 INFO L262 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjunts are in the unsatisfiable core [2023-11-29 01:23:54,532 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:54,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:54,549 INFO L262 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-29 01:23:54,550 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:54,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:54,600 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2023-11-29 01:23:54,603 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:54,663 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 28 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 55 states and 79 transitions. Complement of second has 8 states. [2023-11-29 01:23:54,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2023-11-29 01:23:54,671 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2023-11-29 01:23:54,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:54,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 39 transitions. [2023-11-29 01:23:54,677 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 39 transitions. Stem has 2 letters. Loop has 2 letters. [2023-11-29 01:23:54,677 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 01:23:54,678 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 39 transitions. Stem has 4 letters. Loop has 2 letters. [2023-11-29 01:23:54,678 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 01:23:54,678 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 39 transitions. Stem has 2 letters. Loop has 4 letters. [2023-11-29 01:23:54,678 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2023-11-29 01:23:54,678 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 79 transitions. [2023-11-29 01:23:54,682 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 [2023-11-29 01:23:54,686 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 25 states and 35 transitions. [2023-11-29 01:23:54,687 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2023-11-29 01:23:54,687 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2023-11-29 01:23:54,687 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 35 transitions. [2023-11-29 01:23:54,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:23:54,688 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 35 transitions. [2023-11-29 01:23:54,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 35 transitions. [2023-11-29 01:23:54,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2023-11-29 01:23:54,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.4) internal successors, (35), 24 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:54,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2023-11-29 01:23:54,708 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 35 transitions. [2023-11-29 01:23:54,709 INFO L428 stractBuchiCegarLoop]: Abstraction has 25 states and 35 transitions. [2023-11-29 01:23:54,709 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-29 01:23:54,709 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 35 transitions. [2023-11-29 01:23:54,710 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 [2023-11-29 01:23:54,710 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:54,710 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:54,710 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2023-11-29 01:23:54,710 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:23:54,711 INFO L748 eck$LassoCheckResult]: Stem: 161#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 150#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 153#L27-4 main_~i~0#1 := 0; 154#L32-3 [2023-11-29 01:23:54,711 INFO L750 eck$LassoCheckResult]: Loop: 154#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 159#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 148#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 154#L32-3 [2023-11-29 01:23:54,712 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:54,712 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2023-11-29 01:23:54,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:54,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471987631] [2023-11-29 01:23:54,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:54,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:54,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:54,722 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:54,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:54,731 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:54,731 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:54,731 INFO L85 PathProgramCache]: Analyzing trace with hash 54361, now seen corresponding path program 1 times [2023-11-29 01:23:54,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:54,732 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900631460] [2023-11-29 01:23:54,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:54,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:54,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:54,741 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:54,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:54,749 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:54,750 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:54,750 INFO L85 PathProgramCache]: Analyzing trace with hash 1807958031, now seen corresponding path program 1 times [2023-11-29 01:23:54,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:54,751 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613113970] [2023-11-29 01:23:54,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:54,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:54,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:54,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:54,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:23:54,857 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613113970] [2023-11-29 01:23:54,858 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1613113970] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 01:23:54,858 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 01:23:54,858 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-29 01:23:54,859 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329978392] [2023-11-29 01:23:54,859 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 01:23:54,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:23:54,918 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-29 01:23:54,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-29 01:23:54,920 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. cyclomatic complexity: 13 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:54,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:23:54,980 INFO L93 Difference]: Finished difference Result 44 states and 51 transitions. [2023-11-29 01:23:54,980 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 44 states and 51 transitions. [2023-11-29 01:23:54,982 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:54,983 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 44 states to 32 states and 38 transitions. [2023-11-29 01:23:54,983 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2023-11-29 01:23:54,984 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2023-11-29 01:23:54,984 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 38 transitions. [2023-11-29 01:23:54,984 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:23:54,984 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 38 transitions. [2023-11-29 01:23:54,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 38 transitions. [2023-11-29 01:23:54,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 20. [2023-11-29 01:23:54,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.2) internal successors, (24), 19 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:54,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2023-11-29 01:23:54,987 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 24 transitions. [2023-11-29 01:23:54,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 01:23:54,988 INFO L428 stractBuchiCegarLoop]: Abstraction has 20 states and 24 transitions. [2023-11-29 01:23:54,989 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-29 01:23:54,989 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 24 transitions. [2023-11-29 01:23:54,989 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:54,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:54,990 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:54,990 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2023-11-29 01:23:54,990 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:23:54,990 INFO L748 eck$LassoCheckResult]: Stem: 235#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 223#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 224#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 227#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 228#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 229#L27-4 main_~i~0#1 := 0; 230#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 234#L34 [2023-11-29 01:23:54,990 INFO L750 eck$LassoCheckResult]: Loop: 234#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 222#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 231#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 234#L34 [2023-11-29 01:23:54,991 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:54,991 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669547, now seen corresponding path program 1 times [2023-11-29 01:23:54,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:54,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081751919] [2023-11-29 01:23:54,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:54,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:55,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,005 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:55,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,017 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:55,017 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:55,018 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 2 times [2023-11-29 01:23:55,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:55,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737389468] [2023-11-29 01:23:55,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:55,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:55,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,025 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:55,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,031 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:55,032 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:55,032 INFO L85 PathProgramCache]: Analyzing trace with hash 1436021995, now seen corresponding path program 1 times [2023-11-29 01:23:55,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:55,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236173503] [2023-11-29 01:23:55,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:55,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:55,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:55,129 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:55,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:23:55,129 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236173503] [2023-11-29 01:23:55,129 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1236173503] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:23:55,130 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1744643680] [2023-11-29 01:23:55,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:55,130 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:23:55,130 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:55,131 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:23:55,134 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-29 01:23:55,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:55,191 INFO L262 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 01:23:55,192 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:55,250 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:55,250 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:23:55,292 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:55,293 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1744643680] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:23:55,293 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:23:55,293 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2023-11-29 01:23:55,293 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217412833] [2023-11-29 01:23:55,294 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:23:55,349 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:23:55,350 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2023-11-29 01:23:55,350 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2023-11-29 01:23:55,350 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. cyclomatic complexity: 7 Second operand has 11 states, 10 states have (on average 2.2) internal successors, (22), 11 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:55,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:23:55,485 INFO L93 Difference]: Finished difference Result 63 states and 74 transitions. [2023-11-29 01:23:55,485 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 74 transitions. [2023-11-29 01:23:55,487 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:55,488 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 46 states and 54 transitions. [2023-11-29 01:23:55,488 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2023-11-29 01:23:55,489 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2023-11-29 01:23:55,489 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 54 transitions. [2023-11-29 01:23:55,489 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:23:55,489 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2023-11-29 01:23:55,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 54 transitions. [2023-11-29 01:23:55,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 28. [2023-11-29 01:23:55,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1785714285714286) internal successors, (33), 27 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:55,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 33 transitions. [2023-11-29 01:23:55,493 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 33 transitions. [2023-11-29 01:23:55,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-29 01:23:55,494 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 33 transitions. [2023-11-29 01:23:55,495 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-29 01:23:55,495 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 33 transitions. [2023-11-29 01:23:55,496 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:55,496 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:55,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:55,496 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1] [2023-11-29 01:23:55,497 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:23:55,497 INFO L748 eck$LassoCheckResult]: Stem: 393#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 380#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 381#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 394#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 395#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 384#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 385#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 386#L27-4 main_~i~0#1 := 0; 387#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 399#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 388#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 389#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 392#L34 [2023-11-29 01:23:55,497 INFO L750 eck$LassoCheckResult]: Loop: 392#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 379#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 397#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 392#L34 [2023-11-29 01:23:55,497 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:55,498 INFO L85 PathProgramCache]: Analyzing trace with hash 780824429, now seen corresponding path program 2 times [2023-11-29 01:23:55,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:55,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616119438] [2023-11-29 01:23:55,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:55,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:55,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,516 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:55,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,541 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:55,542 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:55,542 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 3 times [2023-11-29 01:23:55,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:55,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299511654] [2023-11-29 01:23:55,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:55,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:55,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,547 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:55,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:55,552 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:55,552 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:55,553 INFO L85 PathProgramCache]: Analyzing trace with hash -2264087, now seen corresponding path program 3 times [2023-11-29 01:23:55,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:55,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475749685] [2023-11-29 01:23:55,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:55,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:55,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:55,676 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:55,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:23:55,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475749685] [2023-11-29 01:23:55,677 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1475749685] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:23:55,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [636490610] [2023-11-29 01:23:55,677 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:23:55,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:23:55,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:55,679 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:23:55,682 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-29 01:23:55,733 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2023-11-29 01:23:55,734 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:23:55,734 INFO L262 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-29 01:23:55,736 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:55,823 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:55,824 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:23:55,888 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:55,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [636490610] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:23:55,888 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:23:55,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2023-11-29 01:23:55,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135186576] [2023-11-29 01:23:55,889 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:23:55,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:23:55,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2023-11-29 01:23:55,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2023-11-29 01:23:55,946 INFO L87 Difference]: Start difference. First operand 28 states and 33 transitions. cyclomatic complexity: 8 Second operand has 14 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:56,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:23:56,121 INFO L93 Difference]: Finished difference Result 89 states and 104 transitions. [2023-11-29 01:23:56,121 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 89 states and 104 transitions. [2023-11-29 01:23:56,123 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:56,124 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 89 states to 60 states and 70 transitions. [2023-11-29 01:23:56,124 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 53 [2023-11-29 01:23:56,125 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 53 [2023-11-29 01:23:56,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 60 states and 70 transitions. [2023-11-29 01:23:56,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:23:56,126 INFO L218 hiAutomatonCegarLoop]: Abstraction has 60 states and 70 transitions. [2023-11-29 01:23:56,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states and 70 transitions. [2023-11-29 01:23:56,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 36. [2023-11-29 01:23:56,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.1666666666666667) internal successors, (42), 35 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:56,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 42 transitions. [2023-11-29 01:23:56,130 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 42 transitions. [2023-11-29 01:23:56,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-29 01:23:56,137 INFO L428 stractBuchiCegarLoop]: Abstraction has 36 states and 42 transitions. [2023-11-29 01:23:56,137 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-29 01:23:56,137 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 42 transitions. [2023-11-29 01:23:56,138 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:56,138 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:56,138 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:56,139 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1] [2023-11-29 01:23:56,139 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:23:56,139 INFO L748 eck$LassoCheckResult]: Stem: 622#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 606#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 607#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 620#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 621#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 610#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 611#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 626#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 625#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 612#L27-4 main_~i~0#1 := 0; 613#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 634#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 614#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 615#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 619#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 628#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 633#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 618#L34 [2023-11-29 01:23:56,139 INFO L750 eck$LassoCheckResult]: Loop: 618#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 624#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 618#L34 [2023-11-29 01:23:56,140 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:56,140 INFO L85 PathProgramCache]: Analyzing trace with hash -79873369, now seen corresponding path program 4 times [2023-11-29 01:23:56,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:56,140 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587677296] [2023-11-29 01:23:56,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:56,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:56,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:56,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,182 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:56,183 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:56,183 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 4 times [2023-11-29 01:23:56,183 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:56,183 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541531084] [2023-11-29 01:23:56,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:56,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:56,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,188 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:56,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,192 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:56,193 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:56,193 INFO L85 PathProgramCache]: Analyzing trace with hash -95607185, now seen corresponding path program 5 times [2023-11-29 01:23:56,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:56,193 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1314093399] [2023-11-29 01:23:56,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:56,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:56,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:56,347 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 5 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:56,348 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:23:56,348 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1314093399] [2023-11-29 01:23:56,348 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1314093399] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:23:56,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [130793568] [2023-11-29 01:23:56,349 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:23:56,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:23:56,349 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:56,352 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:23:56,353 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-29 01:23:56,424 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2023-11-29 01:23:56,424 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:23:56,426 INFO L262 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 10 conjunts are in the unsatisfiable core [2023-11-29 01:23:56,427 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:56,541 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 12 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:56,542 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:23:56,626 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 12 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:56,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [130793568] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:23:56,626 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:23:56,626 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2023-11-29 01:23:56,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711285013] [2023-11-29 01:23:56,627 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:23:56,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:23:56,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2023-11-29 01:23:56,680 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=197, Unknown=0, NotChecked=0, Total=272 [2023-11-29 01:23:56,681 INFO L87 Difference]: Start difference. First operand 36 states and 42 transitions. cyclomatic complexity: 9 Second operand has 17 states, 16 states have (on average 2.375) internal successors, (38), 17 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:56,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:23:56,871 INFO L93 Difference]: Finished difference Result 115 states and 134 transitions. [2023-11-29 01:23:56,871 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 115 states and 134 transitions. [2023-11-29 01:23:56,873 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:56,874 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 115 states to 74 states and 86 transitions. [2023-11-29 01:23:56,874 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2023-11-29 01:23:56,874 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2023-11-29 01:23:56,874 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 86 transitions. [2023-11-29 01:23:56,875 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:23:56,875 INFO L218 hiAutomatonCegarLoop]: Abstraction has 74 states and 86 transitions. [2023-11-29 01:23:56,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 86 transitions. [2023-11-29 01:23:56,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 44. [2023-11-29 01:23:56,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.1590909090909092) internal successors, (51), 43 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:56,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 51 transitions. [2023-11-29 01:23:56,880 INFO L240 hiAutomatonCegarLoop]: Abstraction has 44 states and 51 transitions. [2023-11-29 01:23:56,880 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-29 01:23:56,881 INFO L428 stractBuchiCegarLoop]: Abstraction has 44 states and 51 transitions. [2023-11-29 01:23:56,881 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-29 01:23:56,882 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 51 transitions. [2023-11-29 01:23:56,882 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:56,882 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:56,883 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:56,883 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1] [2023-11-29 01:23:56,883 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:23:56,884 INFO L748 eck$LassoCheckResult]: Stem: 915#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 901#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 902#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 916#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 917#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 905#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 906#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 926#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 925#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 922#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 921#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 907#L27-4 main_~i~0#1 := 0; 908#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 913#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 900#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 910#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 936#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 934#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 933#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 930#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 928#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 927#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 920#L34 [2023-11-29 01:23:56,884 INFO L750 eck$LassoCheckResult]: Loop: 920#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 923#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 919#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 920#L34 [2023-11-29 01:23:56,884 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:56,884 INFO L85 PathProgramCache]: Analyzing trace with hash 1712449137, now seen corresponding path program 6 times [2023-11-29 01:23:56,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:56,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [445637987] [2023-11-29 01:23:56,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:56,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:56,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,912 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:56,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,935 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:56,936 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:56,936 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 5 times [2023-11-29 01:23:56,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:56,936 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417021621] [2023-11-29 01:23:56,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:56,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:56,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,940 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:56,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:56,943 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:56,944 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:56,944 INFO L85 PathProgramCache]: Analyzing trace with hash -49254811, now seen corresponding path program 7 times [2023-11-29 01:23:56,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:56,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922488188] [2023-11-29 01:23:56,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:56,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:56,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:57,113 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 12 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:57,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:23:57,114 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1922488188] [2023-11-29 01:23:57,114 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1922488188] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:23:57,114 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1482582617] [2023-11-29 01:23:57,114 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:23:57,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:23:57,115 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:57,120 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:23:57,130 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2023-11-29 01:23:57,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:57,211 INFO L262 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-29 01:23:57,212 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:57,364 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 22 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:57,364 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:23:57,468 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 22 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:57,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1482582617] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:23:57,469 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:23:57,469 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 19 [2023-11-29 01:23:57,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [753485831] [2023-11-29 01:23:57,469 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:23:57,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:23:57,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2023-11-29 01:23:57,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=279, Unknown=0, NotChecked=0, Total=380 [2023-11-29 01:23:57,521 INFO L87 Difference]: Start difference. First operand 44 states and 51 transitions. cyclomatic complexity: 10 Second operand has 20 states, 19 states have (on average 2.4210526315789473) internal successors, (46), 20 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:57,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:23:57,770 INFO L93 Difference]: Finished difference Result 141 states and 164 transitions. [2023-11-29 01:23:57,770 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 164 transitions. [2023-11-29 01:23:57,772 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:57,773 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 88 states and 102 transitions. [2023-11-29 01:23:57,773 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2023-11-29 01:23:57,774 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2023-11-29 01:23:57,774 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 102 transitions. [2023-11-29 01:23:57,774 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:23:57,775 INFO L218 hiAutomatonCegarLoop]: Abstraction has 88 states and 102 transitions. [2023-11-29 01:23:57,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 102 transitions. [2023-11-29 01:23:57,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 52. [2023-11-29 01:23:57,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.1538461538461537) internal successors, (60), 51 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:57,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 60 transitions. [2023-11-29 01:23:57,779 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 60 transitions. [2023-11-29 01:23:57,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2023-11-29 01:23:57,780 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 60 transitions. [2023-11-29 01:23:57,781 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-29 01:23:57,781 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 60 transitions. [2023-11-29 01:23:57,781 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:57,781 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:57,781 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:57,782 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 4, 4, 1, 1, 1, 1] [2023-11-29 01:23:57,782 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:23:57,783 INFO L748 eck$LassoCheckResult]: Stem: 1280#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 1265#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 1266#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1281#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1282#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1269#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1270#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1293#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1292#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1291#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1290#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1287#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1286#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 1271#L27-4 main_~i~0#1 := 0; 1272#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1277#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1264#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1274#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1279#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1307#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1306#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1303#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1301#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1300#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1297#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1295#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1294#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1285#L34 [2023-11-29 01:23:57,783 INFO L750 eck$LassoCheckResult]: Loop: 1285#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1288#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1284#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1285#L34 [2023-11-29 01:23:57,783 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:57,783 INFO L85 PathProgramCache]: Analyzing trace with hash -240296029, now seen corresponding path program 8 times [2023-11-29 01:23:57,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:57,783 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878584508] [2023-11-29 01:23:57,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:57,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:57,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:57,807 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:57,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:57,830 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:57,830 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:57,830 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 6 times [2023-11-29 01:23:57,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:57,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776018959] [2023-11-29 01:23:57,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:57,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:57,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:57,835 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:57,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:57,839 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:57,839 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:57,839 INFO L85 PathProgramCache]: Analyzing trace with hash 1051529203, now seen corresponding path program 9 times [2023-11-29 01:23:57,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:57,840 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220020424] [2023-11-29 01:23:57,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:57,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:57,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:58,084 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 22 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:58,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:23:58,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220020424] [2023-11-29 01:23:58,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220020424] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:23:58,085 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [529768826] [2023-11-29 01:23:58,085 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:23:58,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:23:58,085 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:58,087 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:23:58,088 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2023-11-29 01:23:58,168 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2023-11-29 01:23:58,168 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:23:58,169 INFO L262 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 14 conjunts are in the unsatisfiable core [2023-11-29 01:23:58,171 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:58,349 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 35 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:58,349 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:23:58,461 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 35 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:58,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [529768826] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:23:58,462 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:23:58,462 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2023-11-29 01:23:58,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378863400] [2023-11-29 01:23:58,462 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:23:58,513 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:23:58,513 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2023-11-29 01:23:58,514 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=375, Unknown=0, NotChecked=0, Total=506 [2023-11-29 01:23:58,514 INFO L87 Difference]: Start difference. First operand 52 states and 60 transitions. cyclomatic complexity: 11 Second operand has 23 states, 22 states have (on average 2.4545454545454546) internal successors, (54), 23 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:58,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:23:58,800 INFO L93 Difference]: Finished difference Result 167 states and 194 transitions. [2023-11-29 01:23:58,800 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167 states and 194 transitions. [2023-11-29 01:23:58,802 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:58,803 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167 states to 102 states and 118 transitions. [2023-11-29 01:23:58,803 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 89 [2023-11-29 01:23:58,804 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 89 [2023-11-29 01:23:58,804 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 118 transitions. [2023-11-29 01:23:58,804 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:23:58,804 INFO L218 hiAutomatonCegarLoop]: Abstraction has 102 states and 118 transitions. [2023-11-29 01:23:58,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 118 transitions. [2023-11-29 01:23:58,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 60. [2023-11-29 01:23:58,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 1.15) internal successors, (69), 59 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:23:58,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 69 transitions. [2023-11-29 01:23:58,809 INFO L240 hiAutomatonCegarLoop]: Abstraction has 60 states and 69 transitions. [2023-11-29 01:23:58,810 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2023-11-29 01:23:58,811 INFO L428 stractBuchiCegarLoop]: Abstraction has 60 states and 69 transitions. [2023-11-29 01:23:58,811 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-29 01:23:58,811 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 60 states and 69 transitions. [2023-11-29 01:23:58,811 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:23:58,811 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:23:58,812 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:23:58,812 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 5, 1, 1, 1, 1] [2023-11-29 01:23:58,813 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:23:58,813 INFO L748 eck$LassoCheckResult]: Stem: 1714#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 1698#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 1699#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1715#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1716#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1702#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1703#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1729#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1728#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1727#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1726#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1725#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1724#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1721#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1720#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 1704#L27-4 main_~i~0#1 := 0; 1705#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1711#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1697#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1708#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1713#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1748#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1747#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1745#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1742#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1741#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1739#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1737#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1736#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1733#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1731#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1730#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1719#L34 [2023-11-29 01:23:58,813 INFO L750 eck$LassoCheckResult]: Loop: 1719#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1722#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1718#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1719#L34 [2023-11-29 01:23:58,813 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:58,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1967863157, now seen corresponding path program 10 times [2023-11-29 01:23:58,814 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:58,814 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019395919] [2023-11-29 01:23:58,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:58,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:58,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:58,849 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:58,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:58,878 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:58,879 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:58,879 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 7 times [2023-11-29 01:23:58,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:58,879 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58984366] [2023-11-29 01:23:58,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:58,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:58,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:58,883 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:23:58,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:23:58,886 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:23:58,887 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:23:58,887 INFO L85 PathProgramCache]: Analyzing trace with hash -1692233503, now seen corresponding path program 11 times [2023-11-29 01:23:58,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:23:58,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934285264] [2023-11-29 01:23:58,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:23:58,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:23:58,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:23:59,201 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 35 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:59,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:23:59,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934285264] [2023-11-29 01:23:59,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [934285264] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:23:59,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [833329778] [2023-11-29 01:23:59,202 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:23:59,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:23:59,202 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:23:59,203 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:23:59,206 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2023-11-29 01:23:59,329 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2023-11-29 01:23:59,330 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:23:59,332 INFO L262 TraceCheckSpWp]: Trace formula consists of 167 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-29 01:23:59,334 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:23:59,549 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 51 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:59,549 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:23:59,710 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 51 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:23:59,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [833329778] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:23:59,711 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:23:59,711 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2023-11-29 01:23:59,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [180606215] [2023-11-29 01:23:59,711 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:23:59,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:23:59,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2023-11-29 01:23:59,754 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=485, Unknown=0, NotChecked=0, Total=650 [2023-11-29 01:23:59,754 INFO L87 Difference]: Start difference. First operand 60 states and 69 transitions. cyclomatic complexity: 12 Second operand has 26 states, 25 states have (on average 2.48) internal successors, (62), 26 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:00,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:00,045 INFO L93 Difference]: Finished difference Result 193 states and 224 transitions. [2023-11-29 01:24:00,045 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 224 transitions. [2023-11-29 01:24:00,047 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:00,048 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 116 states and 134 transitions. [2023-11-29 01:24:00,048 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2023-11-29 01:24:00,049 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2023-11-29 01:24:00,049 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 134 transitions. [2023-11-29 01:24:00,049 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:00,050 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 134 transitions. [2023-11-29 01:24:00,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 134 transitions. [2023-11-29 01:24:00,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 68. [2023-11-29 01:24:00,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.1470588235294117) internal successors, (78), 67 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:00,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 78 transitions. [2023-11-29 01:24:00,055 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 78 transitions. [2023-11-29 01:24:00,055 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2023-11-29 01:24:00,056 INFO L428 stractBuchiCegarLoop]: Abstraction has 68 states and 78 transitions. [2023-11-29 01:24:00,056 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-29 01:24:00,056 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 78 transitions. [2023-11-29 01:24:00,057 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:00,057 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:00,057 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:00,058 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 6, 6, 1, 1, 1, 1] [2023-11-29 01:24:00,058 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:00,059 INFO L748 eck$LassoCheckResult]: Stem: 2216#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 2200#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 2201#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2217#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2218#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2204#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2205#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2233#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2232#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2231#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2230#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2229#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2228#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2227#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2226#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2223#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2222#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 2206#L27-4 main_~i~0#1 := 0; 2207#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2213#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2199#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2210#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2215#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2258#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2257#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2255#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2252#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2251#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2249#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2246#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2245#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2243#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2241#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2240#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2237#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2235#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2234#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2221#L34 [2023-11-29 01:24:00,059 INFO L750 eck$LassoCheckResult]: Loop: 2221#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2224#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2220#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2221#L34 [2023-11-29 01:24:00,059 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:00,059 INFO L85 PathProgramCache]: Analyzing trace with hash -664171361, now seen corresponding path program 12 times [2023-11-29 01:24:00,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:00,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047327252] [2023-11-29 01:24:00,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:00,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:00,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:00,088 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:00,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:00,123 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:00,124 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:00,124 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 8 times [2023-11-29 01:24:00,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:00,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975827404] [2023-11-29 01:24:00,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:00,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:00,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:00,128 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:00,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:00,131 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:00,132 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:00,132 INFO L85 PathProgramCache]: Analyzing trace with hash 585363831, now seen corresponding path program 13 times [2023-11-29 01:24:00,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:00,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63368349] [2023-11-29 01:24:00,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:00,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:00,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:00,480 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 51 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:00,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:00,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63368349] [2023-11-29 01:24:00,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [63368349] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:00,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [152381561] [2023-11-29 01:24:00,481 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:24:00,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:00,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:00,482 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:00,484 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2023-11-29 01:24:00,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:00,569 INFO L262 TraceCheckSpWp]: Trace formula consists of 188 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-29 01:24:00,571 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:00,821 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 70 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:00,821 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:01,017 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 70 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:01,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [152381561] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:01,018 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:01,018 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 28 [2023-11-29 01:24:01,018 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1600008449] [2023-11-29 01:24:01,018 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:01,065 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:01,066 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2023-11-29 01:24:01,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=609, Unknown=0, NotChecked=0, Total=812 [2023-11-29 01:24:01,066 INFO L87 Difference]: Start difference. First operand 68 states and 78 transitions. cyclomatic complexity: 13 Second operand has 29 states, 28 states have (on average 2.5) internal successors, (70), 29 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:01,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:01,382 INFO L93 Difference]: Finished difference Result 219 states and 254 transitions. [2023-11-29 01:24:01,382 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 219 states and 254 transitions. [2023-11-29 01:24:01,384 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:01,385 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 219 states to 130 states and 150 transitions. [2023-11-29 01:24:01,385 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 113 [2023-11-29 01:24:01,386 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 113 [2023-11-29 01:24:01,386 INFO L73 IsDeterministic]: Start isDeterministic. Operand 130 states and 150 transitions. [2023-11-29 01:24:01,386 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:01,386 INFO L218 hiAutomatonCegarLoop]: Abstraction has 130 states and 150 transitions. [2023-11-29 01:24:01,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states and 150 transitions. [2023-11-29 01:24:01,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 76. [2023-11-29 01:24:01,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.144736842105263) internal successors, (87), 75 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:01,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 87 transitions. [2023-11-29 01:24:01,392 INFO L240 hiAutomatonCegarLoop]: Abstraction has 76 states and 87 transitions. [2023-11-29 01:24:01,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-29 01:24:01,393 INFO L428 stractBuchiCegarLoop]: Abstraction has 76 states and 87 transitions. [2023-11-29 01:24:01,393 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-29 01:24:01,393 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 76 states and 87 transitions. [2023-11-29 01:24:01,394 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:01,394 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:01,394 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:01,395 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 8, 8, 7, 7, 1, 1, 1, 1] [2023-11-29 01:24:01,395 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:01,396 INFO L748 eck$LassoCheckResult]: Stem: 2787#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 2771#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 2772#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2788#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2789#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2775#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2776#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2806#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2805#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2804#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2803#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2802#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2801#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2800#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2799#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2798#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2797#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2794#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2793#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 2777#L27-4 main_~i~0#1 := 0; 2778#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2784#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2770#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2781#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2786#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2837#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2836#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2834#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2831#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2830#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2828#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2825#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2824#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2822#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2819#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2818#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2816#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2814#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2813#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2810#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2808#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2807#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2792#L34 [2023-11-29 01:24:01,396 INFO L750 eck$LassoCheckResult]: Loop: 2792#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2795#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2791#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2792#L34 [2023-11-29 01:24:01,396 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:01,396 INFO L85 PathProgramCache]: Analyzing trace with hash -704996231, now seen corresponding path program 14 times [2023-11-29 01:24:01,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:01,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220746742] [2023-11-29 01:24:01,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:01,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:01,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:01,439 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:01,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:01,479 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:01,479 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:01,480 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 9 times [2023-11-29 01:24:01,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:01,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021262630] [2023-11-29 01:24:01,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:01,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:01,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:01,483 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:01,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:01,487 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:01,487 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:01,487 INFO L85 PathProgramCache]: Analyzing trace with hash -152593571, now seen corresponding path program 15 times [2023-11-29 01:24:01,487 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:01,488 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563622025] [2023-11-29 01:24:01,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:01,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:01,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:01,891 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 70 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:01,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:01,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563622025] [2023-11-29 01:24:01,891 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [563622025] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:01,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [502713942] [2023-11-29 01:24:01,892 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:24:01,892 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:01,892 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:01,895 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:01,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2023-11-29 01:24:02,042 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2023-11-29 01:24:02,042 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:02,044 INFO L262 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-29 01:24:02,046 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:02,311 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 92 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:02,311 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:02,480 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 92 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:02,480 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [502713942] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:02,481 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:02,481 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20] total 31 [2023-11-29 01:24:02,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489611757] [2023-11-29 01:24:02,481 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:02,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:02,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2023-11-29 01:24:02,518 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=245, Invalid=747, Unknown=0, NotChecked=0, Total=992 [2023-11-29 01:24:02,518 INFO L87 Difference]: Start difference. First operand 76 states and 87 transitions. cyclomatic complexity: 14 Second operand has 32 states, 31 states have (on average 2.5161290322580645) internal successors, (78), 32 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:02,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:02,843 INFO L93 Difference]: Finished difference Result 245 states and 284 transitions. [2023-11-29 01:24:02,843 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 245 states and 284 transitions. [2023-11-29 01:24:02,845 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:02,846 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 245 states to 144 states and 166 transitions. [2023-11-29 01:24:02,846 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 125 [2023-11-29 01:24:02,846 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 125 [2023-11-29 01:24:02,847 INFO L73 IsDeterministic]: Start isDeterministic. Operand 144 states and 166 transitions. [2023-11-29 01:24:02,847 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:02,847 INFO L218 hiAutomatonCegarLoop]: Abstraction has 144 states and 166 transitions. [2023-11-29 01:24:02,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states and 166 transitions. [2023-11-29 01:24:02,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 84. [2023-11-29 01:24:02,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 84 states have (on average 1.1428571428571428) internal successors, (96), 83 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:02,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 96 transitions. [2023-11-29 01:24:02,850 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84 states and 96 transitions. [2023-11-29 01:24:02,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2023-11-29 01:24:02,851 INFO L428 stractBuchiCegarLoop]: Abstraction has 84 states and 96 transitions. [2023-11-29 01:24:02,852 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-29 01:24:02,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84 states and 96 transitions. [2023-11-29 01:24:02,852 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:02,852 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:02,852 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:02,853 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [9, 9, 9, 8, 8, 1, 1, 1, 1] [2023-11-29 01:24:02,853 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:02,854 INFO L748 eck$LassoCheckResult]: Stem: 3427#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 3411#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 3412#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3428#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3429#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3415#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3416#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3448#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3447#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3446#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3445#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3444#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3443#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3442#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3441#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3440#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3439#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3438#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3437#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3434#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3433#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 3417#L27-4 main_~i~0#1 := 0; 3418#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3424#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3410#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3421#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3426#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3485#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3484#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3482#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3479#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3478#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3476#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3473#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3472#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3470#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3467#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3466#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3464#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3461#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3460#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3458#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3456#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3455#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3452#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3450#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3449#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3432#L34 [2023-11-29 01:24:02,854 INFO L750 eck$LassoCheckResult]: Loop: 3432#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3435#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3431#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3432#L34 [2023-11-29 01:24:02,854 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:02,854 INFO L85 PathProgramCache]: Analyzing trace with hash -1850900069, now seen corresponding path program 16 times [2023-11-29 01:24:02,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:02,854 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272401500] [2023-11-29 01:24:02,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:02,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:02,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:02,904 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:02,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:02,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:02,959 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:02,959 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 10 times [2023-11-29 01:24:02,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:02,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321917948] [2023-11-29 01:24:02,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:02,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:02,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:02,964 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:02,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:02,967 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:02,967 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:02,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1373762821, now seen corresponding path program 17 times [2023-11-29 01:24:02,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:02,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858482225] [2023-11-29 01:24:02,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:02,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:02,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:03,349 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 92 proven. 106 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:03,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:03,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858482225] [2023-11-29 01:24:03,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1858482225] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:03,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1334705428] [2023-11-29 01:24:03,349 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:24:03,350 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:03,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:03,351 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:03,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2023-11-29 01:24:03,533 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2023-11-29 01:24:03,533 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:03,535 INFO L262 TraceCheckSpWp]: Trace formula consists of 230 conjuncts, 22 conjunts are in the unsatisfiable core [2023-11-29 01:24:03,537 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:03,839 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 117 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:03,839 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:04,069 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 117 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:04,069 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1334705428] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:04,069 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:04,069 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22] total 34 [2023-11-29 01:24:04,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1286708663] [2023-11-29 01:24:04,070 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:04,116 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:04,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2023-11-29 01:24:04,117 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=291, Invalid=899, Unknown=0, NotChecked=0, Total=1190 [2023-11-29 01:24:04,117 INFO L87 Difference]: Start difference. First operand 84 states and 96 transitions. cyclomatic complexity: 15 Second operand has 35 states, 34 states have (on average 2.5294117647058822) internal successors, (86), 35 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:04,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:04,515 INFO L93 Difference]: Finished difference Result 271 states and 314 transitions. [2023-11-29 01:24:04,515 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 271 states and 314 transitions. [2023-11-29 01:24:04,517 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:04,519 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 271 states to 158 states and 182 transitions. [2023-11-29 01:24:04,519 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 137 [2023-11-29 01:24:04,519 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 137 [2023-11-29 01:24:04,519 INFO L73 IsDeterministic]: Start isDeterministic. Operand 158 states and 182 transitions. [2023-11-29 01:24:04,519 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:04,520 INFO L218 hiAutomatonCegarLoop]: Abstraction has 158 states and 182 transitions. [2023-11-29 01:24:04,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states and 182 transitions. [2023-11-29 01:24:04,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 92. [2023-11-29 01:24:04,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.141304347826087) internal successors, (105), 91 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:04,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 105 transitions. [2023-11-29 01:24:04,525 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 105 transitions. [2023-11-29 01:24:04,525 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2023-11-29 01:24:04,526 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 105 transitions. [2023-11-29 01:24:04,526 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-29 01:24:04,526 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 105 transitions. [2023-11-29 01:24:04,527 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:04,527 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:04,527 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:04,528 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 9, 1, 1, 1, 1] [2023-11-29 01:24:04,528 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:04,528 INFO L748 eck$LassoCheckResult]: Stem: 4138#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 4120#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 4121#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4136#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4137#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4124#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4125#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4159#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4158#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4157#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4156#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4155#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4154#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4153#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4152#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4151#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4150#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4149#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4148#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4147#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4146#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4143#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4142#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 4126#L27-4 main_~i~0#1 := 0; 4127#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4133#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4119#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4130#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4135#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4202#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4201#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4199#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4196#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4195#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4193#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4190#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4189#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4187#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4184#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4183#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4181#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4178#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4177#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4175#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4172#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4171#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4169#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4167#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4166#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4163#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4161#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4160#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4141#L34 [2023-11-29 01:24:04,529 INFO L750 eck$LassoCheckResult]: Loop: 4141#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4144#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4140#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4141#L34 [2023-11-29 01:24:04,529 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:04,529 INFO L85 PathProgramCache]: Analyzing trace with hash -354133123, now seen corresponding path program 18 times [2023-11-29 01:24:04,529 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:04,529 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067392249] [2023-11-29 01:24:04,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:04,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:04,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:04,590 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:04,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:04,643 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:04,644 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:04,644 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 11 times [2023-11-29 01:24:04,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:04,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052781712] [2023-11-29 01:24:04,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:04,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:04,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:04,648 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:04,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:04,651 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:04,651 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:04,651 INFO L85 PathProgramCache]: Analyzing trace with hash -1540141607, now seen corresponding path program 19 times [2023-11-29 01:24:04,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:04,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115647218] [2023-11-29 01:24:04,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:04,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:04,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:05,145 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 117 proven. 128 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:05,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:05,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2115647218] [2023-11-29 01:24:05,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2115647218] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:05,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [244921046] [2023-11-29 01:24:05,145 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:24:05,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:05,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:05,146 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:05,147 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2023-11-29 01:24:05,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:05,230 INFO L262 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-29 01:24:05,232 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:05,551 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 145 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:05,551 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:05,794 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 145 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:05,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [244921046] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:05,795 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:05,795 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 37 [2023-11-29 01:24:05,795 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1881640798] [2023-11-29 01:24:05,795 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:05,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:05,835 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2023-11-29 01:24:05,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=341, Invalid=1065, Unknown=0, NotChecked=0, Total=1406 [2023-11-29 01:24:05,836 INFO L87 Difference]: Start difference. First operand 92 states and 105 transitions. cyclomatic complexity: 16 Second operand has 38 states, 37 states have (on average 2.5405405405405403) internal successors, (94), 38 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:06,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:06,266 INFO L93 Difference]: Finished difference Result 297 states and 344 transitions. [2023-11-29 01:24:06,266 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 297 states and 344 transitions. [2023-11-29 01:24:06,268 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:06,270 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 297 states to 172 states and 198 transitions. [2023-11-29 01:24:06,270 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 149 [2023-11-29 01:24:06,270 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 149 [2023-11-29 01:24:06,270 INFO L73 IsDeterministic]: Start isDeterministic. Operand 172 states and 198 transitions. [2023-11-29 01:24:06,270 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:06,270 INFO L218 hiAutomatonCegarLoop]: Abstraction has 172 states and 198 transitions. [2023-11-29 01:24:06,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states and 198 transitions. [2023-11-29 01:24:06,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 100. [2023-11-29 01:24:06,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.14) internal successors, (114), 99 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:06,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 114 transitions. [2023-11-29 01:24:06,273 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 114 transitions. [2023-11-29 01:24:06,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2023-11-29 01:24:06,274 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 114 transitions. [2023-11-29 01:24:06,275 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-29 01:24:06,275 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 114 transitions. [2023-11-29 01:24:06,275 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:06,275 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:06,276 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:06,276 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 11, 11, 10, 10, 1, 1, 1, 1] [2023-11-29 01:24:06,276 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:06,277 INFO L748 eck$LassoCheckResult]: Stem: 4914#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 4898#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 4899#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4915#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4916#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4902#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4903#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4939#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4938#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4937#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4936#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4935#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4934#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4933#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4932#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4931#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4930#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4929#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4928#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4927#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4926#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4925#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4924#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4921#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4920#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 4904#L27-4 main_~i~0#1 := 0; 4905#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4911#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4897#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4908#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4913#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4988#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4987#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4985#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4982#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4981#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4979#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4976#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4975#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4973#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4970#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4969#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4967#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4964#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4963#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4961#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4958#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4957#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4955#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4952#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4951#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4949#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4947#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4946#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4943#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4941#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4940#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4919#L34 [2023-11-29 01:24:06,277 INFO L750 eck$LassoCheckResult]: Loop: 4919#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4922#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4918#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4919#L34 [2023-11-29 01:24:06,277 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:06,277 INFO L85 PathProgramCache]: Analyzing trace with hash -726335849, now seen corresponding path program 20 times [2023-11-29 01:24:06,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:06,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75245796] [2023-11-29 01:24:06,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:06,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:06,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:06,336 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:06,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:06,396 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:06,397 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:06,397 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 12 times [2023-11-29 01:24:06,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:06,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379391442] [2023-11-29 01:24:06,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:06,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:06,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:06,401 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:06,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:06,404 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:06,404 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:06,404 INFO L85 PathProgramCache]: Analyzing trace with hash -225993601, now seen corresponding path program 21 times [2023-11-29 01:24:06,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:06,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514663769] [2023-11-29 01:24:06,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:06,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:06,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:06,975 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 145 proven. 152 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:06,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:06,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514663769] [2023-11-29 01:24:06,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [514663769] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:06,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [243217345] [2023-11-29 01:24:06,976 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:24:06,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:06,976 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:06,977 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:06,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2023-11-29 01:24:07,163 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2023-11-29 01:24:07,163 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:07,165 INFO L262 TraceCheckSpWp]: Trace formula consists of 272 conjuncts, 26 conjunts are in the unsatisfiable core [2023-11-29 01:24:07,167 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:07,504 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 176 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:07,505 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:07,737 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 176 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:07,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [243217345] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:07,737 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:07,737 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26] total 40 [2023-11-29 01:24:07,737 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983168266] [2023-11-29 01:24:07,737 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:07,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:07,782 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2023-11-29 01:24:07,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=395, Invalid=1245, Unknown=0, NotChecked=0, Total=1640 [2023-11-29 01:24:07,783 INFO L87 Difference]: Start difference. First operand 100 states and 114 transitions. cyclomatic complexity: 17 Second operand has 41 states, 40 states have (on average 2.55) internal successors, (102), 41 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:08,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:08,201 INFO L93 Difference]: Finished difference Result 323 states and 374 transitions. [2023-11-29 01:24:08,201 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 323 states and 374 transitions. [2023-11-29 01:24:08,202 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:08,203 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 323 states to 186 states and 214 transitions. [2023-11-29 01:24:08,204 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 161 [2023-11-29 01:24:08,204 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 161 [2023-11-29 01:24:08,204 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 214 transitions. [2023-11-29 01:24:08,204 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:08,204 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 214 transitions. [2023-11-29 01:24:08,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 214 transitions. [2023-11-29 01:24:08,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 108. [2023-11-29 01:24:08,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.1388888888888888) internal successors, (123), 107 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:08,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 123 transitions. [2023-11-29 01:24:08,207 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 123 transitions. [2023-11-29 01:24:08,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2023-11-29 01:24:08,208 INFO L428 stractBuchiCegarLoop]: Abstraction has 108 states and 123 transitions. [2023-11-29 01:24:08,208 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-29 01:24:08,208 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 123 transitions. [2023-11-29 01:24:08,209 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:08,209 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:08,209 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:08,210 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [12, 12, 12, 11, 11, 1, 1, 1, 1] [2023-11-29 01:24:08,210 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:08,210 INFO L748 eck$LassoCheckResult]: Stem: 5761#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 5745#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 5746#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5762#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5763#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5749#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5750#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5788#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5787#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5786#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5785#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5784#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5783#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5782#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5781#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5780#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5779#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5778#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5777#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5776#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5775#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5774#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5773#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5772#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5771#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5768#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5767#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 5751#L27-4 main_~i~0#1 := 0; 5752#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5758#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5744#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5755#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5760#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5843#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5842#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5840#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5837#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5836#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5834#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5831#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5830#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5828#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5825#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5824#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5822#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5819#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5818#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5816#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5813#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5812#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5810#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5807#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5806#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5804#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5801#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5800#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5798#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5796#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5795#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5792#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5790#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5789#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5766#L34 [2023-11-29 01:24:08,210 INFO L750 eck$LassoCheckResult]: Loop: 5766#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5769#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5765#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5766#L34 [2023-11-29 01:24:08,210 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:08,210 INFO L85 PathProgramCache]: Analyzing trace with hash -2083736959, now seen corresponding path program 22 times [2023-11-29 01:24:08,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:08,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954695033] [2023-11-29 01:24:08,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:08,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:08,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:08,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:08,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:08,328 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:08,329 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:08,329 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 13 times [2023-11-29 01:24:08,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:08,329 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251003997] [2023-11-29 01:24:08,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:08,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:08,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:08,333 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:08,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:08,336 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:08,336 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:08,336 INFO L85 PathProgramCache]: Analyzing trace with hash -1445369771, now seen corresponding path program 23 times [2023-11-29 01:24:08,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:08,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948367651] [2023-11-29 01:24:08,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:08,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:08,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:08,905 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 176 proven. 178 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:08,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:08,905 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948367651] [2023-11-29 01:24:08,906 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1948367651] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:08,906 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [818818914] [2023-11-29 01:24:08,906 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:24:08,906 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:08,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:08,907 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:08,908 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2023-11-29 01:24:09,177 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2023-11-29 01:24:09,178 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:09,180 INFO L262 TraceCheckSpWp]: Trace formula consists of 293 conjuncts, 28 conjunts are in the unsatisfiable core [2023-11-29 01:24:09,183 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:09,568 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 210 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:09,569 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:09,864 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 210 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:09,865 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [818818914] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:09,865 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:09,865 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28] total 43 [2023-11-29 01:24:09,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409301182] [2023-11-29 01:24:09,865 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:09,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:09,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2023-11-29 01:24:09,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=453, Invalid=1439, Unknown=0, NotChecked=0, Total=1892 [2023-11-29 01:24:09,910 INFO L87 Difference]: Start difference. First operand 108 states and 123 transitions. cyclomatic complexity: 18 Second operand has 44 states, 43 states have (on average 2.558139534883721) internal successors, (110), 44 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:10,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:10,421 INFO L93 Difference]: Finished difference Result 349 states and 404 transitions. [2023-11-29 01:24:10,421 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 349 states and 404 transitions. [2023-11-29 01:24:10,424 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:10,425 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 349 states to 200 states and 230 transitions. [2023-11-29 01:24:10,425 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 173 [2023-11-29 01:24:10,426 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 173 [2023-11-29 01:24:10,426 INFO L73 IsDeterministic]: Start isDeterministic. Operand 200 states and 230 transitions. [2023-11-29 01:24:10,426 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:10,426 INFO L218 hiAutomatonCegarLoop]: Abstraction has 200 states and 230 transitions. [2023-11-29 01:24:10,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states and 230 transitions. [2023-11-29 01:24:10,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 116. [2023-11-29 01:24:10,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.1379310344827587) internal successors, (132), 115 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:10,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 132 transitions. [2023-11-29 01:24:10,430 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 132 transitions. [2023-11-29 01:24:10,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2023-11-29 01:24:10,431 INFO L428 stractBuchiCegarLoop]: Abstraction has 116 states and 132 transitions. [2023-11-29 01:24:10,431 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2023-11-29 01:24:10,431 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 132 transitions. [2023-11-29 01:24:10,432 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:10,432 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:10,432 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:10,433 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [13, 13, 13, 12, 12, 1, 1, 1, 1] [2023-11-29 01:24:10,433 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:10,434 INFO L748 eck$LassoCheckResult]: Stem: 6677#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 6661#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 6662#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6678#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6679#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6665#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6666#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6706#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6705#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6704#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6703#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6702#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6701#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6700#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6699#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6698#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6697#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6696#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6695#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6694#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6693#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6692#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6691#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6690#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6689#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6688#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6687#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6684#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6683#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 6667#L27-4 main_~i~0#1 := 0; 6668#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6674#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6660#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6671#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6676#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6767#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6766#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6764#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6761#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6760#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6758#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6755#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6754#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6752#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6749#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6748#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6746#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6743#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6742#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6740#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6737#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6736#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6734#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6731#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6730#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6728#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6725#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6724#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6722#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6719#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6718#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6716#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6714#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6713#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6710#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6708#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6707#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6682#L34 [2023-11-29 01:24:10,434 INFO L750 eck$LassoCheckResult]: Loop: 6682#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6685#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6681#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6682#L34 [2023-11-29 01:24:10,434 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:10,434 INFO L85 PathProgramCache]: Analyzing trace with hash -1447312493, now seen corresponding path program 24 times [2023-11-29 01:24:10,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:10,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379267190] [2023-11-29 01:24:10,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:10,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:10,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:10,528 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:10,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:10,592 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:10,592 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:10,593 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 14 times [2023-11-29 01:24:10,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:10,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995508796] [2023-11-29 01:24:10,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:10,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:10,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:10,597 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:10,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:10,600 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:10,600 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:10,600 INFO L85 PathProgramCache]: Analyzing trace with hash 290252291, now seen corresponding path program 25 times [2023-11-29 01:24:10,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:10,601 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900674516] [2023-11-29 01:24:10,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:10,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:10,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:11,287 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 210 proven. 206 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:11,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:11,287 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [900674516] [2023-11-29 01:24:11,287 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [900674516] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:11,287 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [52739752] [2023-11-29 01:24:11,287 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:24:11,288 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:11,288 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:11,289 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:11,290 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2023-11-29 01:24:11,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:11,410 INFO L262 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 30 conjunts are in the unsatisfiable core [2023-11-29 01:24:11,413 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:11,895 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 247 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:11,895 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:12,250 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 247 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:12,250 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [52739752] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:12,250 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:12,251 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30] total 46 [2023-11-29 01:24:12,251 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531856248] [2023-11-29 01:24:12,251 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:12,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:12,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2023-11-29 01:24:12,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=515, Invalid=1647, Unknown=0, NotChecked=0, Total=2162 [2023-11-29 01:24:12,293 INFO L87 Difference]: Start difference. First operand 116 states and 132 transitions. cyclomatic complexity: 19 Second operand has 47 states, 46 states have (on average 2.5652173913043477) internal successors, (118), 47 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:12,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:12,834 INFO L93 Difference]: Finished difference Result 375 states and 434 transitions. [2023-11-29 01:24:12,834 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 375 states and 434 transitions. [2023-11-29 01:24:12,837 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:12,838 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 375 states to 214 states and 246 transitions. [2023-11-29 01:24:12,838 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 185 [2023-11-29 01:24:12,839 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 185 [2023-11-29 01:24:12,839 INFO L73 IsDeterministic]: Start isDeterministic. Operand 214 states and 246 transitions. [2023-11-29 01:24:12,839 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:12,839 INFO L218 hiAutomatonCegarLoop]: Abstraction has 214 states and 246 transitions. [2023-11-29 01:24:12,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states and 246 transitions. [2023-11-29 01:24:12,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 124. [2023-11-29 01:24:12,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 124 states have (on average 1.1370967741935485) internal successors, (141), 123 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:12,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 141 transitions. [2023-11-29 01:24:12,842 INFO L240 hiAutomatonCegarLoop]: Abstraction has 124 states and 141 transitions. [2023-11-29 01:24:12,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2023-11-29 01:24:12,843 INFO L428 stractBuchiCegarLoop]: Abstraction has 124 states and 141 transitions. [2023-11-29 01:24:12,843 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2023-11-29 01:24:12,843 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 124 states and 141 transitions. [2023-11-29 01:24:12,844 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:12,844 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:12,844 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:12,845 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 14, 14, 13, 13, 1, 1, 1, 1] [2023-11-29 01:24:12,845 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:12,845 INFO L748 eck$LassoCheckResult]: Stem: 7662#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 7646#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 7647#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7663#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7664#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7650#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7651#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7693#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7692#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7691#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7690#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7689#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7688#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7687#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7686#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7685#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7684#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7683#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7682#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7681#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7680#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7679#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7678#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7677#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7676#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7675#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7674#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7673#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7672#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7669#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7668#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 7652#L27-4 main_~i~0#1 := 0; 7653#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7659#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7645#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7656#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7661#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7760#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7759#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7757#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7754#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7753#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7751#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7748#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7747#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7745#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7742#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7741#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7739#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7736#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7735#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7733#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7730#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7729#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7727#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7724#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7723#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7721#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7718#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7717#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7715#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7712#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7711#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7709#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7706#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7705#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7703#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7701#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7700#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7697#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7695#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7694#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7667#L34 [2023-11-29 01:24:12,846 INFO L750 eck$LassoCheckResult]: Loop: 7667#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7670#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7666#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7667#L34 [2023-11-29 01:24:12,846 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:12,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1635246469, now seen corresponding path program 26 times [2023-11-29 01:24:12,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:12,846 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331902437] [2023-11-29 01:24:12,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:12,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:12,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:12,921 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:12,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:12,991 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:12,991 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:12,992 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 15 times [2023-11-29 01:24:12,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:12,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393351190] [2023-11-29 01:24:12,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:12,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:12,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:12,995 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:12,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:12,998 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:12,999 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:12,999 INFO L85 PathProgramCache]: Analyzing trace with hash 2108533457, now seen corresponding path program 27 times [2023-11-29 01:24:12,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:12,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1426821044] [2023-11-29 01:24:12,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:13,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:13,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:13,714 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 247 proven. 236 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:13,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:13,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1426821044] [2023-11-29 01:24:13,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1426821044] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:13,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [845160291] [2023-11-29 01:24:13,714 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:24:13,714 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:13,715 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:13,716 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:13,716 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2023-11-29 01:24:14,112 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2023-11-29 01:24:14,113 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:14,116 INFO L262 TraceCheckSpWp]: Trace formula consists of 335 conjuncts, 32 conjunts are in the unsatisfiable core [2023-11-29 01:24:14,117 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:14,598 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 287 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:14,598 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:14,941 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 287 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:14,941 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [845160291] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:14,941 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:14,941 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32] total 49 [2023-11-29 01:24:14,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427202331] [2023-11-29 01:24:14,941 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:14,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:14,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2023-11-29 01:24:14,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=581, Invalid=1869, Unknown=0, NotChecked=0, Total=2450 [2023-11-29 01:24:14,995 INFO L87 Difference]: Start difference. First operand 124 states and 141 transitions. cyclomatic complexity: 20 Second operand has 50 states, 49 states have (on average 2.5714285714285716) internal successors, (126), 50 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:15,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:15,549 INFO L93 Difference]: Finished difference Result 401 states and 464 transitions. [2023-11-29 01:24:15,549 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 401 states and 464 transitions. [2023-11-29 01:24:15,552 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:15,553 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 401 states to 228 states and 262 transitions. [2023-11-29 01:24:15,553 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 197 [2023-11-29 01:24:15,554 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 197 [2023-11-29 01:24:15,554 INFO L73 IsDeterministic]: Start isDeterministic. Operand 228 states and 262 transitions. [2023-11-29 01:24:15,554 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:15,554 INFO L218 hiAutomatonCegarLoop]: Abstraction has 228 states and 262 transitions. [2023-11-29 01:24:15,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states and 262 transitions. [2023-11-29 01:24:15,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 132. [2023-11-29 01:24:15,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.1363636363636365) internal successors, (150), 131 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:15,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 150 transitions. [2023-11-29 01:24:15,557 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 150 transitions. [2023-11-29 01:24:15,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2023-11-29 01:24:15,557 INFO L428 stractBuchiCegarLoop]: Abstraction has 132 states and 150 transitions. [2023-11-29 01:24:15,557 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2023-11-29 01:24:15,558 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 150 transitions. [2023-11-29 01:24:15,558 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:15,559 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:15,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:15,560 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 15, 15, 14, 14, 1, 1, 1, 1] [2023-11-29 01:24:15,560 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:15,560 INFO L748 eck$LassoCheckResult]: Stem: 8716#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 8700#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 8701#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8717#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8718#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8704#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8705#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8749#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8748#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8747#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8746#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8745#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8744#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8743#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8742#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8741#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8740#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8739#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8738#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8737#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8736#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8735#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8734#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8733#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8732#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8731#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8730#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8729#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8728#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8727#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8726#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8723#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8722#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 8706#L27-4 main_~i~0#1 := 0; 8707#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8713#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8699#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8710#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8715#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8822#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8821#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8819#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8816#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8815#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8813#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8810#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8809#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8807#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8804#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8803#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8801#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8798#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8797#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8795#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8792#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8791#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8789#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8786#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8785#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8783#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8780#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8779#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8777#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8774#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8773#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8771#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8768#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8767#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8765#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8762#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8761#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8759#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8757#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8756#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8753#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8751#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8750#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8721#L34 [2023-11-29 01:24:15,560 INFO L750 eck$LassoCheckResult]: Loop: 8721#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8724#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8720#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8721#L34 [2023-11-29 01:24:15,560 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:15,561 INFO L85 PathProgramCache]: Analyzing trace with hash -436367217, now seen corresponding path program 28 times [2023-11-29 01:24:15,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:15,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073137449] [2023-11-29 01:24:15,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:15,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:15,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:15,634 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:15,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:15,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:15,701 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:15,701 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 16 times [2023-11-29 01:24:15,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:15,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [377051741] [2023-11-29 01:24:15,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:15,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:15,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:15,706 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:15,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:15,709 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:15,709 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:15,709 INFO L85 PathProgramCache]: Analyzing trace with hash 1050290055, now seen corresponding path program 29 times [2023-11-29 01:24:15,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:15,710 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023786265] [2023-11-29 01:24:15,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:15,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:15,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:16,548 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 287 proven. 268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:16,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:16,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023786265] [2023-11-29 01:24:16,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1023786265] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:16,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [359741868] [2023-11-29 01:24:16,548 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:24:16,548 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:16,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:16,550 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:16,551 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2023-11-29 01:24:16,969 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2023-11-29 01:24:16,969 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:16,972 INFO L262 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 34 conjunts are in the unsatisfiable core [2023-11-29 01:24:16,974 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:17,601 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 330 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:17,601 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:17,996 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 330 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:17,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [359741868] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:17,996 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:17,997 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34] total 52 [2023-11-29 01:24:17,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899839850] [2023-11-29 01:24:17,997 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:18,030 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:18,031 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2023-11-29 01:24:18,032 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=651, Invalid=2105, Unknown=0, NotChecked=0, Total=2756 [2023-11-29 01:24:18,032 INFO L87 Difference]: Start difference. First operand 132 states and 150 transitions. cyclomatic complexity: 21 Second operand has 53 states, 52 states have (on average 2.576923076923077) internal successors, (134), 53 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:18,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:18,633 INFO L93 Difference]: Finished difference Result 427 states and 494 transitions. [2023-11-29 01:24:18,633 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 427 states and 494 transitions. [2023-11-29 01:24:18,636 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:18,637 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 427 states to 242 states and 278 transitions. [2023-11-29 01:24:18,637 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 209 [2023-11-29 01:24:18,637 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 209 [2023-11-29 01:24:18,637 INFO L73 IsDeterministic]: Start isDeterministic. Operand 242 states and 278 transitions. [2023-11-29 01:24:18,638 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:18,638 INFO L218 hiAutomatonCegarLoop]: Abstraction has 242 states and 278 transitions. [2023-11-29 01:24:18,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states and 278 transitions. [2023-11-29 01:24:18,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 140. [2023-11-29 01:24:18,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 140 states have (on average 1.1357142857142857) internal successors, (159), 139 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:18,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 159 transitions. [2023-11-29 01:24:18,640 INFO L240 hiAutomatonCegarLoop]: Abstraction has 140 states and 159 transitions. [2023-11-29 01:24:18,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2023-11-29 01:24:18,646 INFO L428 stractBuchiCegarLoop]: Abstraction has 140 states and 159 transitions. [2023-11-29 01:24:18,646 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2023-11-29 01:24:18,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 140 states and 159 transitions. [2023-11-29 01:24:18,647 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:18,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:18,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:18,648 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [16, 16, 16, 15, 15, 1, 1, 1, 1] [2023-11-29 01:24:18,648 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:18,649 INFO L748 eck$LassoCheckResult]: Stem: 9839#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 9823#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 9824#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9840#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9841#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9827#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9828#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9874#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9873#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9872#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9871#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9870#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9869#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9868#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9867#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9866#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9865#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9864#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9863#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9862#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9861#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9860#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9859#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9858#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9857#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9856#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9855#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9854#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9853#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9852#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9851#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9850#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9849#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9846#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9845#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 9829#L27-4 main_~i~0#1 := 0; 9830#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9836#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9822#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9833#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9838#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9953#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9952#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9950#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9947#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9946#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9944#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9941#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9940#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9938#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9935#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9934#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9932#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9929#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9928#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9926#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9923#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9922#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9920#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9917#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9916#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9914#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9911#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9910#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9908#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9905#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9904#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9902#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9899#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9898#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9896#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9893#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9892#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9890#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9887#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9886#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9884#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9882#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9881#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9878#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9876#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9875#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9844#L34 [2023-11-29 01:24:18,649 INFO L750 eck$LassoCheckResult]: Loop: 9844#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9847#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9843#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9844#L34 [2023-11-29 01:24:18,649 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:18,649 INFO L85 PathProgramCache]: Analyzing trace with hash -1180030839, now seen corresponding path program 30 times [2023-11-29 01:24:18,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:18,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128933492] [2023-11-29 01:24:18,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:18,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:18,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:18,706 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:18,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:18,752 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:18,752 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:18,752 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 17 times [2023-11-29 01:24:18,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:18,752 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798845447] [2023-11-29 01:24:18,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:18,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:18,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:18,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:18,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:18,758 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:18,759 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:18,759 INFO L85 PathProgramCache]: Analyzing trace with hash 8639821, now seen corresponding path program 31 times [2023-11-29 01:24:18,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:18,759 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98221863] [2023-11-29 01:24:18,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:18,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:18,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:19,553 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 330 proven. 302 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:19,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:19,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98221863] [2023-11-29 01:24:19,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98221863] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:19,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1303305648] [2023-11-29 01:24:19,554 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:24:19,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:19,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:19,557 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:19,558 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2023-11-29 01:24:19,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:19,727 INFO L262 TraceCheckSpWp]: Trace formula consists of 377 conjuncts, 36 conjunts are in the unsatisfiable core [2023-11-29 01:24:19,728 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:20,297 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 376 proven. 256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:20,297 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:20,724 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 376 proven. 256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:20,724 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1303305648] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:20,724 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:20,725 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36] total 55 [2023-11-29 01:24:20,725 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [547982557] [2023-11-29 01:24:20,725 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:20,765 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:20,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2023-11-29 01:24:20,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=725, Invalid=2355, Unknown=0, NotChecked=0, Total=3080 [2023-11-29 01:24:20,767 INFO L87 Difference]: Start difference. First operand 140 states and 159 transitions. cyclomatic complexity: 22 Second operand has 56 states, 55 states have (on average 2.581818181818182) internal successors, (142), 56 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:21,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:21,466 INFO L93 Difference]: Finished difference Result 453 states and 524 transitions. [2023-11-29 01:24:21,466 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 453 states and 524 transitions. [2023-11-29 01:24:21,469 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:21,471 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 453 states to 256 states and 294 transitions. [2023-11-29 01:24:21,471 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 221 [2023-11-29 01:24:21,471 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 221 [2023-11-29 01:24:21,472 INFO L73 IsDeterministic]: Start isDeterministic. Operand 256 states and 294 transitions. [2023-11-29 01:24:21,472 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:21,472 INFO L218 hiAutomatonCegarLoop]: Abstraction has 256 states and 294 transitions. [2023-11-29 01:24:21,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states and 294 transitions. [2023-11-29 01:24:21,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 148. [2023-11-29 01:24:21,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 148 states have (on average 1.135135135135135) internal successors, (168), 147 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:21,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 168 transitions. [2023-11-29 01:24:21,476 INFO L240 hiAutomatonCegarLoop]: Abstraction has 148 states and 168 transitions. [2023-11-29 01:24:21,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2023-11-29 01:24:21,477 INFO L428 stractBuchiCegarLoop]: Abstraction has 148 states and 168 transitions. [2023-11-29 01:24:21,477 INFO L335 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2023-11-29 01:24:21,477 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 148 states and 168 transitions. [2023-11-29 01:24:21,478 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:21,478 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:21,478 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:21,479 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [17, 17, 17, 16, 16, 1, 1, 1, 1] [2023-11-29 01:24:21,479 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:21,479 INFO L748 eck$LassoCheckResult]: Stem: 11031#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 11015#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 11016#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11032#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11033#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11019#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11020#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11068#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11067#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11066#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11065#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11064#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11063#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11062#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11061#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11060#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11059#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11058#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11057#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11056#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11055#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11054#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11053#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11052#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11051#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11050#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11049#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11048#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11047#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11046#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11045#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11044#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11043#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11042#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11041#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11038#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11037#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 11021#L27-4 main_~i~0#1 := 0; 11022#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11028#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11014#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11025#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11030#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11153#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11152#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11150#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11147#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11146#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11144#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11141#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11140#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11138#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11135#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11134#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11132#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11129#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11128#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11126#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11123#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11122#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11120#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11117#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11116#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11114#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11111#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11110#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11108#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11105#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11104#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11102#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11099#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11098#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11096#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11093#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11092#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11090#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11087#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11086#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11084#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11081#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11080#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11078#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11076#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11075#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11072#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11070#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11069#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11036#L34 [2023-11-29 01:24:21,480 INFO L750 eck$LassoCheckResult]: Loop: 11036#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11039#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11035#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11036#L34 [2023-11-29 01:24:21,480 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:21,480 INFO L85 PathProgramCache]: Analyzing trace with hash -1481235061, now seen corresponding path program 32 times [2023-11-29 01:24:21,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:21,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423220009] [2023-11-29 01:24:21,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:21,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:21,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:21,597 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:21,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:21,674 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:21,675 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:21,675 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 18 times [2023-11-29 01:24:21,675 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:21,675 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284939244] [2023-11-29 01:24:21,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:21,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:21,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:21,680 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:21,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:21,683 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:21,684 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:21,684 INFO L85 PathProgramCache]: Analyzing trace with hash -979656437, now seen corresponding path program 33 times [2023-11-29 01:24:21,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:21,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770230008] [2023-11-29 01:24:21,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:21,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:21,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:22,786 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 376 proven. 338 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:22,786 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:22,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770230008] [2023-11-29 01:24:22,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [770230008] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:22,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1234551919] [2023-11-29 01:24:22,787 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:24:22,787 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:22,787 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:22,788 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:22,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2023-11-29 01:24:23,647 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2023-11-29 01:24:23,647 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:23,651 INFO L262 TraceCheckSpWp]: Trace formula consists of 398 conjuncts, 38 conjunts are in the unsatisfiable core [2023-11-29 01:24:23,652 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:24,315 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 425 proven. 289 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:24,315 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:24,774 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 425 proven. 289 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:24,774 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1234551919] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:24,774 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:24,775 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38] total 58 [2023-11-29 01:24:24,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902823984] [2023-11-29 01:24:24,775 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:24,817 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:24,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2023-11-29 01:24:24,820 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=803, Invalid=2619, Unknown=0, NotChecked=0, Total=3422 [2023-11-29 01:24:24,820 INFO L87 Difference]: Start difference. First operand 148 states and 168 transitions. cyclomatic complexity: 23 Second operand has 59 states, 58 states have (on average 2.586206896551724) internal successors, (150), 59 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:25,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:25,640 INFO L93 Difference]: Finished difference Result 479 states and 554 transitions. [2023-11-29 01:24:25,640 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 479 states and 554 transitions. [2023-11-29 01:24:25,643 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:25,644 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 479 states to 270 states and 310 transitions. [2023-11-29 01:24:25,644 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 233 [2023-11-29 01:24:25,645 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 233 [2023-11-29 01:24:25,645 INFO L73 IsDeterministic]: Start isDeterministic. Operand 270 states and 310 transitions. [2023-11-29 01:24:25,645 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:25,645 INFO L218 hiAutomatonCegarLoop]: Abstraction has 270 states and 310 transitions. [2023-11-29 01:24:25,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states and 310 transitions. [2023-11-29 01:24:25,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 156. [2023-11-29 01:24:25,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 156 states have (on average 1.1346153846153846) internal successors, (177), 155 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:25,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 177 transitions. [2023-11-29 01:24:25,648 INFO L240 hiAutomatonCegarLoop]: Abstraction has 156 states and 177 transitions. [2023-11-29 01:24:25,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2023-11-29 01:24:25,649 INFO L428 stractBuchiCegarLoop]: Abstraction has 156 states and 177 transitions. [2023-11-29 01:24:25,649 INFO L335 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2023-11-29 01:24:25,649 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 156 states and 177 transitions. [2023-11-29 01:24:25,650 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:25,650 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:25,650 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:25,651 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [18, 18, 18, 17, 17, 1, 1, 1, 1] [2023-11-29 01:24:25,651 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:25,651 INFO L748 eck$LassoCheckResult]: Stem: 12294#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 12276#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 12277#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12292#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12293#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12280#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12281#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12331#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12330#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12323#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12322#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12321#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12320#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12319#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12318#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12317#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12316#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12299#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12298#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 12282#L27-4 main_~i~0#1 := 0; 12283#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12289#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12275#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12286#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12291#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12422#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12421#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12419#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12416#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12415#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12413#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12410#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12409#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12407#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12404#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12403#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12401#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12398#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12397#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12395#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12392#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12391#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12389#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12386#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12385#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12383#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12380#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12379#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12377#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12374#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12373#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12371#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12368#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12367#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12365#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12362#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12361#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12359#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12356#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12355#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12353#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12350#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12349#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12347#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12344#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12343#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12341#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12339#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12338#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12335#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12333#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12332#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12297#L34 [2023-11-29 01:24:25,652 INFO L750 eck$LassoCheckResult]: Loop: 12297#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12300#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12296#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12297#L34 [2023-11-29 01:24:25,652 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:25,652 INFO L85 PathProgramCache]: Analyzing trace with hash -1155020915, now seen corresponding path program 34 times [2023-11-29 01:24:25,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:25,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1571129706] [2023-11-29 01:24:25,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:25,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:25,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:25,745 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:25,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:25,828 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:25,829 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:25,829 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 19 times [2023-11-29 01:24:25,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:25,829 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885975363] [2023-11-29 01:24:25,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:25,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:25,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:25,833 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:25,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:25,837 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:25,837 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:25,837 INFO L85 PathProgramCache]: Analyzing trace with hash 2049943497, now seen corresponding path program 35 times [2023-11-29 01:24:25,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:25,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245845474] [2023-11-29 01:24:25,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:25,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:25,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:27,016 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 425 proven. 376 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:27,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:27,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245845474] [2023-11-29 01:24:27,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245845474] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:27,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1078971993] [2023-11-29 01:24:27,017 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:24:27,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:27,017 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:27,019 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:27,020 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2023-11-29 01:24:27,701 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2023-11-29 01:24:27,701 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:27,706 INFO L262 TraceCheckSpWp]: Trace formula consists of 419 conjuncts, 40 conjunts are in the unsatisfiable core [2023-11-29 01:24:27,708 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:28,423 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 477 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:28,424 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:28,901 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 477 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:28,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1078971993] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:28,902 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:28,902 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40] total 61 [2023-11-29 01:24:28,902 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1291496537] [2023-11-29 01:24:28,902 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:28,973 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:28,973 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2023-11-29 01:24:28,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=885, Invalid=2897, Unknown=0, NotChecked=0, Total=3782 [2023-11-29 01:24:28,975 INFO L87 Difference]: Start difference. First operand 156 states and 177 transitions. cyclomatic complexity: 24 Second operand has 62 states, 61 states have (on average 2.5901639344262297) internal successors, (158), 62 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:29,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:29,694 INFO L93 Difference]: Finished difference Result 505 states and 584 transitions. [2023-11-29 01:24:29,694 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 505 states and 584 transitions. [2023-11-29 01:24:29,697 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:29,698 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 505 states to 284 states and 326 transitions. [2023-11-29 01:24:29,699 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 245 [2023-11-29 01:24:29,699 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 245 [2023-11-29 01:24:29,699 INFO L73 IsDeterministic]: Start isDeterministic. Operand 284 states and 326 transitions. [2023-11-29 01:24:29,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:29,699 INFO L218 hiAutomatonCegarLoop]: Abstraction has 284 states and 326 transitions. [2023-11-29 01:24:29,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states and 326 transitions. [2023-11-29 01:24:29,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 164. [2023-11-29 01:24:29,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 164 states, 164 states have (on average 1.1341463414634145) internal successors, (186), 163 states have internal predecessors, (186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:29,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 186 transitions. [2023-11-29 01:24:29,702 INFO L240 hiAutomatonCegarLoop]: Abstraction has 164 states and 186 transitions. [2023-11-29 01:24:29,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2023-11-29 01:24:29,703 INFO L428 stractBuchiCegarLoop]: Abstraction has 164 states and 186 transitions. [2023-11-29 01:24:29,703 INFO L335 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2023-11-29 01:24:29,703 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 164 states and 186 transitions. [2023-11-29 01:24:29,704 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:29,704 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:29,704 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:29,705 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [19, 19, 19, 18, 18, 1, 1, 1, 1] [2023-11-29 01:24:29,705 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:29,705 INFO L748 eck$LassoCheckResult]: Stem: 13622#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 13606#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 13607#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13623#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13624#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13610#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13611#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13663#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13662#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13661#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13660#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13659#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13658#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13657#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13656#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13655#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13654#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13653#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13652#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13651#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13650#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13649#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13648#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13647#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13646#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13645#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13644#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13643#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13642#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13641#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13640#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13639#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13638#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13637#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13636#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13635#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13634#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13633#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13632#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13629#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13628#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 13612#L27-4 main_~i~0#1 := 0; 13613#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13619#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13621#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13760#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13759#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13757#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13754#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13753#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13751#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13748#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13747#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13745#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13742#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13741#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13739#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13736#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13735#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13733#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13730#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13729#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13727#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13724#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13723#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13721#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13718#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13717#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13715#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13712#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13711#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13709#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13706#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13705#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13703#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13700#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13699#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13697#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13694#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13693#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13691#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13688#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13687#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13685#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13682#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13681#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13679#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13676#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13675#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13673#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13671#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13670#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13667#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13665#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13664#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13627#L34 [2023-11-29 01:24:29,705 INFO L750 eck$LassoCheckResult]: Loop: 13627#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13630#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13626#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13627#L34 [2023-11-29 01:24:29,706 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:29,706 INFO L85 PathProgramCache]: Analyzing trace with hash -769572217, now seen corresponding path program 36 times [2023-11-29 01:24:29,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:29,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695380054] [2023-11-29 01:24:29,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:29,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:29,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:29,805 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:29,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:29,912 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:29,913 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:29,913 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 20 times [2023-11-29 01:24:29,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:29,913 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105146169] [2023-11-29 01:24:29,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:29,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:29,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:29,917 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:29,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:29,921 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:29,921 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:29,922 INFO L85 PathProgramCache]: Analyzing trace with hash 209556111, now seen corresponding path program 37 times [2023-11-29 01:24:29,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:29,922 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439162626] [2023-11-29 01:24:29,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:29,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:29,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:31,016 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 477 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:31,016 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:31,016 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439162626] [2023-11-29 01:24:31,016 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1439162626] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:31,016 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1920715475] [2023-11-29 01:24:31,016 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:24:31,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:31,017 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:31,018 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:31,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2023-11-29 01:24:31,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:31,172 INFO L262 TraceCheckSpWp]: Trace formula consists of 440 conjuncts, 42 conjunts are in the unsatisfiable core [2023-11-29 01:24:31,174 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:31,923 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 532 proven. 361 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:31,923 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:32,442 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 532 proven. 361 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:32,442 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1920715475] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:32,442 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:32,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42] total 64 [2023-11-29 01:24:32,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072484045] [2023-11-29 01:24:32,443 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:32,475 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:32,476 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2023-11-29 01:24:32,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=971, Invalid=3189, Unknown=0, NotChecked=0, Total=4160 [2023-11-29 01:24:32,478 INFO L87 Difference]: Start difference. First operand 164 states and 186 transitions. cyclomatic complexity: 25 Second operand has 65 states, 64 states have (on average 2.59375) internal successors, (166), 65 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:33,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:33,365 INFO L93 Difference]: Finished difference Result 531 states and 614 transitions. [2023-11-29 01:24:33,365 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 531 states and 614 transitions. [2023-11-29 01:24:33,368 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:33,369 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 531 states to 298 states and 342 transitions. [2023-11-29 01:24:33,369 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 257 [2023-11-29 01:24:33,370 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 257 [2023-11-29 01:24:33,370 INFO L73 IsDeterministic]: Start isDeterministic. Operand 298 states and 342 transitions. [2023-11-29 01:24:33,370 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:33,370 INFO L218 hiAutomatonCegarLoop]: Abstraction has 298 states and 342 transitions. [2023-11-29 01:24:33,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298 states and 342 transitions. [2023-11-29 01:24:33,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298 to 172. [2023-11-29 01:24:33,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 172 states have (on average 1.1337209302325582) internal successors, (195), 171 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:33,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 195 transitions. [2023-11-29 01:24:33,375 INFO L240 hiAutomatonCegarLoop]: Abstraction has 172 states and 195 transitions. [2023-11-29 01:24:33,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2023-11-29 01:24:33,375 INFO L428 stractBuchiCegarLoop]: Abstraction has 172 states and 195 transitions. [2023-11-29 01:24:33,376 INFO L335 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2023-11-29 01:24:33,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 195 transitions. [2023-11-29 01:24:33,376 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:33,376 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:33,376 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:33,377 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [20, 20, 20, 19, 19, 1, 1, 1, 1] [2023-11-29 01:24:33,377 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:33,378 INFO L748 eck$LassoCheckResult]: Stem: 15021#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 15005#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 15006#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15022#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15023#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15009#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15010#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15064#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15063#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15062#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15061#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15060#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15059#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15058#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15057#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15056#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15055#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15054#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15053#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15052#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15051#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15050#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15049#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15048#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15047#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15046#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15045#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15044#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15043#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15042#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15041#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15040#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15039#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15038#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15037#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15036#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15035#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15034#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15033#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15032#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15031#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15028#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15027#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 15011#L27-4 main_~i~0#1 := 0; 15012#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15018#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15004#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15015#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15020#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15167#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15166#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15164#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15161#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15160#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15158#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15155#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15154#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15152#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15149#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15148#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15146#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15143#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15142#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15140#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15137#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15136#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15134#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15131#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15130#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15128#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15125#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15124#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15122#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15119#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15118#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15116#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15113#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15112#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15110#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15107#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15106#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15104#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15101#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15100#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15098#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15095#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15094#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15092#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15089#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15088#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15086#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15083#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15082#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15080#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15077#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15076#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15074#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15072#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15071#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15068#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15066#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15065#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15026#L34 [2023-11-29 01:24:33,378 INFO L750 eck$LassoCheckResult]: Loop: 15026#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15029#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15025#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15026#L34 [2023-11-29 01:24:33,378 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:33,378 INFO L85 PathProgramCache]: Analyzing trace with hash 297074321, now seen corresponding path program 38 times [2023-11-29 01:24:33,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:33,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703177427] [2023-11-29 01:24:33,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:33,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:33,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:33,453 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:33,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:33,529 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:33,530 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:33,530 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 21 times [2023-11-29 01:24:33,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:33,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267345353] [2023-11-29 01:24:33,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:33,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:33,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:33,534 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:33,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:33,536 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:33,537 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:33,537 INFO L85 PathProgramCache]: Analyzing trace with hash -1786453435, now seen corresponding path program 39 times [2023-11-29 01:24:33,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:33,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716819089] [2023-11-29 01:24:33,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:33,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:33,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:34,539 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 532 proven. 458 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:34,539 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:34,539 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716819089] [2023-11-29 01:24:34,539 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716819089] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:34,539 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [57294860] [2023-11-29 01:24:34,539 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:24:34,539 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:34,539 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:34,540 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:34,541 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2023-11-29 01:24:36,057 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2023-11-29 01:24:36,057 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:36,063 INFO L262 TraceCheckSpWp]: Trace formula consists of 461 conjuncts, 44 conjunts are in the unsatisfiable core [2023-11-29 01:24:36,065 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:36,859 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 590 proven. 400 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:36,859 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:37,457 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 590 proven. 400 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:37,457 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [57294860] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:37,457 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:37,458 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44] total 67 [2023-11-29 01:24:37,458 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1501604826] [2023-11-29 01:24:37,458 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:37,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:37,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2023-11-29 01:24:37,496 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1061, Invalid=3495, Unknown=0, NotChecked=0, Total=4556 [2023-11-29 01:24:37,496 INFO L87 Difference]: Start difference. First operand 172 states and 195 transitions. cyclomatic complexity: 26 Second operand has 68 states, 67 states have (on average 2.5970149253731343) internal successors, (174), 68 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:38,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:38,408 INFO L93 Difference]: Finished difference Result 557 states and 644 transitions. [2023-11-29 01:24:38,408 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 557 states and 644 transitions. [2023-11-29 01:24:38,411 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:38,413 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 557 states to 312 states and 358 transitions. [2023-11-29 01:24:38,414 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 269 [2023-11-29 01:24:38,414 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 269 [2023-11-29 01:24:38,414 INFO L73 IsDeterministic]: Start isDeterministic. Operand 312 states and 358 transitions. [2023-11-29 01:24:38,415 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:38,415 INFO L218 hiAutomatonCegarLoop]: Abstraction has 312 states and 358 transitions. [2023-11-29 01:24:38,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states and 358 transitions. [2023-11-29 01:24:38,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 180. [2023-11-29 01:24:38,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 180 states have (on average 1.1333333333333333) internal successors, (204), 179 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:38,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 204 transitions. [2023-11-29 01:24:38,419 INFO L240 hiAutomatonCegarLoop]: Abstraction has 180 states and 204 transitions. [2023-11-29 01:24:38,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2023-11-29 01:24:38,420 INFO L428 stractBuchiCegarLoop]: Abstraction has 180 states and 204 transitions. [2023-11-29 01:24:38,420 INFO L335 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2023-11-29 01:24:38,420 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 204 transitions. [2023-11-29 01:24:38,421 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:38,421 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:38,421 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:38,422 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [21, 21, 21, 20, 20, 1, 1, 1, 1] [2023-11-29 01:24:38,422 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:38,423 INFO L748 eck$LassoCheckResult]: Stem: 16491#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 16473#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 16474#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16489#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16490#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16477#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16478#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16534#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16533#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16532#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16531#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16530#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16529#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16528#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16527#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16526#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16525#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16524#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16523#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16522#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16521#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16520#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16519#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16518#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16517#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16516#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16515#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16514#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16513#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16512#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16511#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16510#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16509#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16508#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16507#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16506#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16505#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16504#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16503#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16502#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16501#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16500#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16499#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16496#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16495#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 16479#L27-4 main_~i~0#1 := 0; 16480#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16486#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16472#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16483#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16488#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16643#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16642#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16640#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16637#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16636#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16634#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16631#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16630#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16628#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16625#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16624#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16622#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16619#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16618#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16616#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16613#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16612#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16610#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16607#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16606#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16604#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16601#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16600#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16598#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16595#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16594#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16592#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16589#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16588#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16586#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16583#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16582#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16580#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16577#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16576#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16574#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16571#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16570#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16568#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16565#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16564#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16562#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16559#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16558#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16556#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16553#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16552#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16550#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16547#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16546#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16544#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16542#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16541#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16538#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16536#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16535#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16494#L34 [2023-11-29 01:24:38,423 INFO L750 eck$LassoCheckResult]: Loop: 16494#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16497#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16493#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16494#L34 [2023-11-29 01:24:38,423 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:38,423 INFO L85 PathProgramCache]: Analyzing trace with hash -1988450429, now seen corresponding path program 40 times [2023-11-29 01:24:38,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:38,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556807429] [2023-11-29 01:24:38,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:38,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:38,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:38,541 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:38,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:38,655 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:38,656 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:38,656 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 22 times [2023-11-29 01:24:38,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:38,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695999538] [2023-11-29 01:24:38,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:38,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:38,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:38,661 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:38,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:38,664 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:38,665 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:38,665 INFO L85 PathProgramCache]: Analyzing trace with hash -1737737197, now seen corresponding path program 41 times [2023-11-29 01:24:38,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:38,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260114048] [2023-11-29 01:24:38,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:38,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:38,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:39,797 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 590 proven. 502 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:39,797 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:39,798 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260114048] [2023-11-29 01:24:39,798 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1260114048] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:39,798 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1094018506] [2023-11-29 01:24:39,798 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:24:39,798 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:39,798 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:39,799 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:39,800 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2023-11-29 01:24:41,331 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2023-11-29 01:24:41,331 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:41,337 INFO L262 TraceCheckSpWp]: Trace formula consists of 482 conjuncts, 46 conjunts are in the unsatisfiable core [2023-11-29 01:24:41,340 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:42,172 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 651 proven. 441 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:42,172 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:42,797 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 651 proven. 441 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:42,797 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1094018506] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:42,797 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:42,798 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46] total 70 [2023-11-29 01:24:42,798 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200982103] [2023-11-29 01:24:42,798 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:42,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:42,835 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2023-11-29 01:24:42,837 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1155, Invalid=3815, Unknown=0, NotChecked=0, Total=4970 [2023-11-29 01:24:42,837 INFO L87 Difference]: Start difference. First operand 180 states and 204 transitions. cyclomatic complexity: 27 Second operand has 71 states, 70 states have (on average 2.6) internal successors, (182), 71 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:43,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:43,784 INFO L93 Difference]: Finished difference Result 583 states and 674 transitions. [2023-11-29 01:24:43,785 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 583 states and 674 transitions. [2023-11-29 01:24:43,787 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:43,789 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 583 states to 326 states and 374 transitions. [2023-11-29 01:24:43,789 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 281 [2023-11-29 01:24:43,789 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 281 [2023-11-29 01:24:43,789 INFO L73 IsDeterministic]: Start isDeterministic. Operand 326 states and 374 transitions. [2023-11-29 01:24:43,789 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:43,789 INFO L218 hiAutomatonCegarLoop]: Abstraction has 326 states and 374 transitions. [2023-11-29 01:24:43,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states and 374 transitions. [2023-11-29 01:24:43,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 188. [2023-11-29 01:24:43,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 188 states, 188 states have (on average 1.1329787234042554) internal successors, (213), 187 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:43,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 213 transitions. [2023-11-29 01:24:43,793 INFO L240 hiAutomatonCegarLoop]: Abstraction has 188 states and 213 transitions. [2023-11-29 01:24:43,793 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2023-11-29 01:24:43,793 INFO L428 stractBuchiCegarLoop]: Abstraction has 188 states and 213 transitions. [2023-11-29 01:24:43,793 INFO L335 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2023-11-29 01:24:43,794 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 188 states and 213 transitions. [2023-11-29 01:24:43,794 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:43,794 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:43,794 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:43,795 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 22, 21, 21, 1, 1, 1, 1] [2023-11-29 01:24:43,795 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:43,795 INFO L748 eck$LassoCheckResult]: Stem: 18028#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 18010#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 18011#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18026#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18027#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18014#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18015#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18073#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18072#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18071#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18070#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18069#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18068#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18067#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18066#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18065#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18064#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18063#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18062#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18061#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18060#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18059#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18058#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18057#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18056#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18055#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18054#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18053#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18052#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18051#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18050#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18049#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18048#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18047#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18046#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18045#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18044#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18043#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18042#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18041#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18040#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18039#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18038#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18037#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18036#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18033#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18032#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 18016#L27-4 main_~i~0#1 := 0; 18017#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18023#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18009#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18020#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18025#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18188#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18187#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18185#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18182#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18181#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18179#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18176#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18175#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18173#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18170#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18169#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18167#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18164#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18163#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18161#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18158#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18157#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18155#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18152#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18151#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18149#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18146#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18145#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18143#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18140#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18139#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18137#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18134#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18133#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18131#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18128#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18127#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18125#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18122#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18121#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18119#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18116#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18115#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18113#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18110#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18109#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18107#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18104#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18103#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18101#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18098#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18097#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18095#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18092#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18091#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18089#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18086#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18085#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18083#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18081#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18080#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18077#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18075#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18074#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18031#L34 [2023-11-29 01:24:43,795 INFO L750 eck$LassoCheckResult]: Loop: 18031#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18034#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18030#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18031#L34 [2023-11-29 01:24:43,796 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:43,796 INFO L85 PathProgramCache]: Analyzing trace with hash 1779830165, now seen corresponding path program 42 times [2023-11-29 01:24:43,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:43,796 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681717392] [2023-11-29 01:24:43,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:43,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:43,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:43,927 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:43,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:43,995 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:43,995 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:43,995 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 23 times [2023-11-29 01:24:43,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:43,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186359182] [2023-11-29 01:24:43,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:43,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:43,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:43,998 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:43,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:44,002 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:44,002 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:44,002 INFO L85 PathProgramCache]: Analyzing trace with hash 1549223105, now seen corresponding path program 43 times [2023-11-29 01:24:44,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:44,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1232081879] [2023-11-29 01:24:44,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:44,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:44,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:45,223 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 651 proven. 548 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:45,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:45,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1232081879] [2023-11-29 01:24:45,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1232081879] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:45,224 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1317985807] [2023-11-29 01:24:45,224 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:24:45,224 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:45,224 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:45,225 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:45,226 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2023-11-29 01:24:45,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:45,424 INFO L262 TraceCheckSpWp]: Trace formula consists of 503 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-29 01:24:45,427 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:46,336 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 715 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:46,336 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:47,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 715 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:47,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1317985807] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:47,021 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:47,022 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 73 [2023-11-29 01:24:47,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [117494012] [2023-11-29 01:24:47,022 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:47,058 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:47,059 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2023-11-29 01:24:47,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1253, Invalid=4149, Unknown=0, NotChecked=0, Total=5402 [2023-11-29 01:24:47,062 INFO L87 Difference]: Start difference. First operand 188 states and 213 transitions. cyclomatic complexity: 28 Second operand has 74 states, 73 states have (on average 2.6027397260273974) internal successors, (190), 74 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:48,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:48,225 INFO L93 Difference]: Finished difference Result 609 states and 704 transitions. [2023-11-29 01:24:48,225 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 609 states and 704 transitions. [2023-11-29 01:24:48,229 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:48,231 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 609 states to 340 states and 390 transitions. [2023-11-29 01:24:48,231 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 293 [2023-11-29 01:24:48,232 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 293 [2023-11-29 01:24:48,232 INFO L73 IsDeterministic]: Start isDeterministic. Operand 340 states and 390 transitions. [2023-11-29 01:24:48,232 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:48,232 INFO L218 hiAutomatonCegarLoop]: Abstraction has 340 states and 390 transitions. [2023-11-29 01:24:48,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states and 390 transitions. [2023-11-29 01:24:48,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 196. [2023-11-29 01:24:48,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.1326530612244898) internal successors, (222), 195 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:48,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 222 transitions. [2023-11-29 01:24:48,237 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 222 transitions. [2023-11-29 01:24:48,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2023-11-29 01:24:48,238 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 222 transitions. [2023-11-29 01:24:48,238 INFO L335 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2023-11-29 01:24:48,238 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 222 transitions. [2023-11-29 01:24:48,239 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:48,239 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:48,239 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:48,240 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 23, 23, 22, 22, 1, 1, 1, 1] [2023-11-29 01:24:48,240 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:48,240 INFO L748 eck$LassoCheckResult]: Stem: 19632#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 19616#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 19617#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19633#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19634#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19620#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19621#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19681#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19680#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19679#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19678#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19677#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19676#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19675#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19674#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19673#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19672#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19671#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19670#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19669#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19668#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19667#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19666#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19665#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19664#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19663#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19662#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19661#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19660#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19659#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19658#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19657#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19656#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19655#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19654#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19653#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19652#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19651#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19650#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19649#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19648#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19647#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19646#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19645#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19644#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19643#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19642#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19639#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19638#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 19622#L27-4 main_~i~0#1 := 0; 19623#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19629#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19615#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19626#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19631#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19802#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19801#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19799#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19796#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19795#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19793#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19790#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19789#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19787#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19784#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19783#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19781#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19778#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19777#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19775#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19772#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19771#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19769#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19766#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19765#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19763#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19760#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19759#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19757#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19754#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19753#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19751#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19748#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19747#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19745#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19742#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19741#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19739#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19736#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19735#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19733#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19730#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19729#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19727#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19724#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19723#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19721#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19718#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19717#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19715#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19712#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19711#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19709#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19706#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19705#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19703#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19700#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19699#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19697#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19694#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19693#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19691#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19689#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19688#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19685#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19683#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19682#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19637#L34 [2023-11-29 01:24:48,241 INFO L750 eck$LassoCheckResult]: Loop: 19637#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19640#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19636#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19637#L34 [2023-11-29 01:24:48,241 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:48,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1359080321, now seen corresponding path program 44 times [2023-11-29 01:24:48,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:48,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042544247] [2023-11-29 01:24:48,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:48,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:48,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:48,351 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:48,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:48,473 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:48,474 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:48,474 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 24 times [2023-11-29 01:24:48,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:48,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755008675] [2023-11-29 01:24:48,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:48,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:48,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:48,479 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:48,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:48,484 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:48,484 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:48,484 INFO L85 PathProgramCache]: Analyzing trace with hash 294903191, now seen corresponding path program 45 times [2023-11-29 01:24:48,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:48,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733445590] [2023-11-29 01:24:48,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:48,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:48,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:49,874 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 715 proven. 596 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:49,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:49,874 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733445590] [2023-11-29 01:24:49,874 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1733445590] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:49,874 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [799483796] [2023-11-29 01:24:49,874 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:24:49,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:49,875 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:49,876 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:49,876 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2023-11-29 01:24:50,887 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2023-11-29 01:24:50,887 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:50,894 INFO L262 TraceCheckSpWp]: Trace formula consists of 524 conjuncts, 50 conjunts are in the unsatisfiable core [2023-11-29 01:24:50,896 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:51,862 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 782 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:51,862 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:52,649 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 782 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:52,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [799483796] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:52,649 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:52,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50] total 76 [2023-11-29 01:24:52,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645506780] [2023-11-29 01:24:52,649 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:52,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:52,691 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2023-11-29 01:24:52,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1355, Invalid=4497, Unknown=0, NotChecked=0, Total=5852 [2023-11-29 01:24:52,694 INFO L87 Difference]: Start difference. First operand 196 states and 222 transitions. cyclomatic complexity: 29 Second operand has 77 states, 76 states have (on average 2.6052631578947367) internal successors, (198), 77 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:53,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:24:53,828 INFO L93 Difference]: Finished difference Result 635 states and 734 transitions. [2023-11-29 01:24:53,828 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 635 states and 734 transitions. [2023-11-29 01:24:53,832 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:53,834 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 635 states to 354 states and 406 transitions. [2023-11-29 01:24:53,834 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 305 [2023-11-29 01:24:53,834 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 305 [2023-11-29 01:24:53,834 INFO L73 IsDeterministic]: Start isDeterministic. Operand 354 states and 406 transitions. [2023-11-29 01:24:53,835 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:24:53,835 INFO L218 hiAutomatonCegarLoop]: Abstraction has 354 states and 406 transitions. [2023-11-29 01:24:53,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 354 states and 406 transitions. [2023-11-29 01:24:53,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 354 to 204. [2023-11-29 01:24:53,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 204 states, 204 states have (on average 1.1323529411764706) internal successors, (231), 203 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:24:53,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 231 transitions. [2023-11-29 01:24:53,839 INFO L240 hiAutomatonCegarLoop]: Abstraction has 204 states and 231 transitions. [2023-11-29 01:24:53,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2023-11-29 01:24:53,840 INFO L428 stractBuchiCegarLoop]: Abstraction has 204 states and 231 transitions. [2023-11-29 01:24:53,840 INFO L335 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2023-11-29 01:24:53,840 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 204 states and 231 transitions. [2023-11-29 01:24:53,841 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:24:53,841 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:24:53,841 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:24:53,842 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [24, 24, 24, 23, 23, 1, 1, 1, 1] [2023-11-29 01:24:53,842 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:24:53,842 INFO L748 eck$LassoCheckResult]: Stem: 21307#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 21291#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 21292#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21308#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21309#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21295#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21296#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21358#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21357#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21356#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21355#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21354#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21353#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21352#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21351#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21350#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21349#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21348#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21347#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21346#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21345#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21344#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21343#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21342#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21341#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21340#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21339#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21338#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21337#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21336#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21335#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21334#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21333#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21332#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21331#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21330#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21329#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21328#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21327#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21326#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21325#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21324#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21323#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21322#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21321#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21320#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21319#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21318#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21317#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21314#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21313#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 21297#L27-4 main_~i~0#1 := 0; 21298#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21304#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21290#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21301#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21306#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21485#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21484#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21482#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21479#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21478#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21476#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21473#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21472#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21470#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21467#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21466#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21464#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21461#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21460#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21458#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21455#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21454#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21452#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21449#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21448#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21446#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21443#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21442#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21440#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21437#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21436#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21434#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21431#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21430#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21428#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21425#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21424#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21422#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21419#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21418#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21416#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21413#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21412#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21410#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21407#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21406#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21404#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21401#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21400#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21398#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21395#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21394#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21392#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21389#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21388#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21386#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21383#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21382#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21380#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21377#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21376#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21374#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21371#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21370#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21368#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21366#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21365#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21362#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21360#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21359#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21312#L34 [2023-11-29 01:24:53,842 INFO L750 eck$LassoCheckResult]: Loop: 21312#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21315#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21311#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21312#L34 [2023-11-29 01:24:53,842 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:53,842 INFO L85 PathProgramCache]: Analyzing trace with hash -166775655, now seen corresponding path program 46 times [2023-11-29 01:24:53,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:53,843 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434546861] [2023-11-29 01:24:53,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:53,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:53,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:53,945 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:54,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:54,029 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:54,030 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:54,030 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 25 times [2023-11-29 01:24:54,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:54,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136692052] [2023-11-29 01:24:54,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:54,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:54,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:54,033 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:24:54,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:24:54,036 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:24:54,036 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:24:54,037 INFO L85 PathProgramCache]: Analyzing trace with hash 863670077, now seen corresponding path program 47 times [2023-11-29 01:24:54,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:24:54,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172221704] [2023-11-29 01:24:54,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:24:54,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:24:54,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:24:55,436 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 782 proven. 646 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:55,436 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:24:55,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172221704] [2023-11-29 01:24:55,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [172221704] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:24:55,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1534169261] [2023-11-29 01:24:55,437 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:24:55,437 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:24:55,437 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:24:55,438 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:24:55,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2023-11-29 01:24:56,967 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2023-11-29 01:24:56,967 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:24:56,973 INFO L262 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 52 conjunts are in the unsatisfiable core [2023-11-29 01:24:56,975 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:24:58,059 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 852 proven. 576 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:58,059 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:24:58,877 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 852 proven. 576 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:24:58,878 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1534169261] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:24:58,878 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:24:58,878 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52, 52] total 79 [2023-11-29 01:24:58,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722853868] [2023-11-29 01:24:58,878 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:24:58,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:24:58,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2023-11-29 01:24:58,920 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1461, Invalid=4859, Unknown=0, NotChecked=0, Total=6320 [2023-11-29 01:24:58,920 INFO L87 Difference]: Start difference. First operand 204 states and 231 transitions. cyclomatic complexity: 30 Second operand has 80 states, 79 states have (on average 2.607594936708861) internal successors, (206), 80 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:00,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:25:00,158 INFO L93 Difference]: Finished difference Result 661 states and 764 transitions. [2023-11-29 01:25:00,159 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 661 states and 764 transitions. [2023-11-29 01:25:00,162 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:00,164 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 661 states to 368 states and 422 transitions. [2023-11-29 01:25:00,164 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 317 [2023-11-29 01:25:00,164 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 317 [2023-11-29 01:25:00,164 INFO L73 IsDeterministic]: Start isDeterministic. Operand 368 states and 422 transitions. [2023-11-29 01:25:00,165 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:25:00,165 INFO L218 hiAutomatonCegarLoop]: Abstraction has 368 states and 422 transitions. [2023-11-29 01:25:00,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states and 422 transitions. [2023-11-29 01:25:00,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 212. [2023-11-29 01:25:00,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 212 states, 212 states have (on average 1.1320754716981132) internal successors, (240), 211 states have internal predecessors, (240), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:00,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 240 transitions. [2023-11-29 01:25:00,171 INFO L240 hiAutomatonCegarLoop]: Abstraction has 212 states and 240 transitions. [2023-11-29 01:25:00,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2023-11-29 01:25:00,172 INFO L428 stractBuchiCegarLoop]: Abstraction has 212 states and 240 transitions. [2023-11-29 01:25:00,172 INFO L335 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2023-11-29 01:25:00,172 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 212 states and 240 transitions. [2023-11-29 01:25:00,173 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:00,174 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:25:00,174 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:25:00,175 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [25, 25, 25, 24, 24, 1, 1, 1, 1] [2023-11-29 01:25:00,175 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:25:00,175 INFO L748 eck$LassoCheckResult]: Stem: 23051#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 23035#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 23036#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23052#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23053#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23039#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23040#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23104#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23103#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23102#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23101#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23100#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23099#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23098#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23097#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23096#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23095#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23094#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23093#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23092#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23091#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23090#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23089#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23088#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23087#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23086#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23085#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23084#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23083#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23082#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23081#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23080#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23079#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23078#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23077#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23076#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23075#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23074#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23073#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23072#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23071#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23070#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23069#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23068#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23067#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23066#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23065#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23064#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23063#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23062#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23061#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23058#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23057#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 23041#L27-4 main_~i~0#1 := 0; 23042#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23048#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23034#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23045#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23050#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23237#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23236#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23234#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23231#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23230#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23228#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23225#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23224#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23222#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23219#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23218#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23216#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23213#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23212#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23210#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23207#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23206#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23204#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23201#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23200#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23198#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23195#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23194#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23192#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23189#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23188#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23186#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23183#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23182#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23180#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23177#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23176#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23174#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23171#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23170#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23168#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23165#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23164#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23162#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23159#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23158#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23156#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23153#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23152#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23150#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23147#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23146#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23144#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23141#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23140#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23138#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23135#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23134#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23132#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23129#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23128#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23126#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23123#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23122#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23120#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23117#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23116#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23114#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23112#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23111#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23108#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23106#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23105#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23056#L34 [2023-11-29 01:25:00,175 INFO L750 eck$LassoCheckResult]: Loop: 23056#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23059#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23055#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23056#L34 [2023-11-29 01:25:00,176 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:00,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1558661499, now seen corresponding path program 48 times [2023-11-29 01:25:00,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:00,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146956459] [2023-11-29 01:25:00,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:00,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:00,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:00,325 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:00,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:00,456 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:00,456 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:00,456 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 26 times [2023-11-29 01:25:00,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:00,457 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161003054] [2023-11-29 01:25:00,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:00,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:00,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:00,461 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:00,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:00,464 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:00,464 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:00,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1193326363, now seen corresponding path program 49 times [2023-11-29 01:25:00,465 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:00,465 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641392966] [2023-11-29 01:25:00,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:00,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:00,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:01,957 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 852 proven. 698 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:01,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:25:01,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641392966] [2023-11-29 01:25:01,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641392966] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:25:01,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1327659617] [2023-11-29 01:25:01,958 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:25:01,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:25:01,958 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:25:01,959 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:25:01,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2023-11-29 01:25:02,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:02,190 INFO L262 TraceCheckSpWp]: Trace formula consists of 566 conjuncts, 54 conjunts are in the unsatisfiable core [2023-11-29 01:25:02,193 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:25:03,357 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 925 proven. 625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:03,357 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:25:04,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 925 proven. 625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:04,222 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1327659617] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:25:04,222 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:25:04,223 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54, 54] total 82 [2023-11-29 01:25:04,223 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475249610] [2023-11-29 01:25:04,223 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:25:04,257 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:25:04,258 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2023-11-29 01:25:04,260 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1571, Invalid=5235, Unknown=0, NotChecked=0, Total=6806 [2023-11-29 01:25:04,260 INFO L87 Difference]: Start difference. First operand 212 states and 240 transitions. cyclomatic complexity: 31 Second operand has 83 states, 82 states have (on average 2.6097560975609757) internal successors, (214), 83 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:05,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:25:05,585 INFO L93 Difference]: Finished difference Result 687 states and 794 transitions. [2023-11-29 01:25:05,586 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 687 states and 794 transitions. [2023-11-29 01:25:05,589 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:05,591 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 687 states to 382 states and 438 transitions. [2023-11-29 01:25:05,591 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 329 [2023-11-29 01:25:05,591 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 329 [2023-11-29 01:25:05,591 INFO L73 IsDeterministic]: Start isDeterministic. Operand 382 states and 438 transitions. [2023-11-29 01:25:05,592 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:25:05,592 INFO L218 hiAutomatonCegarLoop]: Abstraction has 382 states and 438 transitions. [2023-11-29 01:25:05,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states and 438 transitions. [2023-11-29 01:25:05,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 220. [2023-11-29 01:25:05,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 220 states, 220 states have (on average 1.1318181818181818) internal successors, (249), 219 states have internal predecessors, (249), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:05,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 249 transitions. [2023-11-29 01:25:05,597 INFO L240 hiAutomatonCegarLoop]: Abstraction has 220 states and 249 transitions. [2023-11-29 01:25:05,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2023-11-29 01:25:05,598 INFO L428 stractBuchiCegarLoop]: Abstraction has 220 states and 249 transitions. [2023-11-29 01:25:05,598 INFO L335 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2023-11-29 01:25:05,598 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 220 states and 249 transitions. [2023-11-29 01:25:05,599 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:05,599 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:25:05,599 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:25:05,600 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [26, 26, 26, 25, 25, 1, 1, 1, 1] [2023-11-29 01:25:05,600 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:25:05,600 INFO L748 eck$LassoCheckResult]: Stem: 24864#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 24848#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 24849#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24865#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24866#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24852#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24853#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24919#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24918#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24917#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24916#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24915#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24914#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24913#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24912#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24911#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24910#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24909#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24908#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24907#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24906#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24905#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24904#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24903#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24902#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24901#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24900#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24899#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24898#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24897#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24896#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24895#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24894#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24893#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24892#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24891#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24890#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24889#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24888#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24887#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24886#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24885#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24884#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24883#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24882#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24881#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24880#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24879#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24878#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24877#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24876#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24875#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24874#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24871#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24870#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 24854#L27-4 main_~i~0#1 := 0; 24855#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24861#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24847#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24858#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24863#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25058#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25057#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25055#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25052#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25051#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25049#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25046#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25045#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25043#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25040#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25039#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25037#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25034#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25033#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25031#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25028#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25027#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25025#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25022#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25021#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25019#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25016#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25015#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25013#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25010#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25009#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25007#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25004#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25003#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25001#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24998#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24997#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24995#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24992#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24991#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24989#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24986#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24985#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24983#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24980#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24979#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24977#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24974#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24973#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24971#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24968#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24967#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24965#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24962#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24961#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24959#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24956#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24953#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24950#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24949#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24947#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24944#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24943#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24941#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24938#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24937#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24935#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24932#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24931#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24929#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24927#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24926#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24923#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24921#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24920#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24869#L34 [2023-11-29 01:25:05,600 INFO L750 eck$LassoCheckResult]: Loop: 24869#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24872#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24868#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24869#L34 [2023-11-29 01:25:05,600 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:05,600 INFO L85 PathProgramCache]: Analyzing trace with hash -261835875, now seen corresponding path program 50 times [2023-11-29 01:25:05,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:05,601 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1102864482] [2023-11-29 01:25:05,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:05,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:05,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:05,717 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:05,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:05,840 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:05,840 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:05,840 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 27 times [2023-11-29 01:25:05,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:05,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073516205] [2023-11-29 01:25:05,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:05,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:05,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:05,844 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:05,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:05,847 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:05,847 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:05,847 INFO L85 PathProgramCache]: Analyzing trace with hash -691895879, now seen corresponding path program 51 times [2023-11-29 01:25:05,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:05,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922875733] [2023-11-29 01:25:05,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:05,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:05,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:07,411 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 925 proven. 752 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:07,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:25:07,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1922875733] [2023-11-29 01:25:07,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1922875733] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:25:07,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [102589542] [2023-11-29 01:25:07,412 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:25:07,412 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:25:07,412 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:25:07,413 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:25:07,414 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2023-11-29 01:25:09,635 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 27 check-sat command(s) [2023-11-29 01:25:09,636 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:25:09,643 INFO L262 TraceCheckSpWp]: Trace formula consists of 587 conjuncts, 56 conjunts are in the unsatisfiable core [2023-11-29 01:25:09,646 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:25:10,848 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 1001 proven. 676 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:10,849 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:25:11,735 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 1001 proven. 676 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:11,735 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [102589542] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:25:11,735 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:25:11,736 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56, 56] total 85 [2023-11-29 01:25:11,736 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091624264] [2023-11-29 01:25:11,736 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:25:11,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:25:11,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2023-11-29 01:25:11,778 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1685, Invalid=5625, Unknown=0, NotChecked=0, Total=7310 [2023-11-29 01:25:11,778 INFO L87 Difference]: Start difference. First operand 220 states and 249 transitions. cyclomatic complexity: 32 Second operand has 86 states, 85 states have (on average 2.611764705882353) internal successors, (222), 86 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:13,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:25:13,095 INFO L93 Difference]: Finished difference Result 713 states and 824 transitions. [2023-11-29 01:25:13,095 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 713 states and 824 transitions. [2023-11-29 01:25:13,098 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:13,100 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 713 states to 396 states and 454 transitions. [2023-11-29 01:25:13,100 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 341 [2023-11-29 01:25:13,100 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 341 [2023-11-29 01:25:13,100 INFO L73 IsDeterministic]: Start isDeterministic. Operand 396 states and 454 transitions. [2023-11-29 01:25:13,101 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:25:13,101 INFO L218 hiAutomatonCegarLoop]: Abstraction has 396 states and 454 transitions. [2023-11-29 01:25:13,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states and 454 transitions. [2023-11-29 01:25:13,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 228. [2023-11-29 01:25:13,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 228 states have (on average 1.131578947368421) internal successors, (258), 227 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:13,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 258 transitions. [2023-11-29 01:25:13,104 INFO L240 hiAutomatonCegarLoop]: Abstraction has 228 states and 258 transitions. [2023-11-29 01:25:13,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2023-11-29 01:25:13,105 INFO L428 stractBuchiCegarLoop]: Abstraction has 228 states and 258 transitions. [2023-11-29 01:25:13,105 INFO L335 stractBuchiCegarLoop]: ======== Iteration 29 ============ [2023-11-29 01:25:13,105 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 228 states and 258 transitions. [2023-11-29 01:25:13,106 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:13,106 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:25:13,106 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:25:13,107 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [27, 27, 27, 26, 26, 1, 1, 1, 1] [2023-11-29 01:25:13,107 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:25:13,107 INFO L748 eck$LassoCheckResult]: Stem: 26746#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 26730#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 26731#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26747#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26748#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26734#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26735#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26803#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26802#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26801#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26800#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26799#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26798#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26797#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26796#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26795#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26794#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26793#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26792#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26791#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26790#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26789#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26788#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26787#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26786#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26785#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26784#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26783#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26782#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26781#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26780#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26779#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26778#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26777#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26776#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26775#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26774#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26773#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26772#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26771#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26770#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26769#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26768#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26767#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26766#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26765#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26764#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26763#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26762#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26761#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26760#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26759#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26758#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26757#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26756#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26753#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26752#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 26736#L27-4 main_~i~0#1 := 0; 26737#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26743#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26729#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26740#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26745#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26948#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26947#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26945#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26942#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26941#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26939#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26936#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26935#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26933#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26930#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26929#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26927#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26924#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26923#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26921#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26918#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26917#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26915#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26912#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26911#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26909#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26906#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26905#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26903#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26900#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26899#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26897#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26894#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26893#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26891#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26888#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26887#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26885#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26882#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26881#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26879#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26876#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26875#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26873#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26870#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26869#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26867#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26864#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26863#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26861#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26858#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26857#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26855#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26852#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26851#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26849#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26846#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26845#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26843#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26840#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26839#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26837#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26834#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26833#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26831#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26828#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26827#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26825#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26822#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26821#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26819#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26816#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26815#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26813#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26811#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26810#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26807#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26805#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26804#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26751#L34 [2023-11-29 01:25:13,107 INFO L750 eck$LassoCheckResult]: Loop: 26751#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26754#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26750#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26751#L34 [2023-11-29 01:25:13,107 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:13,108 INFO L85 PathProgramCache]: Analyzing trace with hash 1651639927, now seen corresponding path program 52 times [2023-11-29 01:25:13,108 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:13,108 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911611664] [2023-11-29 01:25:13,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:13,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:13,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:13,231 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:13,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:13,346 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:13,347 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:13,347 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 28 times [2023-11-29 01:25:13,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:13,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090657351] [2023-11-29 01:25:13,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:13,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:13,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:13,350 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:13,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:13,354 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:13,354 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:13,354 INFO L85 PathProgramCache]: Analyzing trace with hash 859768991, now seen corresponding path program 53 times [2023-11-29 01:25:13,354 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:13,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905016316] [2023-11-29 01:25:13,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:13,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:13,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:15,022 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 1001 proven. 808 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:15,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:25:15,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905016316] [2023-11-29 01:25:15,023 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905016316] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:25:15,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [510150178] [2023-11-29 01:25:15,023 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:25:15,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:25:15,023 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:25:15,024 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:25:15,025 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2023-11-29 01:25:17,841 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2023-11-29 01:25:17,841 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:25:17,851 INFO L262 TraceCheckSpWp]: Trace formula consists of 608 conjuncts, 58 conjunts are in the unsatisfiable core [2023-11-29 01:25:17,854 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:25:19,137 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 1080 proven. 729 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:19,137 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:25:20,124 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 1080 proven. 729 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:20,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [510150178] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:25:20,124 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:25:20,125 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58, 58] total 88 [2023-11-29 01:25:20,125 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462727618] [2023-11-29 01:25:20,125 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:25:20,162 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:25:20,163 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2023-11-29 01:25:20,163 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1803, Invalid=6029, Unknown=0, NotChecked=0, Total=7832 [2023-11-29 01:25:20,164 INFO L87 Difference]: Start difference. First operand 228 states and 258 transitions. cyclomatic complexity: 33 Second operand has 89 states, 88 states have (on average 2.6136363636363638) internal successors, (230), 89 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:21,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:25:21,643 INFO L93 Difference]: Finished difference Result 739 states and 854 transitions. [2023-11-29 01:25:21,643 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 739 states and 854 transitions. [2023-11-29 01:25:21,645 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:21,647 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 739 states to 410 states and 470 transitions. [2023-11-29 01:25:21,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 353 [2023-11-29 01:25:21,648 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 353 [2023-11-29 01:25:21,648 INFO L73 IsDeterministic]: Start isDeterministic. Operand 410 states and 470 transitions. [2023-11-29 01:25:21,648 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:25:21,648 INFO L218 hiAutomatonCegarLoop]: Abstraction has 410 states and 470 transitions. [2023-11-29 01:25:21,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states and 470 transitions. [2023-11-29 01:25:21,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 236. [2023-11-29 01:25:21,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 236 states, 236 states have (on average 1.13135593220339) internal successors, (267), 235 states have internal predecessors, (267), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:21,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 267 transitions. [2023-11-29 01:25:21,652 INFO L240 hiAutomatonCegarLoop]: Abstraction has 236 states and 267 transitions. [2023-11-29 01:25:21,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2023-11-29 01:25:21,653 INFO L428 stractBuchiCegarLoop]: Abstraction has 236 states and 267 transitions. [2023-11-29 01:25:21,653 INFO L335 stractBuchiCegarLoop]: ======== Iteration 30 ============ [2023-11-29 01:25:21,653 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 236 states and 267 transitions. [2023-11-29 01:25:21,654 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:21,654 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:25:21,654 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:25:21,655 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [28, 28, 28, 27, 27, 1, 1, 1, 1] [2023-11-29 01:25:21,655 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:25:21,655 INFO L748 eck$LassoCheckResult]: Stem: 28697#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 28681#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 28682#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28698#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28699#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28685#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28686#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28756#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28755#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28754#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28753#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28752#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28751#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28750#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28749#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28748#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28747#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28746#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28745#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28744#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28743#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28742#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28741#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28740#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28739#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28738#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28737#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28736#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28735#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28734#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28733#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28732#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28731#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28730#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28729#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28728#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28727#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28726#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28725#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28724#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28723#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28722#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28721#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28720#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28719#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28718#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28717#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28716#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28715#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28714#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28713#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28712#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28711#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28710#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28709#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28708#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28707#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28704#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28703#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 28687#L27-4 main_~i~0#1 := 0; 28688#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28694#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28680#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28691#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28696#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28907#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28906#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28904#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28901#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28900#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28898#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28895#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28894#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28892#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28889#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28888#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28886#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28883#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28882#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28880#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28877#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28876#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28874#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28871#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28870#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28868#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28865#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28864#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28862#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28859#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28858#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28856#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28853#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28852#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28850#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28847#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28846#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28844#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28841#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28840#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28838#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28835#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28834#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28832#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28829#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28828#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28826#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28823#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28822#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28820#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28817#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28816#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28814#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28811#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28810#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28808#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28805#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28804#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28802#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28799#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28798#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28796#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28793#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28792#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28790#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28787#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28786#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28784#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28781#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28780#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28778#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28775#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28774#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28772#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28769#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28768#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28766#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28764#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28763#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28760#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28758#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28757#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28702#L34 [2023-11-29 01:25:21,655 INFO L750 eck$LassoCheckResult]: Loop: 28702#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28705#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28701#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28702#L34 [2023-11-29 01:25:21,656 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:21,656 INFO L85 PathProgramCache]: Analyzing trace with hash 551209633, now seen corresponding path program 54 times [2023-11-29 01:25:21,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:21,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740863563] [2023-11-29 01:25:21,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:21,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:21,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:21,817 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:21,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:21,978 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:21,978 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:21,979 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 29 times [2023-11-29 01:25:21,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:21,979 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753306177] [2023-11-29 01:25:21,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:21,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:21,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:21,983 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:21,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:21,986 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:21,986 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:21,986 INFO L85 PathProgramCache]: Analyzing trace with hash 1426250805, now seen corresponding path program 55 times [2023-11-29 01:25:21,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:21,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658536026] [2023-11-29 01:25:21,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:21,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:22,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:23,731 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 1080 proven. 866 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:23,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:25:23,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658536026] [2023-11-29 01:25:23,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [658536026] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:25:23,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1865314865] [2023-11-29 01:25:23,732 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:25:23,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:25:23,732 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:25:23,733 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:25:23,734 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2023-11-29 01:25:23,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:23,998 INFO L262 TraceCheckSpWp]: Trace formula consists of 629 conjuncts, 60 conjunts are in the unsatisfiable core [2023-11-29 01:25:24,001 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:25:25,459 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 1162 proven. 784 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:25,459 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:25:26,513 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 1162 proven. 784 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:26,513 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1865314865] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:25:26,513 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:25:26,513 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60, 60] total 91 [2023-11-29 01:25:26,513 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [487375642] [2023-11-29 01:25:26,514 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:25:26,552 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:25:26,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2023-11-29 01:25:26,553 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1925, Invalid=6447, Unknown=0, NotChecked=0, Total=8372 [2023-11-29 01:25:26,554 INFO L87 Difference]: Start difference. First operand 236 states and 267 transitions. cyclomatic complexity: 34 Second operand has 92 states, 91 states have (on average 2.6153846153846154) internal successors, (238), 92 states have internal predecessors, (238), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:28,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:25:28,059 INFO L93 Difference]: Finished difference Result 765 states and 884 transitions. [2023-11-29 01:25:28,059 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 765 states and 884 transitions. [2023-11-29 01:25:28,063 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:28,064 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 765 states to 424 states and 486 transitions. [2023-11-29 01:25:28,065 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 365 [2023-11-29 01:25:28,065 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 365 [2023-11-29 01:25:28,065 INFO L73 IsDeterministic]: Start isDeterministic. Operand 424 states and 486 transitions. [2023-11-29 01:25:28,066 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:25:28,066 INFO L218 hiAutomatonCegarLoop]: Abstraction has 424 states and 486 transitions. [2023-11-29 01:25:28,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states and 486 transitions. [2023-11-29 01:25:28,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 244. [2023-11-29 01:25:28,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 244 states have (on average 1.1311475409836065) internal successors, (276), 243 states have internal predecessors, (276), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:28,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 276 transitions. [2023-11-29 01:25:28,071 INFO L240 hiAutomatonCegarLoop]: Abstraction has 244 states and 276 transitions. [2023-11-29 01:25:28,071 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2023-11-29 01:25:28,072 INFO L428 stractBuchiCegarLoop]: Abstraction has 244 states and 276 transitions. [2023-11-29 01:25:28,072 INFO L335 stractBuchiCegarLoop]: ======== Iteration 31 ============ [2023-11-29 01:25:28,072 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 244 states and 276 transitions. [2023-11-29 01:25:28,073 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:28,073 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:25:28,073 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:25:28,074 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [29, 29, 29, 28, 28, 1, 1, 1, 1] [2023-11-29 01:25:28,074 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:25:28,075 INFO L748 eck$LassoCheckResult]: Stem: 30717#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 30701#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 30702#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30718#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30719#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30705#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30706#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30778#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30777#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30776#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30775#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30774#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30773#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30772#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30771#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30770#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30769#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30768#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30767#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30766#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30765#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30764#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30763#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30762#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30761#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30760#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30759#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30758#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30757#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30756#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30755#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30754#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30753#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30752#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30751#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30750#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30749#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30748#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30747#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30746#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30745#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30744#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30743#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30742#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30741#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30740#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30739#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30738#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30737#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30736#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30735#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30734#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30733#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30732#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30731#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30730#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30729#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30728#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30727#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30724#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30723#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 30707#L27-4 main_~i~0#1 := 0; 30708#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30714#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30700#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30711#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30716#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30935#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30934#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30932#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30929#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30928#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30926#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30923#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30922#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30920#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30917#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30916#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30914#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30911#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30910#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30908#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30905#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30904#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30902#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30899#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30898#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30896#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30893#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30892#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30890#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30887#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30886#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30884#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30881#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30880#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30878#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30875#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30874#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30872#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30869#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30868#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30866#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30863#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30862#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30860#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30857#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30856#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30854#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30851#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30850#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30848#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30845#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30844#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30842#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30839#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30838#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30836#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30833#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30832#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30830#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30827#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30826#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30824#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30821#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30820#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30818#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30815#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30814#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30812#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30809#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30808#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30806#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30803#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30802#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30800#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30797#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30796#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30794#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30791#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30790#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30788#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30786#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30785#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30782#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30780#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30779#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30722#L34 [2023-11-29 01:25:28,075 INFO L750 eck$LassoCheckResult]: Loop: 30722#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30725#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30721#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30722#L34 [2023-11-29 01:25:28,075 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:28,075 INFO L85 PathProgramCache]: Analyzing trace with hash -1076229261, now seen corresponding path program 56 times [2023-11-29 01:25:28,075 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:28,075 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310581602] [2023-11-29 01:25:28,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:28,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:28,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:28,225 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:28,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:28,422 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:28,423 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:28,423 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 30 times [2023-11-29 01:25:28,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:28,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763964253] [2023-11-29 01:25:28,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:28,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:28,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:28,427 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:28,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:28,430 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:28,430 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:28,430 INFO L85 PathProgramCache]: Analyzing trace with hash -15003101, now seen corresponding path program 57 times [2023-11-29 01:25:28,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:28,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045964624] [2023-11-29 01:25:28,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:28,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:28,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:30,343 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 1162 proven. 926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:30,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:25:30,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045964624] [2023-11-29 01:25:30,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2045964624] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:25:30,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1101319602] [2023-11-29 01:25:30,343 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:25:30,344 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:25:30,344 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:25:30,345 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:25:30,346 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2023-11-29 01:25:38,716 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2023-11-29 01:25:38,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:25:38,731 INFO L262 TraceCheckSpWp]: Trace formula consists of 650 conjuncts, 62 conjunts are in the unsatisfiable core [2023-11-29 01:25:38,734 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:25:40,219 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 1247 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:40,219 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:25:41,276 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 1247 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:41,276 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1101319602] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:25:41,276 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:25:41,276 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62] total 94 [2023-11-29 01:25:41,276 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951354766] [2023-11-29 01:25:41,276 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:25:41,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:25:41,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2023-11-29 01:25:41,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2051, Invalid=6879, Unknown=0, NotChecked=0, Total=8930 [2023-11-29 01:25:41,317 INFO L87 Difference]: Start difference. First operand 244 states and 276 transitions. cyclomatic complexity: 35 Second operand has 95 states, 94 states have (on average 2.617021276595745) internal successors, (246), 95 states have internal predecessors, (246), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:42,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:25:42,867 INFO L93 Difference]: Finished difference Result 791 states and 914 transitions. [2023-11-29 01:25:42,867 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 791 states and 914 transitions. [2023-11-29 01:25:42,870 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:42,872 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 791 states to 438 states and 502 transitions. [2023-11-29 01:25:42,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 377 [2023-11-29 01:25:42,873 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 377 [2023-11-29 01:25:42,873 INFO L73 IsDeterministic]: Start isDeterministic. Operand 438 states and 502 transitions. [2023-11-29 01:25:42,873 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:25:42,873 INFO L218 hiAutomatonCegarLoop]: Abstraction has 438 states and 502 transitions. [2023-11-29 01:25:42,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states and 502 transitions. [2023-11-29 01:25:42,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 252. [2023-11-29 01:25:42,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 252 states, 252 states have (on average 1.130952380952381) internal successors, (285), 251 states have internal predecessors, (285), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:42,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 285 transitions. [2023-11-29 01:25:42,877 INFO L240 hiAutomatonCegarLoop]: Abstraction has 252 states and 285 transitions. [2023-11-29 01:25:42,877 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2023-11-29 01:25:42,878 INFO L428 stractBuchiCegarLoop]: Abstraction has 252 states and 285 transitions. [2023-11-29 01:25:42,878 INFO L335 stractBuchiCegarLoop]: ======== Iteration 32 ============ [2023-11-29 01:25:42,878 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 252 states and 285 transitions. [2023-11-29 01:25:42,879 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:42,879 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:25:42,879 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:25:42,880 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [30, 30, 30, 29, 29, 1, 1, 1, 1] [2023-11-29 01:25:42,880 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:25:42,880 INFO L748 eck$LassoCheckResult]: Stem: 32806#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 32790#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 32791#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32807#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32808#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32794#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32795#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32869#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32868#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32867#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32866#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32865#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32864#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32863#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32862#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32861#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32860#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32859#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32858#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32857#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32856#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32855#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32854#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32853#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32852#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32851#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32850#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32849#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32848#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32847#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32846#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32845#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32844#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32843#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32842#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32841#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32840#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32839#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32838#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32837#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32836#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32835#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32834#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32833#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32832#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32831#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32830#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32829#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32828#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32827#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32826#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32825#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32824#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32823#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32822#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32821#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32820#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32819#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32818#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32817#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32816#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32813#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32812#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 32796#L27-4 main_~i~0#1 := 0; 32797#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32803#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32789#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32800#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32805#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33032#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33031#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33029#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33026#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33025#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33023#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33020#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33019#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33017#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33014#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33013#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33011#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33008#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33007#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33005#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33002#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33001#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32999#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32996#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32995#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32993#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32990#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32989#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32987#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32984#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32983#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32981#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32978#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32977#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32975#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32972#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32971#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32969#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32966#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32965#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32963#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32960#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32959#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32957#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32954#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32953#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32951#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32948#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32947#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32945#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32942#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32941#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32939#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32936#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32935#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32933#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32930#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32929#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32927#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32924#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32923#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32921#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32918#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32917#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32915#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32912#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32911#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32909#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32906#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32905#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32903#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32900#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32899#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32897#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32894#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32893#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32891#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32888#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32887#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32885#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32882#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32881#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32879#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32877#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32876#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32873#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32871#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32870#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32811#L34 [2023-11-29 01:25:42,881 INFO L750 eck$LassoCheckResult]: Loop: 32811#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32814#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32810#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32811#L34 [2023-11-29 01:25:42,881 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:42,881 INFO L85 PathProgramCache]: Analyzing trace with hash 1614133669, now seen corresponding path program 58 times [2023-11-29 01:25:42,881 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:42,881 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268399823] [2023-11-29 01:25:42,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:42,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:43,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:43,101 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:43,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:43,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:43,239 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:43,239 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 31 times [2023-11-29 01:25:43,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:43,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730030241] [2023-11-29 01:25:43,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:43,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:43,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:43,243 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:43,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:43,246 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:43,246 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:43,246 INFO L85 PathProgramCache]: Analyzing trace with hash 202333873, now seen corresponding path program 59 times [2023-11-29 01:25:43,246 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:43,246 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479326277] [2023-11-29 01:25:43,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:43,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:43,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:25:45,253 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 1247 proven. 988 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:45,253 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:25:45,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479326277] [2023-11-29 01:25:45,253 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [479326277] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:25:45,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [748547972] [2023-11-29 01:25:45,253 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:25:45,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:25:45,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:25:45,255 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:25:45,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2023-11-29 01:25:53,550 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 31 check-sat command(s) [2023-11-29 01:25:53,551 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:25:53,564 INFO L262 TraceCheckSpWp]: Trace formula consists of 671 conjuncts, 64 conjunts are in the unsatisfiable core [2023-11-29 01:25:53,567 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:25:55,136 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 1335 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:55,136 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:25:56,298 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 1335 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:25:56,298 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [748547972] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:25:56,298 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:25:56,298 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64, 64] total 97 [2023-11-29 01:25:56,298 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934208055] [2023-11-29 01:25:56,299 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:25:56,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:25:56,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2023-11-29 01:25:56,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2181, Invalid=7325, Unknown=0, NotChecked=0, Total=9506 [2023-11-29 01:25:56,340 INFO L87 Difference]: Start difference. First operand 252 states and 285 transitions. cyclomatic complexity: 36 Second operand has 98 states, 97 states have (on average 2.618556701030928) internal successors, (254), 98 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:58,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:25:58,002 INFO L93 Difference]: Finished difference Result 817 states and 944 transitions. [2023-11-29 01:25:58,002 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 817 states and 944 transitions. [2023-11-29 01:25:58,005 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:58,007 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 817 states to 452 states and 518 transitions. [2023-11-29 01:25:58,007 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 389 [2023-11-29 01:25:58,007 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 389 [2023-11-29 01:25:58,007 INFO L73 IsDeterministic]: Start isDeterministic. Operand 452 states and 518 transitions. [2023-11-29 01:25:58,008 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:25:58,008 INFO L218 hiAutomatonCegarLoop]: Abstraction has 452 states and 518 transitions. [2023-11-29 01:25:58,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 452 states and 518 transitions. [2023-11-29 01:25:58,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 452 to 260. [2023-11-29 01:25:58,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 260 states, 260 states have (on average 1.1307692307692307) internal successors, (294), 259 states have internal predecessors, (294), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:25:58,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 294 transitions. [2023-11-29 01:25:58,012 INFO L240 hiAutomatonCegarLoop]: Abstraction has 260 states and 294 transitions. [2023-11-29 01:25:58,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2023-11-29 01:25:58,013 INFO L428 stractBuchiCegarLoop]: Abstraction has 260 states and 294 transitions. [2023-11-29 01:25:58,013 INFO L335 stractBuchiCegarLoop]: ======== Iteration 33 ============ [2023-11-29 01:25:58,013 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 260 states and 294 transitions. [2023-11-29 01:25:58,014 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:25:58,014 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:25:58,014 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:25:58,015 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [31, 31, 31, 30, 30, 1, 1, 1, 1] [2023-11-29 01:25:58,015 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:25:58,016 INFO L748 eck$LassoCheckResult]: Stem: 34964#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 34948#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 34949#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34965#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34966#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34952#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34953#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35029#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35028#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35027#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35026#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35025#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35024#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35023#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35022#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35021#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35020#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35019#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35018#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35017#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35016#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35015#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35014#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35013#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35012#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35011#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35010#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35009#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35008#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35007#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35006#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35005#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35004#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35003#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35002#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35001#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35000#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34999#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34998#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34997#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34996#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34995#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34994#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34993#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34992#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34991#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34990#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34989#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34988#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34987#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34986#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34985#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34984#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34983#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34982#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34981#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34980#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34979#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34978#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34977#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34976#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34975#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34974#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34971#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34970#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 34954#L27-4 main_~i~0#1 := 0; 34955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34961#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 34947#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 34958#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34963#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35198#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35197#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35195#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35192#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35191#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35189#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35186#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35185#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35183#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35180#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35179#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35177#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35174#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35173#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35171#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35168#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35167#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35165#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35162#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35161#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35159#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35156#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35155#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35153#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35150#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35149#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35147#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35144#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35143#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35141#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35138#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35137#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35135#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35132#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35131#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35129#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35126#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35125#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35123#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35120#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35119#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35117#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35114#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35113#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35111#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35108#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35107#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35105#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35102#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35101#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35099#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35096#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35095#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35093#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35090#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35089#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35087#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35084#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35083#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35081#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35078#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35077#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35075#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35072#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35071#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35069#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35066#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35065#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35063#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35060#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35059#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35057#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35054#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35053#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35051#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35048#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35047#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35045#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35042#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35041#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35039#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35037#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35036#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35033#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35031#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35030#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34969#L34 [2023-11-29 01:25:58,016 INFO L750 eck$LassoCheckResult]: Loop: 34969#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 34972#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 34968#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34969#L34 [2023-11-29 01:25:58,016 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:58,016 INFO L85 PathProgramCache]: Analyzing trace with hash 576395375, now seen corresponding path program 60 times [2023-11-29 01:25:58,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:58,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413121631] [2023-11-29 01:25:58,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:58,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:58,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:58,180 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:58,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:58,339 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:58,339 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:58,339 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 32 times [2023-11-29 01:25:58,339 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:58,339 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201228680] [2023-11-29 01:25:58,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:58,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:58,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:58,344 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:25:58,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:25:58,347 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:25:58,347 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:25:58,347 INFO L85 PathProgramCache]: Analyzing trace with hash 115413927, now seen corresponding path program 61 times [2023-11-29 01:25:58,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:25:58,348 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517658584] [2023-11-29 01:25:58,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:25:58,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:25:58,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:26:00,481 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 1335 proven. 1052 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:00,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:26:00,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [517658584] [2023-11-29 01:26:00,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [517658584] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:26:00,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [353224871] [2023-11-29 01:26:00,482 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:26:00,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:26:00,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:26:00,483 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:26:00,484 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2023-11-29 01:26:00,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:26:00,783 INFO L262 TraceCheckSpWp]: Trace formula consists of 692 conjuncts, 66 conjunts are in the unsatisfiable core [2023-11-29 01:26:00,786 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:26:02,400 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 1426 proven. 961 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:02,400 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:26:03,661 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 1426 proven. 961 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:03,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [353224871] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:26:03,661 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:26:03,661 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66, 66] total 100 [2023-11-29 01:26:03,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [562171421] [2023-11-29 01:26:03,662 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:26:03,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:26:03,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2023-11-29 01:26:03,702 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2315, Invalid=7785, Unknown=0, NotChecked=0, Total=10100 [2023-11-29 01:26:03,702 INFO L87 Difference]: Start difference. First operand 260 states and 294 transitions. cyclomatic complexity: 37 Second operand has 101 states, 100 states have (on average 2.62) internal successors, (262), 101 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:05,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:26:05,431 INFO L93 Difference]: Finished difference Result 843 states and 974 transitions. [2023-11-29 01:26:05,431 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 843 states and 974 transitions. [2023-11-29 01:26:05,435 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:05,437 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 843 states to 466 states and 534 transitions. [2023-11-29 01:26:05,437 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 401 [2023-11-29 01:26:05,438 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 401 [2023-11-29 01:26:05,438 INFO L73 IsDeterministic]: Start isDeterministic. Operand 466 states and 534 transitions. [2023-11-29 01:26:05,438 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:26:05,439 INFO L218 hiAutomatonCegarLoop]: Abstraction has 466 states and 534 transitions. [2023-11-29 01:26:05,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states and 534 transitions. [2023-11-29 01:26:05,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 268. [2023-11-29 01:26:05,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 268 states have (on average 1.1305970149253732) internal successors, (303), 267 states have internal predecessors, (303), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:05,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 303 transitions. [2023-11-29 01:26:05,444 INFO L240 hiAutomatonCegarLoop]: Abstraction has 268 states and 303 transitions. [2023-11-29 01:26:05,445 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2023-11-29 01:26:05,445 INFO L428 stractBuchiCegarLoop]: Abstraction has 268 states and 303 transitions. [2023-11-29 01:26:05,445 INFO L335 stractBuchiCegarLoop]: ======== Iteration 34 ============ [2023-11-29 01:26:05,445 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 268 states and 303 transitions. [2023-11-29 01:26:05,446 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:05,446 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:26:05,447 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:26:05,448 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [32, 32, 32, 31, 31, 1, 1, 1, 1] [2023-11-29 01:26:05,448 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:26:05,448 INFO L748 eck$LassoCheckResult]: Stem: 37191#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 37175#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 37176#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37192#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37193#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37179#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37180#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37258#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37257#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37256#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37255#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37254#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37253#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37252#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37251#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37250#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37249#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37248#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37247#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37246#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37245#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37244#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37243#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37242#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37241#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37240#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37239#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37238#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37237#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37236#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37235#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37234#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37233#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37232#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37231#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37230#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37229#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37228#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37227#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37226#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37225#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37224#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37223#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37222#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37221#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37220#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37219#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37218#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37217#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37216#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37215#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37214#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37213#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37212#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37211#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37210#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37209#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37208#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37207#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37206#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37205#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37204#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37203#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37202#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37201#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37198#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37197#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 37181#L27-4 main_~i~0#1 := 0; 37182#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37188#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37174#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37185#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37190#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37433#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37432#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37430#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37427#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37426#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37424#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37421#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37420#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37418#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37415#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37414#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37412#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37409#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37408#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37406#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37403#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37402#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37400#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37397#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37396#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37394#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37391#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37390#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37388#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37385#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37384#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37382#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37379#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37378#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37376#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37373#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37372#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37370#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37367#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37366#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37364#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37361#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37360#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37358#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37355#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37354#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37352#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37349#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37348#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37346#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37343#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37342#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37340#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37337#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37336#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37334#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37331#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37330#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37328#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37325#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37324#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37322#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37319#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37318#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37316#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37313#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37312#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37310#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37307#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37306#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37304#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37301#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37300#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37298#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37295#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37294#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37292#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37289#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37288#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37286#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37283#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37282#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37280#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37277#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37276#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37274#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37271#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37270#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37268#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37266#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37265#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37262#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37260#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37259#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37196#L34 [2023-11-29 01:26:05,448 INFO L750 eck$LassoCheckResult]: Loop: 37196#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37199#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37195#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37196#L34 [2023-11-29 01:26:05,448 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:05,449 INFO L85 PathProgramCache]: Analyzing trace with hash 473546921, now seen corresponding path program 62 times [2023-11-29 01:26:05,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:05,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451256851] [2023-11-29 01:26:05,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:05,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:05,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:05,682 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:05,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:05,892 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:05,892 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:05,892 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 33 times [2023-11-29 01:26:05,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:05,892 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33772146] [2023-11-29 01:26:05,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:05,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:05,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:05,896 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:05,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:05,899 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:05,900 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:05,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1531197139, now seen corresponding path program 63 times [2023-11-29 01:26:05,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:05,900 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559364329] [2023-11-29 01:26:05,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:05,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:05,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:26:08,202 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 1426 proven. 1118 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:08,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:26:08,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1559364329] [2023-11-29 01:26:08,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1559364329] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:26:08,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1355023605] [2023-11-29 01:26:08,203 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:26:08,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:26:08,203 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:26:08,204 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:26:08,205 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2023-11-29 01:26:12,941 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 33 check-sat command(s) [2023-11-29 01:26:12,941 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:26:12,954 INFO L262 TraceCheckSpWp]: Trace formula consists of 713 conjuncts, 68 conjunts are in the unsatisfiable core [2023-11-29 01:26:12,957 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:26:14,624 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 1520 proven. 1024 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:14,625 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:26:15,929 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 1520 proven. 1024 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:15,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1355023605] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:26:15,929 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:26:15,930 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68, 68] total 103 [2023-11-29 01:26:15,930 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [236207217] [2023-11-29 01:26:15,930 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:26:15,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:26:15,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2023-11-29 01:26:15,973 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2453, Invalid=8259, Unknown=0, NotChecked=0, Total=10712 [2023-11-29 01:26:15,974 INFO L87 Difference]: Start difference. First operand 268 states and 303 transitions. cyclomatic complexity: 38 Second operand has 104 states, 103 states have (on average 2.621359223300971) internal successors, (270), 104 states have internal predecessors, (270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:17,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:26:17,791 INFO L93 Difference]: Finished difference Result 869 states and 1004 transitions. [2023-11-29 01:26:17,792 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 869 states and 1004 transitions. [2023-11-29 01:26:17,795 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:17,797 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 869 states to 480 states and 550 transitions. [2023-11-29 01:26:17,797 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2023-11-29 01:26:17,797 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2023-11-29 01:26:17,797 INFO L73 IsDeterministic]: Start isDeterministic. Operand 480 states and 550 transitions. [2023-11-29 01:26:17,797 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:26:17,798 INFO L218 hiAutomatonCegarLoop]: Abstraction has 480 states and 550 transitions. [2023-11-29 01:26:17,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480 states and 550 transitions. [2023-11-29 01:26:17,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480 to 276. [2023-11-29 01:26:17,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 276 states, 276 states have (on average 1.1304347826086956) internal successors, (312), 275 states have internal predecessors, (312), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:17,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 312 transitions. [2023-11-29 01:26:17,802 INFO L240 hiAutomatonCegarLoop]: Abstraction has 276 states and 312 transitions. [2023-11-29 01:26:17,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2023-11-29 01:26:17,803 INFO L428 stractBuchiCegarLoop]: Abstraction has 276 states and 312 transitions. [2023-11-29 01:26:17,803 INFO L335 stractBuchiCegarLoop]: ======== Iteration 35 ============ [2023-11-29 01:26:17,803 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 276 states and 312 transitions. [2023-11-29 01:26:17,804 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:17,804 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:26:17,804 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:26:17,805 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [33, 33, 33, 32, 32, 1, 1, 1, 1] [2023-11-29 01:26:17,805 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:26:17,805 INFO L748 eck$LassoCheckResult]: Stem: 39487#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 39471#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 39472#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39488#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39489#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39475#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39476#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39556#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39555#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39554#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39553#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39552#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39551#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39550#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39549#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39548#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39547#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39546#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39545#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39544#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39543#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39542#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39541#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39540#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39539#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39538#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39537#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39536#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39535#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39534#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39533#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39532#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39531#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39530#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39529#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39528#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39527#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39526#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39525#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39524#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39523#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39522#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39521#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39520#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39519#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39518#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39517#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39516#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39515#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39514#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39513#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39512#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39511#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39510#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39509#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39508#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39507#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39506#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39505#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39504#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39503#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39502#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39501#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39500#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39499#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39498#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39497#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39494#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39493#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 39477#L27-4 main_~i~0#1 := 0; 39478#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39484#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39470#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39481#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39486#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39737#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39736#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39734#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39731#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39730#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39728#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39725#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39724#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39722#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39719#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39718#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39716#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39713#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39712#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39710#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39707#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39706#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39704#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39701#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39700#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39698#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39695#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39694#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39692#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39689#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39688#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39686#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39683#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39682#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39680#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39677#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39676#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39674#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39671#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39670#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39668#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39665#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39664#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39662#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39659#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39658#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39656#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39653#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39652#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39650#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39647#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39646#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39644#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39641#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39640#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39638#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39635#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39634#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39632#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39629#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39628#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39626#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39623#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39622#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39620#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39617#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39614#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39610#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39608#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39602#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39599#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39598#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39596#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39593#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39592#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39590#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39587#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39586#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39584#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39581#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39580#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39578#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39575#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39574#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39572#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39569#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39568#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39566#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39564#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39563#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39560#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39558#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39557#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39492#L34 [2023-11-29 01:26:17,805 INFO L750 eck$LassoCheckResult]: Loop: 39492#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39495#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39491#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39492#L34 [2023-11-29 01:26:17,805 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:17,805 INFO L85 PathProgramCache]: Analyzing trace with hash 1613819243, now seen corresponding path program 64 times [2023-11-29 01:26:17,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:17,805 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543327957] [2023-11-29 01:26:17,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:17,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:18,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:18,003 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:18,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:18,230 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:18,231 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:18,231 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 34 times [2023-11-29 01:26:18,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:18,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041929872] [2023-11-29 01:26:18,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:18,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:18,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:18,235 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:18,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:18,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:18,238 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:18,238 INFO L85 PathProgramCache]: Analyzing trace with hash -574796501, now seen corresponding path program 65 times [2023-11-29 01:26:18,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:18,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489679510] [2023-11-29 01:26:18,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:18,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:18,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:26:20,662 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 1520 proven. 1186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:20,663 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:26:20,663 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489679510] [2023-11-29 01:26:20,663 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [489679510] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:26:20,663 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [398753909] [2023-11-29 01:26:20,663 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:26:20,663 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:26:20,663 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:26:20,664 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:26:20,665 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2023-11-29 01:26:25,206 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2023-11-29 01:26:25,206 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:26:25,215 INFO L262 TraceCheckSpWp]: Trace formula consists of 734 conjuncts, 70 conjunts are in the unsatisfiable core [2023-11-29 01:26:25,218 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:26:27,015 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 1617 proven. 1089 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:27,015 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:26:28,432 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 1617 proven. 1089 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:28,432 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [398753909] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:26:28,433 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:26:28,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 70, 70] total 106 [2023-11-29 01:26:28,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1501028282] [2023-11-29 01:26:28,433 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:26:28,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:26:28,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 107 interpolants. [2023-11-29 01:26:28,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2595, Invalid=8747, Unknown=0, NotChecked=0, Total=11342 [2023-11-29 01:26:28,475 INFO L87 Difference]: Start difference. First operand 276 states and 312 transitions. cyclomatic complexity: 39 Second operand has 107 states, 106 states have (on average 2.6226415094339623) internal successors, (278), 107 states have internal predecessors, (278), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:30,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:26:30,548 INFO L93 Difference]: Finished difference Result 895 states and 1034 transitions. [2023-11-29 01:26:30,548 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 895 states and 1034 transitions. [2023-11-29 01:26:30,553 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:30,555 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 895 states to 494 states and 566 transitions. [2023-11-29 01:26:30,555 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 425 [2023-11-29 01:26:30,555 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 425 [2023-11-29 01:26:30,555 INFO L73 IsDeterministic]: Start isDeterministic. Operand 494 states and 566 transitions. [2023-11-29 01:26:30,556 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:26:30,556 INFO L218 hiAutomatonCegarLoop]: Abstraction has 494 states and 566 transitions. [2023-11-29 01:26:30,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states and 566 transitions. [2023-11-29 01:26:30,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 284. [2023-11-29 01:26:30,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 284 states, 284 states have (on average 1.130281690140845) internal successors, (321), 283 states have internal predecessors, (321), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:30,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 321 transitions. [2023-11-29 01:26:30,559 INFO L240 hiAutomatonCegarLoop]: Abstraction has 284 states and 321 transitions. [2023-11-29 01:26:30,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2023-11-29 01:26:30,560 INFO L428 stractBuchiCegarLoop]: Abstraction has 284 states and 321 transitions. [2023-11-29 01:26:30,560 INFO L335 stractBuchiCegarLoop]: ======== Iteration 36 ============ [2023-11-29 01:26:30,560 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 284 states and 321 transitions. [2023-11-29 01:26:30,561 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:30,561 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:26:30,561 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:26:30,562 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [34, 34, 34, 33, 33, 1, 1, 1, 1] [2023-11-29 01:26:30,562 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:26:30,562 INFO L748 eck$LassoCheckResult]: Stem: 41852#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 41836#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 41837#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41853#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41854#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41840#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41841#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41923#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41922#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41921#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41920#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41919#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41918#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41917#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41916#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41915#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41914#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41913#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41912#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41911#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41910#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41909#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41908#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41907#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41906#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41905#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41904#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41903#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41902#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41901#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41900#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41899#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41898#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41897#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41896#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41895#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41894#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41893#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41892#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41891#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41890#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41889#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41888#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41887#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41886#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41885#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41884#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41883#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41882#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41881#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41880#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41879#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41878#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41877#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41876#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41875#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41874#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41873#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41872#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41871#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41870#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41869#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41868#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41867#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41866#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41865#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41864#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41863#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41862#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41859#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41858#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 41842#L27-4 main_~i~0#1 := 0; 41843#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41849#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41835#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41846#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41851#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42110#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42109#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42107#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42104#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42103#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42101#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42098#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42097#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42095#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42092#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42091#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42089#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42086#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42085#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42083#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42080#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42079#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42077#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42074#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42073#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42071#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42068#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42067#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42065#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42062#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42061#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42059#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42056#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42055#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42053#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42050#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42049#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42047#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42044#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42043#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42041#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42038#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42037#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42035#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42032#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42031#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42029#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42026#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42025#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42023#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42020#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42019#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42017#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42014#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42013#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42011#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42008#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42007#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42005#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42002#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42001#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41999#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41996#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41995#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41993#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41990#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41989#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41987#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41984#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41983#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41981#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41978#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41977#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41975#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41972#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41971#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41969#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41966#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41965#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41963#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41960#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41959#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41957#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41954#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41953#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41951#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41948#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41947#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41945#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41942#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41941#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41939#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41936#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41935#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41933#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41931#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41930#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41927#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41925#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41924#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41857#L34 [2023-11-29 01:26:30,563 INFO L750 eck$LassoCheckResult]: Loop: 41857#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41860#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41856#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41857#L34 [2023-11-29 01:26:30,563 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:30,563 INFO L85 PathProgramCache]: Analyzing trace with hash -609542227, now seen corresponding path program 66 times [2023-11-29 01:26:30,563 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:30,563 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1102371480] [2023-11-29 01:26:30,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:30,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:30,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:30,801 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:30,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:31,008 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:31,008 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:31,008 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 35 times [2023-11-29 01:26:31,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:31,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529004036] [2023-11-29 01:26:31,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:31,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:31,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:31,013 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:31,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:31,016 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:31,016 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:31,016 INFO L85 PathProgramCache]: Analyzing trace with hash 249289641, now seen corresponding path program 67 times [2023-11-29 01:26:31,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:31,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835312381] [2023-11-29 01:26:31,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:31,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:31,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:26:33,617 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 1617 proven. 1256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:33,618 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:26:33,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1835312381] [2023-11-29 01:26:33,618 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1835312381] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:26:33,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1766866650] [2023-11-29 01:26:33,618 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:26:33,618 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:26:33,618 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:26:33,619 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:26:33,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2023-11-29 01:26:33,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:26:33,960 INFO L262 TraceCheckSpWp]: Trace formula consists of 755 conjuncts, 72 conjunts are in the unsatisfiable core [2023-11-29 01:26:33,962 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:26:36,007 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 1717 proven. 1156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:36,007 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:26:37,466 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 1717 proven. 1156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:37,466 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1766866650] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:26:37,466 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:26:37,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 72, 72] total 109 [2023-11-29 01:26:37,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447522947] [2023-11-29 01:26:37,467 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:26:37,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:26:37,506 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 110 interpolants. [2023-11-29 01:26:37,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2741, Invalid=9249, Unknown=0, NotChecked=0, Total=11990 [2023-11-29 01:26:37,507 INFO L87 Difference]: Start difference. First operand 284 states and 321 transitions. cyclomatic complexity: 40 Second operand has 110 states, 109 states have (on average 2.623853211009174) internal successors, (286), 110 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:39,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:26:39,501 INFO L93 Difference]: Finished difference Result 921 states and 1064 transitions. [2023-11-29 01:26:39,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 921 states and 1064 transitions. [2023-11-29 01:26:39,504 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:39,506 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 921 states to 508 states and 582 transitions. [2023-11-29 01:26:39,506 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 437 [2023-11-29 01:26:39,506 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 437 [2023-11-29 01:26:39,506 INFO L73 IsDeterministic]: Start isDeterministic. Operand 508 states and 582 transitions. [2023-11-29 01:26:39,506 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:26:39,506 INFO L218 hiAutomatonCegarLoop]: Abstraction has 508 states and 582 transitions. [2023-11-29 01:26:39,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states and 582 transitions. [2023-11-29 01:26:39,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 292. [2023-11-29 01:26:39,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 292 states have (on average 1.13013698630137) internal successors, (330), 291 states have internal predecessors, (330), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:26:39,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 330 transitions. [2023-11-29 01:26:39,511 INFO L240 hiAutomatonCegarLoop]: Abstraction has 292 states and 330 transitions. [2023-11-29 01:26:39,511 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2023-11-29 01:26:39,512 INFO L428 stractBuchiCegarLoop]: Abstraction has 292 states and 330 transitions. [2023-11-29 01:26:39,512 INFO L335 stractBuchiCegarLoop]: ======== Iteration 37 ============ [2023-11-29 01:26:39,512 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 292 states and 330 transitions. [2023-11-29 01:26:39,513 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:26:39,513 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:26:39,513 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:26:39,514 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [35, 35, 35, 34, 34, 1, 1, 1, 1] [2023-11-29 01:26:39,514 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:26:39,514 INFO L748 eck$LassoCheckResult]: Stem: 44286#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 44270#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 44271#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44287#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44288#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44274#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44275#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44359#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44358#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44357#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44356#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44355#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44354#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44353#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44352#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44351#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44350#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44349#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44348#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44347#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44346#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44345#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44344#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44343#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44342#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44341#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44340#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44339#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44338#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44337#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44336#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44335#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44334#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44333#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44332#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44331#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44330#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44323#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44322#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44321#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44320#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44319#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44318#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44317#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44316#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44301#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44300#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44299#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44298#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44297#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44296#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44293#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44292#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 44276#L27-4 main_~i~0#1 := 0; 44277#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44283#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44269#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44280#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44285#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44552#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44551#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44549#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44546#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44545#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44543#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44540#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44539#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44537#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44534#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44533#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44531#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44528#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44527#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44525#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44522#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44521#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44519#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44516#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44515#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44513#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44510#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44509#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44507#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44504#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44503#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44501#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44498#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44497#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44495#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44492#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44491#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44489#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44486#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44485#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44483#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44480#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44479#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44477#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44474#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44473#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44471#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44468#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44467#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44465#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44462#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44461#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44459#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44456#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44455#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44453#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44450#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44449#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44447#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44444#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44443#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44441#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44438#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44437#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44435#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44432#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44431#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44429#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44426#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44425#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44423#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44420#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44419#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44417#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44414#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44413#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44411#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44408#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44407#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44405#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44402#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44401#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44399#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44396#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44395#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44393#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44390#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44389#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44387#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44384#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44383#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44381#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44378#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44377#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44375#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44372#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44371#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44369#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44367#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44366#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44363#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44361#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44360#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44291#L34 [2023-11-29 01:26:39,514 INFO L750 eck$LassoCheckResult]: Loop: 44291#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44294#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44290#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44291#L34 [2023-11-29 01:26:39,515 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:39,515 INFO L85 PathProgramCache]: Analyzing trace with hash -191411609, now seen corresponding path program 68 times [2023-11-29 01:26:39,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:39,515 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155793501] [2023-11-29 01:26:39,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:39,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:39,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:39,734 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:39,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:39,992 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:39,992 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:39,992 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 36 times [2023-11-29 01:26:39,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:39,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791316859] [2023-11-29 01:26:39,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:39,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:39,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:39,998 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:26:39,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:26:40,001 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:26:40,001 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:26:40,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1373372079, now seen corresponding path program 69 times [2023-11-29 01:26:40,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:26:40,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202162841] [2023-11-29 01:26:40,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:26:40,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:26:40,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:26:42,868 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 1717 proven. 1328 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:26:42,868 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:26:42,868 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202162841] [2023-11-29 01:26:42,868 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [202162841] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:26:42,868 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1017488493] [2023-11-29 01:26:42,868 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:26:42,869 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:26:42,869 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:26:42,870 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:26:42,875 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2023-11-29 01:26:59,365 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 36 check-sat command(s) [2023-11-29 01:26:59,365 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:26:59,381 INFO L262 TraceCheckSpWp]: Trace formula consists of 776 conjuncts, 74 conjunts are in the unsatisfiable core [2023-11-29 01:26:59,385 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:27:01,494 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 1820 proven. 1225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:01,494 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:27:03,096 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 1820 proven. 1225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:03,097 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1017488493] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:27:03,097 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:27:03,097 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 74, 74] total 112 [2023-11-29 01:27:03,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242507466] [2023-11-29 01:27:03,097 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:27:03,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:27:03,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2023-11-29 01:27:03,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2891, Invalid=9765, Unknown=0, NotChecked=0, Total=12656 [2023-11-29 01:27:03,139 INFO L87 Difference]: Start difference. First operand 292 states and 330 transitions. cyclomatic complexity: 41 Second operand has 113 states, 112 states have (on average 2.625) internal successors, (294), 113 states have internal predecessors, (294), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:27:05,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:27:05,398 INFO L93 Difference]: Finished difference Result 947 states and 1094 transitions. [2023-11-29 01:27:05,398 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 947 states and 1094 transitions. [2023-11-29 01:27:05,400 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:27:05,402 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 947 states to 522 states and 598 transitions. [2023-11-29 01:27:05,402 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 449 [2023-11-29 01:27:05,403 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 449 [2023-11-29 01:27:05,403 INFO L73 IsDeterministic]: Start isDeterministic. Operand 522 states and 598 transitions. [2023-11-29 01:27:05,403 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:27:05,403 INFO L218 hiAutomatonCegarLoop]: Abstraction has 522 states and 598 transitions. [2023-11-29 01:27:05,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 522 states and 598 transitions. [2023-11-29 01:27:05,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 522 to 300. [2023-11-29 01:27:05,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 300 states, 300 states have (on average 1.13) internal successors, (339), 299 states have internal predecessors, (339), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:27:05,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 339 transitions. [2023-11-29 01:27:05,409 INFO L240 hiAutomatonCegarLoop]: Abstraction has 300 states and 339 transitions. [2023-11-29 01:27:05,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2023-11-29 01:27:05,410 INFO L428 stractBuchiCegarLoop]: Abstraction has 300 states and 339 transitions. [2023-11-29 01:27:05,410 INFO L335 stractBuchiCegarLoop]: ======== Iteration 38 ============ [2023-11-29 01:27:05,410 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 300 states and 339 transitions. [2023-11-29 01:27:05,411 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:27:05,411 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:27:05,411 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:27:05,412 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [36, 36, 36, 35, 35, 1, 1, 1, 1] [2023-11-29 01:27:05,413 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:27:05,413 INFO L748 eck$LassoCheckResult]: Stem: 46789#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 46773#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 46774#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46790#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46791#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46777#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46778#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46864#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46863#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46862#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46861#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46860#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46859#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46858#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46857#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46856#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46855#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46854#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46853#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46852#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46851#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46850#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46849#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46848#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46847#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46846#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46845#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46844#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46843#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46842#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46841#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46840#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46839#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46838#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46837#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46836#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46835#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46834#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46833#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46832#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46831#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46830#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46829#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46828#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46827#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46826#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46825#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46824#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46823#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46822#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46821#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46820#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46819#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46818#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46817#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46816#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46815#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46814#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46813#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46812#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46811#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46810#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46809#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46808#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46807#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46806#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46805#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46804#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46803#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46802#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46801#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46800#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46799#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46796#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46795#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 46779#L27-4 main_~i~0#1 := 0; 46780#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46786#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46772#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46783#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46788#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47063#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47062#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47060#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47057#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47056#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47054#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47051#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47050#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47048#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47045#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47044#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47042#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47039#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47038#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47036#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47033#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47032#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47030#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47027#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47026#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47024#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47021#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47020#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47018#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47015#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47014#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47012#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47009#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47008#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47006#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47003#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47002#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47000#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46997#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46996#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46994#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46991#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46990#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46988#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46985#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46984#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46982#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46979#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46978#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46976#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46973#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46972#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46970#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46967#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46966#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46964#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46961#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46960#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46958#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46955#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46954#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46952#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46949#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46948#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46946#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46943#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46942#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46940#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46937#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46936#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46934#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46931#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46930#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46928#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46925#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46924#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46922#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46919#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46918#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46916#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46913#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46912#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46910#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46907#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46906#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46904#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46901#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46900#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46898#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46895#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46894#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46892#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46889#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46888#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46886#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46883#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46882#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46880#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46877#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46876#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46874#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46872#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46871#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46868#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46866#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46865#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46794#L34 [2023-11-29 01:27:05,413 INFO L750 eck$LassoCheckResult]: Loop: 46794#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46797#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46793#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46794#L34 [2023-11-29 01:27:05,413 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:05,413 INFO L85 PathProgramCache]: Analyzing trace with hash -1035069775, now seen corresponding path program 70 times [2023-11-29 01:27:05,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:05,414 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1064600407] [2023-11-29 01:27:05,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:05,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:05,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:05,658 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:27:05,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:05,888 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:27:05,888 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:05,889 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 37 times [2023-11-29 01:27:05,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:05,889 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313820034] [2023-11-29 01:27:05,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:05,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:05,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:05,894 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:27:05,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:05,897 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:27:05,897 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:05,897 INFO L85 PathProgramCache]: Analyzing trace with hash 2101564965, now seen corresponding path program 71 times [2023-11-29 01:27:05,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:05,897 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914492413] [2023-11-29 01:27:05,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:05,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:05,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:27:08,843 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 1820 proven. 1402 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:08,843 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:27:08,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914492413] [2023-11-29 01:27:08,843 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1914492413] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:27:08,844 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [515135087] [2023-11-29 01:27:08,844 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:27:08,844 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:27:08,844 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:27:08,845 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:27:08,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2023-11-29 01:27:19,429 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 37 check-sat command(s) [2023-11-29 01:27:19,429 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:27:19,447 INFO L262 TraceCheckSpWp]: Trace formula consists of 797 conjuncts, 76 conjunts are in the unsatisfiable core [2023-11-29 01:27:19,450 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:27:21,659 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 1926 proven. 1296 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:21,659 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:27:23,314 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 1926 proven. 1296 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:23,314 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [515135087] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:27:23,314 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:27:23,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [76, 76, 76] total 115 [2023-11-29 01:27:23,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265958692] [2023-11-29 01:27:23,315 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:27:23,356 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:27:23,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 116 interpolants. [2023-11-29 01:27:23,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3045, Invalid=10295, Unknown=0, NotChecked=0, Total=13340 [2023-11-29 01:27:23,358 INFO L87 Difference]: Start difference. First operand 300 states and 339 transitions. cyclomatic complexity: 42 Second operand has 116 states, 115 states have (on average 2.626086956521739) internal successors, (302), 116 states have internal predecessors, (302), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:27:25,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:27:25,586 INFO L93 Difference]: Finished difference Result 973 states and 1124 transitions. [2023-11-29 01:27:25,586 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 973 states and 1124 transitions. [2023-11-29 01:27:25,589 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:27:25,593 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 973 states to 536 states and 614 transitions. [2023-11-29 01:27:25,593 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 461 [2023-11-29 01:27:25,593 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 461 [2023-11-29 01:27:25,593 INFO L73 IsDeterministic]: Start isDeterministic. Operand 536 states and 614 transitions. [2023-11-29 01:27:25,594 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:27:25,594 INFO L218 hiAutomatonCegarLoop]: Abstraction has 536 states and 614 transitions. [2023-11-29 01:27:25,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 536 states and 614 transitions. [2023-11-29 01:27:25,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 536 to 308. [2023-11-29 01:27:25,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 308 states have (on average 1.12987012987013) internal successors, (348), 307 states have internal predecessors, (348), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:27:25,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 348 transitions. [2023-11-29 01:27:25,599 INFO L240 hiAutomatonCegarLoop]: Abstraction has 308 states and 348 transitions. [2023-11-29 01:27:25,600 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2023-11-29 01:27:25,600 INFO L428 stractBuchiCegarLoop]: Abstraction has 308 states and 348 transitions. [2023-11-29 01:27:25,600 INFO L335 stractBuchiCegarLoop]: ======== Iteration 39 ============ [2023-11-29 01:27:25,600 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 308 states and 348 transitions. [2023-11-29 01:27:25,601 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:27:25,601 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:27:25,601 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:27:25,602 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [37, 37, 37, 36, 36, 1, 1, 1, 1] [2023-11-29 01:27:25,602 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:27:25,602 INFO L748 eck$LassoCheckResult]: Stem: 49361#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 49345#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 49346#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49362#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49363#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49349#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49350#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49438#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49437#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49436#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49435#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49434#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49433#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49432#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49431#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49430#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49429#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49428#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49427#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49426#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49425#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49424#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49423#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49422#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49421#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49420#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49419#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49418#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49417#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49416#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49415#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49414#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49413#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49412#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49411#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49410#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49409#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49408#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49407#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49406#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49405#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49404#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49403#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49402#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49401#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49400#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49399#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49398#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49397#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49396#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49395#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49394#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49393#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49392#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49391#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49390#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49389#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49388#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49387#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49386#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49385#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49384#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49383#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49382#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49381#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49380#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49379#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49378#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49377#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49376#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49375#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49374#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49373#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49372#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49371#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49368#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49367#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 49351#L27-4 main_~i~0#1 := 0; 49352#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49358#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49344#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49355#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49360#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49643#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49642#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49640#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49637#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49636#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49634#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49631#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49630#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49628#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49625#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49624#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49622#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49619#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49618#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49616#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49613#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49612#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49610#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49607#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49606#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49604#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49601#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49600#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49598#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49595#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49594#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49592#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49589#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49588#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49586#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49583#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49582#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49580#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49577#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49576#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49574#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49571#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49570#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49568#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49565#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49564#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49562#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49559#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49558#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49556#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49553#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49552#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49550#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49547#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49546#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49544#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49541#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49540#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49538#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49535#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49534#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49532#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49529#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49528#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49526#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49523#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49522#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49520#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49517#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49516#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49514#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49511#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49510#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49508#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49505#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49504#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49502#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49499#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49498#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49496#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49493#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49492#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49490#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49487#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49486#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49484#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49481#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49480#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49478#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49475#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49474#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49472#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49469#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49468#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49466#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49463#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49462#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49460#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49457#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49456#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49454#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49451#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49450#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49448#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49446#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49445#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49442#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49440#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49439#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49366#L34 [2023-11-29 01:27:25,603 INFO L750 eck$LassoCheckResult]: Loop: 49366#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49369#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49365#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49366#L34 [2023-11-29 01:27:25,603 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:25,603 INFO L85 PathProgramCache]: Analyzing trace with hash 2076831587, now seen corresponding path program 72 times [2023-11-29 01:27:25,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:25,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749037169] [2023-11-29 01:27:25,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:25,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:25,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:25,937 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:27:26,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:26,239 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:27:26,239 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:26,239 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 38 times [2023-11-29 01:27:26,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:26,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651874045] [2023-11-29 01:27:26,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:26,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:26,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:26,244 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:27:26,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:26,248 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:27:26,248 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:26,248 INFO L85 PathProgramCache]: Analyzing trace with hash 1885956147, now seen corresponding path program 73 times [2023-11-29 01:27:26,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:26,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077420322] [2023-11-29 01:27:26,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:26,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:26,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:27:29,299 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 1926 proven. 1478 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:29,300 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:27:29,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077420322] [2023-11-29 01:27:29,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077420322] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:27:29,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [455587598] [2023-11-29 01:27:29,300 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:27:29,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:27:29,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:27:29,302 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:27:29,303 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2023-11-29 01:27:29,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:27:29,682 INFO L262 TraceCheckSpWp]: Trace formula consists of 818 conjuncts, 78 conjunts are in the unsatisfiable core [2023-11-29 01:27:29,684 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:27:31,984 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 2035 proven. 1369 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:31,984 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:27:33,688 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 2035 proven. 1369 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:33,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [455587598] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:27:33,689 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:27:33,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [78, 78, 78] total 118 [2023-11-29 01:27:33,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469547326] [2023-11-29 01:27:33,689 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:27:33,721 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:27:33,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 119 interpolants. [2023-11-29 01:27:33,723 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3203, Invalid=10839, Unknown=0, NotChecked=0, Total=14042 [2023-11-29 01:27:33,723 INFO L87 Difference]: Start difference. First operand 308 states and 348 transitions. cyclomatic complexity: 43 Second operand has 119 states, 118 states have (on average 2.6271186440677967) internal successors, (310), 119 states have internal predecessors, (310), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:27:36,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:27:36,142 INFO L93 Difference]: Finished difference Result 999 states and 1154 transitions. [2023-11-29 01:27:36,143 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 999 states and 1154 transitions. [2023-11-29 01:27:36,145 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:27:36,147 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 999 states to 550 states and 630 transitions. [2023-11-29 01:27:36,147 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 473 [2023-11-29 01:27:36,148 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 473 [2023-11-29 01:27:36,148 INFO L73 IsDeterministic]: Start isDeterministic. Operand 550 states and 630 transitions. [2023-11-29 01:27:36,148 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:27:36,148 INFO L218 hiAutomatonCegarLoop]: Abstraction has 550 states and 630 transitions. [2023-11-29 01:27:36,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states and 630 transitions. [2023-11-29 01:27:36,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 316. [2023-11-29 01:27:36,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 316 states have (on average 1.129746835443038) internal successors, (357), 315 states have internal predecessors, (357), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:27:36,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 357 transitions. [2023-11-29 01:27:36,153 INFO L240 hiAutomatonCegarLoop]: Abstraction has 316 states and 357 transitions. [2023-11-29 01:27:36,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2023-11-29 01:27:36,154 INFO L428 stractBuchiCegarLoop]: Abstraction has 316 states and 357 transitions. [2023-11-29 01:27:36,154 INFO L335 stractBuchiCegarLoop]: ======== Iteration 40 ============ [2023-11-29 01:27:36,154 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 316 states and 357 transitions. [2023-11-29 01:27:36,155 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:27:36,155 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:27:36,156 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:27:36,157 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [38, 38, 38, 37, 37, 1, 1, 1, 1] [2023-11-29 01:27:36,157 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:27:36,157 INFO L748 eck$LassoCheckResult]: Stem: 52002#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 51986#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 51987#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52003#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52004#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 51990#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 51991#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52081#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52080#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52079#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52078#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52077#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52076#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52075#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52074#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52073#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52072#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52071#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52070#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52069#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52068#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52067#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52066#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52065#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52064#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52063#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52062#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52061#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52060#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52059#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52058#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52057#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52056#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52055#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52054#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52053#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52052#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52051#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52050#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52049#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52048#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52047#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52046#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52045#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52044#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52043#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52042#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52041#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52040#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52039#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52038#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52037#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52036#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52035#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52034#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52033#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52032#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52031#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52030#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52029#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52028#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52027#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52026#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52025#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52024#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52023#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52022#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52021#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52020#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52019#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52018#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52017#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52016#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52015#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52014#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52013#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52012#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52009#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52008#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 51992#L27-4 main_~i~0#1 := 0; 51993#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 51999#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 51985#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 51996#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52001#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52292#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52291#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52289#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52286#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52285#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52283#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52280#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52279#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52277#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52274#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52273#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52271#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52268#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52267#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52265#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52262#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52261#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52259#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52256#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52255#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52253#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52250#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52249#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52247#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52244#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52243#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52241#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52238#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52237#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52235#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52232#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52231#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52229#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52226#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52225#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52223#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52220#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52219#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52217#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52214#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52213#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52211#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52208#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52207#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52205#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52202#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52201#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52199#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52196#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52195#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52193#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52190#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52189#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52187#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52184#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52183#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52181#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52178#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52177#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52175#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52172#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52171#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52169#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52166#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52165#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52163#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52160#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52159#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52157#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52154#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52153#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52151#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52148#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52147#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52145#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52142#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52141#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52139#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52136#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52135#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52133#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52130#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52129#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52127#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52124#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52123#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52121#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52118#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52117#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52115#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52112#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52111#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52109#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52106#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52105#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52103#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52100#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52099#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52097#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52094#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52093#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52091#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52089#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52088#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52085#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52083#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52082#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52007#L34 [2023-11-29 01:27:36,157 INFO L750 eck$LassoCheckResult]: Loop: 52007#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52010#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52006#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52007#L34 [2023-11-29 01:27:36,158 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:36,158 INFO L85 PathProgramCache]: Analyzing trace with hash 350676405, now seen corresponding path program 74 times [2023-11-29 01:27:36,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:36,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682183139] [2023-11-29 01:27:36,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:36,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:36,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:36,503 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:27:36,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:36,748 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:27:36,749 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:36,749 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 39 times [2023-11-29 01:27:36,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:36,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773501233] [2023-11-29 01:27:36,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:36,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:36,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:36,755 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:27:36,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:27:36,758 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:27:36,758 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:27:36,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1640364193, now seen corresponding path program 75 times [2023-11-29 01:27:36,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:27:36,759 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637353419] [2023-11-29 01:27:36,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:27:36,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:27:36,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:27:40,025 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 2035 proven. 1556 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:27:40,026 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:27:40,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637353419] [2023-11-29 01:27:40,026 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [637353419] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:27:40,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [249208924] [2023-11-29 01:27:40,026 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:27:40,026 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:27:40,026 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:27:40,027 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:27:40,031 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2023-11-29 01:27:58,494 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 39 check-sat command(s) [2023-11-29 01:27:58,494 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:27:58,512 INFO L262 TraceCheckSpWp]: Trace formula consists of 839 conjuncts, 80 conjunts are in the unsatisfiable core [2023-11-29 01:27:58,514 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:28:00,841 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 2147 proven. 1444 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:28:00,841 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:28:02,592 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 2147 proven. 1444 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:28:02,593 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [249208924] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:28:02,593 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:28:02,593 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [80, 80, 80] total 121 [2023-11-29 01:28:02,593 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177319738] [2023-11-29 01:28:02,593 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:28:02,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:28:02,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 122 interpolants. [2023-11-29 01:28:02,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3365, Invalid=11397, Unknown=0, NotChecked=0, Total=14762 [2023-11-29 01:28:02,633 INFO L87 Difference]: Start difference. First operand 316 states and 357 transitions. cyclomatic complexity: 44 Second operand has 122 states, 121 states have (on average 2.628099173553719) internal successors, (318), 122 states have internal predecessors, (318), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:28:05,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:28:05,055 INFO L93 Difference]: Finished difference Result 1025 states and 1184 transitions. [2023-11-29 01:28:05,055 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1025 states and 1184 transitions. [2023-11-29 01:28:05,057 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:28:05,059 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1025 states to 564 states and 646 transitions. [2023-11-29 01:28:05,059 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 485 [2023-11-29 01:28:05,060 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 485 [2023-11-29 01:28:05,060 INFO L73 IsDeterministic]: Start isDeterministic. Operand 564 states and 646 transitions. [2023-11-29 01:28:05,060 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:28:05,060 INFO L218 hiAutomatonCegarLoop]: Abstraction has 564 states and 646 transitions. [2023-11-29 01:28:05,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 564 states and 646 transitions. [2023-11-29 01:28:05,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 564 to 324. [2023-11-29 01:28:05,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 324 states have (on average 1.1296296296296295) internal successors, (366), 323 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:28:05,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 366 transitions. [2023-11-29 01:28:05,065 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 366 transitions. [2023-11-29 01:28:05,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2023-11-29 01:28:05,066 INFO L428 stractBuchiCegarLoop]: Abstraction has 324 states and 366 transitions. [2023-11-29 01:28:05,066 INFO L335 stractBuchiCegarLoop]: ======== Iteration 41 ============ [2023-11-29 01:28:05,066 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 366 transitions. [2023-11-29 01:28:05,067 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:28:05,067 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:28:05,067 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:28:05,069 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [39, 39, 39, 38, 38, 1, 1, 1, 1] [2023-11-29 01:28:05,069 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:28:05,069 INFO L748 eck$LassoCheckResult]: Stem: 54712#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 54696#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 54697#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54713#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54714#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54700#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54701#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54793#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54792#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54791#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54790#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54789#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54788#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54787#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54786#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54785#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54784#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54783#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54782#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54781#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54780#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54779#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54778#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54777#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54776#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54775#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54774#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54773#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54772#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54771#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54770#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54769#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54768#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54767#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54766#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54765#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54764#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54763#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54762#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54761#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54760#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54759#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54758#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54757#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54756#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54755#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54754#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54753#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54752#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54751#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54750#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54749#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54748#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54747#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54746#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54745#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54744#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54743#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54742#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54741#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54740#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54739#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54738#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54737#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54736#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54735#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54734#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54733#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54732#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54731#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54730#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54729#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54728#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54727#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54726#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54725#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54724#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54723#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54722#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54719#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54718#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 54702#L27-4 main_~i~0#1 := 0; 54703#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54709#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54695#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54706#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54711#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 55010#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 55009#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 55007#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 55004#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 55003#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 55001#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54998#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54997#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54995#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54992#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54991#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54989#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54986#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54985#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54983#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54980#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54979#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54977#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54974#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54973#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54971#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54968#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54967#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54965#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54962#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54961#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54959#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54956#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54953#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54950#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54949#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54947#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54944#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54943#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54941#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54938#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54937#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54935#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54932#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54931#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54929#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54926#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54925#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54923#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54920#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54919#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54917#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54914#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54913#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54911#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54908#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54907#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54905#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54902#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54901#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54899#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54896#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54895#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54893#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54890#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54889#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54887#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54884#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54883#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54881#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54878#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54877#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54875#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54872#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54871#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54869#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54866#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54865#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54863#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54860#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54859#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54857#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54854#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54853#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54851#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54848#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54847#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54845#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54842#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54841#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54839#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54836#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54835#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54833#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54830#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54829#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54827#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54824#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54823#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54821#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54818#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54817#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54815#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54812#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54811#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54809#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54806#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54805#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54803#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54801#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54800#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54797#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54795#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54794#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54717#L34 [2023-11-29 01:28:05,069 INFO L750 eck$LassoCheckResult]: Loop: 54717#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54720#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54716#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54717#L34 [2023-11-29 01:28:05,069 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:28:05,070 INFO L85 PathProgramCache]: Analyzing trace with hash 788831327, now seen corresponding path program 76 times [2023-11-29 01:28:05,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:28:05,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440032104] [2023-11-29 01:28:05,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:28:05,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:28:05,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:05,377 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:28:05,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:05,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:28:05,693 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:28:05,693 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 40 times [2023-11-29 01:28:05,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:28:05,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76283098] [2023-11-29 01:28:05,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:28:05,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:28:05,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:05,701 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:28:05,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:05,705 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:28:05,706 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:28:05,706 INFO L85 PathProgramCache]: Analyzing trace with hash -1986934345, now seen corresponding path program 77 times [2023-11-29 01:28:05,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:28:05,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783445869] [2023-11-29 01:28:05,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:28:05,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:28:05,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:28:09,118 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 2147 proven. 1636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:28:09,118 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:28:09,118 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783445869] [2023-11-29 01:28:09,118 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [783445869] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:28:09,118 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [959747526] [2023-11-29 01:28:09,119 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:28:09,119 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:28:09,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:28:09,120 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:28:09,121 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2023-11-29 01:28:44,323 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 40 check-sat command(s) [2023-11-29 01:28:44,323 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:28:44,347 INFO L262 TraceCheckSpWp]: Trace formula consists of 860 conjuncts, 82 conjunts are in the unsatisfiable core [2023-11-29 01:28:44,350 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:28:46,740 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 2262 proven. 1521 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:28:46,740 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:28:48,547 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 2262 proven. 1521 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:28:48,547 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [959747526] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:28:48,547 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:28:48,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [82, 82, 82] total 124 [2023-11-29 01:28:48,548 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [727656324] [2023-11-29 01:28:48,548 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:28:48,580 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:28:48,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 125 interpolants. [2023-11-29 01:28:48,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3531, Invalid=11969, Unknown=0, NotChecked=0, Total=15500 [2023-11-29 01:28:48,583 INFO L87 Difference]: Start difference. First operand 324 states and 366 transitions. cyclomatic complexity: 45 Second operand has 125 states, 124 states have (on average 2.629032258064516) internal successors, (326), 125 states have internal predecessors, (326), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:28:50,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:28:50,993 INFO L93 Difference]: Finished difference Result 1051 states and 1214 transitions. [2023-11-29 01:28:50,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1051 states and 1214 transitions. [2023-11-29 01:28:50,997 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:28:50,999 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1051 states to 578 states and 662 transitions. [2023-11-29 01:28:50,999 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 497 [2023-11-29 01:28:50,999 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 497 [2023-11-29 01:28:50,999 INFO L73 IsDeterministic]: Start isDeterministic. Operand 578 states and 662 transitions. [2023-11-29 01:28:51,000 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:28:51,000 INFO L218 hiAutomatonCegarLoop]: Abstraction has 578 states and 662 transitions. [2023-11-29 01:28:51,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states and 662 transitions. [2023-11-29 01:28:51,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 332. [2023-11-29 01:28:51,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 332 states, 332 states have (on average 1.1295180722891567) internal successors, (375), 331 states have internal predecessors, (375), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:28:51,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 375 transitions. [2023-11-29 01:28:51,003 INFO L240 hiAutomatonCegarLoop]: Abstraction has 332 states and 375 transitions. [2023-11-29 01:28:51,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2023-11-29 01:28:51,004 INFO L428 stractBuchiCegarLoop]: Abstraction has 332 states and 375 transitions. [2023-11-29 01:28:51,004 INFO L335 stractBuchiCegarLoop]: ======== Iteration 42 ============ [2023-11-29 01:28:51,004 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 332 states and 375 transitions. [2023-11-29 01:28:51,005 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:28:51,005 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:28:51,005 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:28:51,006 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [40, 40, 40, 39, 39, 1, 1, 1, 1] [2023-11-29 01:28:51,006 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:28:51,007 INFO L748 eck$LassoCheckResult]: Stem: 57491#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 57475#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 57476#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57492#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57493#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57479#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57480#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57574#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57573#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57572#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57571#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57570#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57569#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57568#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57567#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57566#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57565#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57564#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57563#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57562#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57561#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57560#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57559#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57558#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57557#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57556#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57555#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57554#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57553#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57552#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57551#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57550#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57549#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57548#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57547#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57546#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57545#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57544#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57543#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57542#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57541#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57540#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57539#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57538#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57537#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57536#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57535#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57534#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57533#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57532#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57531#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57530#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57529#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57528#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57527#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57526#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57525#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57524#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57523#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57522#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57521#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57520#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57519#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57518#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57517#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57516#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57515#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57514#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57513#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57512#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57511#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57510#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57509#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57508#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57507#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57506#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57505#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57504#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57503#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57502#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57501#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57498#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57497#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 57481#L27-4 main_~i~0#1 := 0; 57482#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57488#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57474#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57485#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57490#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57797#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57796#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57794#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57791#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57790#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57788#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57785#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57784#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57782#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57779#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57778#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57776#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57773#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57772#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57770#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57767#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57766#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57764#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57761#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57760#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57758#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57755#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57754#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57752#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57749#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57748#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57746#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57743#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57742#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57740#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57737#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57736#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57734#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57731#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57730#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57728#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57725#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57724#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57722#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57719#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57718#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57716#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57713#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57712#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57710#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57707#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57706#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57704#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57701#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57700#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57698#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57695#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57694#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57692#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57689#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57688#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57686#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57683#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57682#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57680#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57677#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57676#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57674#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57671#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57670#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57668#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57665#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57664#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57662#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57659#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57658#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57656#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57653#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57652#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57650#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57647#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57646#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57644#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57641#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57640#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57638#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57635#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57634#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57632#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57629#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57628#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57626#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57623#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57622#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57620#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57617#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57614#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57610#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57608#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57602#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57599#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57598#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57596#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57593#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57592#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57590#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57587#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57586#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57584#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57582#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57581#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57578#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57576#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57575#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57496#L34 [2023-11-29 01:28:51,007 INFO L750 eck$LassoCheckResult]: Loop: 57496#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57499#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57495#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57496#L34 [2023-11-29 01:28:51,007 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:28:51,007 INFO L85 PathProgramCache]: Analyzing trace with hash -1120285511, now seen corresponding path program 78 times [2023-11-29 01:28:51,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:28:51,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201731811] [2023-11-29 01:28:51,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:28:51,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:28:51,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:51,300 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:28:51,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:51,648 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:28:51,648 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:28:51,648 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 41 times [2023-11-29 01:28:51,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:28:51,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1615843739] [2023-11-29 01:28:51,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:28:51,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:28:51,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:51,654 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:28:51,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:28:51,657 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:28:51,657 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:28:51,658 INFO L85 PathProgramCache]: Analyzing trace with hash 1765245725, now seen corresponding path program 79 times [2023-11-29 01:28:51,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:28:51,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324127101] [2023-11-29 01:28:51,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:28:51,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:28:51,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:28:55,194 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 2262 proven. 1718 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:28:55,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:28:55,195 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324127101] [2023-11-29 01:28:55,195 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324127101] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:28:55,195 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [697465601] [2023-11-29 01:28:55,195 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:28:55,195 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:28:55,195 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:28:55,196 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:28:55,197 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2023-11-29 01:28:55,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:28:55,635 INFO L262 TraceCheckSpWp]: Trace formula consists of 881 conjuncts, 84 conjunts are in the unsatisfiable core [2023-11-29 01:28:55,637 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:28:58,132 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 2380 proven. 1600 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:28:58,132 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:29:00,045 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 2380 proven. 1600 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:29:00,045 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [697465601] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:29:00,046 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:29:00,046 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [84, 84, 84] total 127 [2023-11-29 01:29:00,046 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1557899068] [2023-11-29 01:29:00,046 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:29:00,082 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:29:00,082 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2023-11-29 01:29:00,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3701, Invalid=12555, Unknown=0, NotChecked=0, Total=16256 [2023-11-29 01:29:00,083 INFO L87 Difference]: Start difference. First operand 332 states and 375 transitions. cyclomatic complexity: 46 Second operand has 128 states, 127 states have (on average 2.62992125984252) internal successors, (334), 128 states have internal predecessors, (334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:29:02,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:29:02,736 INFO L93 Difference]: Finished difference Result 1077 states and 1244 transitions. [2023-11-29 01:29:02,737 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1077 states and 1244 transitions. [2023-11-29 01:29:02,739 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:29:02,741 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1077 states to 592 states and 678 transitions. [2023-11-29 01:29:02,741 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 509 [2023-11-29 01:29:02,742 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 509 [2023-11-29 01:29:02,742 INFO L73 IsDeterministic]: Start isDeterministic. Operand 592 states and 678 transitions. [2023-11-29 01:29:02,742 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:29:02,742 INFO L218 hiAutomatonCegarLoop]: Abstraction has 592 states and 678 transitions. [2023-11-29 01:29:02,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states and 678 transitions. [2023-11-29 01:29:02,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 340. [2023-11-29 01:29:02,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 340 states, 340 states have (on average 1.1294117647058823) internal successors, (384), 339 states have internal predecessors, (384), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:29:02,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 384 transitions. [2023-11-29 01:29:02,746 INFO L240 hiAutomatonCegarLoop]: Abstraction has 340 states and 384 transitions. [2023-11-29 01:29:02,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2023-11-29 01:29:02,747 INFO L428 stractBuchiCegarLoop]: Abstraction has 340 states and 384 transitions. [2023-11-29 01:29:02,747 INFO L335 stractBuchiCegarLoop]: ======== Iteration 43 ============ [2023-11-29 01:29:02,747 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 340 states and 384 transitions. [2023-11-29 01:29:02,747 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:29:02,748 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:29:02,748 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:29:02,749 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [41, 41, 41, 40, 40, 1, 1, 1, 1] [2023-11-29 01:29:02,749 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:29:02,749 INFO L748 eck$LassoCheckResult]: Stem: 60339#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 60323#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 60324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60340#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60341#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60424#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60423#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60422#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60421#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60420#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60419#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60418#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60417#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60416#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60415#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60414#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60413#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60412#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60411#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60410#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60409#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60408#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60407#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60406#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60405#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60404#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60403#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60402#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60401#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60400#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60399#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60398#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60397#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60396#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60395#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60394#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60393#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60392#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60391#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60390#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60389#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60388#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60387#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60386#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60385#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60384#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60383#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60382#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60381#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60380#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60379#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60378#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60377#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60376#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60375#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60374#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60373#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60372#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60371#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60370#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60369#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60368#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60367#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60366#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60365#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60364#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60363#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60362#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60361#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60360#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60359#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60358#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60357#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60356#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60355#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60354#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60353#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60352#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60351#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60350#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60349#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60346#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60345#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 60329#L27-4 main_~i~0#1 := 0; 60330#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60336#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60322#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60333#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60338#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60653#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60652#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60650#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60647#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60646#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60644#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60641#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60640#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60638#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60635#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60634#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60632#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60629#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60628#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60626#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60623#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60622#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60620#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60617#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60614#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60610#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60608#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60602#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60599#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60598#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60596#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60593#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60592#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60590#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60587#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60586#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60584#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60581#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60580#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60578#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60575#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60574#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60572#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60569#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60568#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60566#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60563#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60562#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60560#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60557#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60556#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60554#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60551#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60550#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60548#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60545#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60544#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60542#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60539#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60538#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60536#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60533#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60532#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60530#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60527#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60526#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60524#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60521#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60520#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60518#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60515#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60514#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60512#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60509#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60508#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60506#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60503#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60502#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60500#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60497#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60496#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60494#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60491#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60490#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60488#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60485#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60484#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60482#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60479#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60478#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60476#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60473#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60472#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60470#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60467#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60466#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60464#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60461#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60460#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60458#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60455#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60454#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60452#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60449#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60448#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60446#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60443#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60442#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60440#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60437#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60436#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60434#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60432#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60431#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60428#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60426#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60425#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60344#L34 [2023-11-29 01:29:02,749 INFO L750 eck$LassoCheckResult]: Loop: 60344#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60347#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60343#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60344#L34 [2023-11-29 01:29:02,749 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:29:02,749 INFO L85 PathProgramCache]: Analyzing trace with hash 1619202395, now seen corresponding path program 80 times [2023-11-29 01:29:02,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:29:02,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392974235] [2023-11-29 01:29:02,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:29:02,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:29:03,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:03,085 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:29:03,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:03,431 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:29:03,431 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:29:03,431 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 42 times [2023-11-29 01:29:03,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:29:03,432 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [645518164] [2023-11-29 01:29:03,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:29:03,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:29:03,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:03,440 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:29:03,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:03,445 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:29:03,446 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:29:03,446 INFO L85 PathProgramCache]: Analyzing trace with hash 880894779, now seen corresponding path program 81 times [2023-11-29 01:29:03,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:29:03,446 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221159742] [2023-11-29 01:29:03,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:29:03,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:29:03,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:29:07,182 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 2380 proven. 1802 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:29:07,182 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:29:07,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1221159742] [2023-11-29 01:29:07,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1221159742] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:29:07,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [75521534] [2023-11-29 01:29:07,182 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:29:07,182 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:29:07,182 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:29:07,184 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:29:07,184 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2023-11-29 01:29:27,836 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 42 check-sat command(s) [2023-11-29 01:29:27,837 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:29:27,867 INFO L262 TraceCheckSpWp]: Trace formula consists of 902 conjuncts, 86 conjunts are in the unsatisfiable core [2023-11-29 01:29:27,870 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:29:30,470 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 2501 proven. 1681 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:29:30,470 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:29:32,522 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 2501 proven. 1681 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:29:32,522 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [75521534] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:29:32,522 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:29:32,523 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 86, 86] total 130 [2023-11-29 01:29:32,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709858060] [2023-11-29 01:29:32,523 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:29:32,557 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:29:32,558 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 131 interpolants. [2023-11-29 01:29:32,559 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3875, Invalid=13155, Unknown=0, NotChecked=0, Total=17030 [2023-11-29 01:29:32,559 INFO L87 Difference]: Start difference. First operand 340 states and 384 transitions. cyclomatic complexity: 47 Second operand has 131 states, 130 states have (on average 2.6307692307692307) internal successors, (342), 131 states have internal predecessors, (342), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:29:35,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:29:35,377 INFO L93 Difference]: Finished difference Result 1103 states and 1274 transitions. [2023-11-29 01:29:35,377 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1103 states and 1274 transitions. [2023-11-29 01:29:35,380 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:29:35,382 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1103 states to 606 states and 694 transitions. [2023-11-29 01:29:35,382 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 521 [2023-11-29 01:29:35,382 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 521 [2023-11-29 01:29:35,382 INFO L73 IsDeterministic]: Start isDeterministic. Operand 606 states and 694 transitions. [2023-11-29 01:29:35,383 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:29:35,383 INFO L218 hiAutomatonCegarLoop]: Abstraction has 606 states and 694 transitions. [2023-11-29 01:29:35,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 606 states and 694 transitions. [2023-11-29 01:29:35,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 606 to 348. [2023-11-29 01:29:35,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 348 states, 348 states have (on average 1.1293103448275863) internal successors, (393), 347 states have internal predecessors, (393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:29:35,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 393 transitions. [2023-11-29 01:29:35,388 INFO L240 hiAutomatonCegarLoop]: Abstraction has 348 states and 393 transitions. [2023-11-29 01:29:35,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2023-11-29 01:29:35,389 INFO L428 stractBuchiCegarLoop]: Abstraction has 348 states and 393 transitions. [2023-11-29 01:29:35,389 INFO L335 stractBuchiCegarLoop]: ======== Iteration 44 ============ [2023-11-29 01:29:35,389 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 348 states and 393 transitions. [2023-11-29 01:29:35,390 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:29:35,390 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:29:35,390 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:29:35,391 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [42, 42, 42, 41, 41, 1, 1, 1, 1] [2023-11-29 01:29:35,391 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:29:35,391 INFO L748 eck$LassoCheckResult]: Stem: 63256#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 63240#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 63241#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63257#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63258#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63244#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63245#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63343#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63342#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63341#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63340#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63339#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63338#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63337#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63336#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63335#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63334#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63333#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63332#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63331#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63330#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63323#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63322#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63321#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63320#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63319#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63318#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63317#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63316#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63301#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63300#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63299#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63298#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63297#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63296#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63295#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63294#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63293#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63292#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63291#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63290#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63289#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63288#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63287#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63286#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63285#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63284#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63283#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63282#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63281#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63280#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63279#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63278#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63277#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63276#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63275#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63274#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63273#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63272#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63271#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63270#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63269#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63268#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63267#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63266#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63263#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63262#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 63246#L27-4 main_~i~0#1 := 0; 63247#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63253#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63239#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63250#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63255#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63578#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63577#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63575#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63572#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63571#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63569#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63566#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63565#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63563#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63560#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63559#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63557#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63554#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63553#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63551#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63548#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63547#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63545#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63542#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63541#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63539#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63536#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63535#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63533#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63530#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63529#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63527#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63524#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63523#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63521#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63518#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63517#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63515#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63512#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63511#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63509#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63506#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63505#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63503#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63500#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63499#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63497#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63494#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63493#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63491#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63488#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63487#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63485#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63482#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63481#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63479#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63476#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63475#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63473#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63470#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63469#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63467#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63464#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63463#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63461#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63458#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63457#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63455#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63452#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63451#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63449#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63446#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63445#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63443#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63440#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63439#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63437#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63434#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63433#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63431#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63428#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63427#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63425#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63422#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63421#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63419#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63416#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63415#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63413#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63410#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63409#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63407#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63404#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63403#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63401#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63398#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63397#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63395#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63392#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63391#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63389#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63386#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63385#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63383#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63380#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63379#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63377#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63374#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63373#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63371#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63368#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63367#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63365#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63362#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63361#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63359#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63356#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63355#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63353#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63351#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63350#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63347#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63345#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63344#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63261#L34 [2023-11-29 01:29:35,391 INFO L750 eck$LassoCheckResult]: Loop: 63261#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63264#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63260#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63261#L34 [2023-11-29 01:29:35,391 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:29:35,392 INFO L85 PathProgramCache]: Analyzing trace with hash -838136899, now seen corresponding path program 82 times [2023-11-29 01:29:35,392 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:29:35,392 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866792883] [2023-11-29 01:29:35,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:29:35,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:29:35,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:35,840 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:29:36,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:36,184 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:29:36,185 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:29:36,185 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 43 times [2023-11-29 01:29:36,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:29:36,185 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012488763] [2023-11-29 01:29:36,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:29:36,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:29:36,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:36,192 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:29:36,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:29:36,195 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:29:36,195 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:29:36,195 INFO L85 PathProgramCache]: Analyzing trace with hash 2003547545, now seen corresponding path program 83 times [2023-11-29 01:29:36,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:29:36,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1540459692] [2023-11-29 01:29:36,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:29:36,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:29:36,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:29:40,064 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 2501 proven. 1888 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:29:40,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:29:40,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1540459692] [2023-11-29 01:29:40,064 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1540459692] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:29:40,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [728474572] [2023-11-29 01:29:40,065 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:29:40,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:29:40,065 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:29:40,066 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:29:40,067 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2023-11-29 01:30:24,762 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 43 check-sat command(s) [2023-11-29 01:30:24,762 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:30:24,782 INFO L262 TraceCheckSpWp]: Trace formula consists of 923 conjuncts, 88 conjunts are in the unsatisfiable core [2023-11-29 01:30:24,786 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:30:27,502 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 2625 proven. 1764 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:30:27,502 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:30:29,628 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 2625 proven. 1764 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:30:29,629 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [728474572] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:30:29,629 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:30:29,629 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [88, 88, 88] total 133 [2023-11-29 01:30:29,629 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232868899] [2023-11-29 01:30:29,629 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:30:29,668 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:30:29,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2023-11-29 01:30:29,671 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4053, Invalid=13769, Unknown=0, NotChecked=0, Total=17822 [2023-11-29 01:30:29,671 INFO L87 Difference]: Start difference. First operand 348 states and 393 transitions. cyclomatic complexity: 48 Second operand has 134 states, 133 states have (on average 2.6315789473684212) internal successors, (350), 134 states have internal predecessors, (350), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:30:32,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:30:32,533 INFO L93 Difference]: Finished difference Result 1129 states and 1304 transitions. [2023-11-29 01:30:32,533 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1129 states and 1304 transitions. [2023-11-29 01:30:32,537 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:30:32,540 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1129 states to 620 states and 710 transitions. [2023-11-29 01:30:32,540 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 533 [2023-11-29 01:30:32,540 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 533 [2023-11-29 01:30:32,540 INFO L73 IsDeterministic]: Start isDeterministic. Operand 620 states and 710 transitions. [2023-11-29 01:30:32,541 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:30:32,541 INFO L218 hiAutomatonCegarLoop]: Abstraction has 620 states and 710 transitions. [2023-11-29 01:30:32,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 620 states and 710 transitions. [2023-11-29 01:30:32,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 620 to 356. [2023-11-29 01:30:32,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 356 states, 356 states have (on average 1.1292134831460674) internal successors, (402), 355 states have internal predecessors, (402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:30:32,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 402 transitions. [2023-11-29 01:30:32,546 INFO L240 hiAutomatonCegarLoop]: Abstraction has 356 states and 402 transitions. [2023-11-29 01:30:32,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2023-11-29 01:30:32,547 INFO L428 stractBuchiCegarLoop]: Abstraction has 356 states and 402 transitions. [2023-11-29 01:30:32,547 INFO L335 stractBuchiCegarLoop]: ======== Iteration 45 ============ [2023-11-29 01:30:32,547 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 356 states and 402 transitions. [2023-11-29 01:30:32,548 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:30:32,548 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:30:32,549 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:30:32,550 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [43, 43, 43, 42, 42, 1, 1, 1, 1] [2023-11-29 01:30:32,550 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:30:32,550 INFO L748 eck$LassoCheckResult]: Stem: 66242#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 66226#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 66227#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66243#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66244#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66230#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66231#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66331#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66330#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66323#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66322#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66321#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66320#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66319#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66318#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66317#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66316#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66301#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66300#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66299#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66298#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66297#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66296#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66295#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66294#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66293#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66292#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66291#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66290#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66289#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66288#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66287#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66286#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66285#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66284#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66283#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66282#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66281#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66280#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66279#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66278#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66277#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66276#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66275#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66274#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66273#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66272#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66271#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66270#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66269#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66268#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66267#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66266#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66265#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66264#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66263#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66262#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66261#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66260#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66259#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66258#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66257#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66256#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66255#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66254#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66253#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66252#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66249#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66248#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 66232#L27-4 main_~i~0#1 := 0; 66233#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66239#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66225#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66236#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66241#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66572#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66571#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66569#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66566#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66565#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66563#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66560#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66559#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66557#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66554#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66553#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66551#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66548#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66547#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66545#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66542#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66541#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66539#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66536#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66535#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66533#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66530#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66529#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66527#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66524#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66523#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66521#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66518#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66517#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66515#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66512#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66511#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66509#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66506#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66505#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66503#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66500#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66499#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66497#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66494#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66493#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66491#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66488#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66487#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66485#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66482#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66481#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66479#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66476#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66475#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66473#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66470#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66469#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66467#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66464#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66463#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66461#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66458#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66457#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66455#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66452#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66451#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66449#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66446#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66445#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66443#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66440#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66439#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66437#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66434#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66433#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66431#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66428#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66427#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66425#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66422#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66421#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66419#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66416#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66415#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66413#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66410#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66409#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66407#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66404#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66403#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66401#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66398#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66397#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66395#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66392#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66391#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66389#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66386#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66385#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66383#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66380#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66379#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66377#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66374#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66373#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66371#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66368#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66367#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66365#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66362#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66361#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66359#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66356#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66355#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66353#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66350#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66349#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66347#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66344#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66343#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66341#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66339#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66338#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66335#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66333#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66332#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66247#L34 [2023-11-29 01:30:32,551 INFO L750 eck$LassoCheckResult]: Loop: 66247#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66250#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66246#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66247#L34 [2023-11-29 01:30:32,551 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:30:32,551 INFO L85 PathProgramCache]: Analyzing trace with hash -142537129, now seen corresponding path program 84 times [2023-11-29 01:30:32,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:30:32,551 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527762617] [2023-11-29 01:30:32,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:30:32,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:30:32,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:32,920 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:30:33,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:33,330 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:30:33,331 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:30:33,331 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 44 times [2023-11-29 01:30:33,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:30:33,331 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515142680] [2023-11-29 01:30:33,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:30:33,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:30:33,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:33,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:30:33,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:33,344 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:30:33,344 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:30:33,345 INFO L85 PathProgramCache]: Analyzing trace with hash 1399092415, now seen corresponding path program 85 times [2023-11-29 01:30:33,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:30:33,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689987484] [2023-11-29 01:30:33,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:30:33,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:30:33,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:30:37,404 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 2625 proven. 1976 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:30:37,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:30:37,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689987484] [2023-11-29 01:30:37,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [689987484] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:30:37,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [818482450] [2023-11-29 01:30:37,405 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:30:37,405 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:30:37,405 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:30:37,406 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:30:37,407 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2023-11-29 01:30:37,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:30:37,878 INFO L262 TraceCheckSpWp]: Trace formula consists of 944 conjuncts, 90 conjunts are in the unsatisfiable core [2023-11-29 01:30:37,881 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:30:40,713 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 2752 proven. 1849 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:30:40,713 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:30:42,925 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 2752 proven. 1849 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:30:42,925 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [818482450] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:30:42,926 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:30:42,926 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [90, 90, 90] total 136 [2023-11-29 01:30:42,926 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1303003153] [2023-11-29 01:30:42,926 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:30:42,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:30:42,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 137 interpolants. [2023-11-29 01:30:42,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4235, Invalid=14397, Unknown=0, NotChecked=0, Total=18632 [2023-11-29 01:30:42,962 INFO L87 Difference]: Start difference. First operand 356 states and 402 transitions. cyclomatic complexity: 49 Second operand has 137 states, 136 states have (on average 2.6323529411764706) internal successors, (358), 137 states have internal predecessors, (358), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:30:45,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:30:45,939 INFO L93 Difference]: Finished difference Result 1155 states and 1334 transitions. [2023-11-29 01:30:45,939 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1155 states and 1334 transitions. [2023-11-29 01:30:45,942 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:30:45,944 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1155 states to 634 states and 726 transitions. [2023-11-29 01:30:45,945 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 545 [2023-11-29 01:30:45,945 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 545 [2023-11-29 01:30:45,945 INFO L73 IsDeterministic]: Start isDeterministic. Operand 634 states and 726 transitions. [2023-11-29 01:30:45,945 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:30:45,945 INFO L218 hiAutomatonCegarLoop]: Abstraction has 634 states and 726 transitions. [2023-11-29 01:30:45,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 634 states and 726 transitions. [2023-11-29 01:30:45,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 634 to 364. [2023-11-29 01:30:45,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 364 states have (on average 1.129120879120879) internal successors, (411), 363 states have internal predecessors, (411), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:30:45,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 411 transitions. [2023-11-29 01:30:45,951 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 411 transitions. [2023-11-29 01:30:45,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2023-11-29 01:30:45,952 INFO L428 stractBuchiCegarLoop]: Abstraction has 364 states and 411 transitions. [2023-11-29 01:30:45,952 INFO L335 stractBuchiCegarLoop]: ======== Iteration 46 ============ [2023-11-29 01:30:45,952 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 411 transitions. [2023-11-29 01:30:45,953 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:30:45,953 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:30:45,953 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:30:45,954 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [44, 44, 44, 43, 43, 1, 1, 1, 1] [2023-11-29 01:30:45,954 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:30:45,954 INFO L748 eck$LassoCheckResult]: Stem: 69297#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 69281#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 69282#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69298#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69299#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69285#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69286#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69388#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69387#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69386#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69385#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69384#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69383#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69382#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69381#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69380#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69379#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69378#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69377#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69376#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69375#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69374#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69373#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69372#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69371#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69370#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69369#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69368#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69367#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69366#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69365#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69364#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69363#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69362#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69361#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69360#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69359#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69358#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69357#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69356#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69355#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69354#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69353#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69352#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69351#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69350#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69349#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69348#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69347#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69346#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69345#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69344#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69343#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69342#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69341#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69340#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69339#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69338#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69337#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69336#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69335#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69334#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69333#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69332#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69331#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69330#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69329#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69328#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69327#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69326#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69325#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69324#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69323#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69322#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69321#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69320#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69319#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69318#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69317#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69316#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69315#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69314#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69313#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69312#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69311#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69310#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69309#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69308#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69307#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69304#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69303#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 69287#L27-4 main_~i~0#1 := 0; 69288#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69294#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69280#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69291#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69296#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69635#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69634#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69632#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69629#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69628#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69626#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69623#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69622#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69620#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69617#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69614#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69610#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69608#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69602#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69599#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69598#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69596#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69593#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69592#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69590#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69587#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69586#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69584#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69581#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69580#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69578#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69575#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69574#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69572#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69569#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69568#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69566#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69563#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69562#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69560#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69557#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69556#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69554#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69551#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69550#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69548#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69545#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69544#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69542#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69539#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69538#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69536#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69533#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69532#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69530#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69527#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69526#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69524#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69521#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69520#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69518#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69515#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69514#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69512#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69509#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69508#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69506#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69503#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69502#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69500#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69497#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69496#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69494#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69491#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69490#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69488#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69485#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69484#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69482#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69479#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69478#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69476#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69473#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69472#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69470#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69467#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69466#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69464#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69461#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69460#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69458#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69455#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69454#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69452#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69449#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69448#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69446#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69443#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69442#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69440#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69437#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69436#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69434#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69431#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69430#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69428#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69425#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69424#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69422#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69419#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69418#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69416#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69413#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69412#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69410#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69407#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69406#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69404#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69401#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69400#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69398#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69396#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69395#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69392#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69390#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69389#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69302#L34 [2023-11-29 01:30:45,955 INFO L750 eck$LassoCheckResult]: Loop: 69302#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69305#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69301#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69302#L34 [2023-11-29 01:30:45,955 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:30:45,955 INFO L85 PathProgramCache]: Analyzing trace with hash 119464641, now seen corresponding path program 86 times [2023-11-29 01:30:45,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:30:45,955 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275244919] [2023-11-29 01:30:45,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:30:45,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:30:46,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:46,393 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:30:46,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:46,767 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:30:46,767 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:30:46,767 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 45 times [2023-11-29 01:30:46,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:30:46,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707263336] [2023-11-29 01:30:46,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:30:46,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:30:46,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:46,775 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:30:46,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:30:46,778 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:30:46,779 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:30:46,779 INFO L85 PathProgramCache]: Analyzing trace with hash -1556721643, now seen corresponding path program 87 times [2023-11-29 01:30:46,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:30:46,779 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458804970] [2023-11-29 01:30:46,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:30:46,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:30:46,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:30:51,230 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 2752 proven. 2066 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:30:51,231 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:30:51,231 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458804970] [2023-11-29 01:30:51,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1458804970] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:30:51,231 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1561743100] [2023-11-29 01:30:51,231 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:30:51,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:30:51,231 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:30:51,232 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:30:51,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2023-11-29 01:31:44,361 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 45 check-sat command(s) [2023-11-29 01:31:44,361 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:31:44,391 INFO L262 TraceCheckSpWp]: Trace formula consists of 965 conjuncts, 92 conjunts are in the unsatisfiable core [2023-11-29 01:31:44,394 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:31:47,361 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 2882 proven. 1936 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:31:47,361 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:31:49,592 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 2882 proven. 1936 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:31:49,592 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1561743100] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:31:49,592 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:31:49,592 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [92, 92, 92] total 139 [2023-11-29 01:31:49,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827497948] [2023-11-29 01:31:49,593 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:31:49,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:31:49,628 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 140 interpolants. [2023-11-29 01:31:49,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4421, Invalid=15039, Unknown=0, NotChecked=0, Total=19460 [2023-11-29 01:31:49,629 INFO L87 Difference]: Start difference. First operand 364 states and 411 transitions. cyclomatic complexity: 50 Second operand has 140 states, 139 states have (on average 2.633093525179856) internal successors, (366), 140 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:31:52,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:31:52,801 INFO L93 Difference]: Finished difference Result 1181 states and 1364 transitions. [2023-11-29 01:31:52,801 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1181 states and 1364 transitions. [2023-11-29 01:31:52,805 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:31:52,807 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1181 states to 648 states and 742 transitions. [2023-11-29 01:31:52,808 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 557 [2023-11-29 01:31:52,808 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 557 [2023-11-29 01:31:52,808 INFO L73 IsDeterministic]: Start isDeterministic. Operand 648 states and 742 transitions. [2023-11-29 01:31:52,808 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:31:52,808 INFO L218 hiAutomatonCegarLoop]: Abstraction has 648 states and 742 transitions. [2023-11-29 01:31:52,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 648 states and 742 transitions. [2023-11-29 01:31:52,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 648 to 372. [2023-11-29 01:31:52,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 372 states, 372 states have (on average 1.1290322580645162) internal successors, (420), 371 states have internal predecessors, (420), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:31:52,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 420 transitions. [2023-11-29 01:31:52,813 INFO L240 hiAutomatonCegarLoop]: Abstraction has 372 states and 420 transitions. [2023-11-29 01:31:52,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2023-11-29 01:31:52,814 INFO L428 stractBuchiCegarLoop]: Abstraction has 372 states and 420 transitions. [2023-11-29 01:31:52,814 INFO L335 stractBuchiCegarLoop]: ======== Iteration 47 ============ [2023-11-29 01:31:52,814 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 372 states and 420 transitions. [2023-11-29 01:31:52,815 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:31:52,815 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:31:52,815 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:31:52,816 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 45, 44, 44, 1, 1, 1, 1] [2023-11-29 01:31:52,817 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:31:52,817 INFO L748 eck$LassoCheckResult]: Stem: 72421#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 72405#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 72406#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72422#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72423#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72409#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72410#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72514#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72513#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72512#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72511#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72510#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72509#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72508#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72507#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72506#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72505#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72504#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72503#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72502#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72501#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72500#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72499#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72498#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72497#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72496#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72495#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72494#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72493#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72492#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72491#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72490#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72489#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72488#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72487#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72486#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72485#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72484#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72483#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72482#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72481#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72480#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72479#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72478#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72477#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72476#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72475#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72474#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72473#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72472#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72471#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72470#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72469#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72468#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72467#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72466#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72465#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72464#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72463#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72462#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72461#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72460#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72459#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72458#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72457#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72456#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72455#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72454#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72453#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72452#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72451#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72450#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72449#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72448#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72447#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72446#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72445#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72444#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72443#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72442#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72441#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72440#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72439#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72438#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72437#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72436#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72435#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72434#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72433#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72432#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72431#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72428#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72427#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 72411#L27-4 main_~i~0#1 := 0; 72412#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72418#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72404#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72415#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72420#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72767#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72766#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72764#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72761#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72760#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72758#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72755#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72754#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72752#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72749#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72748#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72746#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72743#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72742#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72740#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72737#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72736#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72734#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72731#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72730#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72728#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72725#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72724#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72722#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72719#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72718#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72716#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72713#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72712#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72710#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72707#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72706#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72704#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72701#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72700#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72698#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72695#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72694#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72692#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72689#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72688#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72686#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72683#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72682#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72680#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72677#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72676#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72674#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72671#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72670#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72668#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72665#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72664#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72662#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72659#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72658#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72656#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72653#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72652#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72650#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72647#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72646#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72644#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72641#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72640#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72638#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72635#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72634#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72632#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72629#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72628#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72626#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72623#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72622#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72620#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72617#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72614#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72610#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72608#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72602#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72599#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72598#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72596#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72593#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72592#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72590#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72587#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72586#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72584#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72581#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72580#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72578#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72575#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72574#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72572#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72569#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72568#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72566#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72563#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72562#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72560#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72557#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72556#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72554#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72551#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72550#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72548#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72545#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72544#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72542#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72539#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72538#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72536#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72533#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72532#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72530#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72527#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72526#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72524#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72522#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72521#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72518#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72516#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72515#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72426#L34 [2023-11-29 01:31:52,817 INFO L750 eck$LassoCheckResult]: Loop: 72426#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72429#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72425#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72426#L34 [2023-11-29 01:31:52,817 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:31:52,817 INFO L85 PathProgramCache]: Analyzing trace with hash -331721901, now seen corresponding path program 88 times [2023-11-29 01:31:52,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:31:52,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457890808] [2023-11-29 01:31:52,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:31:52,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:31:53,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:31:53,276 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:31:53,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:31:53,795 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:31:53,796 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:31:53,796 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 46 times [2023-11-29 01:31:53,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:31:53,796 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504905269] [2023-11-29 01:31:53,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:31:53,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:31:53,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:31:53,804 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:31:53,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:31:53,808 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:31:53,808 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:31:53,809 INFO L85 PathProgramCache]: Analyzing trace with hash 392642115, now seen corresponding path program 89 times [2023-11-29 01:31:53,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:31:53,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791284536] [2023-11-29 01:31:53,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:31:53,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:31:53,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:31:58,402 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 2882 proven. 2158 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:31:58,402 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:31:58,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791284536] [2023-11-29 01:31:58,402 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1791284536] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:31:58,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1592097448] [2023-11-29 01:31:58,402 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 01:31:58,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:31:58,403 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:31:58,427 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:31:58,428 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2023-11-29 01:37:03,574 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 46 check-sat command(s) [2023-11-29 01:37:03,574 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 01:37:03,616 INFO L262 TraceCheckSpWp]: Trace formula consists of 986 conjuncts, 94 conjunts are in the unsatisfiable core [2023-11-29 01:37:03,648 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:37:06,908 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 3015 proven. 2025 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:37:06,908 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:37:09,433 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 3015 proven. 2025 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:37:09,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1592097448] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:37:09,434 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:37:09,434 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [94, 94, 94] total 142 [2023-11-29 01:37:09,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347609521] [2023-11-29 01:37:09,434 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:37:09,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:37:09,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 143 interpolants. [2023-11-29 01:37:09,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4611, Invalid=15695, Unknown=0, NotChecked=0, Total=20306 [2023-11-29 01:37:09,476 INFO L87 Difference]: Start difference. First operand 372 states and 420 transitions. cyclomatic complexity: 51 Second operand has 143 states, 142 states have (on average 2.6338028169014085) internal successors, (374), 143 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:37:12,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:37:12,978 INFO L93 Difference]: Finished difference Result 1207 states and 1394 transitions. [2023-11-29 01:37:12,979 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1207 states and 1394 transitions. [2023-11-29 01:37:12,982 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:37:12,986 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1207 states to 662 states and 758 transitions. [2023-11-29 01:37:12,986 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 569 [2023-11-29 01:37:12,987 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 569 [2023-11-29 01:37:12,987 INFO L73 IsDeterministic]: Start isDeterministic. Operand 662 states and 758 transitions. [2023-11-29 01:37:12,987 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:37:12,988 INFO L218 hiAutomatonCegarLoop]: Abstraction has 662 states and 758 transitions. [2023-11-29 01:37:12,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states and 758 transitions. [2023-11-29 01:37:12,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 380. [2023-11-29 01:37:12,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 380 states have (on average 1.1289473684210527) internal successors, (429), 379 states have internal predecessors, (429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:37:12,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 429 transitions. [2023-11-29 01:37:12,994 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 429 transitions. [2023-11-29 01:37:12,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2023-11-29 01:37:12,998 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 429 transitions. [2023-11-29 01:37:12,998 INFO L335 stractBuchiCegarLoop]: ======== Iteration 48 ============ [2023-11-29 01:37:12,999 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 429 transitions. [2023-11-29 01:37:12,999 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:37:13,000 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:37:13,000 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:37:13,001 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 46, 45, 45, 1, 1, 1, 1] [2023-11-29 01:37:13,001 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:37:13,001 INFO L748 eck$LassoCheckResult]: Stem: 75614#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 75598#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 75599#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75615#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75616#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75602#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75603#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75709#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75708#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75707#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75706#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75705#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75704#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75703#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75702#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75701#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75700#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75699#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75698#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75697#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75696#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75695#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75694#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75693#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75692#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75691#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75690#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75689#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75688#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75687#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75686#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75685#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75684#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75683#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75682#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75681#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75680#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75679#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75678#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75677#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75676#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75675#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75674#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75673#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75672#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75671#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75670#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75669#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75668#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75667#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75666#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75665#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75664#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75663#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75662#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75661#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75660#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75659#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75658#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75657#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75656#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75655#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75654#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75653#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75652#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75651#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75650#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75649#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75648#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75647#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75646#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75645#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75644#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75643#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75642#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75641#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75640#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75639#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75638#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75637#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75636#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75635#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75634#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75633#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75632#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75631#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75630#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75629#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75628#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75627#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75626#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75625#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75624#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75621#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75620#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 75604#L27-4 main_~i~0#1 := 0; 75605#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75611#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75597#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75608#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75613#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75968#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75967#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75965#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75962#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75961#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75959#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75956#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75953#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75950#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75949#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75947#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75944#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75943#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75941#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75938#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75937#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75935#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75932#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75931#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75929#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75926#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75925#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75923#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75920#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75919#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75917#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75914#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75913#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75911#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75908#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75907#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75905#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75902#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75901#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75899#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75896#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75895#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75893#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75890#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75889#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75887#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75884#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75883#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75881#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75878#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75877#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75875#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75872#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75871#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75869#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75866#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75865#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75863#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75860#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75859#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75857#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75854#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75853#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75851#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75848#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75847#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75845#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75842#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75841#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75839#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75836#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75835#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75833#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75830#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75829#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75827#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75824#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75823#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75821#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75818#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75817#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75815#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75812#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75811#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75809#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75806#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75805#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75803#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75800#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75799#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75797#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75794#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75793#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75791#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75788#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75787#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75785#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75782#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75781#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75779#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75776#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75775#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75773#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75770#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75769#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75767#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75764#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75763#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75761#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75758#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75757#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75755#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75752#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75751#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75749#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75746#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75745#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75743#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75740#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75739#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75737#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75734#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75733#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75731#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75728#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75727#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75725#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75722#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75721#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75719#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75717#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75716#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75713#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75711#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75710#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75619#L34 [2023-11-29 01:37:13,001 INFO L750 eck$LassoCheckResult]: Loop: 75619#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75622#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75618#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75619#L34 [2023-11-29 01:37:13,001 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:37:13,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1496945093, now seen corresponding path program 90 times [2023-11-29 01:37:13,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:37:13,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379752937] [2023-11-29 01:37:13,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:37:13,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:37:13,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:13,491 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:37:13,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:13,965 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:37:13,965 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:37:13,965 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 47 times [2023-11-29 01:37:13,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:37:13,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936311361] [2023-11-29 01:37:13,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:37:13,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:37:13,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:13,972 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:37:13,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:13,976 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:37:13,977 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:37:13,977 INFO L85 PathProgramCache]: Analyzing trace with hash 845877905, now seen corresponding path program 91 times [2023-11-29 01:37:13,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:37:13,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [645950794] [2023-11-29 01:37:13,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:37:13,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:37:14,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:37:19,085 INFO L134 CoverageAnalysis]: Checked inductivity of 5267 backedges. 3015 proven. 2252 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:37:19,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:37:19,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [645950794] [2023-11-29 01:37:19,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [645950794] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:37:19,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1724266336] [2023-11-29 01:37:19,086 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 01:37:19,086 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:37:19,086 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:37:19,087 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:37:19,088 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2023-11-29 01:37:19,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:37:19,633 INFO L262 TraceCheckSpWp]: Trace formula consists of 1007 conjuncts, 96 conjunts are in the unsatisfiable core [2023-11-29 01:37:19,637 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 01:37:23,058 INFO L134 CoverageAnalysis]: Checked inductivity of 5267 backedges. 3151 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:37:23,058 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 01:37:25,649 INFO L134 CoverageAnalysis]: Checked inductivity of 5267 backedges. 3151 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:37:25,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1724266336] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 01:37:25,649 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 01:37:25,650 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 145 [2023-11-29 01:37:25,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1192217911] [2023-11-29 01:37:25,650 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 01:37:25,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 01:37:25,691 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 146 interpolants. [2023-11-29 01:37:25,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4805, Invalid=16365, Unknown=0, NotChecked=0, Total=21170 [2023-11-29 01:37:25,693 INFO L87 Difference]: Start difference. First operand 380 states and 429 transitions. cyclomatic complexity: 52 Second operand has 146 states, 145 states have (on average 2.6344827586206896) internal successors, (382), 146 states have internal predecessors, (382), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:37:28,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 01:37:28,975 INFO L93 Difference]: Finished difference Result 1233 states and 1424 transitions. [2023-11-29 01:37:28,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1233 states and 1424 transitions. [2023-11-29 01:37:28,978 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:37:28,981 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1233 states to 676 states and 774 transitions. [2023-11-29 01:37:28,981 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 581 [2023-11-29 01:37:28,981 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 581 [2023-11-29 01:37:28,981 INFO L73 IsDeterministic]: Start isDeterministic. Operand 676 states and 774 transitions. [2023-11-29 01:37:28,981 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 01:37:28,982 INFO L218 hiAutomatonCegarLoop]: Abstraction has 676 states and 774 transitions. [2023-11-29 01:37:28,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 676 states and 774 transitions. [2023-11-29 01:37:28,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 676 to 388. [2023-11-29 01:37:28,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 388 states, 388 states have (on average 1.1288659793814433) internal successors, (438), 387 states have internal predecessors, (438), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 01:37:28,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 388 states to 388 states and 438 transitions. [2023-11-29 01:37:28,985 INFO L240 hiAutomatonCegarLoop]: Abstraction has 388 states and 438 transitions. [2023-11-29 01:37:28,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2023-11-29 01:37:28,986 INFO L428 stractBuchiCegarLoop]: Abstraction has 388 states and 438 transitions. [2023-11-29 01:37:28,986 INFO L335 stractBuchiCegarLoop]: ======== Iteration 49 ============ [2023-11-29 01:37:28,986 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 388 states and 438 transitions. [2023-11-29 01:37:28,987 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2023-11-29 01:37:28,987 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 01:37:28,987 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 01:37:28,989 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 47, 47, 46, 46, 1, 1, 1, 1] [2023-11-29 01:37:28,989 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 01:37:28,989 INFO L748 eck$LassoCheckResult]: Stem: 78876#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 78860#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;havoc main_#t~nondet1#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 78861#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78877#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78878#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78864#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78865#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78973#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78972#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78971#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78970#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78969#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78968#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78967#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78966#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78965#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78964#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78963#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78962#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78961#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78960#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78959#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78958#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78957#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78956#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78955#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78954#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78953#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78952#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78951#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78950#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78949#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78948#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78947#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78946#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78945#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78944#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78943#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78942#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78941#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78940#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78939#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78938#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78937#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78936#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78935#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78934#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78933#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78932#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78931#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78930#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78929#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78928#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78927#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78926#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78925#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78924#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78923#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78922#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78921#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78920#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78919#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78918#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78917#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78916#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78915#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78914#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78913#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78912#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78911#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78910#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78909#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78908#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78907#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78906#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78905#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78904#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78903#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78902#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78901#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78900#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78899#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78898#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78897#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78896#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78895#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78894#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78893#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78892#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78891#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78890#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78889#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78888#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78887#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78886#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78883#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78882#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 78866#L27-4 main_~i~0#1 := 0; 78867#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78873#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78859#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78870#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78875#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79238#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79237#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79235#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79232#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79231#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79229#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79226#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79225#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79223#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79220#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79219#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79217#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79214#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79213#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79211#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79208#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79207#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79205#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79202#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79201#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79199#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79196#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79195#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79193#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79190#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79189#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79187#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79184#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79183#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79181#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79178#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79177#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79175#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79172#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79171#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79169#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79166#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79165#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79163#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79160#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79159#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79157#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79154#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79153#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79151#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79148#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79147#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79145#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79142#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79141#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79139#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79136#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79135#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79133#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79130#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79129#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79127#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79124#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79123#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79121#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79118#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79117#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79115#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79112#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79111#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79109#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79106#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79105#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79103#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79100#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79099#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79097#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79094#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79093#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79091#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79088#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79087#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79085#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79082#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79081#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79079#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79076#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79075#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79073#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79070#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79069#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79067#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79064#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79063#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79061#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79058#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79057#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79055#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79052#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79051#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79049#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79046#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79045#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79043#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79040#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79039#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79037#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79034#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79033#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79031#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79028#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79027#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79025#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79022#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79021#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79019#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79016#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79015#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79013#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79010#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79009#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79007#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79004#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79003#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79001#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78998#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78997#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78995#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78992#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78991#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78989#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78986#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78985#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78983#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78981#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78980#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78977#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78975#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78974#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78881#L34 [2023-11-29 01:37:28,989 INFO L750 eck$LassoCheckResult]: Loop: 78881#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78884#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78880#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int#1(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78881#L34 [2023-11-29 01:37:28,989 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:37:28,990 INFO L85 PathProgramCache]: Analyzing trace with hash -1008033713, now seen corresponding path program 92 times [2023-11-29 01:37:28,990 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:37:28,990 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3244927] [2023-11-29 01:37:28,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:37:28,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:37:29,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:29,535 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:37:29,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:29,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:37:29,959 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:37:29,959 INFO L85 PathProgramCache]: Analyzing trace with hash 76501, now seen corresponding path program 48 times [2023-11-29 01:37:29,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:37:29,959 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [992085166] [2023-11-29 01:37:29,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:37:29,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:37:29,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:29,967 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 01:37:29,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 01:37:29,971 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 01:37:29,971 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 01:37:29,971 INFO L85 PathProgramCache]: Analyzing trace with hash 79036359, now seen corresponding path program 93 times [2023-11-29 01:37:29,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 01:37:29,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939996240] [2023-11-29 01:37:29,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 01:37:29,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 01:37:30,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 01:37:34,926 INFO L134 CoverageAnalysis]: Checked inductivity of 5499 backedges. 3151 proven. 2348 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 01:37:34,926 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 01:37:34,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939996240] [2023-11-29 01:37:34,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [939996240] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 01:37:34,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [803508905] [2023-11-29 01:37:34,927 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 01:37:34,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 01:37:34,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 01:37:34,928 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 01:37:34,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c24f7915-8590-49e2-8be4-a21ea18cb619/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process