./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 03:53:56,232 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 03:53:56,297 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-29 03:53:56,302 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 03:53:56,303 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 03:53:56,328 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 03:53:56,328 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 03:53:56,329 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 03:53:56,329 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 03:53:56,330 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 03:53:56,331 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 03:53:56,331 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 03:53:56,332 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 03:53:56,332 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-29 03:53:56,333 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-29 03:53:56,333 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-29 03:53:56,334 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-29 03:53:56,334 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-29 03:53:56,335 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-29 03:53:56,335 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 03:53:56,336 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-29 03:53:56,336 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-29 03:53:56,337 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 03:53:56,337 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-29 03:53:56,338 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 03:53:56,338 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-29 03:53:56,338 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-29 03:53:56,339 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-29 03:53:56,339 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-29 03:53:56,340 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-29 03:53:56,340 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 03:53:56,340 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-29 03:53:56,341 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 03:53:56,341 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 03:53:56,342 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 03:53:56,342 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 03:53:56,342 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 03:53:56,343 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-29 03:53:56,343 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 [2023-11-29 03:53:56,555 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 03:53:56,575 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 03:53:56,578 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 03:53:56,579 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 03:53:56,579 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 03:53:56,581 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2023-11-29 03:53:59,285 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 03:53:59,503 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 03:53:59,504 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2023-11-29 03:53:59,516 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/data/7c4d09d14/c94e48683d154a9dbd159efd96fe1181/FLAG44692de64 [2023-11-29 03:53:59,526 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/data/7c4d09d14/c94e48683d154a9dbd159efd96fe1181 [2023-11-29 03:53:59,528 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 03:53:59,529 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 03:53:59,530 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 03:53:59,530 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 03:53:59,534 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 03:53:59,535 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:53:59,536 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@123c0be1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59, skipping insertion in model container [2023-11-29 03:53:59,536 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:53:59,581 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 03:53:59,862 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 03:53:59,875 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 03:53:59,923 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 03:53:59,960 INFO L206 MainTranslator]: Completed translation [2023-11-29 03:53:59,960 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59 WrapperNode [2023-11-29 03:53:59,960 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 03:53:59,961 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 03:53:59,961 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 03:53:59,962 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 03:53:59,969 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:53:59,985 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,024 INFO L138 Inliner]: procedures = 139, calls = 60, calls flagged for inlining = 29, calls inlined = 42, statements flattened = 446 [2023-11-29 03:54:00,024 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 03:54:00,025 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 03:54:00,025 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 03:54:00,025 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 03:54:00,038 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,038 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,046 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,094 INFO L175 MemorySlicer]: Split 51 memory accesses to 2 slices as follows [2, 49]. 96 percent of accesses are in the largest equivalence class. The 4 initializations are split as follows [2, 2]. The 14 writes are split as follows [0, 14]. [2023-11-29 03:54:00,094 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,094 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,117 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,123 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,126 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,130 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,135 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 03:54:00,136 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 03:54:00,136 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 03:54:00,136 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 03:54:00,137 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (1/1) ... [2023-11-29 03:54:00,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-29 03:54:00,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 03:54:00,166 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-29 03:54:00,172 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-29 03:54:00,203 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-29 03:54:00,204 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-29 03:54:00,204 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-29 03:54:00,204 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-29 03:54:00,204 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-29 03:54:00,204 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-29 03:54:00,204 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 03:54:00,205 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#0 [2023-11-29 03:54:00,205 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#1 [2023-11-29 03:54:00,205 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-29 03:54:00,205 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-29 03:54:00,205 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 03:54:00,205 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 03:54:00,344 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 03:54:00,346 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 03:54:00,872 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 03:54:00,883 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 03:54:00,883 INFO L309 CfgBuilder]: Removed 8 assume(true) statements. [2023-11-29 03:54:00,885 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 03:54:00 BoogieIcfgContainer [2023-11-29 03:54:00,885 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 03:54:00,886 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-29 03:54:00,886 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-29 03:54:00,889 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-29 03:54:00,890 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 03:54:00,890 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.11 03:53:59" (1/3) ... [2023-11-29 03:54:00,891 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@39519a24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 03:54:00, skipping insertion in model container [2023-11-29 03:54:00,891 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 03:54:00,891 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 03:53:59" (2/3) ... [2023-11-29 03:54:00,892 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@39519a24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.11 03:54:00, skipping insertion in model container [2023-11-29 03:54:00,892 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-29 03:54:00,892 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 03:54:00" (3/3) ... [2023-11-29 03:54:00,894 INFO L332 chiAutomizerObserver]: Analyzing ICFG test_mutex_double_lock.i [2023-11-29 03:54:00,941 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-29 03:54:00,941 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-29 03:54:00,941 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-29 03:54:00,942 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-29 03:54:00,942 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-29 03:54:00,942 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-29 03:54:00,942 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-29 03:54:00,942 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-29 03:54:00,946 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 95 states, 94 states have (on average 1.425531914893617) internal successors, (134), 94 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:00,968 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2023-11-29 03:54:00,968 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 03:54:00,968 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 03:54:00,973 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 03:54:00,973 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 03:54:00,973 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-29 03:54:00,974 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 95 states, 94 states have (on average 1.425531914893617) internal successors, (134), 94 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:00,981 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2023-11-29 03:54:00,981 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 03:54:00,981 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 03:54:00,982 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 03:54:00,982 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 03:54:00,989 INFO L748 eck$LassoCheckResult]: Stem: 42#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 62#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 13#L666true assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 23#L565true assume !(0 == assume_abort_if_not_~cond#1); 15#L564true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 90#ldv_successful_malloc_returnLabel#1true foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 88#L565-2true assume !(0 == assume_abort_if_not_~cond#1); 3#L564-1true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 45#ldv_successful_malloc_returnLabel#2true foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 75#L655-3true [2023-11-29 03:54:00,989 INFO L750 eck$LassoCheckResult]: Loop: 75#L655-3true assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 38#L656true assume !(ldv_is_in_set_#t~mem30#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem30#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset; 57#L655-2true call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset;havoc ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset; 75#L655-3true [2023-11-29 03:54:00,993 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:00,993 INFO L85 PathProgramCache]: Analyzing trace with hash -1482586390, now seen corresponding path program 1 times [2023-11-29 03:54:01,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:01,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86339228] [2023-11-29 03:54:01,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:01,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:01,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:01,125 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 03:54:01,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:01,184 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 03:54:01,187 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:01,187 INFO L85 PathProgramCache]: Analyzing trace with hash 59743, now seen corresponding path program 1 times [2023-11-29 03:54:01,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:01,188 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869155449] [2023-11-29 03:54:01,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:01,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:01,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:01,200 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 03:54:01,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:01,210 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 03:54:01,211 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:01,211 INFO L85 PathProgramCache]: Analyzing trace with hash 1712557526, now seen corresponding path program 1 times [2023-11-29 03:54:01,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:01,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398948432] [2023-11-29 03:54:01,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:01,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:01,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 03:54:01,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 03:54:01,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 03:54:01,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1398948432] [2023-11-29 03:54:01,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1398948432] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 03:54:01,470 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 03:54:01,471 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-29 03:54:01,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510370154] [2023-11-29 03:54:01,472 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 03:54:01,620 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 03:54:01,651 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-29 03:54:01,652 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-29 03:54:01,654 INFO L87 Difference]: Start difference. First operand has 95 states, 94 states have (on average 1.425531914893617) internal successors, (134), 94 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:01,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 03:54:01,971 INFO L93 Difference]: Finished difference Result 134 states and 151 transitions. [2023-11-29 03:54:01,973 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 134 states and 151 transitions. [2023-11-29 03:54:01,977 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2023-11-29 03:54:01,982 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 134 states to 105 states and 122 transitions. [2023-11-29 03:54:01,983 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 105 [2023-11-29 03:54:01,984 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 105 [2023-11-29 03:54:01,984 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 122 transitions. [2023-11-29 03:54:01,985 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 03:54:01,985 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 122 transitions. [2023-11-29 03:54:02,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 122 transitions. [2023-11-29 03:54:02,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 95. [2023-11-29 03:54:02,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.168421052631579) internal successors, (111), 94 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:02,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 111 transitions. [2023-11-29 03:54:02,016 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 111 transitions. [2023-11-29 03:54:02,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 03:54:02,020 INFO L428 stractBuchiCegarLoop]: Abstraction has 95 states and 111 transitions. [2023-11-29 03:54:02,020 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-29 03:54:02,021 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 111 transitions. [2023-11-29 03:54:02,022 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 25 [2023-11-29 03:54:02,022 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 03:54:02,022 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 03:54:02,023 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 03:54:02,023 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 03:54:02,024 INFO L748 eck$LassoCheckResult]: Stem: 289#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 290#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 260#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 261#L565 assume !(0 == assume_abort_if_not_~cond#1); 262#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 263#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 322#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 243#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 244#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 291#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 301#L655-4 ldv_is_in_set_#res#1 := 0; 292#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 293#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 311#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 294#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 277#L655-9 ldv_is_in_set_#res#1 := 0; 278#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 280#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 279#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 264#L564-2 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 247#ldv_successful_malloc_returnLabel#3 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 248#L592 havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 265#L606 havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 266#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 334#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 246#L655-13 [2023-11-29 03:54:02,024 INFO L750 eck$LassoCheckResult]: Loop: 246#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 309#L656-2 assume !(ldv_is_in_set_#t~mem30#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem30#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset; 245#L655-12 call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset;havoc ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset; 246#L655-13 [2023-11-29 03:54:02,025 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:02,025 INFO L85 PathProgramCache]: Analyzing trace with hash 1979206134, now seen corresponding path program 1 times [2023-11-29 03:54:02,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:02,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224698556] [2023-11-29 03:54:02,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:02,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:02,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:02,120 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 03:54:02,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:02,165 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 03:54:02,166 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:02,166 INFO L85 PathProgramCache]: Analyzing trace with hash 137197, now seen corresponding path program 1 times [2023-11-29 03:54:02,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:02,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799611504] [2023-11-29 03:54:02,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:02,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:02,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:02,171 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 03:54:02,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:02,176 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 03:54:02,176 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:02,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1219005912, now seen corresponding path program 1 times [2023-11-29 03:54:02,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:02,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180460809] [2023-11-29 03:54:02,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:02,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:02,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 03:54:04,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 03:54:04,229 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 03:54:04,229 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1180460809] [2023-11-29 03:54:04,229 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1180460809] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 03:54:04,230 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 03:54:04,230 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2023-11-29 03:54:04,230 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106467004] [2023-11-29 03:54:04,230 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 03:54:04,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 03:54:04,337 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2023-11-29 03:54:04,337 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2023-11-29 03:54:04,338 INFO L87 Difference]: Start difference. First operand 95 states and 111 transitions. cyclomatic complexity: 23 Second operand has 12 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:05,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 03:54:05,247 INFO L93 Difference]: Finished difference Result 129 states and 151 transitions. [2023-11-29 03:54:05,247 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 129 states and 151 transitions. [2023-11-29 03:54:05,249 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 34 [2023-11-29 03:54:05,251 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 129 states to 129 states and 151 transitions. [2023-11-29 03:54:05,251 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 129 [2023-11-29 03:54:05,252 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 129 [2023-11-29 03:54:05,252 INFO L73 IsDeterministic]: Start isDeterministic. Operand 129 states and 151 transitions. [2023-11-29 03:54:05,253 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 03:54:05,253 INFO L218 hiAutomatonCegarLoop]: Abstraction has 129 states and 151 transitions. [2023-11-29 03:54:05,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states and 151 transitions. [2023-11-29 03:54:05,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 115. [2023-11-29 03:54:05,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 115 states have (on average 1.173913043478261) internal successors, (135), 114 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:05,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 135 transitions. [2023-11-29 03:54:05,261 INFO L240 hiAutomatonCegarLoop]: Abstraction has 115 states and 135 transitions. [2023-11-29 03:54:05,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2023-11-29 03:54:05,262 INFO L428 stractBuchiCegarLoop]: Abstraction has 115 states and 135 transitions. [2023-11-29 03:54:05,262 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-29 03:54:05,262 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 115 states and 135 transitions. [2023-11-29 03:54:05,263 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2023-11-29 03:54:05,264 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 03:54:05,264 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 03:54:05,265 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 03:54:05,265 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 03:54:05,265 INFO L748 eck$LassoCheckResult]: Stem: 546#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 547#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 517#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 518#L565 assume !(0 == assume_abort_if_not_~cond#1); 519#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 520#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 581#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 502#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 503#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 548#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 559#L655-4 ldv_is_in_set_#res#1 := 0; 549#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 550#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 568#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 551#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 534#L655-9 ldv_is_in_set_#res#1 := 0; 535#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 537#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 536#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 521#L564-2 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 504#ldv_successful_malloc_returnLabel#3 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 505#L592 havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 522#L606 havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 523#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 587#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 585#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 586#L655-14 ldv_is_in_set_#res#1 := 0; 567#ldv_is_in_set_returnLabel#3 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 602#L669-3 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 600#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 509#L655-18 [2023-11-29 03:54:05,265 INFO L750 eck$LassoCheckResult]: Loop: 509#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 574#L656-3 assume !(ldv_is_in_set_#t~mem30#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem30#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset; 508#L655-17 call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset;havoc ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset; 509#L655-18 [2023-11-29 03:54:05,266 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:05,266 INFO L85 PathProgramCache]: Analyzing trace with hash -1063048648, now seen corresponding path program 1 times [2023-11-29 03:54:05,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:05,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913057566] [2023-11-29 03:54:05,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:05,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:05,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 03:54:05,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 03:54:05,712 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 03:54:05,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913057566] [2023-11-29 03:54:05,712 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913057566] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 03:54:05,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 03:54:05,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2023-11-29 03:54:05,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204991582] [2023-11-29 03:54:05,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 03:54:05,714 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 03:54:05,714 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:05,714 INFO L85 PathProgramCache]: Analyzing trace with hash 171952, now seen corresponding path program 1 times [2023-11-29 03:54:05,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:05,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [77824193] [2023-11-29 03:54:05,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:05,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:05,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:05,720 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 03:54:05,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:05,724 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 03:54:05,830 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 03:54:05,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2023-11-29 03:54:05,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2023-11-29 03:54:05,831 INFO L87 Difference]: Start difference. First operand 115 states and 135 transitions. cyclomatic complexity: 28 Second operand has 9 states, 9 states have (on average 3.3333333333333335) internal successors, (30), 9 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:06,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 03:54:06,713 INFO L93 Difference]: Finished difference Result 153 states and 181 transitions. [2023-11-29 03:54:06,714 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 153 states and 181 transitions. [2023-11-29 03:54:06,715 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 40 [2023-11-29 03:54:06,717 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 153 states to 153 states and 181 transitions. [2023-11-29 03:54:06,717 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 153 [2023-11-29 03:54:06,718 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 153 [2023-11-29 03:54:06,718 INFO L73 IsDeterministic]: Start isDeterministic. Operand 153 states and 181 transitions. [2023-11-29 03:54:06,719 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 03:54:06,719 INFO L218 hiAutomatonCegarLoop]: Abstraction has 153 states and 181 transitions. [2023-11-29 03:54:06,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states and 181 transitions. [2023-11-29 03:54:06,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 123. [2023-11-29 03:54:06,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 123 states have (on average 1.1626016260162602) internal successors, (143), 122 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:06,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 143 transitions. [2023-11-29 03:54:06,727 INFO L240 hiAutomatonCegarLoop]: Abstraction has 123 states and 143 transitions. [2023-11-29 03:54:06,728 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2023-11-29 03:54:06,729 INFO L428 stractBuchiCegarLoop]: Abstraction has 123 states and 143 transitions. [2023-11-29 03:54:06,729 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-29 03:54:06,729 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 123 states and 143 transitions. [2023-11-29 03:54:06,730 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 31 [2023-11-29 03:54:06,730 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 03:54:06,730 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 03:54:06,731 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 03:54:06,731 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 03:54:06,732 INFO L748 eck$LassoCheckResult]: Stem: 852#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 853#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 821#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 822#L565 assume !(0 == assume_abort_if_not_~cond#1); 823#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 824#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 890#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 806#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 807#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 854#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 867#L655-4 ldv_is_in_set_#res#1 := 0; 855#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 856#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 877#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 857#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 837#L655-9 ldv_is_in_set_#res#1 := 0; 838#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 840#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 839#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 825#L564-2 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 808#ldv_successful_malloc_returnLabel#3 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 809#L592 havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 826#L606 havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 827#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 836#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 810#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 811#L656-2 assume ldv_is_in_set_#t~mem30#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem30#1.offset == ldv_is_in_set_~e#1.offset;havoc ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset;ldv_is_in_set_#res#1 := 1; 874#ldv_is_in_set_returnLabel#3 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 844#L669-3 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 845#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 868#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 869#L656-3 [2023-11-29 03:54:06,732 INFO L750 eck$LassoCheckResult]: Loop: 869#L656-3 assume !(ldv_is_in_set_#t~mem30#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem30#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset; 814#L655-17 call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset;havoc ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset; 815#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 869#L656-3 [2023-11-29 03:54:06,732 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:06,732 INFO L85 PathProgramCache]: Analyzing trace with hash 1455100557, now seen corresponding path program 1 times [2023-11-29 03:54:06,732 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:06,732 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923656083] [2023-11-29 03:54:06,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:06,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:06,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 03:54:06,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 03:54:06,797 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 03:54:06,797 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923656083] [2023-11-29 03:54:06,797 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923656083] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 03:54:06,797 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 03:54:06,797 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-29 03:54:06,797 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [502144590] [2023-11-29 03:54:06,798 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 03:54:06,798 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 03:54:06,798 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:06,798 INFO L85 PathProgramCache]: Analyzing trace with hash 176812, now seen corresponding path program 2 times [2023-11-29 03:54:06,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:06,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198386423] [2023-11-29 03:54:06,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:06,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:06,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:06,803 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 03:54:06,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:06,806 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 03:54:06,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 03:54:06,928 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-29 03:54:06,928 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-29 03:54:06,928 INFO L87 Difference]: Start difference. First operand 123 states and 143 transitions. cyclomatic complexity: 29 Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 4 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:06,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 03:54:06,968 INFO L93 Difference]: Finished difference Result 117 states and 134 transitions. [2023-11-29 03:54:06,968 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 134 transitions. [2023-11-29 03:54:06,969 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 35 [2023-11-29 03:54:06,970 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 106 states and 123 transitions. [2023-11-29 03:54:06,970 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 106 [2023-11-29 03:54:06,971 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 106 [2023-11-29 03:54:06,971 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 123 transitions. [2023-11-29 03:54:06,971 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 03:54:06,971 INFO L218 hiAutomatonCegarLoop]: Abstraction has 106 states and 123 transitions. [2023-11-29 03:54:06,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 123 transitions. [2023-11-29 03:54:06,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 83. [2023-11-29 03:54:06,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.144578313253012) internal successors, (95), 82 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:06,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 95 transitions. [2023-11-29 03:54:06,976 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 95 transitions. [2023-11-29 03:54:06,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 03:54:06,977 INFO L428 stractBuchiCegarLoop]: Abstraction has 83 states and 95 transitions. [2023-11-29 03:54:06,977 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-29 03:54:06,977 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 95 transitions. [2023-11-29 03:54:06,978 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 22 [2023-11-29 03:54:06,978 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-29 03:54:06,978 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-29 03:54:06,979 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 03:54:06,979 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-11-29 03:54:06,980 INFO L748 eck$LassoCheckResult]: Stem: 1091#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 1092#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 1066#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1067#L565 assume !(0 == assume_abort_if_not_~cond#1); 1068#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1069#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1121#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 1055#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1056#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 1093#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1105#L655-4 ldv_is_in_set_#res#1 := 0; 1094#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1095#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 1111#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 1096#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1080#L655-9 ldv_is_in_set_#res#1 := 0; 1081#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1082#L636 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1078#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 1079#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 1057#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1058#L655-14 ldv_is_in_set_#res#1 := 0; 1120#ldv_is_in_set_returnLabel#3 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1083#L669-3 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 1074#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 1075#L655-18 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1106#L655-19 ldv_is_in_set_#res#1 := 0; 1114#ldv_is_in_set_returnLabel#4 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1099#L636-2 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1100#L635-1 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 1128#L668-1 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset := foo_~m2~0#1.base, foo_~m2~0#1.offset;havoc mutex_unlock_#t~ret33#1, mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset;mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset := mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset;havoc ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset; 1112#L655-23 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1113#L655-24 ldv_is_in_set_#res#1 := 0; 1134#ldv_is_in_set_returnLabel#5 mutex_unlock_#t~ret33#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~nondet27#1.base, ldv_is_in_set_#t~nondet27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem30#1.base, ldv_is_in_set_#t~mem30#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~nondet29#1.base, ldv_is_in_set_#t~nondet29#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1133#L673 assume !(0 == mutex_unlock_#t~ret33#1);havoc mutex_unlock_#t~ret33#1; 1131#L673-2 assume { :begin_inline_ldv_set_del } true;ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset, ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset, ldv_set_del_#t~nondet20#1.base, ldv_set_del_#t~nondet20#1.offset, ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset, ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset, ldv_set_del_#t~nondet22#1.base, ldv_set_del_#t~nondet22#1.offset, ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset, ldv_set_del_#t~mem25#1.base, ldv_set_del_#t~mem25#1.offset, ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset, ldv_set_del_#t~nondet24#1.base, ldv_set_del_#t~nondet24#1.offset, ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset, ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset, ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset := ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset;ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset := ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset;havoc ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset;havoc ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset := read~$Pointer$#1(ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, 4);ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset := ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;ldv_set_del_#t~nondet20#1.base, ldv_set_del_#t~nondet20#1.offset := ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset - 4;havoc ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset;ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_#t~nondet20#1.base, ldv_set_del_#t~nondet20#1.offset;havoc ldv_set_del_#t~nondet20#1.base, ldv_set_del_#t~nondet20#1.offset;call ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset := read~$Pointer$#1(ldv_set_del_~m~0#1.base, 4 + ldv_set_del_~m~0#1.offset, 4);ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset := ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;havoc ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;ldv_set_del_#t~nondet22#1.base, ldv_set_del_#t~nondet22#1.offset := ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset - 4;havoc ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_#t~nondet22#1.base, ldv_set_del_#t~nondet22#1.offset;havoc ldv_set_del_#t~nondet22#1.base, ldv_set_del_#t~nondet22#1.offset; 1129#L646-3 [2023-11-29 03:54:06,980 INFO L750 eck$LassoCheckResult]: Loop: 1129#L646-3 assume !!(ldv_set_del_~m~0#1.base != ldv_set_del_~s#1.base || 4 + ldv_set_del_~m~0#1.offset != ldv_set_del_~s#1.offset);call ldv_set_del_#t~mem25#1.base, ldv_set_del_#t~mem25#1.offset := read~$Pointer$#1(ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, 4); 1130#L647 assume !(ldv_set_del_#t~mem25#1.base == ldv_set_del_~e#1.base && ldv_set_del_#t~mem25#1.offset == ldv_set_del_~e#1.offset);havoc ldv_set_del_#t~mem25#1.base, ldv_set_del_#t~mem25#1.offset; 1132#L646-2 ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset := read~$Pointer$#1(ldv_set_del_~n~0#1.base, 4 + ldv_set_del_~n~0#1.offset, 4);ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset := ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset;havoc ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset;ldv_set_del_#t~nondet24#1.base, ldv_set_del_#t~nondet24#1.offset := ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset - 4;havoc ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_#t~nondet24#1.base, ldv_set_del_#t~nondet24#1.offset;havoc ldv_set_del_#t~nondet24#1.base, ldv_set_del_#t~nondet24#1.offset; 1129#L646-3 [2023-11-29 03:54:06,981 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:06,981 INFO L85 PathProgramCache]: Analyzing trace with hash 1240533476, now seen corresponding path program 1 times [2023-11-29 03:54:06,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:06,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026267142] [2023-11-29 03:54:06,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:06,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:06,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 03:54:07,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 03:54:07,024 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 03:54:07,024 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1026267142] [2023-11-29 03:54:07,024 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1026267142] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 03:54:07,024 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 03:54:07,024 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-29 03:54:07,024 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364735173] [2023-11-29 03:54:07,024 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 03:54:07,025 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-11-29 03:54:07,025 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 03:54:07,025 INFO L85 PathProgramCache]: Analyzing trace with hash 249534, now seen corresponding path program 1 times [2023-11-29 03:54:07,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 03:54:07,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434988155] [2023-11-29 03:54:07,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 03:54:07,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 03:54:07,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:07,030 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-29 03:54:07,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-29 03:54:07,033 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-29 03:54:07,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 03:54:07,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-29 03:54:07,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-29 03:54:07,177 INFO L87 Difference]: Start difference. First operand 83 states and 95 transitions. cyclomatic complexity: 18 Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 03:54:07,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 03:54:07,192 INFO L93 Difference]: Finished difference Result 18 states and 17 transitions. [2023-11-29 03:54:07,192 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 17 transitions. [2023-11-29 03:54:07,193 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2023-11-29 03:54:07,193 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 0 states and 0 transitions. [2023-11-29 03:54:07,193 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2023-11-29 03:54:07,193 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2023-11-29 03:54:07,193 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2023-11-29 03:54:07,193 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-29 03:54:07,193 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2023-11-29 03:54:07,193 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2023-11-29 03:54:07,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 03:54:07,194 INFO L428 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2023-11-29 03:54:07,194 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-29 03:54:07,194 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2023-11-29 03:54:07,194 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2023-11-29 03:54:07,195 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2023-11-29 03:54:07,201 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 29.11 03:54:07 BoogieIcfgContainer [2023-11-29 03:54:07,201 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2023-11-29 03:54:07,202 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2023-11-29 03:54:07,202 INFO L270 PluginConnector]: Initializing Witness Printer... [2023-11-29 03:54:07,202 INFO L274 PluginConnector]: Witness Printer initialized [2023-11-29 03:54:07,202 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 03:54:00" (3/4) ... [2023-11-29 03:54:07,204 INFO L140 WitnessPrinter]: No result that supports witness generation found [2023-11-29 03:54:07,205 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2023-11-29 03:54:07,206 INFO L158 Benchmark]: Toolchain (without parser) took 7676.42ms. Allocated memory was 155.2MB in the beginning and 270.5MB in the end (delta: 115.3MB). Free memory was 116.2MB in the beginning and 223.6MB in the end (delta: -107.5MB). Peak memory consumption was 11.0MB. Max. memory is 16.1GB. [2023-11-29 03:54:07,206 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 102.8MB. Free memory is still 55.7MB. There was no memory consumed. Max. memory is 16.1GB. [2023-11-29 03:54:07,207 INFO L158 Benchmark]: CACSL2BoogieTranslator took 430.61ms. Allocated memory is still 155.2MB. Free memory was 115.7MB in the beginning and 96.2MB in the end (delta: 19.4MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2023-11-29 03:54:07,207 INFO L158 Benchmark]: Boogie Procedure Inliner took 63.00ms. Allocated memory is still 155.2MB. Free memory was 96.2MB in the beginning and 92.6MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2023-11-29 03:54:07,208 INFO L158 Benchmark]: Boogie Preprocessor took 110.12ms. Allocated memory is still 155.2MB. Free memory was 92.6MB in the beginning and 85.3MB in the end (delta: 7.3MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2023-11-29 03:54:07,208 INFO L158 Benchmark]: RCFGBuilder took 749.53ms. Allocated memory was 155.2MB in the beginning and 186.6MB in the end (delta: 31.5MB). Free memory was 85.3MB in the beginning and 136.7MB in the end (delta: -51.4MB). Peak memory consumption was 31.9MB. Max. memory is 16.1GB. [2023-11-29 03:54:07,209 INFO L158 Benchmark]: BuchiAutomizer took 6315.12ms. Allocated memory was 186.6MB in the beginning and 270.5MB in the end (delta: 83.9MB). Free memory was 136.7MB in the beginning and 224.7MB in the end (delta: -87.9MB). There was no memory consumed. Max. memory is 16.1GB. [2023-11-29 03:54:07,209 INFO L158 Benchmark]: Witness Printer took 3.21ms. Allocated memory is still 270.5MB. Free memory was 224.7MB in the beginning and 223.6MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2023-11-29 03:54:07,213 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 102.8MB. Free memory is still 55.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 430.61ms. Allocated memory is still 155.2MB. Free memory was 115.7MB in the beginning and 96.2MB in the end (delta: 19.4MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 63.00ms. Allocated memory is still 155.2MB. Free memory was 96.2MB in the beginning and 92.6MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 110.12ms. Allocated memory is still 155.2MB. Free memory was 92.6MB in the beginning and 85.3MB in the end (delta: 7.3MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * RCFGBuilder took 749.53ms. Allocated memory was 155.2MB in the beginning and 186.6MB in the end (delta: 31.5MB). Free memory was 85.3MB in the beginning and 136.7MB in the end (delta: -51.4MB). Peak memory consumption was 31.9MB. Max. memory is 16.1GB. * BuchiAutomizer took 6315.12ms. Allocated memory was 186.6MB in the beginning and 270.5MB in the end (delta: 83.9MB). Free memory was 136.7MB in the beginning and 224.7MB in the end (delta: -87.9MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 3.21ms. Allocated memory is still 270.5MB. Free memory was 224.7MB in the beginning and 223.6MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 5 terminating modules (5 trivial, 0 deterministic, 0 nondeterministic). 5 modules have a trivial ranking function, the largest among these consists of 12 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 6.2s and 6 iterations. TraceHistogramMax:1. Analysis of lassos took 3.9s. Construction of modules took 1.3s. Büchi inclusion checks took 0.9s. Highest rank in rank-based complementation 0. Minimization of det autom 5. Minimization of nondet autom 0. Automata minimization 0.0s AutomataMinimizationTime, 4 MinimizatonAttempts, 77 StatesRemovedByMinimization, 4 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 482 SdHoareTripleChecker+Valid, 1.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 482 mSDsluCounter, 1120 SdHoareTripleChecker+Invalid, 1.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 819 mSDsCounter, 62 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 774 IncrementalHoareTripleChecker+Invalid, 836 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 62 mSolverCounterUnsat, 301 mSDtfsCounter, 774 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU3 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2023-11-29 03:54:07,245 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f9034c4b-391a-4a21-9480-46c938fabb08/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE