./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test7-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test7-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0dff9798a0295b679f16f480562390718a9087ab219890b5f7fb9fb3739a540b --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-28 23:42:35,468 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-28 23:42:35,548 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Termination-32bit-Automizer_Default.epf [2023-11-28 23:42:35,553 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-28 23:42:35,553 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-28 23:42:35,577 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-28 23:42:35,578 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-28 23:42:35,578 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-28 23:42:35,579 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-28 23:42:35,580 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-28 23:42:35,580 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-28 23:42:35,581 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-28 23:42:35,581 INFO L153 SettingsManager]: * Use SBE=true [2023-11-28 23:42:35,582 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-11-28 23:42:35,582 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-11-28 23:42:35,583 INFO L153 SettingsManager]: * Use old map elimination=false [2023-11-28 23:42:35,583 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2023-11-28 23:42:35,584 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2023-11-28 23:42:35,584 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-11-28 23:42:35,585 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-28 23:42:35,585 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-11-28 23:42:35,586 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-28 23:42:35,586 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-28 23:42:35,587 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-28 23:42:35,587 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-28 23:42:35,588 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-11-28 23:42:35,588 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-11-28 23:42:35,589 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-11-28 23:42:35,589 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2023-11-28 23:42:35,589 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-28 23:42:35,590 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-28 23:42:35,590 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-11-28 23:42:35,590 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-28 23:42:35,590 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-28 23:42:35,591 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-28 23:42:35,591 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-28 23:42:35,591 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-28 23:42:35,592 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-11-28 23:42:35,592 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0dff9798a0295b679f16f480562390718a9087ab219890b5f7fb9fb3739a540b [2023-11-28 23:42:35,803 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-28 23:42:35,823 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-28 23:42:35,826 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-28 23:42:35,827 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-28 23:42:35,827 INFO L274 PluginConnector]: CDTParser initialized [2023-11-28 23:42:35,828 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test7-2.i [2023-11-28 23:42:38,599 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-28 23:42:38,891 INFO L384 CDTParser]: Found 1 translation units. [2023-11-28 23:42:38,892 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test7-2.i [2023-11-28 23:42:38,908 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/data/e36fc4ee3/15b1cb100db142cd876c70a4df183351/FLAG16d409479 [2023-11-28 23:42:38,922 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/data/e36fc4ee3/15b1cb100db142cd876c70a4df183351 [2023-11-28 23:42:38,924 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-28 23:42:38,925 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-28 23:42:38,927 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-28 23:42:38,927 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-28 23:42:38,932 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-28 23:42:38,932 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:42:38" (1/1) ... [2023-11-28 23:42:38,933 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@73634fee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:38, skipping insertion in model container [2023-11-28 23:42:38,933 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 11:42:38" (1/1) ... [2023-11-28 23:42:39,005 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-28 23:42:39,451 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-28 23:42:39,463 INFO L202 MainTranslator]: Completed pre-run [2023-11-28 23:42:39,545 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-28 23:42:39,573 WARN L675 CHandler]: The function memcmp is called, but not defined or handled by StandardFunctionHandler. [2023-11-28 23:42:39,579 INFO L206 MainTranslator]: Completed translation [2023-11-28 23:42:39,579 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39 WrapperNode [2023-11-28 23:42:39,579 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-28 23:42:39,580 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-28 23:42:39,580 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-28 23:42:39,580 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-28 23:42:39,586 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,616 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,703 INFO L138 Inliner]: procedures = 176, calls = 331, calls flagged for inlining = 5, calls inlined = 4, statements flattened = 1500 [2023-11-28 23:42:39,704 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-28 23:42:39,704 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-28 23:42:39,705 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-28 23:42:39,705 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-28 23:42:39,716 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,716 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,729 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,834 INFO L175 MemorySlicer]: Split 306 memory accesses to 4 slices as follows [2, 5, 34, 265]. 87 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0, 0]. The 63 writes are split as follows [0, 1, 4, 58]. [2023-11-28 23:42:39,834 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,835 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,891 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,907 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,914 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,923 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,936 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-28 23:42:39,938 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-28 23:42:39,938 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-28 23:42:39,938 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-28 23:42:39,939 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (1/1) ... [2023-11-28 23:42:39,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-11-28 23:42:39,956 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:39,968 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-11-28 23:42:39,977 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-11-28 23:42:40,009 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-28 23:42:40,009 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-28 23:42:40,010 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-28 23:42:40,010 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-28 23:42:40,010 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-28 23:42:40,010 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-28 23:42:40,010 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-28 23:42:40,011 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-28 23:42:40,011 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2023-11-28 23:42:40,011 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2023-11-28 23:42:40,011 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2023-11-28 23:42:40,011 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2023-11-28 23:42:40,011 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2023-11-28 23:42:40,012 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2023-11-28 23:42:40,012 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2023-11-28 23:42:40,012 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2023-11-28 23:42:40,012 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-28 23:42:40,012 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-28 23:42:40,013 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2023-11-28 23:42:40,013 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2023-11-28 23:42:40,013 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2023-11-28 23:42:40,013 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2023-11-28 23:42:40,013 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-28 23:42:40,014 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2023-11-28 23:42:40,014 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2023-11-28 23:42:40,014 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2023-11-28 23:42:40,014 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2023-11-28 23:42:40,014 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2023-11-28 23:42:40,015 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-28 23:42:40,015 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-28 23:42:40,015 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-28 23:42:40,015 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-28 23:42:40,015 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-28 23:42:40,015 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-28 23:42:40,016 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-28 23:42:40,239 INFO L241 CfgBuilder]: Building ICFG [2023-11-28 23:42:40,241 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-28 23:42:40,245 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-28 23:42:40,287 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-28 23:42:40,304 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-28 23:42:40,318 WARN L821 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2023-11-28 23:42:41,706 INFO L282 CfgBuilder]: Performing block encoding [2023-11-28 23:42:41,723 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-28 23:42:41,724 INFO L309 CfgBuilder]: Removed 72 assume(true) statements. [2023-11-28 23:42:41,726 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:42:41 BoogieIcfgContainer [2023-11-28 23:42:41,726 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-28 23:42:41,727 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-11-28 23:42:41,727 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-11-28 23:42:41,731 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-11-28 23:42:41,731 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-28 23:42:41,731 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.11 11:42:38" (1/3) ... [2023-11-28 23:42:41,732 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7432583 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 11:42:41, skipping insertion in model container [2023-11-28 23:42:41,732 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-28 23:42:41,732 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 11:42:39" (2/3) ... [2023-11-28 23:42:41,733 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7432583 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.11 11:42:41, skipping insertion in model container [2023-11-28 23:42:41,733 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-11-28 23:42:41,733 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 11:42:41" (3/3) ... [2023-11-28 23:42:41,734 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_test7-2.i [2023-11-28 23:42:41,795 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-11-28 23:42:41,795 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-11-28 23:42:41,795 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-11-28 23:42:41,795 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-11-28 23:42:41,795 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-11-28 23:42:41,796 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-11-28 23:42:41,796 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-11-28 23:42:41,796 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-11-28 23:42:41,802 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 389 states, 384 states have (on average 1.6901041666666667) internal successors, (649), 384 states have internal predecessors, (649), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:41,843 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 374 [2023-11-28 23:42:41,844 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:41,844 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:41,850 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:41,851 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-28 23:42:41,851 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-11-28 23:42:41,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 389 states, 384 states have (on average 1.6901041666666667) internal successors, (649), 384 states have internal predecessors, (649), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:41,864 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 374 [2023-11-28 23:42:41,864 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:41,864 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:41,864 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:41,864 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2023-11-28 23:42:41,872 INFO L748 eck$LassoCheckResult]: Stem: 114#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 322#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 361#L715-4true [2023-11-28 23:42:41,873 INFO L750 eck$LassoCheckResult]: Loop: 361#L715-4true call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 159#L715-1true assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 27#L717true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 71#L717-2true call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 338#L722-269true assume !true; 238#L715-3true call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 361#L715-4true [2023-11-28 23:42:41,878 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:41,879 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 1 times [2023-11-28 23:42:41,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:41,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859181078] [2023-11-28 23:42:41,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:41,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:42,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:42,002 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:42,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:42,052 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:42,055 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:42,055 INFO L85 PathProgramCache]: Analyzing trace with hash 2134899084, now seen corresponding path program 1 times [2023-11-28 23:42:42,055 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:42,056 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953073170] [2023-11-28 23:42:42,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:42,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:42,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:42,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:42,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953073170] [2023-11-28 23:42:42,095 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2023-11-28 23:42:42,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1789276453] [2023-11-28 23:42:42,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:42,096 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:42,096 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:42,102 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:42,107 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-28 23:42:42,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:42,277 INFO L262 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-28 23:42:42,278 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:42,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:42,296 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:42,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1789276453] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:42,297 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:42,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-28 23:42:42,298 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [845613278] [2023-11-28 23:42:42,299 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:42,302 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:42,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:42,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-28 23:42:42,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-28 23:42:42,337 INFO L87 Difference]: Start difference. First operand has 389 states, 384 states have (on average 1.6901041666666667) internal successors, (649), 384 states have internal predecessors, (649), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:42,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:42,368 INFO L93 Difference]: Finished difference Result 386 states and 572 transitions. [2023-11-28 23:42:42,369 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 386 states and 572 transitions. [2023-11-28 23:42:42,374 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 368 [2023-11-28 23:42:42,384 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 386 states to 380 states and 566 transitions. [2023-11-28 23:42:42,385 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 380 [2023-11-28 23:42:42,387 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 380 [2023-11-28 23:42:42,387 INFO L73 IsDeterministic]: Start isDeterministic. Operand 380 states and 566 transitions. [2023-11-28 23:42:42,392 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:42,392 INFO L218 hiAutomatonCegarLoop]: Abstraction has 380 states and 566 transitions. [2023-11-28 23:42:42,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states and 566 transitions. [2023-11-28 23:42:42,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 380. [2023-11-28 23:42:42,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 376 states have (on average 1.4893617021276595) internal successors, (560), 375 states have internal predecessors, (560), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:42,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 566 transitions. [2023-11-28 23:42:42,441 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 566 transitions. [2023-11-28 23:42:42,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-28 23:42:42,445 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 566 transitions. [2023-11-28 23:42:42,445 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-11-28 23:42:42,445 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 566 transitions. [2023-11-28 23:42:42,447 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 368 [2023-11-28 23:42:42,447 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:42,448 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:42,449 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:42,449 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:42,450 INFO L748 eck$LassoCheckResult]: Stem: 1126#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1127#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 974#L715-4 [2023-11-28 23:42:42,451 INFO L750 eck$LassoCheckResult]: Loop: 974#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1170#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 890#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 891#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 1057#L722-269 havoc main_~_ha_hashv~0#1; 1157#L722-176 goto; 1098#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 929#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 930#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 849#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int#3(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 850#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 975#L722-76 assume !main_#t~switch31#1; 976#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 1021#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int#3(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 1022#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 1102#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int#3(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 892#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 893#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int#3(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 933#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 922#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int#3(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 923#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 1143#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int#3(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 835#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 836#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 837#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 838#L722-97 assume !main_#t~switch31#1; 1070#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 865#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 866#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 1010#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 1156#L722-105 havoc main_#t~switch31#1; 1141#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1136#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 999#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1128#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1033#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1034#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 821#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1059#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 848#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 816#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 817#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 912#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 940#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1078#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 878#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 992#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 994#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1071#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 805#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 806#L722-170 goto; 1084#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1050#L722-173 goto; 1051#L722-175 goto; 1124#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1147#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 1148#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 899#L722-193 goto; 900#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 942#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 943#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 1030#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 1041#L722-202 goto; 915#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 916#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 1082#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 932#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 826#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 827#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 997#L722-260 goto; 1085#L722-262 havoc main_~_ha_bkt~0#1; 1055#L722-263 goto; 1056#L722-265 goto; 963#L722-267 havoc main_~_ha_hashv~0#1; 829#L722-268 goto; 830#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 974#L715-4 [2023-11-28 23:42:42,452 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:42,452 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 2 times [2023-11-28 23:42:42,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:42,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816061266] [2023-11-28 23:42:42,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:42,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:42,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:42,470 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:42,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:42,494 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:42,495 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:42,495 INFO L85 PathProgramCache]: Analyzing trace with hash 1198917207, now seen corresponding path program 1 times [2023-11-28 23:42:42,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:42,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911392999] [2023-11-28 23:42:42,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:42,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:42,555 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:42,555 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [204495051] [2023-11-28 23:42:42,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:42,556 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:42,556 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:42,576 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:42,582 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-28 23:42:42,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:42,905 INFO L262 TraceCheckSpWp]: Trace formula consists of 539 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-28 23:42:42,908 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:42,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:42,946 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:42,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:42,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [911392999] [2023-11-28 23:42:42,946 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:42,947 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [204495051] [2023-11-28 23:42:42,947 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [204495051] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:42,947 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:42,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-11-28 23:42:42,947 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672097159] [2023-11-28 23:42:42,948 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:42,948 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:42,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:42,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-11-28 23:42:42,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-11-28 23:42:42,949 INFO L87 Difference]: Start difference. First operand 380 states and 566 transitions. cyclomatic complexity: 190 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:43,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:43,077 INFO L93 Difference]: Finished difference Result 401 states and 587 transitions. [2023-11-28 23:42:43,077 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 401 states and 587 transitions. [2023-11-28 23:42:43,082 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 389 [2023-11-28 23:42:43,087 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 401 states to 401 states and 587 transitions. [2023-11-28 23:42:43,088 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 401 [2023-11-28 23:42:43,089 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 401 [2023-11-28 23:42:43,089 INFO L73 IsDeterministic]: Start isDeterministic. Operand 401 states and 587 transitions. [2023-11-28 23:42:43,091 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:43,091 INFO L218 hiAutomatonCegarLoop]: Abstraction has 401 states and 587 transitions. [2023-11-28 23:42:43,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states and 587 transitions. [2023-11-28 23:42:43,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 400. [2023-11-28 23:42:43,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 400 states, 396 states have (on average 1.4646464646464648) internal successors, (580), 395 states have internal predecessors, (580), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:43,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 586 transitions. [2023-11-28 23:42:43,113 INFO L240 hiAutomatonCegarLoop]: Abstraction has 400 states and 586 transitions. [2023-11-28 23:42:43,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-11-28 23:42:43,114 INFO L428 stractBuchiCegarLoop]: Abstraction has 400 states and 586 transitions. [2023-11-28 23:42:43,114 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-11-28 23:42:43,115 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 400 states and 586 transitions. [2023-11-28 23:42:43,118 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 388 [2023-11-28 23:42:43,118 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:43,118 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:43,120 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:43,120 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:43,120 INFO L748 eck$LassoCheckResult]: Stem: 2143#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 2144#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1987#L715-4 [2023-11-28 23:42:43,121 INFO L750 eck$LassoCheckResult]: Loop: 1987#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2194#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1898#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1899#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 2071#L722-269 havoc main_~_ha_hashv~0#1; 2177#L722-176 goto; 2113#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1942#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1943#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 1857#L722-73 assume main_#t~switch31#1;call main_#t~mem32#1 := read~int#3(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);havoc main_#t~mem32#1; 1858#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 1988#L722-76 assume main_#t~switch31#1;call main_#t~mem33#1 := read~int#3(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);havoc main_#t~mem33#1; 1989#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 2035#L722-79 assume main_#t~switch31#1;call main_#t~mem34#1 := read~int#3(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);havoc main_#t~mem34#1; 2036#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 2198#L722-82 assume main_#t~switch31#1;call main_#t~mem35#1 := read~int#3(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);havoc main_#t~mem35#1; 1905#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 1906#L722-85 assume main_#t~switch31#1;call main_#t~mem36#1 := read~int#3(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);havoc main_#t~mem36#1; 1946#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 1935#L722-88 assume main_#t~switch31#1;call main_#t~mem37#1 := read~int#3(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);havoc main_#t~mem37#1; 1936#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 2184#L722-91 assume main_#t~switch31#1;call main_#t~mem38#1 := read~int#3(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem38#1; 2185#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 2182#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2183#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 2086#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 2087#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 1881#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 1882#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 2175#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 2176#L722-105 havoc main_#t~switch31#1; 2159#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2157#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2013#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2147#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2047#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2048#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1835#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2073#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1863#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1828#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1829#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1925#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1953#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2093#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1891#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2005#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2007#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2088#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1821#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 1822#L722-170 goto; 2101#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2064#L722-173 goto; 2065#L722-175 goto; 2142#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2166#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 2167#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 1912#L722-193 goto; 1913#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 1955#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 1956#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 2044#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 2055#L722-202 goto; 1928#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1929#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 2097#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 1945#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 1838#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 1839#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2010#L722-260 goto; 2102#L722-262 havoc main_~_ha_bkt~0#1; 2069#L722-263 goto; 2070#L722-265 goto; 1980#L722-267 havoc main_~_ha_hashv~0#1; 1841#L722-268 goto; 1842#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 1987#L715-4 [2023-11-28 23:42:43,122 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:43,122 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 3 times [2023-11-28 23:42:43,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:43,122 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [801650204] [2023-11-28 23:42:43,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:43,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:43,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:43,144 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:43,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:43,174 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:43,175 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:43,175 INFO L85 PathProgramCache]: Analyzing trace with hash 618715859, now seen corresponding path program 1 times [2023-11-28 23:42:43,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:43,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1183849082] [2023-11-28 23:42:43,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:43,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:43,240 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:43,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1366426217] [2023-11-28 23:42:43,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:43,241 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:43,242 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:43,243 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:43,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-28 23:42:43,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:43,550 INFO L262 TraceCheckSpWp]: Trace formula consists of 551 conjuncts, 3 conjunts are in the unsatisfiable core [2023-11-28 23:42:43,553 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:43,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:43,579 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:43,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:43,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1183849082] [2023-11-28 23:42:43,580 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:43,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1366426217] [2023-11-28 23:42:43,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1366426217] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:43,580 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:43,580 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-28 23:42:43,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160603001] [2023-11-28 23:42:43,581 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:43,581 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:43,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:43,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-28 23:42:43,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-28 23:42:43,582 INFO L87 Difference]: Start difference. First operand 400 states and 586 transitions. cyclomatic complexity: 190 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:43,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:43,682 INFO L93 Difference]: Finished difference Result 387 states and 566 transitions. [2023-11-28 23:42:43,682 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 387 states and 566 transitions. [2023-11-28 23:42:43,686 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 375 [2023-11-28 23:42:43,690 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 387 states to 387 states and 566 transitions. [2023-11-28 23:42:43,691 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 387 [2023-11-28 23:42:43,692 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 387 [2023-11-28 23:42:43,692 INFO L73 IsDeterministic]: Start isDeterministic. Operand 387 states and 566 transitions. [2023-11-28 23:42:43,693 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:43,693 INFO L218 hiAutomatonCegarLoop]: Abstraction has 387 states and 566 transitions. [2023-11-28 23:42:43,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 387 states and 566 transitions. [2023-11-28 23:42:43,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 387 to 386. [2023-11-28 23:42:43,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 386 states, 382 states have (on average 1.463350785340314) internal successors, (559), 381 states have internal predecessors, (559), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:43,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 565 transitions. [2023-11-28 23:42:43,706 INFO L240 hiAutomatonCegarLoop]: Abstraction has 386 states and 565 transitions. [2023-11-28 23:42:43,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-28 23:42:43,707 INFO L428 stractBuchiCegarLoop]: Abstraction has 386 states and 565 transitions. [2023-11-28 23:42:43,707 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-11-28 23:42:43,707 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 386 states and 565 transitions. [2023-11-28 23:42:43,710 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 374 [2023-11-28 23:42:43,710 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:43,710 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:43,711 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:43,711 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:43,712 INFO L748 eck$LassoCheckResult]: Stem: 3158#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 3159#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3007#L715-4 [2023-11-28 23:42:43,712 INFO L750 eck$LassoCheckResult]: Loop: 3007#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3204#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2918#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2919#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 3090#L722-269 havoc main_~_ha_hashv~0#1; 3190#L722-176 goto; 3131#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2962#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2963#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 2878#L722-73 assume !main_#t~switch31#1; 2879#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 3008#L722-76 assume !main_#t~switch31#1; 3009#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 3054#L722-79 assume !main_#t~switch31#1; 3055#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 3135#L722-82 assume !main_#t~switch31#1; 2925#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 2926#L722-85 assume !main_#t~switch31#1; 2966#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 2955#L722-88 assume !main_#t~switch31#1; 2956#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 3176#L722-91 assume !main_#t~switch31#1; 2868#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 2869#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 2870#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 2871#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 3105#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 2901#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 2902#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 3043#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 3189#L722-105 havoc main_#t~switch31#1; 3174#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3172#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 3033#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3162#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3066#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3067#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2856#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3092#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2883#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2849#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2850#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2945#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2973#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3111#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2911#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3025#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3027#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3106#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2842#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 2843#L722-170 goto; 3119#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3083#L722-173 goto; 3084#L722-175 goto; 3157#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3180#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 3181#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 2932#L722-193 goto; 2933#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 2975#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 2976#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 3063#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 3074#L722-202 goto; 2948#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2949#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 3115#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 2965#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 2859#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 2860#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3030#L722-260 goto; 3120#L722-262 havoc main_~_ha_bkt~0#1; 3088#L722-263 goto; 3089#L722-265 goto; 3000#L722-267 havoc main_~_ha_hashv~0#1; 2862#L722-268 goto; 2863#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 3007#L715-4 [2023-11-28 23:42:43,712 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:43,713 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 4 times [2023-11-28 23:42:43,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:43,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204114598] [2023-11-28 23:42:43,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:43,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:43,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:43,730 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:43,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:43,749 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:43,750 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:43,750 INFO L85 PathProgramCache]: Analyzing trace with hash -1826004511, now seen corresponding path program 1 times [2023-11-28 23:42:43,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:43,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472297961] [2023-11-28 23:42:43,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:43,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:43,820 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:43,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [466880555] [2023-11-28 23:42:43,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:43,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:43,821 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:43,823 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:43,832 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-28 23:42:44,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:44,421 INFO L262 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-28 23:42:44,424 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:44,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:44,592 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:44,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:44,593 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472297961] [2023-11-28 23:42:44,593 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:44,593 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [466880555] [2023-11-28 23:42:44,593 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [466880555] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:44,593 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:44,594 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-28 23:42:44,594 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357548674] [2023-11-28 23:42:44,594 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:44,594 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:44,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:44,595 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-28 23:42:44,595 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-28 23:42:44,596 INFO L87 Difference]: Start difference. First operand 386 states and 565 transitions. cyclomatic complexity: 183 Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:45,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:45,152 INFO L93 Difference]: Finished difference Result 426 states and 613 transitions. [2023-11-28 23:42:45,152 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 613 transitions. [2023-11-28 23:42:45,156 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 414 [2023-11-28 23:42:45,160 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 426 states and 613 transitions. [2023-11-28 23:42:45,160 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 426 [2023-11-28 23:42:45,161 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 426 [2023-11-28 23:42:45,161 INFO L73 IsDeterministic]: Start isDeterministic. Operand 426 states and 613 transitions. [2023-11-28 23:42:45,162 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:45,162 INFO L218 hiAutomatonCegarLoop]: Abstraction has 426 states and 613 transitions. [2023-11-28 23:42:45,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states and 613 transitions. [2023-11-28 23:42:45,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 423. [2023-11-28 23:42:45,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 419 states have (on average 1.4391408114558473) internal successors, (603), 418 states have internal predecessors, (603), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:45,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 609 transitions. [2023-11-28 23:42:45,172 INFO L240 hiAutomatonCegarLoop]: Abstraction has 423 states and 609 transitions. [2023-11-28 23:42:45,173 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-28 23:42:45,173 INFO L428 stractBuchiCegarLoop]: Abstraction has 423 states and 609 transitions. [2023-11-28 23:42:45,174 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-11-28 23:42:45,174 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 423 states and 609 transitions. [2023-11-28 23:42:45,176 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 411 [2023-11-28 23:42:45,176 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:45,176 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:45,178 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:45,178 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:45,178 INFO L748 eck$LassoCheckResult]: Stem: 4205#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 4206#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4053#L715-4 [2023-11-28 23:42:45,178 INFO L750 eck$LassoCheckResult]: Loop: 4053#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4254#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 3964#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3965#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 4136#L722-269 havoc main_~_ha_hashv~0#1; 4239#L722-176 goto; 4177#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4178#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4298#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 4297#L722-73 assume !main_#t~switch31#1; 4296#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 4295#L722-76 assume !main_#t~switch31#1; 4294#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 4293#L722-79 assume !main_#t~switch31#1; 4292#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 4291#L722-82 assume !main_#t~switch31#1; 4290#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 4289#L722-85 assume !main_#t~switch31#1; 4288#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 4287#L722-88 assume !main_#t~switch31#1; 4286#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 4285#L722-91 assume !main_#t~switch31#1; 4284#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 4283#L722-94 assume !main_#t~switch31#1; 4282#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 4281#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 4151#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 3947#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 3948#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 4089#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 4276#L722-105 havoc main_#t~switch31#1; 4275#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4274#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4213#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4209#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4210#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 4112#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4113#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3902#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4138#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3929#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3895#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3896#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3991#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4019#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4157#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3957#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4071#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4073#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4152#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3888#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 3889#L722-170 goto; 4165#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4129#L722-173 goto; 4130#L722-175 goto; 4204#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4228#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 4229#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 3978#L722-193 goto; 3979#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 4021#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 4022#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 4109#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 4120#L722-202 goto; 3994#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3995#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 4161#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 4011#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 3905#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 3906#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4076#L722-260 goto; 4169#L722-262 havoc main_~_ha_bkt~0#1; 4134#L722-263 goto; 4135#L722-265 goto; 4046#L722-267 havoc main_~_ha_hashv~0#1; 3908#L722-268 goto; 3909#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 4053#L715-4 [2023-11-28 23:42:45,179 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:45,179 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 5 times [2023-11-28 23:42:45,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:45,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371797582] [2023-11-28 23:42:45,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:45,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:45,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:45,194 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:45,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:45,210 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:45,211 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:45,211 INFO L85 PathProgramCache]: Analyzing trace with hash 1133082093, now seen corresponding path program 1 times [2023-11-28 23:42:45,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:45,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [206690823] [2023-11-28 23:42:45,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:45,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:45,253 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:45,253 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [886592176] [2023-11-28 23:42:45,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:45,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:45,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:45,259 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:45,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-28 23:42:45,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:45,570 INFO L262 TraceCheckSpWp]: Trace formula consists of 504 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-28 23:42:45,573 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:45,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:45,615 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:45,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:45,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [206690823] [2023-11-28 23:42:45,615 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:45,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [886592176] [2023-11-28 23:42:45,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [886592176] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:45,616 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:45,616 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-28 23:42:45,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794745294] [2023-11-28 23:42:45,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:45,617 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:45,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:45,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-28 23:42:45,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2023-11-28 23:42:45,618 INFO L87 Difference]: Start difference. First operand 423 states and 609 transitions. cyclomatic complexity: 190 Second operand has 5 states, 5 states have (on average 15.4) internal successors, (77), 5 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:45,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:45,731 INFO L93 Difference]: Finished difference Result 500 states and 735 transitions. [2023-11-28 23:42:45,731 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 500 states and 735 transitions. [2023-11-28 23:42:45,736 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 488 [2023-11-28 23:42:45,741 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 500 states to 500 states and 735 transitions. [2023-11-28 23:42:45,741 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 500 [2023-11-28 23:42:45,742 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 500 [2023-11-28 23:42:45,742 INFO L73 IsDeterministic]: Start isDeterministic. Operand 500 states and 735 transitions. [2023-11-28 23:42:45,743 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:45,744 INFO L218 hiAutomatonCegarLoop]: Abstraction has 500 states and 735 transitions. [2023-11-28 23:42:45,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 500 states and 735 transitions. [2023-11-28 23:42:45,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 500 to 423. [2023-11-28 23:42:45,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 419 states have (on average 1.431980906921241) internal successors, (600), 418 states have internal predecessors, (600), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:45,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 606 transitions. [2023-11-28 23:42:45,756 INFO L240 hiAutomatonCegarLoop]: Abstraction has 423 states and 606 transitions. [2023-11-28 23:42:45,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-28 23:42:45,757 INFO L428 stractBuchiCegarLoop]: Abstraction has 423 states and 606 transitions. [2023-11-28 23:42:45,757 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-11-28 23:42:45,757 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 423 states and 606 transitions. [2023-11-28 23:42:45,759 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 411 [2023-11-28 23:42:45,760 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:45,760 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:45,761 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:45,761 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:45,761 INFO L748 eck$LassoCheckResult]: Stem: 5365#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 5366#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5213#L715-4 [2023-11-28 23:42:45,761 INFO L750 eck$LassoCheckResult]: Loop: 5213#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5416#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 5123#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5124#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 5297#L722-269 havoc main_~_ha_hashv~0#1; 5400#L722-176 goto; 5338#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5167#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5168#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 5458#L722-73 assume !main_#t~switch31#1; 5457#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 5214#L722-76 assume !main_#t~switch31#1; 5215#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 5260#L722-79 assume !main_#t~switch31#1; 5261#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 5342#L722-82 assume !main_#t~switch31#1; 5130#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 5131#L722-85 assume !main_#t~switch31#1; 5444#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 5160#L722-88 assume !main_#t~switch31#1; 5161#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 5385#L722-91 assume !main_#t~switch31#1; 5073#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 5074#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 5405#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 5451#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 5449#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 5446#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 5447#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 5452#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 5399#L722-105 havoc main_#t~switch31#1; 5413#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5380#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5373#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5369#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5370#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 5273#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5274#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 5061#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5299#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5088#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5054#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5055#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5150#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5179#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5318#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5116#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5231#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5233#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5313#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5047#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 5048#L722-170 goto; 5326#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5290#L722-173 goto; 5291#L722-175 goto; 5364#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5389#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 5390#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 5137#L722-193 goto; 5138#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 5181#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 5182#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 5270#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 5281#L722-202 goto; 5153#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5154#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 5322#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 5170#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 5064#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 5065#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5236#L722-260 goto; 5330#L722-262 havoc main_~_ha_bkt~0#1; 5295#L722-263 goto; 5296#L722-265 goto; 5206#L722-267 havoc main_~_ha_hashv~0#1; 5067#L722-268 goto; 5068#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 5213#L715-4 [2023-11-28 23:42:45,762 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:45,762 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 6 times [2023-11-28 23:42:45,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:45,762 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385612458] [2023-11-28 23:42:45,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:45,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:45,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:45,777 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:45,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:45,793 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:45,794 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:45,794 INFO L85 PathProgramCache]: Analyzing trace with hash 257063087, now seen corresponding path program 1 times [2023-11-28 23:42:45,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:45,794 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020115254] [2023-11-28 23:42:45,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:45,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:45,841 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:45,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [287155350] [2023-11-28 23:42:45,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:45,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:45,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:45,845 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:45,847 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-28 23:42:46,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:46,151 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-28 23:42:46,154 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:46,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:46,332 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:46,333 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:46,333 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020115254] [2023-11-28 23:42:46,333 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:46,333 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [287155350] [2023-11-28 23:42:46,333 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [287155350] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:46,333 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:46,333 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-28 23:42:46,334 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819512802] [2023-11-28 23:42:46,334 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:46,334 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:46,334 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:46,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-28 23:42:46,335 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-28 23:42:46,335 INFO L87 Difference]: Start difference. First operand 423 states and 606 transitions. cyclomatic complexity: 187 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:47,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:47,498 INFO L93 Difference]: Finished difference Result 434 states and 622 transitions. [2023-11-28 23:42:47,498 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 434 states and 622 transitions. [2023-11-28 23:42:47,501 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 422 [2023-11-28 23:42:47,505 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 434 states to 434 states and 622 transitions. [2023-11-28 23:42:47,505 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 434 [2023-11-28 23:42:47,506 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 434 [2023-11-28 23:42:47,506 INFO L73 IsDeterministic]: Start isDeterministic. Operand 434 states and 622 transitions. [2023-11-28 23:42:47,507 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:47,508 INFO L218 hiAutomatonCegarLoop]: Abstraction has 434 states and 622 transitions. [2023-11-28 23:42:47,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states and 622 transitions. [2023-11-28 23:42:47,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 431. [2023-11-28 23:42:47,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 431 states, 427 states have (on average 1.4332552693208431) internal successors, (612), 426 states have internal predecessors, (612), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:47,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 618 transitions. [2023-11-28 23:42:47,519 INFO L240 hiAutomatonCegarLoop]: Abstraction has 431 states and 618 transitions. [2023-11-28 23:42:47,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-28 23:42:47,520 INFO L428 stractBuchiCegarLoop]: Abstraction has 431 states and 618 transitions. [2023-11-28 23:42:47,520 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-11-28 23:42:47,520 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 431 states and 618 transitions. [2023-11-28 23:42:47,523 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 419 [2023-11-28 23:42:47,523 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:47,523 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:47,524 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:47,524 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:47,524 INFO L748 eck$LassoCheckResult]: Stem: 6468#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 6469#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6310#L715-4 [2023-11-28 23:42:47,524 INFO L750 eck$LassoCheckResult]: Loop: 6310#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6521#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 6220#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6221#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 6395#L722-269 havoc main_~_ha_hashv~0#1; 6502#L722-176 goto; 6437#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6438#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6493#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 6180#L722-73 assume !main_#t~switch31#1; 6181#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 6542#L722-76 assume !main_#t~switch31#1; 6444#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 6445#L722-79 assume !main_#t~switch31#1; 6442#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 6443#L722-82 assume !main_#t~switch31#1; 6541#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 6359#L722-85 assume !main_#t~switch31#1; 6360#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 6257#L722-88 assume !main_#t~switch31#1; 6258#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 6486#L722-91 assume !main_#t~switch31#1; 6539#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 6507#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 6508#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 6563#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 6562#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 6561#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 6560#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 6559#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 6501#L722-105 havoc main_#t~switch31#1; 6558#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6555#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6553#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6550#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6551#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 6371#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6372#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 6526#L722-123 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet45#1 := main_~_ha_hashv~0#1; 6158#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6397#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6185#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6151#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6152#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6247#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6276#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6416#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6213#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6328#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6330#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6411#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6144#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 6145#L722-170 goto; 6424#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6388#L722-173 goto; 6389#L722-175 goto; 6467#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6490#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 6491#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 6234#L722-193 goto; 6235#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 6278#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 6279#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 6368#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 6379#L722-202 goto; 6250#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6251#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 6420#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 6267#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 6161#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 6162#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6333#L722-260 goto; 6428#L722-262 havoc main_~_ha_bkt~0#1; 6393#L722-263 goto; 6394#L722-265 goto; 6303#L722-267 havoc main_~_ha_hashv~0#1; 6164#L722-268 goto; 6165#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 6310#L715-4 [2023-11-28 23:42:47,525 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:47,525 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 7 times [2023-11-28 23:42:47,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:47,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413569194] [2023-11-28 23:42:47,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:47,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:47,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:47,539 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:47,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:47,556 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:47,556 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:47,556 INFO L85 PathProgramCache]: Analyzing trace with hash 51300246, now seen corresponding path program 1 times [2023-11-28 23:42:47,557 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:47,557 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076177790] [2023-11-28 23:42:47,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:47,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:47,599 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:47,599 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [278564662] [2023-11-28 23:42:47,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:47,600 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:47,600 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:47,603 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:47,608 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-28 23:42:47,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:47,914 INFO L262 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 13 conjunts are in the unsatisfiable core [2023-11-28 23:42:47,917 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:48,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:48,005 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:48,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:48,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076177790] [2023-11-28 23:42:48,005 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:48,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [278564662] [2023-11-28 23:42:48,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [278564662] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:48,006 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:48,006 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2023-11-28 23:42:48,007 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674186351] [2023-11-28 23:42:48,007 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:48,007 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:48,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:48,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2023-11-28 23:42:48,008 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2023-11-28 23:42:48,008 INFO L87 Difference]: Start difference. First operand 431 states and 618 transitions. cyclomatic complexity: 191 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:48,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:48,562 INFO L93 Difference]: Finished difference Result 445 states and 638 transitions. [2023-11-28 23:42:48,562 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 445 states and 638 transitions. [2023-11-28 23:42:48,566 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 433 [2023-11-28 23:42:48,570 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 445 states to 445 states and 638 transitions. [2023-11-28 23:42:48,570 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 445 [2023-11-28 23:42:48,570 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 445 [2023-11-28 23:42:48,570 INFO L73 IsDeterministic]: Start isDeterministic. Operand 445 states and 638 transitions. [2023-11-28 23:42:48,571 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:48,571 INFO L218 hiAutomatonCegarLoop]: Abstraction has 445 states and 638 transitions. [2023-11-28 23:42:48,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states and 638 transitions. [2023-11-28 23:42:48,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 437. [2023-11-28 23:42:48,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 437 states, 433 states have (on average 1.4341801385681294) internal successors, (621), 432 states have internal predecessors, (621), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:48,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 437 states to 437 states and 627 transitions. [2023-11-28 23:42:48,581 INFO L240 hiAutomatonCegarLoop]: Abstraction has 437 states and 627 transitions. [2023-11-28 23:42:48,581 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-28 23:42:48,582 INFO L428 stractBuchiCegarLoop]: Abstraction has 437 states and 627 transitions. [2023-11-28 23:42:48,582 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2023-11-28 23:42:48,582 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 437 states and 627 transitions. [2023-11-28 23:42:48,585 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 425 [2023-11-28 23:42:48,586 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:48,586 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:48,587 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:48,587 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:48,587 INFO L748 eck$LassoCheckResult]: Stem: 7587#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7588#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7432#L715-4 [2023-11-28 23:42:48,588 INFO L750 eck$LassoCheckResult]: Loop: 7432#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7638#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 7346#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7347#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 7516#L722-269 havoc main_~_ha_hashv~0#1; 7621#L722-176 goto; 7558#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7559#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7686#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 7685#L722-73 assume !main_#t~switch31#1; 7684#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 7683#L722-76 assume !main_#t~switch31#1; 7682#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 7681#L722-79 assume !main_#t~switch31#1; 7680#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 7679#L722-82 assume !main_#t~switch31#1; 7678#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 7677#L722-85 assume !main_#t~switch31#1; 7676#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 7675#L722-88 assume !main_#t~switch31#1; 7674#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 7673#L722-91 assume !main_#t~switch31#1; 7672#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 7626#L722-94 assume !main_#t~switch31#1; 7627#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 7691#L722-97 assume !main_#t~switch31#1; 7690#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 7689#L722-100 assume !main_#t~switch31#1; 7468#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 7469#L722-103 assume !main_#t~switch31#1; 7620#L722-105 havoc main_#t~switch31#1; 7635#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7602#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7603#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 7457#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 7458#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7657#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 7553#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7652#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7281#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7573#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7308#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7274#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7275#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7370#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7398#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7537#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7338#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7450#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7452#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7534#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7269#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 7270#L722-170 goto; 7549#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7509#L722-173 goto; 7510#L722-175 goto; 7586#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7611#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 7612#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 7359#L722-193 goto; 7360#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 7400#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 7401#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 7491#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 7499#L722-202 goto; 7373#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7374#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 7539#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 7390#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 7282#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 7283#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7455#L722-260 goto; 7545#L722-262 havoc main_~_ha_bkt~0#1; 7512#L722-263 goto; 7513#L722-265 goto; 7419#L722-267 havoc main_~_ha_hashv~0#1; 7285#L722-268 goto; 7286#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 7432#L715-4 [2023-11-28 23:42:48,588 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:48,589 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 8 times [2023-11-28 23:42:48,589 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:48,589 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127988816] [2023-11-28 23:42:48,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:48,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:48,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:48,607 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:48,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:48,623 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:48,624 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:48,624 INFO L85 PathProgramCache]: Analyzing trace with hash 1346728164, now seen corresponding path program 1 times [2023-11-28 23:42:48,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:48,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155495364] [2023-11-28 23:42:48,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:48,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:48,674 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:48,675 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [833265852] [2023-11-28 23:42:48,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:48,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:48,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:48,683 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:48,691 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-28 23:42:48,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:48,980 INFO L262 TraceCheckSpWp]: Trace formula consists of 487 conjuncts, 4 conjunts are in the unsatisfiable core [2023-11-28 23:42:48,983 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:49,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:49,016 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:49,016 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:49,016 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155495364] [2023-11-28 23:42:49,016 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:49,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [833265852] [2023-11-28 23:42:49,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [833265852] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:49,017 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:49,017 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-28 23:42:49,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [188060082] [2023-11-28 23:42:49,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:49,018 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:49,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:49,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-28 23:42:49,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-11-28 23:42:49,019 INFO L87 Difference]: Start difference. First operand 437 states and 627 transitions. cyclomatic complexity: 194 Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:49,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:49,070 INFO L93 Difference]: Finished difference Result 351 states and 499 transitions. [2023-11-28 23:42:49,070 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 351 states and 499 transitions. [2023-11-28 23:42:49,072 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 339 [2023-11-28 23:42:49,075 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 351 states to 351 states and 499 transitions. [2023-11-28 23:42:49,075 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 351 [2023-11-28 23:42:49,076 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 351 [2023-11-28 23:42:49,076 INFO L73 IsDeterministic]: Start isDeterministic. Operand 351 states and 499 transitions. [2023-11-28 23:42:49,077 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:49,077 INFO L218 hiAutomatonCegarLoop]: Abstraction has 351 states and 499 transitions. [2023-11-28 23:42:49,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 351 states and 499 transitions. [2023-11-28 23:42:49,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 351 to 351. [2023-11-28 23:42:49,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 351 states, 347 states have (on average 1.420749279538905) internal successors, (493), 346 states have internal predecessors, (493), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:49,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 499 transitions. [2023-11-28 23:42:49,085 INFO L240 hiAutomatonCegarLoop]: Abstraction has 351 states and 499 transitions. [2023-11-28 23:42:49,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-28 23:42:49,086 INFO L428 stractBuchiCegarLoop]: Abstraction has 351 states and 499 transitions. [2023-11-28 23:42:49,087 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2023-11-28 23:42:49,087 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 351 states and 499 transitions. [2023-11-28 23:42:49,088 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 339 [2023-11-28 23:42:49,088 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:49,088 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:49,089 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:49,089 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:49,089 INFO L748 eck$LassoCheckResult]: Stem: 8583#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 8584#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8444#L715-4 [2023-11-28 23:42:49,090 INFO L750 eck$LassoCheckResult]: Loop: 8444#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8622#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 8366#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8367#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 8518#L722-269 havoc main_~_ha_hashv~0#1; 8612#L722-176 goto; 8560#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8404#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8405#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 8325#L722-73 assume !main_#t~switch31#1; 8326#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 8445#L722-76 assume !main_#t~switch31#1; 8446#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 8483#L722-79 assume !main_#t~switch31#1; 8484#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 8563#L722-82 assume !main_#t~switch31#1; 8370#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 8371#L722-85 assume !main_#t~switch31#1; 8407#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 8399#L722-88 assume !main_#t~switch31#1; 8400#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 8599#L722-91 assume !main_#t~switch31#1; 8317#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 8318#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 8319#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 8320#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 8535#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 8348#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 8349#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 8474#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 8611#L722-105 havoc main_#t~switch31#1; 8597#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8595#L722-107 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8596#L722-109 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8466#L722-111 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~nondet43#1 := 0; 8467#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8633#L722-114 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet44#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8555#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8630#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8621#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8628#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8330#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8298#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8299#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8390#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8414#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8539#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8358#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8459#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8461#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8536#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8293#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 8294#L722-170 goto; 8551#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8511#L722-173 goto; 8512#L722-175 goto; 8582#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8603#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 8604#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 8379#L722-193 goto; 8380#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 8416#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 8417#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 8493#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 8501#L722-202 goto; 8393#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8394#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 8541#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 8406#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 8306#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 8307#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8464#L722-260 goto; 8547#L722-262 havoc main_~_ha_bkt~0#1; 8514#L722-263 goto; 8515#L722-265 goto; 8433#L722-267 havoc main_~_ha_hashv~0#1; 8309#L722-268 goto; 8310#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 8444#L715-4 [2023-11-28 23:42:49,090 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:49,090 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 9 times [2023-11-28 23:42:49,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:49,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183809848] [2023-11-28 23:42:49,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:49,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:49,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:49,104 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:49,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:49,119 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:49,120 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:49,120 INFO L85 PathProgramCache]: Analyzing trace with hash 1560146908, now seen corresponding path program 1 times [2023-11-28 23:42:49,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:49,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569530864] [2023-11-28 23:42:49,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:49,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:49,165 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:49,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [336063488] [2023-11-28 23:42:49,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:49,166 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:49,166 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:49,169 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:49,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-28 23:42:49,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:42:49,529 INFO L262 TraceCheckSpWp]: Trace formula consists of 511 conjuncts, 24 conjunts are in the unsatisfiable core [2023-11-28 23:42:49,531 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:42:49,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:42:49,661 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:42:49,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:42:49,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [569530864] [2023-11-28 23:42:49,661 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:42:49,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [336063488] [2023-11-28 23:42:49,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [336063488] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:42:49,662 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:42:49,662 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-28 23:42:49,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2144531676] [2023-11-28 23:42:49,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:42:49,662 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:42:49,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:42:49,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-28 23:42:49,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2023-11-28 23:42:49,663 INFO L87 Difference]: Start difference. First operand 351 states and 499 transitions. cyclomatic complexity: 152 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:42:49,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:42:49,934 INFO L93 Difference]: Finished difference Result 355 states and 503 transitions. [2023-11-28 23:42:49,934 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 355 states and 503 transitions. [2023-11-28 23:42:49,937 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 343 [2023-11-28 23:42:49,940 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 355 states to 355 states and 503 transitions. [2023-11-28 23:42:49,940 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 355 [2023-11-28 23:42:49,940 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 355 [2023-11-28 23:42:49,941 INFO L73 IsDeterministic]: Start isDeterministic. Operand 355 states and 503 transitions. [2023-11-28 23:42:49,941 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:42:49,941 INFO L218 hiAutomatonCegarLoop]: Abstraction has 355 states and 503 transitions. [2023-11-28 23:42:49,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states and 503 transitions. [2023-11-28 23:42:49,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 354. [2023-11-28 23:42:49,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 354 states, 350 states have (on average 1.417142857142857) internal successors, (496), 349 states have internal predecessors, (496), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:42:49,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 502 transitions. [2023-11-28 23:42:49,950 INFO L240 hiAutomatonCegarLoop]: Abstraction has 354 states and 502 transitions. [2023-11-28 23:42:49,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-28 23:42:49,951 INFO L428 stractBuchiCegarLoop]: Abstraction has 354 states and 502 transitions. [2023-11-28 23:42:49,951 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2023-11-28 23:42:49,951 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 354 states and 502 transitions. [2023-11-28 23:42:49,953 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 342 [2023-11-28 23:42:49,953 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:42:49,953 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:42:49,953 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:42:49,954 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:42:49,954 INFO L748 eck$LassoCheckResult]: Stem: 9530#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 9531#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9390#L715-4 [2023-11-28 23:42:49,954 INFO L750 eck$LassoCheckResult]: Loop: 9390#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9569#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 9309#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9310#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 9465#L722-269 havoc main_~_ha_hashv~0#1; 9559#L722-176 goto; 9507#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9350#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9351#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 9271#L722-73 assume !main_#t~switch31#1; 9272#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 9391#L722-76 assume !main_#t~switch31#1; 9392#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 9430#L722-79 assume !main_#t~switch31#1; 9431#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 9510#L722-82 assume !main_#t~switch31#1; 9316#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 9317#L722-85 assume !main_#t~switch31#1; 9353#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 9343#L722-88 assume !main_#t~switch31#1; 9344#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 9546#L722-91 assume !main_#t~switch31#1; 9263#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 9264#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 9265#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 9266#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 9480#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 9294#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 9295#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 9421#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 9558#L722-105 havoc main_#t~switch31#1; 9544#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9541#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 9542#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9583#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 9582#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 9501#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 9502#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9577#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 9568#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9575#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 9276#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9244#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9245#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9336#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9360#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9486#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9302#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9405#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9407#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9481#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9237#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 9238#L722-170 goto; 9494#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9458#L722-173 goto; 9459#L722-175 goto; 9529#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9550#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 9551#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 9323#L722-193 goto; 9324#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 9362#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 9363#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 9438#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 9449#L722-202 goto; 9339#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9340#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 9490#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 9352#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 9254#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 9255#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9410#L722-260 goto; 9498#L722-262 havoc main_~_ha_bkt~0#1; 9463#L722-263 goto; 9464#L722-265 goto; 9386#L722-267 havoc main_~_ha_hashv~0#1; 9257#L722-268 goto; 9258#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 9390#L715-4 [2023-11-28 23:42:49,954 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:49,954 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 10 times [2023-11-28 23:42:49,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:49,955 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046190628] [2023-11-28 23:42:49,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:49,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:49,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:49,967 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:42:49,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:42:49,982 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:42:49,982 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:42:49,982 INFO L85 PathProgramCache]: Analyzing trace with hash 1276161914, now seen corresponding path program 1 times [2023-11-28 23:42:49,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:42:49,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857728705] [2023-11-28 23:42:49,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:49,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:42:50,021 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:42:50,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [989617393] [2023-11-28 23:42:50,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:42:50,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:42:50,021 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:42:50,022 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:42:50,024 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-28 23:43:25,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:43:25,254 INFO L262 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 28 conjunts are in the unsatisfiable core [2023-11-28 23:43:25,256 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:44:04,819 WARN L293 SmtUtils]: Spent 12.48s on a formula simplification that was a NOOP. DAG size: 15 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-28 23:44:33,640 WARN L293 SmtUtils]: Spent 24.11s on a formula simplification that was a NOOP. DAG size: 19 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-28 23:44:57,683 WARN L293 SmtUtils]: Spent 24.04s on a formula simplification that was a NOOP. DAG size: 21 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-28 23:45:31,422 WARN L293 SmtUtils]: Spent 24.04s on a formula simplification that was a NOOP. DAG size: 19 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-28 23:45:33,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:45:33,758 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:45:33,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:45:33,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857728705] [2023-11-28 23:45:33,759 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:45:33,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [989617393] [2023-11-28 23:45:33,759 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [989617393] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:45:33,759 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:45:33,759 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2023-11-28 23:45:33,759 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45634348] [2023-11-28 23:45:33,759 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:45:33,760 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:45:33,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:45:33,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2023-11-28 23:45:33,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=106, Unknown=2, NotChecked=0, Total=132 [2023-11-28 23:45:33,761 INFO L87 Difference]: Start difference. First operand 354 states and 502 transitions. cyclomatic complexity: 152 Second operand has 12 states, 12 states have (on average 6.5) internal successors, (78), 12 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:45:46,033 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:45:58,589 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:46:10,661 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.02s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:46:22,797 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:46:46,947 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:46:59,073 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:47:11,235 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:47:47,366 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:47:59,494 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:48:11,843 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:48:24,068 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:48:37,174 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:48:39,864 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.55s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:48:51,917 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:48:54,447 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.53s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:07,206 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:09,417 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.21s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:13,927 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.70s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:21,028 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 7.10s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:22,593 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.54s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:34,604 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:37,553 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.95s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:39,323 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.77s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:42,118 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.84s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:44,423 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.16s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:50,836 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 6.29s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:49:51,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:49:51,212 INFO L93 Difference]: Finished difference Result 375 states and 532 transitions. [2023-11-28 23:49:51,212 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 375 states and 532 transitions. [2023-11-28 23:49:51,215 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 363 [2023-11-28 23:49:51,219 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 375 states to 375 states and 532 transitions. [2023-11-28 23:49:51,219 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 375 [2023-11-28 23:49:51,220 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 375 [2023-11-28 23:49:51,220 INFO L73 IsDeterministic]: Start isDeterministic. Operand 375 states and 532 transitions. [2023-11-28 23:49:51,221 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:49:51,221 INFO L218 hiAutomatonCegarLoop]: Abstraction has 375 states and 532 transitions. [2023-11-28 23:49:51,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states and 532 transitions. [2023-11-28 23:49:51,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 364. [2023-11-28 23:49:51,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 360 states have (on average 1.413888888888889) internal successors, (509), 359 states have internal predecessors, (509), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:49:51,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 515 transitions. [2023-11-28 23:49:51,231 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 515 transitions. [2023-11-28 23:49:51,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2023-11-28 23:49:51,232 INFO L428 stractBuchiCegarLoop]: Abstraction has 364 states and 515 transitions. [2023-11-28 23:49:51,232 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2023-11-28 23:49:51,232 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 515 transitions. [2023-11-28 23:49:51,234 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 352 [2023-11-28 23:49:51,234 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:49:51,234 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:49:51,235 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:49:51,235 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:49:51,235 INFO L748 eck$LassoCheckResult]: Stem: 10522#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 10523#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10377#L715-4 [2023-11-28 23:49:51,235 INFO L750 eck$LassoCheckResult]: Loop: 10377#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10562#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 10295#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10296#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 10452#L722-269 havoc main_~_ha_hashv~0#1; 10552#L722-176 goto; 10496#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10337#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10338#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 10257#L722-73 assume !main_#t~switch31#1; 10258#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 10378#L722-76 assume !main_#t~switch31#1; 10379#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 10417#L722-79 assume !main_#t~switch31#1; 10418#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 10499#L722-82 assume !main_#t~switch31#1; 10302#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 10303#L722-85 assume !main_#t~switch31#1; 10340#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 10330#L722-88 assume !main_#t~switch31#1; 10331#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 10539#L722-91 assume !main_#t~switch31#1; 10249#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 10250#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 10251#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 10252#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 10467#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 10280#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 10281#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 10408#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 10551#L722-105 havoc main_#t~switch31#1; 10537#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10535#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 10528#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10529#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 10577#L722-116 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet44#1 := main_~_hj_j~0#1; 10564#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10565#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 10566#L722-123 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 10561#L722-125 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);assume main_#t~nondet45#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 10507#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10508#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10262#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10230#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10231#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10503#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10347#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10573#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10288#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10392#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10394#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10468#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10223#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 10224#L722-170 goto; 10484#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10445#L722-173 goto; 10446#L722-175 goto; 10521#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10543#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 10544#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 10309#L722-193 goto; 10310#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 10349#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 10350#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 10425#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 10436#L722-202 goto; 10326#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10327#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 10480#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 10339#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 10240#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 10241#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10397#L722-260 goto; 10488#L722-262 havoc main_~_ha_bkt~0#1; 10450#L722-263 goto; 10451#L722-265 goto; 10372#L722-267 havoc main_~_ha_hashv~0#1; 10243#L722-268 goto; 10244#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 10377#L715-4 [2023-11-28 23:49:51,236 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:49:51,236 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 11 times [2023-11-28 23:49:51,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:49:51,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020221046] [2023-11-28 23:49:51,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:49:51,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:49:51,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:49:51,251 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:49:51,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:49:51,267 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:49:51,268 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:49:51,268 INFO L85 PathProgramCache]: Analyzing trace with hash -391255128, now seen corresponding path program 1 times [2023-11-28 23:49:51,268 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:49:51,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209927363] [2023-11-28 23:49:51,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:49:51,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:49:51,316 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:49:51,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [830606177] [2023-11-28 23:49:51,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:49:51,317 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:49:51,317 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:49:51,319 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:49:51,322 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-28 23:49:53,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:49:53,260 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 9 conjunts are in the unsatisfiable core [2023-11-28 23:49:53,262 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:49:53,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:49:53,324 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:49:53,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:49:53,324 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209927363] [2023-11-28 23:49:53,324 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:49:53,324 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [830606177] [2023-11-28 23:49:53,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [830606177] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:49:53,324 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:49:53,324 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2023-11-28 23:49:53,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416852167] [2023-11-28 23:49:53,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:49:53,325 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:49:53,325 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:49:53,325 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2023-11-28 23:49:53,325 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2023-11-28 23:49:53,325 INFO L87 Difference]: Start difference. First operand 364 states and 515 transitions. cyclomatic complexity: 155 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:49:53,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:49:53,599 INFO L93 Difference]: Finished difference Result 371 states and 524 transitions. [2023-11-28 23:49:53,599 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 371 states and 524 transitions. [2023-11-28 23:49:53,601 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 359 [2023-11-28 23:49:53,604 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 371 states to 371 states and 524 transitions. [2023-11-28 23:49:53,604 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 371 [2023-11-28 23:49:53,604 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 371 [2023-11-28 23:49:53,605 INFO L73 IsDeterministic]: Start isDeterministic. Operand 371 states and 524 transitions. [2023-11-28 23:49:53,605 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:49:53,605 INFO L218 hiAutomatonCegarLoop]: Abstraction has 371 states and 524 transitions. [2023-11-28 23:49:53,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states and 524 transitions. [2023-11-28 23:49:53,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 364. [2023-11-28 23:49:53,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 360 states have (on average 1.4111111111111112) internal successors, (508), 359 states have internal predecessors, (508), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:49:53,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 514 transitions. [2023-11-28 23:49:53,611 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 514 transitions. [2023-11-28 23:49:53,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-11-28 23:49:53,612 INFO L428 stractBuchiCegarLoop]: Abstraction has 364 states and 514 transitions. [2023-11-28 23:49:53,612 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2023-11-28 23:49:53,612 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 514 transitions. [2023-11-28 23:49:53,614 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 352 [2023-11-28 23:49:53,614 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:49:53,614 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:49:53,614 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:49:53,614 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:49:53,615 INFO L748 eck$LassoCheckResult]: Stem: 11502#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 11503#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11359#L715-4 [2023-11-28 23:49:53,615 INFO L750 eck$LassoCheckResult]: Loop: 11359#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11541#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 11278#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 11279#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 11434#L722-269 havoc main_~_ha_hashv~0#1; 11531#L722-176 goto; 11477#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 11319#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 11320#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 11239#L722-73 assume !main_#t~switch31#1; 11240#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 11360#L722-76 assume !main_#t~switch31#1; 11361#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 11399#L722-79 assume !main_#t~switch31#1; 11400#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 11480#L722-82 assume !main_#t~switch31#1; 11285#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 11286#L722-85 assume !main_#t~switch31#1; 11322#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 11312#L722-88 assume !main_#t~switch31#1; 11313#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 11518#L722-91 assume !main_#t~switch31#1; 11231#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 11232#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 11233#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 11234#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 11449#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 11262#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 11263#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 11390#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 11530#L722-105 havoc main_#t~switch31#1; 11516#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11513#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 11514#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11560#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 11556#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 11472#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 11410#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11411#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 11487#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11488#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 11457#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11212#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 11213#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11305#L722-142 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 11328#L722-144 assume 0 == main_~_hj_j~0#1 % 4294967296 / 32 % 4294967296;main_#t~nondet48#1 := main_~_ha_hashv~0#1; 11329#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11551#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 11271#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11374#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 11376#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11450#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 11205#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 11206#L722-170 goto; 11465#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 11427#L722-173 goto; 11428#L722-175 goto; 11501#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 11522#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 11523#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 11292#L722-193 goto; 11293#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 11331#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 11332#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 11407#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 11418#L722-202 goto; 11308#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 11309#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 11461#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 11321#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 11222#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 11223#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 11379#L722-260 goto; 11469#L722-262 havoc main_~_ha_bkt~0#1; 11432#L722-263 goto; 11433#L722-265 goto; 11354#L722-267 havoc main_~_ha_hashv~0#1; 11225#L722-268 goto; 11226#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 11359#L715-4 [2023-11-28 23:49:53,615 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:49:53,615 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 12 times [2023-11-28 23:49:53,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:49:53,616 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476239976] [2023-11-28 23:49:53,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:49:53,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:49:53,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:49:53,627 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:49:53,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:49:53,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:49:53,640 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:49:53,640 INFO L85 PathProgramCache]: Analyzing trace with hash -860674678, now seen corresponding path program 1 times [2023-11-28 23:49:53,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:49:53,640 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970868615] [2023-11-28 23:49:53,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:49:53,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:49:53,678 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:49:53,678 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1406238386] [2023-11-28 23:49:53,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:49:53,679 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:49:53,679 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:49:53,682 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:49:53,684 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-28 23:50:01,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:50:01,311 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 19 conjunts are in the unsatisfiable core [2023-11-28 23:50:01,313 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:50:01,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:50:01,577 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:50:01,577 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:50:01,577 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970868615] [2023-11-28 23:50:01,578 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:50:01,578 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1406238386] [2023-11-28 23:50:01,578 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1406238386] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:50:01,578 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:50:01,578 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2023-11-28 23:50:01,578 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630855912] [2023-11-28 23:50:01,578 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:50:01,579 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:50:01,579 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:50:01,579 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2023-11-28 23:50:01,579 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2023-11-28 23:50:01,579 INFO L87 Difference]: Start difference. First operand 364 states and 514 transitions. cyclomatic complexity: 154 Second operand has 11 states, 11 states have (on average 7.181818181818182) internal successors, (79), 11 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:50:13,645 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:50:25,747 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:50:38,071 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:50:50,555 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2023-11-28 23:50:51,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:50:51,666 INFO L93 Difference]: Finished difference Result 379 states and 538 transitions. [2023-11-28 23:50:51,667 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 379 states and 538 transitions. [2023-11-28 23:50:51,669 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 367 [2023-11-28 23:50:51,673 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 379 states to 379 states and 538 transitions. [2023-11-28 23:50:51,673 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 379 [2023-11-28 23:50:51,674 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 379 [2023-11-28 23:50:51,674 INFO L73 IsDeterministic]: Start isDeterministic. Operand 379 states and 538 transitions. [2023-11-28 23:50:51,675 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:50:51,675 INFO L218 hiAutomatonCegarLoop]: Abstraction has 379 states and 538 transitions. [2023-11-28 23:50:51,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states and 538 transitions. [2023-11-28 23:50:51,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 371. [2023-11-28 23:50:51,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 371 states, 367 states have (on average 1.4141689373297002) internal successors, (519), 366 states have internal predecessors, (519), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:50:51,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371 states to 371 states and 525 transitions. [2023-11-28 23:50:51,684 INFO L240 hiAutomatonCegarLoop]: Abstraction has 371 states and 525 transitions. [2023-11-28 23:50:51,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2023-11-28 23:50:51,685 INFO L428 stractBuchiCegarLoop]: Abstraction has 371 states and 525 transitions. [2023-11-28 23:50:51,685 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2023-11-28 23:50:51,685 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 371 states and 525 transitions. [2023-11-28 23:50:51,687 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 359 [2023-11-28 23:50:51,687 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:50:51,687 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:50:51,688 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:50:51,688 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:50:51,688 INFO L748 eck$LassoCheckResult]: Stem: 12507#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 12508#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 12363#L715-4 [2023-11-28 23:50:51,688 INFO L750 eck$LassoCheckResult]: Loop: 12363#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 12547#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 12282#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 12283#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 12438#L722-269 havoc main_~_ha_hashv~0#1; 12537#L722-176 goto; 12482#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 12323#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12324#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 12242#L722-73 assume !main_#t~switch31#1; 12243#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 12364#L722-76 assume !main_#t~switch31#1; 12365#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 12403#L722-79 assume !main_#t~switch31#1; 12404#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 12485#L722-82 assume !main_#t~switch31#1; 12289#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 12290#L722-85 assume !main_#t~switch31#1; 12326#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 12316#L722-88 assume !main_#t~switch31#1; 12317#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 12524#L722-91 assume !main_#t~switch31#1; 12234#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 12235#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 12236#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 12237#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 12453#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 12265#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 12266#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 12394#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 12536#L722-105 havoc main_#t~switch31#1; 12522#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12519#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 12520#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12571#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 12570#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 12476#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 12477#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12566#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 12564#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12563#L722-128 assume !(0 == main_~_hj_i~0#1 % 4294967296); 12346#L722-130 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~nondet46#1 := main_~_hj_i~0#1; 12247#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12562#L722-135 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet47#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 12272#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12558#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 12510#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12556#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 12275#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12378#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 12380#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12454#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 12208#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 12209#L722-170 goto; 12469#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 12431#L722-173 goto; 12432#L722-175 goto; 12506#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12528#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 12529#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 12296#L722-193 goto; 12297#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 12335#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 12336#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 12411#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 12422#L722-202 goto; 12312#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 12313#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 12465#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 12325#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 12225#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 12226#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 12383#L722-260 goto; 12473#L722-262 havoc main_~_ha_bkt~0#1; 12436#L722-263 goto; 12437#L722-265 goto; 12358#L722-267 havoc main_~_ha_hashv~0#1; 12228#L722-268 goto; 12229#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 12363#L715-4 [2023-11-28 23:50:51,689 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:50:51,689 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 13 times [2023-11-28 23:50:51,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:50:51,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286051978] [2023-11-28 23:50:51,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:50:51,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:50:51,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:50:51,702 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:50:51,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:50:51,716 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:50:51,717 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:50:51,717 INFO L85 PathProgramCache]: Analyzing trace with hash 679898976, now seen corresponding path program 1 times [2023-11-28 23:50:51,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:50:51,717 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632246301] [2023-11-28 23:50:51,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:50:51,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:50:51,761 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:50:51,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [955409676] [2023-11-28 23:50:51,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:50:51,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:50:51,762 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:50:51,765 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:50:51,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-28 23:54:03,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-28 23:54:03,481 INFO L262 TraceCheckSpWp]: Trace formula consists of 510 conjuncts, 26 conjunts are in the unsatisfiable core [2023-11-28 23:54:03,483 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-28 23:54:03,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-28 23:54:03,914 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-28 23:54:03,915 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-28 23:54:03,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632246301] [2023-11-28 23:54:03,915 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2023-11-28 23:54:03,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [955409676] [2023-11-28 23:54:03,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [955409676] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-28 23:54:03,915 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-28 23:54:03,915 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2023-11-28 23:54:03,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793440970] [2023-11-28 23:54:03,915 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-28 23:54:03,916 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-11-28 23:54:03,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-28 23:54:03,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2023-11-28 23:54:03,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2023-11-28 23:54:03,917 INFO L87 Difference]: Start difference. First operand 371 states and 525 transitions. cyclomatic complexity: 158 Second operand has 10 states, 10 states have (on average 7.9) internal successors, (79), 10 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-28 23:54:06,412 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.50s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-28 23:54:18,428 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2023-11-28 23:54:19,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-28 23:54:19,479 INFO L93 Difference]: Finished difference Result 388 states and 549 transitions. [2023-11-28 23:54:19,479 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 388 states and 549 transitions. [2023-11-28 23:54:19,481 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 376 [2023-11-28 23:54:19,485 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 388 states to 388 states and 549 transitions. [2023-11-28 23:54:19,485 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 388 [2023-11-28 23:54:19,485 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 388 [2023-11-28 23:54:19,486 INFO L73 IsDeterministic]: Start isDeterministic. Operand 388 states and 549 transitions. [2023-11-28 23:54:19,486 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-11-28 23:54:19,486 INFO L218 hiAutomatonCegarLoop]: Abstraction has 388 states and 549 transitions. [2023-11-28 23:54:19,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states and 549 transitions. [2023-11-28 23:54:19,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 380. [2023-11-28 23:54:19,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 376 states have (on average 1.4148936170212767) internal successors, (532), 375 states have internal predecessors, (532), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2023-11-28 23:54:19,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 538 transitions. [2023-11-28 23:54:19,495 INFO L240 hiAutomatonCegarLoop]: Abstraction has 380 states and 538 transitions. [2023-11-28 23:54:19,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-28 23:54:19,496 INFO L428 stractBuchiCegarLoop]: Abstraction has 380 states and 538 transitions. [2023-11-28 23:54:19,497 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2023-11-28 23:54:19,497 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 538 transitions. [2023-11-28 23:54:19,498 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 368 [2023-11-28 23:54:19,498 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-11-28 23:54:19,498 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-11-28 23:54:19,498 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2023-11-28 23:54:19,498 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-28 23:54:19,498 INFO L748 eck$LassoCheckResult]: Stem: 13521#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 13522#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~switch31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc52#1.base, main_#t~malloc52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~malloc61#1.base, main_#t~malloc61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~memset~res68#1.base, main_#t~memset~res68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~post79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~nondet82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~post86#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem91#1, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~short94#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~malloc97#1.base, main_#t~malloc97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~memset~res102#1.base, main_#t~memset~res102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~nondet108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem112#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~nondet113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~nondet125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~pre128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem137#1, main_#t~mem135#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem136#1, main_#t~mem138#1, main_#t~post139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~post149#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~ite159#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem167#1, main_#t~mem166#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem171#1, main_#t~mem170#1, main_#t~mem172#1, main_#t~mem173#1, main_#t~mem175#1, main_#t~mem174#1, main_#t~mem176#1, main_#t~mem177#1, main_#t~nondet178#1, main_#t~nondet179#1, main_#t~nondet180#1, main_#t~nondet181#1, main_#t~nondet182#1, main_#t~nondet183#1, main_#t~nondet184#1, main_#t~nondet185#1, main_#t~nondet186#1, main_#t~switch187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~nondet199#1, main_#t~nondet200#1, main_#t~nondet201#1, main_#t~nondet202#1, main_#t~nondet203#1, main_#t~nondet204#1, main_#t~nondet205#1, main_#t~nondet206#1, main_#t~nondet207#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~nondet210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1, main_#t~mem220#1, main_#t~short221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~ret223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~short230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~nondet254#1, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1, main_#t~post258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1, main_#t~post269#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~ite272#1.base, main_#t~ite272#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~short277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~nondet301#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite274#1.base, main_#t~ite274#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13375#L715-4 [2023-11-28 23:54:19,499 INFO L750 eck$LassoCheckResult]: Loop: 13375#L715-4 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13560#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 13293#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 13294#L717-2 call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#3(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 13451#L722-269 havoc main_~_ha_hashv~0#1; 13551#L722-176 goto; 13495#L722-174 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 13335#L722-71 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 13336#L722-72 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch31#1 := 11 == main_~_hj_k~0#1; 13253#L722-73 assume !main_#t~switch31#1; 13254#L722-75 main_#t~switch31#1 := main_#t~switch31#1 || 10 == main_~_hj_k~0#1; 13376#L722-76 assume !main_#t~switch31#1; 13377#L722-78 main_#t~switch31#1 := main_#t~switch31#1 || 9 == main_~_hj_k~0#1; 13415#L722-79 assume !main_#t~switch31#1; 13416#L722-81 main_#t~switch31#1 := main_#t~switch31#1 || 8 == main_~_hj_k~0#1; 13498#L722-82 assume !main_#t~switch31#1; 13300#L722-84 main_#t~switch31#1 := main_#t~switch31#1 || 7 == main_~_hj_k~0#1; 13301#L722-85 assume !main_#t~switch31#1; 13338#L722-87 main_#t~switch31#1 := main_#t~switch31#1 || 6 == main_~_hj_k~0#1; 13328#L722-88 assume !main_#t~switch31#1; 13329#L722-90 main_#t~switch31#1 := main_#t~switch31#1 || 5 == main_~_hj_k~0#1; 13538#L722-91 assume !main_#t~switch31#1; 13245#L722-93 main_#t~switch31#1 := main_#t~switch31#1 || 4 == main_~_hj_k~0#1; 13246#L722-94 assume main_#t~switch31#1;call main_#t~mem39#1 := read~int#3(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem39#1 % 256 % 4294967296);havoc main_#t~mem39#1; 13247#L722-96 main_#t~switch31#1 := main_#t~switch31#1 || 3 == main_~_hj_k~0#1; 13248#L722-97 assume main_#t~switch31#1;call main_#t~mem40#1 := read~int#3(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem40#1 % 256 % 4294967296);havoc main_#t~mem40#1; 13466#L722-99 main_#t~switch31#1 := main_#t~switch31#1 || 2 == main_~_hj_k~0#1; 13276#L722-100 assume main_#t~switch31#1;call main_#t~mem41#1 := read~int#3(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem41#1 % 256 % 4294967296);havoc main_#t~mem41#1; 13277#L722-102 main_#t~switch31#1 := main_#t~switch31#1 || 1 == main_~_hj_k~0#1; 13406#L722-103 assume main_#t~switch31#1;call main_#t~mem42#1 := read~int#3(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem42#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem42#1 % 256 % 4294967296 else main_#t~mem42#1 % 256 % 4294967296 - 4294967296);havoc main_#t~mem42#1; 13550#L722-105 havoc main_#t~switch31#1; 13536#L722-171 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13533#L722-107 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet43#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 13534#L722-113 main_~_hj_i~0#1 := main_#t~nondet43#1;havoc main_#t~nondet43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13591#L722-114 assume !(0 == main_~_hj_j~0#1 % 4294967296); 13590#L722-116 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 13587#L722-118 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);assume main_#t~nondet44#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 13586#L722-120 main_~_hj_j~0#1 := main_#t~nondet44#1;havoc main_#t~nondet44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13583#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet45#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 13581#L722-127 main_~_ha_hashv~0#1 := main_#t~nondet45#1;havoc main_#t~nondet45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13580#L722-128 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet46#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 13575#L722-134 main_~_hj_i~0#1 := main_#t~nondet46#1;havoc main_#t~nondet46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13573#L722-135 assume !(0 == main_~_hj_j~0#1 % 4294967296); 13574#L722-137 assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~nondet47#1 := main_~_hj_j~0#1; 13320#L722-141 main_~_hj_j~0#1 := main_#t~nondet47#1;havoc main_#t~nondet47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13321#L722-142 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet48#1 := main_~_hj_j~0#1 % 4294967296 / 32; 13524#L722-148 main_~_ha_hashv~0#1 := main_#t~nondet48#1;havoc main_#t~nondet48#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13568#L722-149 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~nondet49#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 13286#L722-155 main_~_hj_i~0#1 := main_#t~nondet49#1;havoc main_#t~nondet49#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13390#L722-156 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~nondet50#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 13392#L722-162 main_~_hj_j~0#1 := main_#t~nondet50#1;havoc main_#t~nondet50#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13467#L722-163 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~nondet51#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 13220#L722-169 main_~_ha_hashv~0#1 := main_#t~nondet51#1;havoc main_#t~nondet51#1; 13221#L722-170 goto; 13482#L722-172 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 13444#L722-173 goto; 13445#L722-175 goto; 13520#L722-266 call write~int#3(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#3(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 13542#L722-178 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem69#1.base, main_#t~mem69#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem69#1.base, main_#t~mem69#1.offset; 13543#L722-194 call write~$Pointer$#3(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#3(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1 := read~int#3(main_#t~mem72#1.base, 20 + main_#t~mem72#1.offset, 4);call write~$Pointer$#3(main_#t~mem71#1.base, main_#t~mem71#1.offset - main_#t~mem73#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#3(main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem75#1.base, 8 + main_#t~mem75#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem76#1.base, 16 + main_#t~mem76#1.offset, 4);havoc main_#t~mem76#1.base, main_#t~mem76#1.offset; 13307#L722-193 goto; 13308#L722-264 havoc main_~_ha_bkt~0#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#3(main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);main_#t~post79#1 := main_#t~mem78#1;call write~int#3(1 + main_#t~post79#1, main_#t~mem77#1.base, 12 + main_#t~mem77#1.offset, 4);havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~post79#1; 13347#L722-203 call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1 := read~int#3(main_#t~mem80#1.base, 4 + main_#t~mem80#1.offset, 4); 13348#L722-197 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem81#1 - 1) % 4294967296;main_#t~nondet82#1 := 0; 13423#L722-201 main_~_ha_bkt~0#1 := main_#t~nondet82#1;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1;havoc main_#t~nondet82#1; 13435#L722-202 goto; 13324#L722-261 call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#3(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#3(main_#t~mem83#1.base, main_#t~mem83#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem84#1.base, main_#t~mem84#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post86#1 := main_#t~mem85#1;call write~int#3(1 + main_#t~post86#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem85#1;havoc main_#t~post86#1;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_#t~mem87#1.base, main_#t~mem87#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;call write~$Pointer$#3(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 13325#L722-205 assume main_#t~mem88#1.base != 0 || main_#t~mem88#1.offset != 0;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#3(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem89#1.base, 12 + main_#t~mem89#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset; 13478#L722-207 call write~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem91#1 := read~int#3(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem90#1 := read~int#3(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short94#1 := main_#t~mem91#1 % 4294967296 >= 10 * (1 + main_#t~mem90#1) % 4294967296; 13337#L722-208 assume main_#t~short94#1;call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$#3(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem93#1 := read~int#3(main_#t~mem92#1.base, 36 + main_#t~mem92#1.offset, 4);main_#t~short94#1 := 0 == main_#t~mem93#1 % 4294967296; 13236#L722-210 assume !main_#t~short94#1;havoc main_#t~mem91#1;havoc main_#t~mem90#1;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;havoc main_#t~mem93#1;havoc main_#t~short94#1; 13237#L722-259 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 13395#L722-260 goto; 13486#L722-262 havoc main_~_ha_bkt~0#1; 13449#L722-263 goto; 13450#L722-265 goto; 13370#L722-267 havoc main_~_ha_hashv~0#1; 13239#L722-268 goto; 13240#L715-3 call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int#2(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 13375#L715-4 [2023-11-28 23:54:19,499 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:54:19,499 INFO L85 PathProgramCache]: Analyzing trace with hash 2115, now seen corresponding path program 14 times [2023-11-28 23:54:19,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:54:19,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870527127] [2023-11-28 23:54:19,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:54:19,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:54:19,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:54:19,510 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-11-28 23:54:19,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-11-28 23:54:19,521 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-11-28 23:54:19,522 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-28 23:54:19,522 INFO L85 PathProgramCache]: Analyzing trace with hash -1443938859, now seen corresponding path program 1 times [2023-11-28 23:54:19,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-28 23:54:19,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841590968] [2023-11-28 23:54:19,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:54:19,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-28 23:54:19,560 ERROR L246 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2023-11-28 23:54:19,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [407630008] [2023-11-28 23:54:19,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-28 23:54:19,561 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-28 23:54:19,561 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-28 23:54:19,565 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-28 23:54:19,575 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50a8d564-9d05-4896-b6f1-47dfe09a5766/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process