./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/array-fpi/ms2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0e0057cc Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerReach.xml -i ../../sv-benchmarks/c/array-fpi/ms2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 125fe310e2ae1e5a109eb21d52d95bf156448ac6c5b2e6793bd0b6f80e48ce1d --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 02:44:33,030 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 02:44:33,094 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Reach-32bit-Automizer_Default.epf [2023-11-29 02:44:33,098 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 02:44:33,099 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 02:44:33,123 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 02:44:33,124 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 02:44:33,124 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 02:44:33,125 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 02:44:33,126 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 02:44:33,126 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2023-11-29 02:44:33,127 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2023-11-29 02:44:33,127 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 02:44:33,128 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 02:44:33,128 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 02:44:33,129 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 02:44:33,129 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2023-11-29 02:44:33,130 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-29 02:44:33,130 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2023-11-29 02:44:33,131 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-29 02:44:33,131 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 02:44:33,132 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2023-11-29 02:44:33,132 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2023-11-29 02:44:33,132 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2023-11-29 02:44:33,133 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-29 02:44:33,133 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 02:44:33,133 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 02:44:33,134 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 02:44:33,134 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 02:44:33,134 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2023-11-29 02:44:33,135 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2023-11-29 02:44:33,135 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2023-11-29 02:44:33,135 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 02:44:33,136 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2023-11-29 02:44:33,136 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2023-11-29 02:44:33,136 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2023-11-29 02:44:33,136 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2023-11-29 02:44:33,136 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2023-11-29 02:44:33,137 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2023-11-29 02:44:33,137 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2023-11-29 02:44:33,137 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2023-11-29 02:44:33,137 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2023-11-29 02:44:33,137 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 125fe310e2ae1e5a109eb21d52d95bf156448ac6c5b2e6793bd0b6f80e48ce1d [2023-11-29 02:44:33,368 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 02:44:33,390 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 02:44:33,393 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 02:44:33,394 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 02:44:33,394 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 02:44:33,396 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/array-fpi/ms2.c [2023-11-29 02:44:36,198 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 02:44:36,400 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 02:44:36,401 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/sv-benchmarks/c/array-fpi/ms2.c [2023-11-29 02:44:36,408 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data/6cbda9ef9/89cebef6dfe8436f88f390d0c0bac683/FLAG2d61e1f3a [2023-11-29 02:44:36,422 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data/6cbda9ef9/89cebef6dfe8436f88f390d0c0bac683 [2023-11-29 02:44:36,424 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 02:44:36,425 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 02:44:36,426 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 02:44:36,426 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 02:44:36,432 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 02:44:36,432 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,433 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@345e37ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36, skipping insertion in model container [2023-11-29 02:44:36,434 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,459 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 02:44:36,608 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/sv-benchmarks/c/array-fpi/ms2.c[586,599] [2023-11-29 02:44:36,627 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:44:36,637 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 02:44:36,650 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/sv-benchmarks/c/array-fpi/ms2.c[586,599] [2023-11-29 02:44:36,656 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:44:36,672 INFO L206 MainTranslator]: Completed translation [2023-11-29 02:44:36,672 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36 WrapperNode [2023-11-29 02:44:36,673 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 02:44:36,674 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 02:44:36,674 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 02:44:36,674 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 02:44:36,682 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,689 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,708 INFO L138 Inliner]: procedures = 17, calls = 25, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 70 [2023-11-29 02:44:36,708 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 02:44:36,709 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 02:44:36,709 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 02:44:36,709 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 02:44:36,719 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,719 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,721 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,731 INFO L175 MemorySlicer]: Split 14 memory accesses to 4 slices as follows [2, 6, 4, 2]. 43 percent of accesses are in the largest equivalence class. The 8 initializations are split as follows [2, 6, 0, 0]. The 3 writes are split as follows [0, 0, 2, 1]. [2023-11-29 02:44:36,731 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,731 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,738 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,742 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,743 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,745 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,747 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 02:44:36,748 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 02:44:36,748 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 02:44:36,748 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 02:44:36,749 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (1/1) ... [2023-11-29 02:44:36,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2023-11-29 02:44:36,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:36,777 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2023-11-29 02:44:36,782 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2023-11-29 02:44:36,812 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-29 02:44:36,812 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2023-11-29 02:44:36,812 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2023-11-29 02:44:36,812 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2023-11-29 02:44:36,812 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2023-11-29 02:44:36,813 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 02:44:36,813 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2023-11-29 02:44:36,813 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2023-11-29 02:44:36,813 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2023-11-29 02:44:36,813 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2023-11-29 02:44:36,813 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-29 02:44:36,813 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 02:44:36,814 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 02:44:36,814 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2023-11-29 02:44:36,814 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2023-11-29 02:44:36,814 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2023-11-29 02:44:36,814 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2023-11-29 02:44:36,814 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 02:44:36,899 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 02:44:36,902 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 02:44:37,055 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 02:44:37,084 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 02:44:37,084 INFO L309 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-29 02:44:37,085 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:44:37 BoogieIcfgContainer [2023-11-29 02:44:37,085 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 02:44:37,088 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2023-11-29 02:44:37,088 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2023-11-29 02:44:37,091 INFO L274 PluginConnector]: TraceAbstraction initialized [2023-11-29 02:44:37,092 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 29.11 02:44:36" (1/3) ... [2023-11-29 02:44:37,092 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27e37c43 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.11 02:44:37, skipping insertion in model container [2023-11-29 02:44:37,093 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:44:36" (2/3) ... [2023-11-29 02:44:37,093 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27e37c43 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.11 02:44:37, skipping insertion in model container [2023-11-29 02:44:37,093 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:44:37" (3/3) ... [2023-11-29 02:44:37,095 INFO L112 eAbstractionObserver]: Analyzing ICFG ms2.c [2023-11-29 02:44:37,116 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2023-11-29 02:44:37,116 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2023-11-29 02:44:37,170 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2023-11-29 02:44:37,178 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@38e7cd56, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2023-11-29 02:44:37,178 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2023-11-29 02:44:37,183 INFO L276 IsEmpty]: Start isEmpty. Operand has 16 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 15 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:37,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2023-11-29 02:44:37,190 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:44:37,191 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:44:37,192 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:44:37,197 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:37,198 INFO L85 PathProgramCache]: Analyzing trace with hash -475281051, now seen corresponding path program 1 times [2023-11-29 02:44:37,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:37,209 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107188207] [2023-11-29 02:44:37,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:37,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:37,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:37,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:37,375 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:44:37,375 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107188207] [2023-11-29 02:44:37,376 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1107188207] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:44:37,376 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:44:37,376 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-29 02:44:37,378 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623508076] [2023-11-29 02:44:37,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:44:37,384 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2023-11-29 02:44:37,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:44:37,433 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-29 02:44:37,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-29 02:44:37,436 INFO L87 Difference]: Start difference. First operand has 16 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 15 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:37,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:44:37,478 INFO L93 Difference]: Finished difference Result 29 states and 41 transitions. [2023-11-29 02:44:37,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-29 02:44:37,481 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2023-11-29 02:44:37,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:44:37,490 INFO L225 Difference]: With dead ends: 29 [2023-11-29 02:44:37,490 INFO L226 Difference]: Without dead ends: 13 [2023-11-29 02:44:37,493 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-29 02:44:37,497 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 16 SdHoareTripleChecker+Invalid, 3 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2023-11-29 02:44:37,498 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 16 Invalid, 3 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2023-11-29 02:44:37,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2023-11-29 02:44:37,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2023-11-29 02:44:37,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:37,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 15 transitions. [2023-11-29 02:44:37,532 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 15 transitions. Word has length 10 [2023-11-29 02:44:37,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:44:37,533 INFO L495 AbstractCegarLoop]: Abstraction has 13 states and 15 transitions. [2023-11-29 02:44:37,533 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:37,533 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 15 transitions. [2023-11-29 02:44:37,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2023-11-29 02:44:37,534 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:44:37,534 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:44:37,534 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2023-11-29 02:44:37,535 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:44:37,535 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:37,536 INFO L85 PathProgramCache]: Analyzing trace with hash -1284627677, now seen corresponding path program 1 times [2023-11-29 02:44:37,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:37,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901562820] [2023-11-29 02:44:37,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:37,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:37,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:37,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:37,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:44:37,671 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901562820] [2023-11-29 02:44:37,671 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1901562820] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:44:37,672 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:44:37,672 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-11-29 02:44:37,672 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940520693] [2023-11-29 02:44:37,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:44:37,674 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2023-11-29 02:44:37,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:44:37,675 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-11-29 02:44:37,675 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-29 02:44:37,675 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:37,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:44:37,717 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2023-11-29 02:44:37,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2023-11-29 02:44:37,718 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2023-11-29 02:44:37,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:44:37,719 INFO L225 Difference]: With dead ends: 25 [2023-11-29 02:44:37,719 INFO L226 Difference]: Without dead ends: 17 [2023-11-29 02:44:37,719 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2023-11-29 02:44:37,721 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 13 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2023-11-29 02:44:37,721 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 9 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2023-11-29 02:44:37,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2023-11-29 02:44:37,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2023-11-29 02:44:37,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:37,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2023-11-29 02:44:37,727 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 18 transitions. Word has length 10 [2023-11-29 02:44:37,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:44:37,727 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 18 transitions. [2023-11-29 02:44:37,728 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:37,728 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2023-11-29 02:44:37,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2023-11-29 02:44:37,729 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:44:37,729 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:44:37,729 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2023-11-29 02:44:37,729 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:44:37,730 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:37,730 INFO L85 PathProgramCache]: Analyzing trace with hash -254677122, now seen corresponding path program 1 times [2023-11-29 02:44:37,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:37,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434295151] [2023-11-29 02:44:37,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:37,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:37,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:37,951 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:44:37,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:44:37,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434295151] [2023-11-29 02:44:37,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [434295151] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:44:37,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:44:37,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-29 02:44:37,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621970504] [2023-11-29 02:44:37,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:44:37,953 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2023-11-29 02:44:37,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:44:37,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-29 02:44:37,954 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2023-11-29 02:44:37,954 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:38,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:44:38,004 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2023-11-29 02:44:38,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-29 02:44:38,004 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2023-11-29 02:44:38,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:44:38,005 INFO L225 Difference]: With dead ends: 23 [2023-11-29 02:44:38,005 INFO L226 Difference]: Without dead ends: 19 [2023-11-29 02:44:38,006 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2023-11-29 02:44:38,007 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 9 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2023-11-29 02:44:38,008 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 18 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2023-11-29 02:44:38,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2023-11-29 02:44:38,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2023-11-29 02:44:38,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:38,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2023-11-29 02:44:38,013 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 20 transitions. Word has length 14 [2023-11-29 02:44:38,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:44:38,013 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 20 transitions. [2023-11-29 02:44:38,013 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:38,014 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2023-11-29 02:44:38,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2023-11-29 02:44:38,014 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:44:38,014 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:44:38,015 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2023-11-29 02:44:38,015 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:44:38,015 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:38,016 INFO L85 PathProgramCache]: Analyzing trace with hash -577618426, now seen corresponding path program 1 times [2023-11-29 02:44:38,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:38,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911091136] [2023-11-29 02:44:38,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:38,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:38,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:38,118 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:38,119 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:44:38,119 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [911091136] [2023-11-29 02:44:38,119 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [911091136] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:44:38,119 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [331744670] [2023-11-29 02:44:38,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:38,120 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:44:38,120 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:38,121 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:44:38,125 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-11-29 02:44:38,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:38,219 INFO L262 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 02:44:38,225 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:44:38,305 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:38,305 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:44:38,354 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:38,354 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [331744670] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:44:38,354 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:44:38,354 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2023-11-29 02:44:38,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [939576104] [2023-11-29 02:44:38,355 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:44:38,355 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2023-11-29 02:44:38,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:44:38,356 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2023-11-29 02:44:38,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2023-11-29 02:44:38,357 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. Second operand has 11 states, 11 states have (on average 2.5454545454545454) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:38,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:44:38,478 INFO L93 Difference]: Finished difference Result 35 states and 40 transitions. [2023-11-29 02:44:38,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2023-11-29 02:44:38,479 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.5454545454545454) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2023-11-29 02:44:38,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:44:38,480 INFO L225 Difference]: With dead ends: 35 [2023-11-29 02:44:38,480 INFO L226 Difference]: Without dead ends: 21 [2023-11-29 02:44:38,481 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2023-11-29 02:44:38,482 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 8 mSDsluCounter, 21 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:44:38,483 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 28 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2023-11-29 02:44:38,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2023-11-29 02:44:38,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 19. [2023-11-29 02:44:38,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:38,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2023-11-29 02:44:38,488 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 21 transitions. Word has length 17 [2023-11-29 02:44:38,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:44:38,488 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 21 transitions. [2023-11-29 02:44:38,489 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.5454545454545454) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:38,489 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2023-11-29 02:44:38,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2023-11-29 02:44:38,490 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:44:38,490 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:44:38,495 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2023-11-29 02:44:38,692 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:44:38,693 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:44:38,693 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:38,693 INFO L85 PathProgramCache]: Analyzing trace with hash -1060569855, now seen corresponding path program 2 times [2023-11-29 02:44:38,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:38,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929996023] [2023-11-29 02:44:38,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:38,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:38,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:39,283 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:39,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:44:39,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929996023] [2023-11-29 02:44:39,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [929996023] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:44:39,284 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [984581148] [2023-11-29 02:44:39,284 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:44:39,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:44:39,284 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:39,286 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:44:39,289 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2023-11-29 02:44:39,363 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:44:39,364 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:44:39,370 INFO L262 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 27 conjunts are in the unsatisfiable core [2023-11-29 02:44:39,374 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:44:39,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:44:39,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 02:44:39,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:44:39,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:44:39,742 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:39,743 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:44:39,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 53 [2023-11-29 02:44:39,953 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:44:39,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 53 treesize of output 77 [2023-11-29 02:44:40,024 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:44:40,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 45 treesize of output 39 [2023-11-29 02:44:40,081 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:40,082 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [984581148] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:44:40,082 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:44:40,082 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 28 [2023-11-29 02:44:40,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [506891301] [2023-11-29 02:44:40,082 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:44:40,083 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2023-11-29 02:44:40,083 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:44:40,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2023-11-29 02:44:40,085 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=616, Unknown=0, NotChecked=0, Total=756 [2023-11-29 02:44:40,085 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. Second operand has 28 states, 28 states have (on average 1.6785714285714286) internal successors, (47), 28 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:40,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:44:40,430 INFO L93 Difference]: Finished difference Result 34 states and 40 transitions. [2023-11-29 02:44:40,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2023-11-29 02:44:40,430 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.6785714285714286) internal successors, (47), 28 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2023-11-29 02:44:40,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:44:40,431 INFO L225 Difference]: With dead ends: 34 [2023-11-29 02:44:40,431 INFO L226 Difference]: Without dead ends: 23 [2023-11-29 02:44:40,432 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=266, Invalid=994, Unknown=0, NotChecked=0, Total=1260 [2023-11-29 02:44:40,433 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 42 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 212 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 229 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 212 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2023-11-29 02:44:40,434 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 57 Invalid, 229 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 212 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2023-11-29 02:44:40,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2023-11-29 02:44:40,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2023-11-29 02:44:40,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.1428571428571428) internal successors, (24), 21 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:40,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2023-11-29 02:44:40,439 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 18 [2023-11-29 02:44:40,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:44:40,439 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2023-11-29 02:44:40,439 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.6785714285714286) internal successors, (47), 28 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:40,439 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2023-11-29 02:44:40,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2023-11-29 02:44:40,440 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:44:40,440 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:44:40,445 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2023-11-29 02:44:40,644 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:44:40,644 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:44:40,645 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:40,645 INFO L85 PathProgramCache]: Analyzing trace with hash -60842589, now seen corresponding path program 3 times [2023-11-29 02:44:40,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:40,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686338878] [2023-11-29 02:44:40,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:40,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:40,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:40,769 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 8 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:40,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:44:40,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [686338878] [2023-11-29 02:44:40,770 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [686338878] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:44:40,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1966753915] [2023-11-29 02:44:40,770 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:44:40,770 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:44:40,770 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:40,771 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:44:40,773 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2023-11-29 02:44:40,860 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2023-11-29 02:44:40,860 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:44:40,861 INFO L262 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-29 02:44:40,863 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:44:40,937 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:40,938 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:44:40,987 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:40,987 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1966753915] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:44:40,988 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:44:40,988 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 14 [2023-11-29 02:44:40,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049288681] [2023-11-29 02:44:40,988 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:44:40,989 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2023-11-29 02:44:40,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:44:40,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2023-11-29 02:44:40,990 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2023-11-29 02:44:40,990 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 14 states, 14 states have (on average 2.5) internal successors, (35), 14 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:41,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:44:41,108 INFO L93 Difference]: Finished difference Result 45 states and 50 transitions. [2023-11-29 02:44:41,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2023-11-29 02:44:41,108 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.5) internal successors, (35), 14 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2023-11-29 02:44:41,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:44:41,109 INFO L225 Difference]: With dead ends: 45 [2023-11-29 02:44:41,109 INFO L226 Difference]: Without dead ends: 25 [2023-11-29 02:44:41,110 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 32 SyntacticMatches, 5 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2023-11-29 02:44:41,111 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 12 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:44:41,111 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 31 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2023-11-29 02:44:41,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2023-11-29 02:44:41,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 23. [2023-11-29 02:44:41,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 1.1363636363636365) internal successors, (25), 22 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:41,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2023-11-29 02:44:41,116 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 21 [2023-11-29 02:44:41,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:44:41,116 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2023-11-29 02:44:41,117 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.5) internal successors, (35), 14 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:41,117 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2023-11-29 02:44:41,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2023-11-29 02:44:41,117 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:44:41,117 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:44:41,123 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2023-11-29 02:44:41,318 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:44:41,318 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:44:41,318 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:44:41,319 INFO L85 PathProgramCache]: Analyzing trace with hash -673683682, now seen corresponding path program 4 times [2023-11-29 02:44:41,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:44:41,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996756327] [2023-11-29 02:44:41,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:44:41,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:44:41,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:44:42,334 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:44:42,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:44:42,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996756327] [2023-11-29 02:44:42,334 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [996756327] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:44:42,335 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1244966239] [2023-11-29 02:44:42,335 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:44:42,335 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:44:42,335 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:44:42,336 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:44:42,337 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2023-11-29 02:44:42,394 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:44:42,394 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:44:42,395 WARN L260 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 37 conjunts are in the unsatisfiable core [2023-11-29 02:44:42,400 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:44:42,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 61 [2023-11-29 02:44:42,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2023-11-29 02:44:42,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2023-11-29 02:44:42,500 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 127 treesize of output 111 [2023-11-29 02:44:42,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 137 [2023-11-29 02:44:42,575 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:44:42,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 17 [2023-11-29 02:44:43,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 02:44:44,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2023-11-29 02:44:47,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 25 [2023-11-29 02:44:47,689 INFO L349 Elim1Store]: treesize reduction 49, result has 44.9 percent of original size [2023-11-29 02:44:47,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 100 treesize of output 76 [2023-11-29 02:44:47,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:44:47,997 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:44:47,997 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:44:48,640 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:44:48,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1244966239] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:44:48,641 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:44:48,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 40 [2023-11-29 02:44:48,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215573175] [2023-11-29 02:44:48,641 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:44:48,642 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2023-11-29 02:44:48,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:44:48,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2023-11-29 02:44:48,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=226, Invalid=1333, Unknown=1, NotChecked=0, Total=1560 [2023-11-29 02:44:48,644 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand has 40 states, 40 states have (on average 1.375) internal successors, (55), 40 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:44:52,872 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.92s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:44:58,623 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.23s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:02,642 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:08,576 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.33s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:14,985 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.32s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:19,003 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:25,272 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.86s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:31,239 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.51s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:35,426 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:48,239 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:51,074 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.69s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:45:55,078 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:02,226 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:06,536 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:10,542 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:10,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:46:10,555 INFO L93 Difference]: Finished difference Result 43 states and 49 transitions. [2023-11-29 02:46:10,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2023-11-29 02:46:10,556 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 40 states have (on average 1.375) internal successors, (55), 40 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2023-11-29 02:46:10,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:46:10,556 INFO L225 Difference]: With dead ends: 43 [2023-11-29 02:46:10,556 INFO L226 Difference]: Without dead ends: 29 [2023-11-29 02:46:10,558 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 758 ImplicationChecksByTransitivity, 35.8s TimeCoverageRelationStatistics Valid=577, Invalid=2720, Unknown=9, NotChecked=0, Total=3306 [2023-11-29 02:46:10,559 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 91 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 299 mSolverCounterSat, 53 mSolverCounterUnsat, 15 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 50.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 367 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 299 IncrementalHoareTripleChecker+Invalid, 15 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 50.4s IncrementalHoareTripleChecker+Time [2023-11-29 02:46:10,559 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [91 Valid, 57 Invalid, 367 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 299 Invalid, 15 Unknown, 0 Unchecked, 50.4s Time] [2023-11-29 02:46:10,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2023-11-29 02:46:10,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 26. [2023-11-29 02:46:10,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.12) internal successors, (28), 25 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:10,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2023-11-29 02:46:10,566 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 22 [2023-11-29 02:46:10,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:46:10,567 INFO L495 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2023-11-29 02:46:10,567 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 40 states have (on average 1.375) internal successors, (55), 40 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:10,567 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2023-11-29 02:46:10,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2023-11-29 02:46:10,568 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:46:10,568 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:46:10,572 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2023-11-29 02:46:10,768 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:10,768 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:46:10,769 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:46:10,769 INFO L85 PathProgramCache]: Analyzing trace with hash -2027085210, now seen corresponding path program 5 times [2023-11-29 02:46:10,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:46:10,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187010180] [2023-11-29 02:46:10,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:46:10,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:46:10,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:46:10,895 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:10,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:46:10,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187010180] [2023-11-29 02:46:10,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [187010180] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:46:10,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [268325196] [2023-11-29 02:46:10,896 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:46:10,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:10,896 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:46:10,897 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:46:10,900 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2023-11-29 02:46:10,985 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2023-11-29 02:46:10,985 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:46:10,986 INFO L262 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 10 conjunts are in the unsatisfiable core [2023-11-29 02:46:10,987 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:46:11,065 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 22 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:11,065 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:46:11,120 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 17 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:11,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [268325196] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:46:11,121 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:46:11,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 17 [2023-11-29 02:46:11,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761038218] [2023-11-29 02:46:11,121 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:46:11,121 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2023-11-29 02:46:11,121 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:46:11,122 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2023-11-29 02:46:11,122 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=197, Unknown=0, NotChecked=0, Total=272 [2023-11-29 02:46:11,122 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand has 17 states, 17 states have (on average 2.3529411764705883) internal successors, (40), 17 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:11,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:46:11,266 INFO L93 Difference]: Finished difference Result 55 states and 60 transitions. [2023-11-29 02:46:11,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-11-29 02:46:11,267 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.3529411764705883) internal successors, (40), 17 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2023-11-29 02:46:11,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:46:11,267 INFO L225 Difference]: With dead ends: 55 [2023-11-29 02:46:11,267 INFO L226 Difference]: Without dead ends: 29 [2023-11-29 02:46:11,268 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 37 SyntacticMatches, 7 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2023-11-29 02:46:11,269 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 21 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:46:11,269 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 31 Invalid, 115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 97 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2023-11-29 02:46:11,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2023-11-29 02:46:11,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 27. [2023-11-29 02:46:11,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:11,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 29 transitions. [2023-11-29 02:46:11,279 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 29 transitions. Word has length 25 [2023-11-29 02:46:11,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:46:11,279 INFO L495 AbstractCegarLoop]: Abstraction has 27 states and 29 transitions. [2023-11-29 02:46:11,280 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.3529411764705883) internal successors, (40), 17 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:11,280 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 29 transitions. [2023-11-29 02:46:11,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2023-11-29 02:46:11,280 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:46:11,280 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:46:11,286 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2023-11-29 02:46:11,484 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable7 [2023-11-29 02:46:11,484 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:46:11,485 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:46:11,485 INFO L85 PathProgramCache]: Analyzing trace with hash -35735967, now seen corresponding path program 6 times [2023-11-29 02:46:11,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:46:11,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662452511] [2023-11-29 02:46:11,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:46:11,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:46:11,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:46:12,782 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:12,782 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:46:12,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662452511] [2023-11-29 02:46:12,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [662452511] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:46:12,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [274957682] [2023-11-29 02:46:12,783 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:46:12,783 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:12,783 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:46:12,784 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:46:12,785 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2023-11-29 02:46:12,897 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2023-11-29 02:46:12,898 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:46:12,899 INFO L262 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 48 conjunts are in the unsatisfiable core [2023-11-29 02:46:12,903 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:46:12,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:46:13,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2023-11-29 02:46:13,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 62 [2023-11-29 02:46:13,111 INFO L349 Elim1Store]: treesize reduction 78, result has 12.4 percent of original size [2023-11-29 02:46:13,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 62 treesize of output 84 [2023-11-29 02:46:13,180 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:46:13,182 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:46:13,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 24 [2023-11-29 02:46:13,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 02:46:14,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:46:14,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2023-11-29 02:46:18,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2023-11-29 02:46:18,472 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:46:18,473 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:46:18,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:46:18,476 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:46:18,481 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:46:18,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 90 treesize of output 62 [2023-11-29 02:46:19,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2023-11-29 02:46:19,116 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 1 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:19,117 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:46:19,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 53 [2023-11-29 02:46:20,011 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:46:20,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 53 treesize of output 77 [2023-11-29 02:46:20,097 INFO L349 Elim1Store]: treesize reduction 9, result has 47.1 percent of original size [2023-11-29 02:46:20,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 26164 treesize of output 25142 [2023-11-29 02:46:20,255 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:20,255 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [274957682] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:46:20,255 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:46:20,256 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 20, 20] total 52 [2023-11-29 02:46:20,256 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116653767] [2023-11-29 02:46:20,256 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:46:20,256 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2023-11-29 02:46:20,256 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:46:20,258 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2023-11-29 02:46:20,258 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=364, Invalid=2287, Unknown=1, NotChecked=0, Total=2652 [2023-11-29 02:46:20,259 INFO L87 Difference]: Start difference. First operand 27 states and 29 transitions. Second operand has 52 states, 52 states have (on average 1.3653846153846154) internal successors, (71), 52 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:25,986 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:37,692 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.66s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:42,083 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:54,367 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:46:54,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:46:54,426 INFO L93 Difference]: Finished difference Result 52 states and 59 transitions. [2023-11-29 02:46:54,427 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2023-11-29 02:46:54,427 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 1.3653846153846154) internal successors, (71), 52 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2023-11-29 02:46:54,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:46:54,428 INFO L225 Difference]: With dead ends: 52 [2023-11-29 02:46:54,428 INFO L226 Difference]: Without dead ends: 33 [2023-11-29 02:46:54,430 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1507 ImplicationChecksByTransitivity, 24.7s TimeCoverageRelationStatistics Valid=923, Invalid=4328, Unknown=5, NotChecked=0, Total=5256 [2023-11-29 02:46:54,430 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 145 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 430 mSolverCounterSat, 72 mSolverCounterUnsat, 4 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 15.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 506 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 430 IncrementalHoareTripleChecker+Invalid, 4 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 15.4s IncrementalHoareTripleChecker+Time [2023-11-29 02:46:54,431 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 58 Invalid, 506 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 430 Invalid, 4 Unknown, 0 Unchecked, 15.4s Time] [2023-11-29 02:46:54,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2023-11-29 02:46:54,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2023-11-29 02:46:54,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.125) internal successors, (36), 32 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:54,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 36 transitions. [2023-11-29 02:46:54,446 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 36 transitions. Word has length 26 [2023-11-29 02:46:54,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:46:54,446 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 36 transitions. [2023-11-29 02:46:54,446 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 1.3653846153846154) internal successors, (71), 52 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:54,447 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 36 transitions. [2023-11-29 02:46:54,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2023-11-29 02:46:54,447 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:46:54,448 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:46:54,452 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2023-11-29 02:46:54,648 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2023-11-29 02:46:54,648 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:46:54,649 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:46:54,649 INFO L85 PathProgramCache]: Analyzing trace with hash -359935199, now seen corresponding path program 7 times [2023-11-29 02:46:54,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:46:54,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131735466] [2023-11-29 02:46:54,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:46:54,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:46:54,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:46:54,847 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 38 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:54,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:46:54,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131735466] [2023-11-29 02:46:54,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2131735466] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:46:54,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1788143520] [2023-11-29 02:46:54,847 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 02:46:54,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:54,848 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:46:54,851 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:46:54,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2023-11-29 02:46:54,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:46:54,957 INFO L262 TraceCheckSpWp]: Trace formula consists of 155 conjuncts, 12 conjunts are in the unsatisfiable core [2023-11-29 02:46:54,959 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:46:55,112 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 48 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2023-11-29 02:46:55,112 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:46:55,221 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 48 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2023-11-29 02:46:55,221 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1788143520] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:46:55,221 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:46:55,221 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 21 [2023-11-29 02:46:55,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [771848099] [2023-11-29 02:46:55,222 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:46:55,222 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2023-11-29 02:46:55,222 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:46:55,223 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2023-11-29 02:46:55,223 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=312, Unknown=0, NotChecked=0, Total=420 [2023-11-29 02:46:55,224 INFO L87 Difference]: Start difference. First operand 33 states and 36 transitions. Second operand has 21 states, 21 states have (on average 2.5714285714285716) internal successors, (54), 21 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:55,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:46:55,402 INFO L93 Difference]: Finished difference Result 69 states and 75 transitions. [2023-11-29 02:46:55,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2023-11-29 02:46:55,403 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.5714285714285716) internal successors, (54), 21 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 32 [2023-11-29 02:46:55,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:46:55,403 INFO L225 Difference]: With dead ends: 69 [2023-11-29 02:46:55,404 INFO L226 Difference]: Without dead ends: 34 [2023-11-29 02:46:55,404 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 48 SyntacticMatches, 9 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=168, Invalid=482, Unknown=0, NotChecked=0, Total=650 [2023-11-29 02:46:55,405 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 26 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:46:55,405 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 34 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2023-11-29 02:46:55,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2023-11-29 02:46:55,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2023-11-29 02:46:55,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 33 states have (on average 1.121212121212121) internal successors, (37), 33 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:55,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 37 transitions. [2023-11-29 02:46:55,421 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 37 transitions. Word has length 32 [2023-11-29 02:46:55,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:46:55,421 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 37 transitions. [2023-11-29 02:46:55,421 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.5714285714285716) internal successors, (54), 21 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:55,421 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 37 transitions. [2023-11-29 02:46:55,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2023-11-29 02:46:55,422 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:46:55,422 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:46:55,427 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2023-11-29 02:46:55,622 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:55,623 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:46:55,623 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:46:55,624 INFO L85 PathProgramCache]: Analyzing trace with hash -515514682, now seen corresponding path program 8 times [2023-11-29 02:46:55,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:46:55,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296662858] [2023-11-29 02:46:55,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:46:55,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:46:55,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:46:55,847 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 38 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:55,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:46:55,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296662858] [2023-11-29 02:46:55,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1296662858] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:46:55,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [911642867] [2023-11-29 02:46:55,848 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:46:55,848 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:55,848 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:46:55,849 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:46:55,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2023-11-29 02:46:55,945 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:46:55,946 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:46:55,947 INFO L262 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 14 conjunts are in the unsatisfiable core [2023-11-29 02:46:55,949 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:46:56,137 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 51 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:56,137 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:46:56,270 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 51 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:56,271 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [911642867] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:46:56,271 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:46:56,271 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 23 [2023-11-29 02:46:56,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620118544] [2023-11-29 02:46:56,271 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:46:56,272 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2023-11-29 02:46:56,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:46:56,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2023-11-29 02:46:56,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=375, Unknown=0, NotChecked=0, Total=506 [2023-11-29 02:46:56,273 INFO L87 Difference]: Start difference. First operand 34 states and 37 transitions. Second operand has 23 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 23 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:56,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:46:56,472 INFO L93 Difference]: Finished difference Result 75 states and 83 transitions. [2023-11-29 02:46:56,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2023-11-29 02:46:56,472 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 23 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2023-11-29 02:46:56,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:46:56,474 INFO L225 Difference]: With dead ends: 75 [2023-11-29 02:46:56,474 INFO L226 Difference]: Without dead ends: 37 [2023-11-29 02:46:56,475 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 47 SyntacticMatches, 11 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 344 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=212, Invalid=600, Unknown=0, NotChecked=0, Total=812 [2023-11-29 02:46:56,476 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 44 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 149 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 149 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:46:56,476 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 29 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 149 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2023-11-29 02:46:56,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2023-11-29 02:46:56,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 35. [2023-11-29 02:46:56,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.1176470588235294) internal successors, (38), 34 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:56,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2023-11-29 02:46:56,497 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 33 [2023-11-29 02:46:56,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:46:56,497 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2023-11-29 02:46:56,497 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 23 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:46:56,498 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2023-11-29 02:46:56,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2023-11-29 02:46:56,499 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:46:56,499 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:46:56,505 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2023-11-29 02:46:56,702 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:56,703 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:46:56,703 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:46:56,703 INFO L85 PathProgramCache]: Analyzing trace with hash -1043511359, now seen corresponding path program 9 times [2023-11-29 02:46:56,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:46:56,703 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781947098] [2023-11-29 02:46:56,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:46:56,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:46:56,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:46:58,961 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 1 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:46:58,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:46:58,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781947098] [2023-11-29 02:46:58,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [781947098] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:46:58,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1143369308] [2023-11-29 02:46:58,962 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:46:58,962 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:46:58,962 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:46:58,963 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:46:58,964 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2023-11-29 02:46:59,102 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2023-11-29 02:46:59,102 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:46:59,104 INFO L262 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 66 conjunts are in the unsatisfiable core [2023-11-29 02:46:59,109 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:46:59,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:46:59,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2023-11-29 02:46:59,289 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:46:59,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2023-11-29 02:46:59,350 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:46:59,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 38 [2023-11-29 02:46:59,424 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:46:59,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 48 [2023-11-29 02:46:59,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 02:46:59,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:46:59,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2023-11-29 02:47:00,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 29 [2023-11-29 02:47:00,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 38 [2023-11-29 02:47:00,636 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:00,637 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:00,638 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:00,647 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:00,648 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:00,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:00,717 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:47:00,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 9 select indices, 9 select index equivalence classes, 22 disjoint index pairs (out of 36 index pairs), introduced 9 new quantified variables, introduced 36 case distinctions, treesize of input 90 treesize of output 152 [2023-11-29 02:47:00,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 17 [2023-11-29 02:47:01,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:47:01,050 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:47:01,050 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:47:03,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 53 [2023-11-29 02:47:03,495 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:47:03,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 53 treesize of output 77 [2023-11-29 02:47:04,178 INFO L349 Elim1Store]: treesize reduction 60, result has 4.8 percent of original size [2023-11-29 02:47:04,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 327136591 treesize of output 301512012 [2023-11-29 02:47:06,102 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:47:06,102 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1143369308] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:47:06,102 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:47:06,102 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 26, 25] total 70 [2023-11-29 02:47:06,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261186180] [2023-11-29 02:47:06,102 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:47:06,103 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 70 states [2023-11-29 02:47:06,103 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:47:06,104 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2023-11-29 02:47:06,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=719, Invalid=4111, Unknown=0, NotChecked=0, Total=4830 [2023-11-29 02:47:06,105 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand has 70 states, 70 states have (on average 1.3571428571428572) internal successors, (95), 70 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:47:22,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:47:22,492 INFO L93 Difference]: Finished difference Result 118 states and 138 transitions. [2023-11-29 02:47:22,492 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2023-11-29 02:47:22,492 INFO L78 Accepts]: Start accepts. Automaton has has 70 states, 70 states have (on average 1.3571428571428572) internal successors, (95), 70 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2023-11-29 02:47:22,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:47:22,493 INFO L225 Difference]: With dead ends: 118 [2023-11-29 02:47:22,493 INFO L226 Difference]: Without dead ends: 71 [2023-11-29 02:47:22,497 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4878 ImplicationChecksByTransitivity, 18.8s TimeCoverageRelationStatistics Valid=2738, Invalid=13518, Unknown=0, NotChecked=0, Total=16256 [2023-11-29 02:47:22,498 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 364 mSDsluCounter, 90 mSDsCounter, 0 mSdLazyCounter, 866 mSolverCounterSat, 251 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 364 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 1117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 251 IncrementalHoareTripleChecker+Valid, 866 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2023-11-29 02:47:22,498 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [364 Valid, 95 Invalid, 1117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [251 Valid, 866 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2023-11-29 02:47:22,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2023-11-29 02:47:22,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 39. [2023-11-29 02:47:22,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 1.131578947368421) internal successors, (43), 38 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:47:22,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. [2023-11-29 02:47:22,514 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 43 transitions. Word has length 34 [2023-11-29 02:47:22,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:47:22,514 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 43 transitions. [2023-11-29 02:47:22,515 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 70 states, 70 states have (on average 1.3571428571428572) internal successors, (95), 70 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:47:22,515 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 43 transitions. [2023-11-29 02:47:22,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2023-11-29 02:47:22,515 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:47:22,515 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:47:22,520 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2023-11-29 02:47:22,716 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2023-11-29 02:47:22,716 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:47:22,716 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:47:22,716 INFO L85 PathProgramCache]: Analyzing trace with hash 1530580574, now seen corresponding path program 10 times [2023-11-29 02:47:22,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:47:22,717 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268587923] [2023-11-29 02:47:22,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:47:22,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:47:22,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:47:25,306 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:47:25,307 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:47:25,307 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268587923] [2023-11-29 02:47:25,307 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1268587923] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:47:25,307 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [588521068] [2023-11-29 02:47:25,307 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:47:25,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:47:25,307 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:47:25,308 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:47:25,309 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2023-11-29 02:47:25,387 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:47:25,387 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:47:25,389 WARN L260 TraceCheckSpWp]: Trace formula consists of 122 conjuncts, 73 conjunts are in the unsatisfiable core [2023-11-29 02:47:25,394 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:47:25,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 61 [2023-11-29 02:47:25,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2023-11-29 02:47:25,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2023-11-29 02:47:25,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 109 [2023-11-29 02:47:25,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 137 [2023-11-29 02:47:25,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 44 [2023-11-29 02:47:25,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 180 treesize of output 158 [2023-11-29 02:47:25,659 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:47:25,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 158 treesize of output 185 [2023-11-29 02:47:25,788 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:25,795 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2023-11-29 02:47:25,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 120 treesize of output 94 [2023-11-29 02:47:26,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 239 treesize of output 209 [2023-11-29 02:47:26,034 INFO L349 Elim1Store]: treesize reduction 70, result has 13.6 percent of original size [2023-11-29 02:47:26,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 6 new quantified variables, introduced 8 case distinctions, treesize of input 209 treesize of output 242 [2023-11-29 02:47:26,352 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:26,354 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:26,405 INFO L349 Elim1Store]: treesize reduction 65, result has 28.6 percent of original size [2023-11-29 02:47:26,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 9 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 7 case distinctions, treesize of input 166 treesize of output 157 [2023-11-29 02:47:26,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 311 treesize of output 271 [2023-11-29 02:47:26,841 INFO L349 Elim1Store]: treesize reduction 160, result has 13.5 percent of original size [2023-11-29 02:47:26,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 8 new quantified variables, introduced 19 case distinctions, treesize of input 271 treesize of output 308 [2023-11-29 02:47:27,335 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:27,384 INFO L349 Elim1Store]: treesize reduction 45, result has 34.8 percent of original size [2023-11-29 02:47:27,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 11 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 5 case distinctions, treesize of input 312 treesize of output 257 [2023-11-29 02:47:27,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 392 treesize of output 340 [2023-11-29 02:47:28,097 INFO L349 Elim1Store]: treesize reduction 267, result has 13.0 percent of original size [2023-11-29 02:47:28,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 8 select indices, 8 select index equivalence classes, 1 disjoint index pairs (out of 28 index pairs), introduced 10 new quantified variables, introduced 34 case distinctions, treesize of input 340 treesize of output 377 [2023-11-29 02:47:29,411 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:29,415 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:29,417 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:47:29,465 INFO L349 Elim1Store]: treesize reduction 66, result has 28.3 percent of original size [2023-11-29 02:47:29,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 9 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 7 case distinctions, treesize of input 304 treesize of output 289 [2023-11-29 02:47:36,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 02:47:40,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2023-11-29 02:47:43,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 25 [2023-11-29 02:47:46,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 33 [2023-11-29 02:47:50,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 40 [2023-11-29 02:47:53,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 47 [2023-11-29 02:48:00,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 54 [2023-11-29 02:48:00,845 INFO L349 Elim1Store]: treesize reduction 674, result has 24.4 percent of original size [2023-11-29 02:48:00,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 18 select indices, 18 select index equivalence classes, 0 disjoint index pairs (out of 153 index pairs), introduced 18 new quantified variables, introduced 153 case distinctions, treesize of input 268 treesize of output 281 [2023-11-29 02:48:01,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:48:01,667 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 22 proven. 75 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:48:01,667 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:48:04,695 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 12 proven. 85 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:48:04,695 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [588521068] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:48:04,695 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:48:04,695 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27] total 76 [2023-11-29 02:48:04,696 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1768164207] [2023-11-29 02:48:04,696 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:48:04,696 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 76 states [2023-11-29 02:48:04,696 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:48:04,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2023-11-29 02:48:04,699 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=722, Invalid=4977, Unknown=1, NotChecked=0, Total=5700 [2023-11-29 02:48:04,700 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. Second operand has 76 states, 76 states have (on average 1.355263157894737) internal successors, (103), 76 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:48:16,729 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:48:25,117 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:48:29,165 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:48:37,475 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:48:45,816 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:48:49,861 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:48:58,202 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:06,517 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:10,549 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:18,912 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:27,320 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:31,367 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:39,760 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:48,406 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.26s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:49:52,438 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:00,854 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:09,117 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:13,161 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:21,630 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:30,986 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:35,768 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:44,437 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:49,802 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2023-11-29 02:50:50,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:50:50,771 INFO L93 Difference]: Finished difference Result 69 states and 79 transitions. [2023-11-29 02:50:50,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2023-11-29 02:50:50,772 INFO L78 Accepts]: Start accepts. Automaton has has 76 states, 76 states have (on average 1.355263157894737) internal successors, (103), 76 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2023-11-29 02:50:50,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:50:50,773 INFO L225 Difference]: With dead ends: 69 [2023-11-29 02:50:50,773 INFO L226 Difference]: Without dead ends: 43 [2023-11-29 02:50:50,775 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2503 ImplicationChecksByTransitivity, 90.1s TimeCoverageRelationStatistics Valid=1488, Invalid=9209, Unknown=15, NotChecked=0, Total=10712 [2023-11-29 02:50:50,776 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 186 mSDsluCounter, 93 mSDsCounter, 0 mSdLazyCounter, 1036 mSolverCounterSat, 83 mSolverCounterUnsat, 23 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 94.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 186 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 1142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 83 IncrementalHoareTripleChecker+Valid, 1036 IncrementalHoareTripleChecker+Invalid, 23 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 94.8s IncrementalHoareTripleChecker+Time [2023-11-29 02:50:50,776 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [186 Valid, 99 Invalid, 1142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [83 Valid, 1036 Invalid, 23 Unknown, 0 Unchecked, 94.8s Time] [2023-11-29 02:50:50,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2023-11-29 02:50:50,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 42. [2023-11-29 02:50:50,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 41 states have (on average 1.048780487804878) internal successors, (43), 41 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:50:50,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 43 transitions. [2023-11-29 02:50:50,801 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 43 transitions. Word has length 38 [2023-11-29 02:50:50,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:50:50,801 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 43 transitions. [2023-11-29 02:50:50,802 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 76 states, 76 states have (on average 1.355263157894737) internal successors, (103), 76 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:50:50,802 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2023-11-29 02:50:50,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2023-11-29 02:50:50,802 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:50:50,802 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:50:50,807 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2023-11-29 02:50:51,002 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2023-11-29 02:50:51,003 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:50:51,003 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:50:51,003 INFO L85 PathProgramCache]: Analyzing trace with hash -545623258, now seen corresponding path program 11 times [2023-11-29 02:50:51,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:50:51,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [699246611] [2023-11-29 02:50:51,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:50:51,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:50:51,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:50:51,304 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 73 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:50:51,304 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:50:51,304 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [699246611] [2023-11-29 02:50:51,305 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [699246611] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:50:51,305 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [825091563] [2023-11-29 02:50:51,305 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:50:51,305 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:50:51,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:50:51,306 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:50:51,313 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2023-11-29 02:50:51,510 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2023-11-29 02:50:51,510 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:50:51,512 INFO L262 TraceCheckSpWp]: Trace formula consists of 192 conjuncts, 18 conjunts are in the unsatisfiable core [2023-11-29 02:50:51,514 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:50:51,728 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 92 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:50:51,728 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:50:51,875 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 79 proven. 41 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:50:51,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [825091563] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:50:51,876 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:50:51,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19] total 29 [2023-11-29 02:50:51,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1324970484] [2023-11-29 02:50:51,876 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:50:51,876 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2023-11-29 02:50:51,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:50:51,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2023-11-29 02:50:51,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=609, Unknown=0, NotChecked=0, Total=812 [2023-11-29 02:50:51,878 INFO L87 Difference]: Start difference. First operand 42 states and 43 transitions. Second operand has 29 states, 29 states have (on average 2.3448275862068964) internal successors, (68), 29 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:50:52,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:50:52,097 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2023-11-29 02:50:52,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-29 02:50:52,098 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 2.3448275862068964) internal successors, (68), 29 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2023-11-29 02:50:52,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:50:52,098 INFO L225 Difference]: With dead ends: 75 [2023-11-29 02:50:52,098 INFO L226 Difference]: Without dead ends: 45 [2023-11-29 02:50:52,099 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 57 SyntacticMatches, 15 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 585 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=335, Invalid=997, Unknown=0, NotChecked=0, Total=1332 [2023-11-29 02:50:52,100 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 104 mSDsluCounter, 13 mSDsCounter, 0 mSdLazyCounter, 151 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 104 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 208 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 151 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:50:52,100 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [104 Valid, 20 Invalid, 208 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 151 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2023-11-29 02:50:52,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2023-11-29 02:50:52,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 43. [2023-11-29 02:50:52,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.0476190476190477) internal successors, (44), 42 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:50:52,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 44 transitions. [2023-11-29 02:50:52,138 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 44 transitions. Word has length 41 [2023-11-29 02:50:52,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:50:52,138 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 44 transitions. [2023-11-29 02:50:52,138 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 2.3448275862068964) internal successors, (68), 29 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:50:52,138 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 44 transitions. [2023-11-29 02:50:52,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2023-11-29 02:50:52,139 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:50:52,139 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:50:52,144 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2023-11-29 02:50:52,339 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2023-11-29 02:50:52,340 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:50:52,340 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:50:52,340 INFO L85 PathProgramCache]: Analyzing trace with hash 1966256417, now seen corresponding path program 12 times [2023-11-29 02:50:52,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:50:52,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248323085] [2023-11-29 02:50:52,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:50:52,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:50:52,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:50:55,272 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 6 proven. 122 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:50:55,272 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:50:55,272 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248323085] [2023-11-29 02:50:55,272 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1248323085] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:50:55,272 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [457233623] [2023-11-29 02:50:55,272 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:50:55,273 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:50:55,273 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:50:55,273 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:50:55,274 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2023-11-29 02:50:55,439 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2023-11-29 02:50:55,439 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:50:55,441 INFO L262 TraceCheckSpWp]: Trace formula consists of 199 conjuncts, 87 conjunts are in the unsatisfiable core [2023-11-29 02:50:55,447 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:50:55,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:50:55,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2023-11-29 02:50:55,507 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:50:55,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2023-11-29 02:50:55,555 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:50:55,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 38 [2023-11-29 02:50:55,614 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:50:55,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 48 [2023-11-29 02:50:55,680 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:50:55,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 47 treesize of output 58 [2023-11-29 02:50:55,757 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:50:55,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 54 treesize of output 68 [2023-11-29 02:50:56,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 02:50:56,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:50:56,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2023-11-29 02:50:56,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:50:56,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2023-11-29 02:50:56,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:50:57,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2023-11-29 02:50:57,367 INFO L190 IndexEqualityManager]: detected not equals via solver [2023-11-29 02:50:57,428 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:50:57,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 9 select indices, 9 select index equivalence classes, 23 disjoint index pairs (out of 36 index pairs), introduced 9 new quantified variables, introduced 36 case distinctions, treesize of input 86 treesize of output 148 [2023-11-29 02:50:57,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 15 [2023-11-29 02:50:57,661 WARN L667 sPolynomialRelations]: Constructing 64(two to the power of 6 dual juncts. [2023-11-29 02:50:57,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:50:57,803 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:50:57,803 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:51:00,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2023-11-29 02:51:01,036 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:01,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 70 [2023-11-29 02:51:02,342 INFO L349 Elim1Store]: treesize reduction 8, result has 80.5 percent of original size [2023-11-29 02:51:02,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 9111628939458543884 treesize of output 9111628939458543910 [2023-11-29 02:51:28,944 WARN L293 SmtUtils]: Spent 26.53s on a formula simplification. DAG size of input: 22287 DAG size of output: 67 (called from [L 731] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2023-11-29 02:51:29,290 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 3 proven. 125 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:51:29,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [457233623] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:51:29,291 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-11-29 02:51:29,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 29, 32] total 83 [2023-11-29 02:51:29,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259479990] [2023-11-29 02:51:29,291 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-11-29 02:51:29,292 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 83 states [2023-11-29 02:51:29,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-11-29 02:51:29,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2023-11-29 02:51:29,295 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1070, Invalid=5736, Unknown=0, NotChecked=0, Total=6806 [2023-11-29 02:51:29,295 INFO L87 Difference]: Start difference. First operand 43 states and 44 transitions. Second operand has 83 states, 83 states have (on average 1.3734939759036144) internal successors, (114), 83 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:51:38,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:51:38,674 INFO L93 Difference]: Finished difference Result 79 states and 82 transitions. [2023-11-29 02:51:38,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2023-11-29 02:51:38,675 INFO L78 Accepts]: Start accepts. Automaton has has 83 states, 83 states have (on average 1.3734939759036144) internal successors, (114), 83 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 42 [2023-11-29 02:51:38,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:51:38,675 INFO L225 Difference]: With dead ends: 79 [2023-11-29 02:51:38,675 INFO L226 Difference]: Without dead ends: 47 [2023-11-29 02:51:38,677 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4058 ImplicationChecksByTransitivity, 12.8s TimeCoverageRelationStatistics Valid=2290, Invalid=11050, Unknown=0, NotChecked=0, Total=13340 [2023-11-29 02:51:38,677 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 234 mSDsluCounter, 110 mSDsCounter, 0 mSdLazyCounter, 1297 mSolverCounterSat, 127 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 234 SdHoareTripleChecker+Valid, 116 SdHoareTripleChecker+Invalid, 1424 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 127 IncrementalHoareTripleChecker+Valid, 1297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2023-11-29 02:51:38,678 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [234 Valid, 116 Invalid, 1424 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [127 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2023-11-29 02:51:38,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2023-11-29 02:51:38,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2023-11-29 02:51:38,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.0434782608695652) internal successors, (48), 46 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:51:38,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 48 transitions. [2023-11-29 02:51:38,709 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 48 transitions. Word has length 42 [2023-11-29 02:51:38,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:51:38,709 INFO L495 AbstractCegarLoop]: Abstraction has 47 states and 48 transitions. [2023-11-29 02:51:38,710 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 83 states, 83 states have (on average 1.3734939759036144) internal successors, (114), 83 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:51:38,710 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 48 transitions. [2023-11-29 02:51:38,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2023-11-29 02:51:38,710 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:51:38,710 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:51:38,715 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2023-11-29 02:51:38,911 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2023-11-29 02:51:38,911 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:51:38,911 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:51:38,912 INFO L85 PathProgramCache]: Analyzing trace with hash 945470974, now seen corresponding path program 13 times [2023-11-29 02:51:38,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-11-29 02:51:38,912 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612518451] [2023-11-29 02:51:38,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:51:38,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-11-29 02:51:38,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:51:42,226 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:51:42,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-11-29 02:51:42,226 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612518451] [2023-11-29 02:51:42,226 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612518451] provided 0 perfect and 1 imperfect interpolant sequences [2023-11-29 02:51:42,227 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1521052866] [2023-11-29 02:51:42,227 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 02:51:42,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-11-29 02:51:42,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:51:42,228 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-11-29 02:51:42,228 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2023-11-29 02:51:42,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:51:42,326 INFO L262 TraceCheckSpWp]: Trace formula consists of 214 conjuncts, 90 conjunts are in the unsatisfiable core [2023-11-29 02:51:42,331 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:51:42,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:51:42,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2023-11-29 02:51:42,453 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:42,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2023-11-29 02:51:42,516 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:42,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 38 [2023-11-29 02:51:42,584 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:42,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 48 [2023-11-29 02:51:42,656 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:42,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 47 treesize of output 58 [2023-11-29 02:51:42,737 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:42,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 54 treesize of output 68 [2023-11-29 02:51:42,827 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:42,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 7 new quantified variables, introduced 21 case distinctions, treesize of input 61 treesize of output 78 [2023-11-29 02:51:43,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2023-11-29 02:51:43,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:51:43,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2023-11-29 02:51:43,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:51:43,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2023-11-29 02:51:44,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:51:44,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2023-11-29 02:51:44,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2023-11-29 02:51:44,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2023-11-29 02:51:44,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2023-11-29 02:51:45,036 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:51:45,036 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:51:50,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 53 [2023-11-29 02:51:50,419 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:51:50,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 53 treesize of output 77 [2023-11-29 02:53:06,222 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception [2023-11-29 02:53:06,227 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2023-11-29 02:53:06,423 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2023-11-29 02:53:06,423 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: line 769947 column 7: canceled at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminate(DualJunctionSaa.java:192) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminateOne3(DualJunctionSaa.java:172) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminateOne2(DualJunctionSaa.java:151) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminateOne1(DualJunctionSaa.java:140) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminateOne0(DualJunctionSaa.java:122) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminateOne(DualJunctionSaa.java:108) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryExhaustivelyToEliminate(DualJunctionSaa.java:93) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminate(DualJunctionSaa.java:88) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToEliminateOne(QuantifierPusher.java:543) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.applyNewEliminationTechniquesExhaustively(QuantifierPusher.java:522) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.applyDualJunctionEliminationTechniques(QuantifierPusher.java:515) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective(QuantifierPusher.java:326) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:189) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:88) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:84) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:297) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:283) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.PartialQuantifierElimination.eliminate(PartialQuantifierElimination.java:51) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:238) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:399) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:271) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:341) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:184) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:110) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:337) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: line 769947 column 7: canceled at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1511) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:277) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.push(Scriptor.java:133) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.push(DiffWrapperScript.java:90) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.push(WrapperScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.push(HistoryRecordingScript.java:107) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.push(WrapperScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.UndoableWrapperScript.push(UndoableWrapperScript.java:54) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:48) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.getRedundancy(SimplifyDDA.java:620) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.simplify.SimplifyDDAWithTimeout.getRedundancy(SimplifyDDAWithTimeout.java:120) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA$Simplifier.walk(SimplifyDDA.java:370) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:115) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:106) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.simplifyOnce(SimplifyDDA.java:649) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.simplify.SimplifyDDAWithTimeout.getSimplifiedTerm(SimplifyDDAWithTimeout.java:180) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.simplify(SmtUtils.java:230) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.simplifyWithStatistics(SmtUtils.java:324) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.arrays.Elim1Store.elim1(Elim1Store.java:346) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.arrays.ElimStorePlain.applyComplexEliminationRules(ElimStorePlain.java:227) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminate(DualJunctionSaa.java:190) ... 54 more [2023-11-29 02:53:06,427 INFO L158 Benchmark]: Toolchain (without parser) took 510001.72ms. Allocated memory was 125.8MB in the beginning and 14.4GB in the end (delta: 14.3GB). Free memory was 90.1MB in the beginning and 10.6GB in the end (delta: -10.5GB). Peak memory consumption was 4.2GB. Max. memory is 16.1GB. [2023-11-29 02:53:06,427 INFO L158 Benchmark]: CDTParser took 0.20ms. Allocated memory is still 92.3MB. Free memory is still 46.6MB. There was no memory consumed. Max. memory is 16.1GB. [2023-11-29 02:53:06,427 INFO L158 Benchmark]: CACSL2BoogieTranslator took 246.88ms. Allocated memory is still 125.8MB. Free memory was 90.0MB in the beginning and 79.0MB in the end (delta: 11.0MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2023-11-29 02:53:06,428 INFO L158 Benchmark]: Boogie Procedure Inliner took 34.52ms. Allocated memory is still 125.8MB. Free memory was 79.0MB in the beginning and 77.5MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2023-11-29 02:53:06,428 INFO L158 Benchmark]: Boogie Preprocessor took 38.34ms. Allocated memory is still 125.8MB. Free memory was 77.5MB in the beginning and 75.4MB in the end (delta: 2.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2023-11-29 02:53:06,428 INFO L158 Benchmark]: RCFGBuilder took 337.18ms. Allocated memory is still 125.8MB. Free memory was 75.4MB in the beginning and 62.9MB in the end (delta: 12.5MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2023-11-29 02:53:06,428 INFO L158 Benchmark]: TraceAbstraction took 509338.66ms. Allocated memory was 125.8MB in the beginning and 14.4GB in the end (delta: 14.3GB). Free memory was 62.3MB in the beginning and 10.6GB in the end (delta: -10.6GB). Peak memory consumption was 4.2GB. Max. memory is 16.1GB. [2023-11-29 02:53:06,430 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20ms. Allocated memory is still 92.3MB. Free memory is still 46.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 246.88ms. Allocated memory is still 125.8MB. Free memory was 90.0MB in the beginning and 79.0MB in the end (delta: 11.0MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 34.52ms. Allocated memory is still 125.8MB. Free memory was 79.0MB in the beginning and 77.5MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 38.34ms. Allocated memory is still 125.8MB. Free memory was 77.5MB in the beginning and 75.4MB in the end (delta: 2.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 337.18ms. Allocated memory is still 125.8MB. Free memory was 75.4MB in the beginning and 62.9MB in the end (delta: 12.5MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * TraceAbstraction took 509338.66ms. Allocated memory was 125.8MB in the beginning and 14.4GB in the end (delta: 14.3GB). Free memory was 62.3MB in the beginning and 10.6GB in the end (delta: -10.6GB). Peak memory consumption was 4.2GB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: line 769947 column 7: canceled de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: line 769947 column 7: canceled: de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.DualJunctionSaa.tryToEliminate(DualJunctionSaa.java:192) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2023-11-29 02:53:06,637 WARN L435 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forcibly destroying the process [2023-11-29 02:53:06,724 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 137 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/config/AutomizerReach.xml -i ../../sv-benchmarks/c/array-fpi/ms2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Reach-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 125fe310e2ae1e5a109eb21d52d95bf156448ac6c5b2e6793bd0b6f80e48ce1d --- Real Ultimate output --- This is Ultimate 0.2.4-dev-0e0057c [2023-11-29 02:53:08,940 INFO L188 SettingsManager]: Resetting all preferences to default values... [2023-11-29 02:53:09,016 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/config/svcomp-Reach-32bit-Automizer_Bitvector.epf [2023-11-29 02:53:09,022 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2023-11-29 02:53:09,023 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2023-11-29 02:53:09,052 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2023-11-29 02:53:09,053 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-11-29 02:53:09,054 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-11-29 02:53:09,054 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2023-11-29 02:53:09,055 INFO L153 SettingsManager]: * Use memory slicer=true [2023-11-29 02:53:09,056 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2023-11-29 02:53:09,056 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2023-11-29 02:53:09,057 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-11-29 02:53:09,058 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2023-11-29 02:53:09,058 INFO L153 SettingsManager]: * Use SBE=true [2023-11-29 02:53:09,059 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-11-29 02:53:09,060 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2023-11-29 02:53:09,060 INFO L153 SettingsManager]: * sizeof long=4 [2023-11-29 02:53:09,061 INFO L153 SettingsManager]: * sizeof POINTER=4 [2023-11-29 02:53:09,062 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2023-11-29 02:53:09,062 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2023-11-29 02:53:09,063 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2023-11-29 02:53:09,063 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2023-11-29 02:53:09,064 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2023-11-29 02:53:09,064 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2023-11-29 02:53:09,065 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2023-11-29 02:53:09,065 INFO L153 SettingsManager]: * sizeof long double=12 [2023-11-29 02:53:09,065 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2023-11-29 02:53:09,066 INFO L153 SettingsManager]: * Use constant arrays=true [2023-11-29 02:53:09,066 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-11-29 02:53:09,067 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-11-29 02:53:09,067 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2023-11-29 02:53:09,067 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2023-11-29 02:53:09,068 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2023-11-29 02:53:09,068 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-11-29 02:53:09,068 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2023-11-29 02:53:09,069 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2023-11-29 02:53:09,069 INFO L153 SettingsManager]: * Trace refinement strategy=WOLF [2023-11-29 02:53:09,069 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2023-11-29 02:53:09,069 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2023-11-29 02:53:09,070 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2023-11-29 02:53:09,070 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2023-11-29 02:53:09,070 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2023-11-29 02:53:09,070 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2023-11-29 02:53:09,071 INFO L153 SettingsManager]: * Logic for external solver=AUFBV [2023-11-29 02:53:09,071 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 125fe310e2ae1e5a109eb21d52d95bf156448ac6c5b2e6793bd0b6f80e48ce1d [2023-11-29 02:53:09,382 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-11-29 02:53:09,402 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-11-29 02:53:09,405 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-11-29 02:53:09,406 INFO L270 PluginConnector]: Initializing CDTParser... [2023-11-29 02:53:09,406 INFO L274 PluginConnector]: CDTParser initialized [2023-11-29 02:53:09,408 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/../../sv-benchmarks/c/array-fpi/ms2.c [2023-11-29 02:53:12,233 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-11-29 02:53:12,399 INFO L384 CDTParser]: Found 1 translation units. [2023-11-29 02:53:12,400 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/sv-benchmarks/c/array-fpi/ms2.c [2023-11-29 02:53:12,408 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data/9af5e9e45/a560002c65c140fcab739c4ec8175af7/FLAG553d6c8ad [2023-11-29 02:53:12,422 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/data/9af5e9e45/a560002c65c140fcab739c4ec8175af7 [2023-11-29 02:53:12,425 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-11-29 02:53:12,427 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2023-11-29 02:53:12,428 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-11-29 02:53:12,429 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-11-29 02:53:12,434 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-11-29 02:53:12,434 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,435 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@38b7bbab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12, skipping insertion in model container [2023-11-29 02:53:12,435 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,456 INFO L177 MainTranslator]: Built tables and reachable declarations [2023-11-29 02:53:12,609 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/sv-benchmarks/c/array-fpi/ms2.c[586,599] [2023-11-29 02:53:12,628 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:53:12,640 INFO L202 MainTranslator]: Completed pre-run [2023-11-29 02:53:12,653 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/sv-benchmarks/c/array-fpi/ms2.c[586,599] [2023-11-29 02:53:12,660 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-11-29 02:53:12,676 INFO L206 MainTranslator]: Completed translation [2023-11-29 02:53:12,676 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12 WrapperNode [2023-11-29 02:53:12,676 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-11-29 02:53:12,677 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-11-29 02:53:12,678 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-11-29 02:53:12,678 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-11-29 02:53:12,685 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,694 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,715 INFO L138 Inliner]: procedures = 19, calls = 25, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 69 [2023-11-29 02:53:12,715 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-11-29 02:53:12,716 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-11-29 02:53:12,716 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-11-29 02:53:12,716 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-11-29 02:53:12,727 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,727 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,730 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,758 INFO L175 MemorySlicer]: Split 14 memory accesses to 4 slices as follows [2, 6, 4, 2]. 43 percent of accesses are in the largest equivalence class. The 8 initializations are split as follows [2, 6, 0, 0]. The 3 writes are split as follows [0, 0, 2, 1]. [2023-11-29 02:53:12,758 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,758 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,766 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,770 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,772 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,773 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,776 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-11-29 02:53:12,777 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-11-29 02:53:12,778 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-11-29 02:53:12,778 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-11-29 02:53:12,779 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (1/1) ... [2023-11-29 02:53:12,785 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2023-11-29 02:53:12,794 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 [2023-11-29 02:53:12,805 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2023-11-29 02:53:12,818 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2023-11-29 02:53:12,847 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-11-29 02:53:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2023-11-29 02:53:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#1 [2023-11-29 02:53:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#2 [2023-11-29 02:53:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#3 [2023-11-29 02:53:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-11-29 02:53:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2023-11-29 02:53:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4#0 [2023-11-29 02:53:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4#1 [2023-11-29 02:53:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4#2 [2023-11-29 02:53:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4#3 [2023-11-29 02:53:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-11-29 02:53:12,850 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-11-29 02:53:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-11-29 02:53:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4#0 [2023-11-29 02:53:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4#1 [2023-11-29 02:53:12,851 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4#2 [2023-11-29 02:53:12,851 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4#3 [2023-11-29 02:53:12,949 INFO L241 CfgBuilder]: Building ICFG [2023-11-29 02:53:12,951 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2023-11-29 02:53:13,106 INFO L282 CfgBuilder]: Performing block encoding [2023-11-29 02:53:13,135 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-11-29 02:53:13,136 INFO L309 CfgBuilder]: Removed 2 assume(true) statements. [2023-11-29 02:53:13,136 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:53:13 BoogieIcfgContainer [2023-11-29 02:53:13,136 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-11-29 02:53:13,140 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2023-11-29 02:53:13,140 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2023-11-29 02:53:13,143 INFO L274 PluginConnector]: TraceAbstraction initialized [2023-11-29 02:53:13,144 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 29.11 02:53:12" (1/3) ... [2023-11-29 02:53:13,144 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36a43296 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.11 02:53:13, skipping insertion in model container [2023-11-29 02:53:13,145 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.11 02:53:12" (2/3) ... [2023-11-29 02:53:13,145 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@36a43296 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.11 02:53:13, skipping insertion in model container [2023-11-29 02:53:13,145 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.11 02:53:13" (3/3) ... [2023-11-29 02:53:13,147 INFO L112 eAbstractionObserver]: Analyzing ICFG ms2.c [2023-11-29 02:53:13,166 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2023-11-29 02:53:13,167 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2023-11-29 02:53:13,215 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2023-11-29 02:53:13,222 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@69af25bd, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2023-11-29 02:53:13,222 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2023-11-29 02:53:13,226 INFO L276 IsEmpty]: Start isEmpty. Operand has 16 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 15 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:13,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2023-11-29 02:53:13,232 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:13,233 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:13,233 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:13,239 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:13,239 INFO L85 PathProgramCache]: Analyzing trace with hash -475281051, now seen corresponding path program 1 times [2023-11-29 02:53:13,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:13,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [721274449] [2023-11-29 02:53:13,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:53:13,252 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:13,253 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:13,255 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:13,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2023-11-29 02:53:13,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:53:13,350 INFO L262 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 1 conjunts are in the unsatisfiable core [2023-11-29 02:53:13,354 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:13,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:13,374 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-29 02:53:13,374 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:13,375 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [721274449] [2023-11-29 02:53:13,375 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [721274449] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:53:13,375 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:53:13,376 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2023-11-29 02:53:13,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190843898] [2023-11-29 02:53:13,378 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:53:13,382 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2023-11-29 02:53:13,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:13,412 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2023-11-29 02:53:13,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-29 02:53:13,415 INFO L87 Difference]: Start difference. First operand has 16 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 15 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:13,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:13,443 INFO L93 Difference]: Finished difference Result 29 states and 41 transitions. [2023-11-29 02:53:13,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2023-11-29 02:53:13,446 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2023-11-29 02:53:13,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:13,453 INFO L225 Difference]: With dead ends: 29 [2023-11-29 02:53:13,453 INFO L226 Difference]: Without dead ends: 13 [2023-11-29 02:53:13,456 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2023-11-29 02:53:13,460 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 16 SdHoareTripleChecker+Invalid, 3 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:13,461 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 16 Invalid, 3 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2023-11-29 02:53:13,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2023-11-29 02:53:13,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2023-11-29 02:53:13,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:13,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 15 transitions. [2023-11-29 02:53:13,493 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 15 transitions. Word has length 10 [2023-11-29 02:53:13,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:13,494 INFO L495 AbstractCegarLoop]: Abstraction has 13 states and 15 transitions. [2023-11-29 02:53:13,494 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:13,494 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 15 transitions. [2023-11-29 02:53:13,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2023-11-29 02:53:13,495 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:13,495 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:13,501 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2023-11-29 02:53:13,697 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:13,702 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:13,703 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:13,703 INFO L85 PathProgramCache]: Analyzing trace with hash -1284627677, now seen corresponding path program 1 times [2023-11-29 02:53:13,704 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:13,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2046136618] [2023-11-29 02:53:13,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:53:13,705 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:13,705 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:13,706 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:13,709 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2023-11-29 02:53:13,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:53:13,774 INFO L262 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 6 conjunts are in the unsatisfiable core [2023-11-29 02:53:13,776 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:13,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:13,916 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-29 02:53:13,916 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:13,916 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2046136618] [2023-11-29 02:53:13,917 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2046136618] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:53:13,917 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:53:13,917 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-29 02:53:13,917 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [390553011] [2023-11-29 02:53:13,917 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:53:13,919 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2023-11-29 02:53:13,919 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:13,920 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-29 02:53:13,920 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2023-11-29 02:53:13,920 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:14,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:14,003 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2023-11-29 02:53:14,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2023-11-29 02:53:14,004 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2023-11-29 02:53:14,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:14,005 INFO L225 Difference]: With dead ends: 25 [2023-11-29 02:53:14,005 INFO L226 Difference]: Without dead ends: 17 [2023-11-29 02:53:14,005 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2023-11-29 02:53:14,007 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 14 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:14,008 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 11 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2023-11-29 02:53:14,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2023-11-29 02:53:14,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2023-11-29 02:53:14,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:14,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2023-11-29 02:53:14,013 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 18 transitions. Word has length 10 [2023-11-29 02:53:14,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:14,013 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 18 transitions. [2023-11-29 02:53:14,014 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:14,014 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2023-11-29 02:53:14,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2023-11-29 02:53:14,014 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:14,015 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:14,017 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Ended with exit code 0 [2023-11-29 02:53:14,216 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:14,217 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:14,217 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:14,217 INFO L85 PathProgramCache]: Analyzing trace with hash -254677122, now seen corresponding path program 1 times [2023-11-29 02:53:14,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:14,218 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1576194714] [2023-11-29 02:53:14,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:53:14,218 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:14,218 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:14,219 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:14,220 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2023-11-29 02:53:14,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:53:14,295 INFO L262 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 8 conjunts are in the unsatisfiable core [2023-11-29 02:53:14,298 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:14,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:53:14,438 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2023-11-29 02:53:14,439 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2023-11-29 02:53:14,439 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:14,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1576194714] [2023-11-29 02:53:14,439 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1576194714] provided 1 perfect and 0 imperfect interpolant sequences [2023-11-29 02:53:14,439 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-11-29 02:53:14,439 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2023-11-29 02:53:14,440 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1402819641] [2023-11-29 02:53:14,440 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-11-29 02:53:14,440 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2023-11-29 02:53:14,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:14,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-11-29 02:53:14,441 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2023-11-29 02:53:14,442 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:14,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:14,508 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2023-11-29 02:53:14,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-11-29 02:53:14,509 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2023-11-29 02:53:14,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:14,510 INFO L225 Difference]: With dead ends: 23 [2023-11-29 02:53:14,510 INFO L226 Difference]: Without dead ends: 19 [2023-11-29 02:53:14,510 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2023-11-29 02:53:14,512 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 9 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:14,512 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 18 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2023-11-29 02:53:14,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2023-11-29 02:53:14,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. [2023-11-29 02:53:14,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:14,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2023-11-29 02:53:14,518 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 20 transitions. Word has length 14 [2023-11-29 02:53:14,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:14,519 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 20 transitions. [2023-11-29 02:53:14,519 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:14,519 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2023-11-29 02:53:14,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2023-11-29 02:53:14,520 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:14,520 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:14,522 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Ended with exit code 0 [2023-11-29 02:53:14,720 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:14,721 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:14,721 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:14,721 INFO L85 PathProgramCache]: Analyzing trace with hash -577618426, now seen corresponding path program 1 times [2023-11-29 02:53:14,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:14,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1598859045] [2023-11-29 02:53:14,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-11-29 02:53:14,723 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:14,723 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:14,724 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:14,725 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2023-11-29 02:53:14,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:53:14,779 INFO L262 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 10 conjunts are in the unsatisfiable core [2023-11-29 02:53:14,782 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:14,975 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:14,975 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:53:15,111 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:15,111 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:15,112 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1598859045] [2023-11-29 02:53:15,112 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1598859045] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:53:15,112 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:53:15,112 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7] total 14 [2023-11-29 02:53:15,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594815944] [2023-11-29 02:53:15,113 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:53:15,113 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2023-11-29 02:53:15,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:15,114 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2023-11-29 02:53:15,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=131, Unknown=0, NotChecked=0, Total=182 [2023-11-29 02:53:15,115 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. Second operand has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:15,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:15,350 INFO L93 Difference]: Finished difference Result 35 states and 40 transitions. [2023-11-29 02:53:15,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2023-11-29 02:53:15,351 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2023-11-29 02:53:15,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:15,352 INFO L225 Difference]: With dead ends: 35 [2023-11-29 02:53:15,352 INFO L226 Difference]: Without dead ends: 21 [2023-11-29 02:53:15,353 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=69, Invalid=203, Unknown=0, NotChecked=0, Total=272 [2023-11-29 02:53:15,354 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 33 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 120 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:15,354 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 18 Invalid, 120 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2023-11-29 02:53:15,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2023-11-29 02:53:15,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2023-11-29 02:53:15,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:15,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 22 transitions. [2023-11-29 02:53:15,359 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 22 transitions. Word has length 17 [2023-11-29 02:53:15,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:15,360 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 22 transitions. [2023-11-29 02:53:15,360 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:15,360 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2023-11-29 02:53:15,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2023-11-29 02:53:15,361 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:15,361 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:15,364 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Ended with exit code 0 [2023-11-29 02:53:15,564 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:15,564 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:15,565 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:15,565 INFO L85 PathProgramCache]: Analyzing trace with hash -1060569855, now seen corresponding path program 2 times [2023-11-29 02:53:15,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:15,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [376336150] [2023-11-29 02:53:15,565 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:53:15,565 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:15,565 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:15,566 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:15,567 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2023-11-29 02:53:15,641 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:53:15,642 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:53:15,645 INFO L262 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 20 conjunts are in the unsatisfiable core [2023-11-29 02:53:15,649 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:15,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2023-11-29 02:53:15,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:53:16,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:53:16,132 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:16,132 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:53:16,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2023-11-29 02:53:16,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 22 [2023-11-29 02:53:16,740 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:16,740 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:16,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [376336150] [2023-11-29 02:53:16,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [376336150] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:53:16,741 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:53:16,741 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 22 [2023-11-29 02:53:16,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671785712] [2023-11-29 02:53:16,741 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:53:16,742 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2023-11-29 02:53:16,742 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:16,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2023-11-29 02:53:16,743 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=371, Unknown=0, NotChecked=0, Total=462 [2023-11-29 02:53:16,744 INFO L87 Difference]: Start difference. First operand 20 states and 22 transitions. Second operand has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 22 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:17,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:17,780 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2023-11-29 02:53:17,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2023-11-29 02:53:17,780 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 22 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2023-11-29 02:53:17,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:17,781 INFO L225 Difference]: With dead ends: 46 [2023-11-29 02:53:17,782 INFO L226 Difference]: Without dead ends: 40 [2023-11-29 02:53:17,783 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=222, Invalid=834, Unknown=0, NotChecked=0, Total=1056 [2023-11-29 02:53:17,783 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 117 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:17,784 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [117 Valid, 34 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2023-11-29 02:53:17,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2023-11-29 02:53:17,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 22. [2023-11-29 02:53:17,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.1428571428571428) internal successors, (24), 21 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:17,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2023-11-29 02:53:17,790 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 18 [2023-11-29 02:53:17,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:17,790 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2023-11-29 02:53:17,790 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 22 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:17,791 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2023-11-29 02:53:17,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2023-11-29 02:53:17,791 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:17,791 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:17,794 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Ended with exit code 0 [2023-11-29 02:53:17,992 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:17,992 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:17,992 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:17,992 INFO L85 PathProgramCache]: Analyzing trace with hash -60842589, now seen corresponding path program 3 times [2023-11-29 02:53:17,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:17,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1783121402] [2023-11-29 02:53:17,993 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:53:17,993 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:17,993 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:17,994 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:18,001 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2023-11-29 02:53:18,084 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2023-11-29 02:53:18,084 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:53:18,087 INFO L262 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 15 conjunts are in the unsatisfiable core [2023-11-29 02:53:18,090 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:18,326 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 7 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:18,326 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:53:18,701 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:18,702 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:18,702 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1783121402] [2023-11-29 02:53:18,702 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1783121402] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:53:18,702 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:53:18,702 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2023-11-29 02:53:18,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330956811] [2023-11-29 02:53:18,702 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:53:18,703 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2023-11-29 02:53:18,703 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:18,704 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2023-11-29 02:53:18,704 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=288, Unknown=0, NotChecked=0, Total=380 [2023-11-29 02:53:18,705 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 20 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:19,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:19,933 INFO L93 Difference]: Finished difference Result 73 states and 89 transitions. [2023-11-29 02:53:19,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2023-11-29 02:53:19,934 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 20 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2023-11-29 02:53:19,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:19,936 INFO L225 Difference]: With dead ends: 73 [2023-11-29 02:53:19,936 INFO L226 Difference]: Without dead ends: 53 [2023-11-29 02:53:19,937 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 291 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=332, Invalid=1074, Unknown=0, NotChecked=0, Total=1406 [2023-11-29 02:53:19,938 INFO L413 NwaCegarLoop]: 6 mSDtfsCounter, 111 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:19,938 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [111 Valid, 35 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2023-11-29 02:53:19,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2023-11-29 02:53:19,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 41. [2023-11-29 02:53:19,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 40 states have (on average 1.2) internal successors, (48), 40 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:19,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 48 transitions. [2023-11-29 02:53:19,950 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 48 transitions. Word has length 21 [2023-11-29 02:53:19,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:19,950 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 48 transitions. [2023-11-29 02:53:19,950 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 20 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:19,951 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2023-11-29 02:53:19,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2023-11-29 02:53:19,952 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:19,952 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:19,955 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2023-11-29 02:53:20,152 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:20,153 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:20,153 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:20,153 INFO L85 PathProgramCache]: Analyzing trace with hash -673683682, now seen corresponding path program 4 times [2023-11-29 02:53:20,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:20,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [689201265] [2023-11-29 02:53:20,153 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:53:20,154 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:20,154 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:20,154 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:20,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2023-11-29 02:53:20,218 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:53:20,218 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:53:20,221 INFO L262 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 27 conjunts are in the unsatisfiable core [2023-11-29 02:53:20,225 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:20,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2023-11-29 02:53:20,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2023-11-29 02:53:20,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:53:20,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:53:20,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:53:20,904 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:20,904 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:53:21,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 55 [2023-11-29 02:53:21,615 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:53:21,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 782 treesize of output 718 [2023-11-29 02:53:23,446 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:23,446 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:23,446 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [689201265] [2023-11-29 02:53:23,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [689201265] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:53:23,446 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:53:23,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 28 [2023-11-29 02:53:23,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1481377103] [2023-11-29 02:53:23,447 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:53:23,447 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2023-11-29 02:53:23,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:23,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2023-11-29 02:53:23,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=621, Unknown=0, NotChecked=0, Total=756 [2023-11-29 02:53:23,449 INFO L87 Difference]: Start difference. First operand 41 states and 48 transitions. Second operand has 28 states, 28 states have (on average 1.5) internal successors, (42), 28 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:29,614 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2023-11-29 02:53:33,634 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2023-11-29 02:53:34,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:34,212 INFO L93 Difference]: Finished difference Result 70 states and 79 transitions. [2023-11-29 02:53:34,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2023-11-29 02:53:34,213 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.5) internal successors, (42), 28 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2023-11-29 02:53:34,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:34,214 INFO L225 Difference]: With dead ends: 70 [2023-11-29 02:53:34,214 INFO L226 Difference]: Without dead ends: 66 [2023-11-29 02:53:34,215 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 381 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=297, Invalid=1343, Unknown=0, NotChecked=0, Total=1640 [2023-11-29 02:53:34,216 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 106 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 340 mSolverCounterSat, 32 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 106 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 374 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 340 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.2s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:34,216 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [106 Valid, 47 Invalid, 374 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 340 Invalid, 2 Unknown, 0 Unchecked, 9.2s Time] [2023-11-29 02:53:34,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2023-11-29 02:53:34,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 41. [2023-11-29 02:53:34,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 40 states have (on average 1.2) internal successors, (48), 40 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:34,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 48 transitions. [2023-11-29 02:53:34,226 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 48 transitions. Word has length 22 [2023-11-29 02:53:34,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:34,227 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 48 transitions. [2023-11-29 02:53:34,227 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.5) internal successors, (42), 28 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:34,227 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2023-11-29 02:53:34,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2023-11-29 02:53:34,228 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:34,228 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:34,231 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2023-11-29 02:53:34,428 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:34,428 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:34,429 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:34,429 INFO L85 PathProgramCache]: Analyzing trace with hash -2027085210, now seen corresponding path program 5 times [2023-11-29 02:53:34,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:34,429 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [677612930] [2023-11-29 02:53:34,429 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2023-11-29 02:53:34,429 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:34,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:34,430 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:34,431 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2023-11-29 02:53:34,506 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2023-11-29 02:53:34,506 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:53:34,510 INFO L262 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-29 02:53:34,512 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:34,766 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:34,766 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:53:35,629 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:35,630 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:35,630 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [677612930] [2023-11-29 02:53:35,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [677612930] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:53:35,630 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:53:35,630 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 27 [2023-11-29 02:53:35,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6110403] [2023-11-29 02:53:35,630 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:53:35,631 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2023-11-29 02:53:35,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:35,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2023-11-29 02:53:35,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=555, Unknown=0, NotChecked=0, Total=702 [2023-11-29 02:53:35,632 INFO L87 Difference]: Start difference. First operand 41 states and 48 transitions. Second operand has 27 states, 27 states have (on average 1.7037037037037037) internal successors, (46), 27 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:36,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:36,506 INFO L93 Difference]: Finished difference Result 86 states and 98 transitions. [2023-11-29 02:53:36,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2023-11-29 02:53:36,507 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 1.7037037037037037) internal successors, (46), 27 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2023-11-29 02:53:36,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:36,507 INFO L225 Difference]: With dead ends: 86 [2023-11-29 02:53:36,507 INFO L226 Difference]: Without dead ends: 51 [2023-11-29 02:53:36,508 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 292 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=258, Invalid=1074, Unknown=0, NotChecked=0, Total=1332 [2023-11-29 02:53:36,509 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 85 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 85 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 363 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:36,509 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [85 Valid, 35 Invalid, 363 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 320 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2023-11-29 02:53:36,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2023-11-29 02:53:36,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 45. [2023-11-29 02:53:36,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 44 states have (on average 1.1818181818181819) internal successors, (52), 44 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:36,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 52 transitions. [2023-11-29 02:53:36,516 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 52 transitions. Word has length 25 [2023-11-29 02:53:36,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:36,516 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 52 transitions. [2023-11-29 02:53:36,516 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 1.7037037037037037) internal successors, (46), 27 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:36,516 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2023-11-29 02:53:36,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2023-11-29 02:53:36,517 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:36,517 INFO L195 NwaCegarLoop]: trace histogram [6, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:36,520 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Ended with exit code 0 [2023-11-29 02:53:36,717 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:36,718 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:36,718 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:36,718 INFO L85 PathProgramCache]: Analyzing trace with hash 2030281827, now seen corresponding path program 6 times [2023-11-29 02:53:36,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:36,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [325760952] [2023-11-29 02:53:36,719 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2023-11-29 02:53:36,719 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:36,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:36,719 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:36,720 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2023-11-29 02:53:36,819 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2023-11-29 02:53:36,819 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:53:36,822 INFO L262 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 17 conjunts are in the unsatisfiable core [2023-11-29 02:53:36,824 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:37,148 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:37,149 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:53:37,863 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:37,863 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:37,863 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [325760952] [2023-11-29 02:53:37,863 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [325760952] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:53:37,863 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:53:37,864 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13] total 26 [2023-11-29 02:53:37,864 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [570367620] [2023-11-29 02:53:37,864 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:53:37,864 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2023-11-29 02:53:37,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:37,865 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2023-11-29 02:53:37,865 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2023-11-29 02:53:37,866 INFO L87 Difference]: Start difference. First operand 45 states and 52 transitions. Second operand has 26 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:38,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:53:38,681 INFO L93 Difference]: Finished difference Result 110 states and 130 transitions. [2023-11-29 02:53:38,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2023-11-29 02:53:38,682 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2023-11-29 02:53:38,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:53:38,683 INFO L225 Difference]: With dead ends: 110 [2023-11-29 02:53:38,683 INFO L226 Difference]: Without dead ends: 82 [2023-11-29 02:53:38,684 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 263 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=306, Invalid=1026, Unknown=0, NotChecked=0, Total=1332 [2023-11-29 02:53:38,684 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 222 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 606 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 663 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 606 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2023-11-29 02:53:38,685 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [222 Valid, 81 Invalid, 663 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 606 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2023-11-29 02:53:38,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2023-11-29 02:53:38,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 53. [2023-11-29 02:53:38,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.1346153846153846) internal successors, (59), 52 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:38,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 59 transitions. [2023-11-29 02:53:38,697 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 59 transitions. Word has length 25 [2023-11-29 02:53:38,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:53:38,697 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 59 transitions. [2023-11-29 02:53:38,697 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:53:38,697 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 59 transitions. [2023-11-29 02:53:38,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2023-11-29 02:53:38,698 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:53:38,698 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:53:38,702 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2023-11-29 02:53:38,899 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:38,899 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:53:38,900 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:53:38,900 INFO L85 PathProgramCache]: Analyzing trace with hash -35735967, now seen corresponding path program 7 times [2023-11-29 02:53:38,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:53:38,900 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2121260753] [2023-11-29 02:53:38,900 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2023-11-29 02:53:38,900 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:53:38,900 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:53:38,901 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:53:38,902 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2023-11-29 02:53:38,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-11-29 02:53:38,982 INFO L262 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 37 conjunts are in the unsatisfiable core [2023-11-29 02:53:38,986 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:53:39,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2023-11-29 02:53:39,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2023-11-29 02:53:39,175 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:53:39,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 34 [2023-11-29 02:53:39,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:53:39,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:53:39,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:53:40,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:53:40,129 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:40,129 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:53:41,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 123 treesize of output 117 [2023-11-29 02:53:42,054 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:53:42,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 121378 treesize of output 115234 [2023-11-29 02:53:54,902 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:53:54,902 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:53:54,903 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2121260753] [2023-11-29 02:53:54,903 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2121260753] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:53:54,903 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:53:54,903 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16] total 31 [2023-11-29 02:53:54,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1854421787] [2023-11-29 02:53:54,903 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:53:54,903 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2023-11-29 02:53:54,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:53:54,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2023-11-29 02:53:54,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=790, Unknown=0, NotChecked=0, Total=930 [2023-11-29 02:53:54,905 INFO L87 Difference]: Start difference. First operand 53 states and 59 transitions. Second operand has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:54:26,173 WARN L293 SmtUtils]: Spent 9.97s on a formula simplification. DAG size of input: 164 DAG size of output: 160 (called from [L 391] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2023-11-29 02:54:54,326 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [] [2023-11-29 02:55:09,841 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.25s for a HTC check with result INVALID. Formula has sorts [Array, Bool, BitVec], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2023-11-29 02:55:43,144 WARN L293 SmtUtils]: Spent 9.66s on a formula simplification. DAG size of input: 170 DAG size of output: 166 (called from [L 391] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2023-11-29 02:56:08,106 WARN L293 SmtUtils]: Spent 8.63s on a formula simplification. DAG size of input: 172 DAG size of output: 168 (called from [L 391] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2023-11-29 02:56:09,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:56:09,235 INFO L93 Difference]: Finished difference Result 125 states and 136 transitions. [2023-11-29 02:56:09,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2023-11-29 02:56:09,236 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2023-11-29 02:56:09,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:56:09,237 INFO L225 Difference]: With dead ends: 125 [2023-11-29 02:56:09,237 INFO L226 Difference]: Without dead ends: 119 [2023-11-29 02:56:09,238 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 662 ImplicationChecksByTransitivity, 128.2s TimeCoverageRelationStatistics Valid=425, Invalid=2432, Unknown=5, NotChecked=0, Total=2862 [2023-11-29 02:56:09,239 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 135 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 509 mSolverCounterSat, 47 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 16.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 557 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 509 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 17.5s IncrementalHoareTripleChecker+Time [2023-11-29 02:56:09,239 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [135 Valid, 83 Invalid, 557 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 509 Invalid, 1 Unknown, 0 Unchecked, 17.5s Time] [2023-11-29 02:56:09,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2023-11-29 02:56:09,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 53. [2023-11-29 02:56:09,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.1153846153846154) internal successors, (58), 52 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:09,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2023-11-29 02:56:09,255 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 26 [2023-11-29 02:56:09,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:56:09,255 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2023-11-29 02:56:09,255 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:09,255 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2023-11-29 02:56:09,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2023-11-29 02:56:09,256 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:56:09,257 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:56:09,259 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Ended with exit code 0 [2023-11-29 02:56:09,457 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:56:09,457 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:56:09,457 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:09,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2137974851, now seen corresponding path program 8 times [2023-11-29 02:56:09,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:56:09,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1929668947] [2023-11-29 02:56:09,458 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2023-11-29 02:56:09,458 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:56:09,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:56:09,459 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:56:09,459 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2023-11-29 02:56:09,535 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2023-11-29 02:56:09,536 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:56:09,539 INFO L262 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 16 conjunts are in the unsatisfiable core [2023-11-29 02:56:09,540 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:10,384 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 13 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:10,384 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:56:11,487 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 13 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:11,487 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:56:11,487 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1929668947] [2023-11-29 02:56:11,487 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1929668947] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:56:11,487 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:56:11,487 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13] total 26 [2023-11-29 02:56:11,487 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808987192] [2023-11-29 02:56:11,487 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:56:11,488 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2023-11-29 02:56:11,488 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:56:11,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2023-11-29 02:56:11,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=509, Unknown=0, NotChecked=0, Total=650 [2023-11-29 02:56:11,488 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand has 26 states, 26 states have (on average 1.9615384615384615) internal successors, (51), 26 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:12,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:56:12,769 INFO L93 Difference]: Finished difference Result 92 states and 99 transitions. [2023-11-29 02:56:12,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2023-11-29 02:56:12,769 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.9615384615384615) internal successors, (51), 26 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2023-11-29 02:56:12,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:56:12,770 INFO L225 Difference]: With dead ends: 92 [2023-11-29 02:56:12,770 INFO L226 Difference]: Without dead ends: 53 [2023-11-29 02:56:12,770 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 194 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=165, Invalid=647, Unknown=0, NotChecked=0, Total=812 [2023-11-29 02:56:12,771 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 56 mSDsluCounter, 23 mSDsCounter, 0 mSdLazyCounter, 393 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 418 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 393 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2023-11-29 02:56:12,771 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 27 Invalid, 418 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 393 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2023-11-29 02:56:12,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2023-11-29 02:56:12,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2023-11-29 02:56:12,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.0961538461538463) internal successors, (57), 52 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:12,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 57 transitions. [2023-11-29 02:56:12,780 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 57 transitions. Word has length 29 [2023-11-29 02:56:12,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:56:12,780 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 57 transitions. [2023-11-29 02:56:12,780 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.9615384615384615) internal successors, (51), 26 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:56:12,781 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 57 transitions. [2023-11-29 02:56:12,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2023-11-29 02:56:12,781 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:56:12,782 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:56:12,784 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (12)] Ended with exit code 0 [2023-11-29 02:56:12,982 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:56:12,982 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:56:12,983 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:56:12,983 INFO L85 PathProgramCache]: Analyzing trace with hash 1525679806, now seen corresponding path program 9 times [2023-11-29 02:56:12,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:56:12,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1531367659] [2023-11-29 02:56:12,983 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2023-11-29 02:56:12,983 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:56:12,983 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:56:12,984 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:56:12,985 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2023-11-29 02:56:13,108 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2023-11-29 02:56:13,108 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:56:13,113 INFO L262 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 45 conjunts are in the unsatisfiable core [2023-11-29 02:56:13,118 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:56:13,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:56:13,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2023-11-29 02:56:13,513 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:56:13,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2023-11-29 02:56:13,643 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:56:13,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 38 [2023-11-29 02:56:14,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:56:14,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:56:14,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:56:15,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:56:15,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:56:15,971 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:56:15,972 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-11-29 02:56:21,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 211 treesize of output 203 [2023-11-29 02:56:21,565 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:56:21,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 2224086002 treesize of output 2156977138 [2023-11-29 02:56:47,470 WARN L876 $PredicateComparison]: unable to prove that (let ((.cse0 (bvadd (_ bv3 32) |c_ULTIMATE.start_main_~i~0#1|))) (or (bvslt (bvadd (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|) c_~N~0) (not (bvslt .cse0 c_~N~0)) (let ((.cse33 (bvmul (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|))) (let ((.cse12 (= (_ bv16 32) .cse33)) (.cse15 (= (bvadd (_ bv8 32) .cse33) (_ bv0 32))) (.cse19 (= (bvadd (_ bv4 32) .cse33) (_ bv0 32))) (.cse32 (= (_ bv4 32) .cse33)) (.cse9 (bvsrem |c_ULTIMATE.start_main_~i~0#1| (_ bv2 32))) (.cse5 (= (_ bv12 32) .cse33)) (.cse10 (bvsrem (bvadd (_ bv1 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse8 (bvsrem (bvadd (_ bv2 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse7 (bvsrem .cse0 (_ bv2 32))) (.cse31 (= (_ bv0 32) .cse33))) (let ((.cse3 (not .cse31)) (.cse14 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (.cse18 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (.cse20 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (.cse4 (forall ((v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (.cse2 (= (_ bv8 32) .cse33)) (.cse23 (not .cse5)) (.cse16 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (.cse28 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0))) (.cse29 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0)))) (.cse1 (forall ((v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (.cse6 (and (bvsle (bvadd .cse10 .cse9 .cse8 .cse7) c_~N~0) .cse32)) (.cse27 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0))) (.cse21 (not .cse19)) (.cse13 (not .cse15)) (.cse24 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (.cse17 (not .cse12)) (.cse22 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (.cse11 (not .cse32))) (and (or .cse1 (not .cse2)) (or .cse1 .cse3 .cse4) (or .cse5 .cse6 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse1 .cse11 .cse4) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse13 .cse1 .cse14) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse15 (and (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse16 .cse17 .cse4))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse13 .cse1 .cse18) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse1 .cse20 .cse21) (or .cse15 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12))))) (or .cse22 .cse23 .cse4) (or (and (or .cse15 (and (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse22 .cse20 .cse21) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse24 .cse17 .cse4)) .cse15) (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17)) .cse19) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse22 .cse11 .cse4) (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) .cse6) (or (let ((.cse25 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (.cse30 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (.cse26 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (and (or .cse3 .cse4) (or .cse5 .cse6 (and (or .cse15 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse17) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))))) (or .cse13 .cse14) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse17) (or (and (or .cse13 .cse18) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (or .cse15 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse12) (or .cse25 .cse17 .cse4) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse12) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (or .cse11 .cse4) (or .cse20 .cse21))) (or .cse23 .cse26 .cse4) (or (and (or .cse5 (and (or .cse27 .cse21) .cse11 (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or .cse28 .cse13) (or .cse15 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)) .cse12) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or .cse25 .cse17)))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0))) .cse12) (or .cse15 (and (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or .cse13 .cse29)) .cse6) (or .cse23 .cse26) (or .cse6 (and (or .cse15 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12))) (or .cse27 .cse26 .cse21) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse11 .cse26) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse15 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or .cse30 .cse17))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17)) .cse19) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))))) .cse31) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse20 .cse26 .cse21) (or .cse15 (and (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12))) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or .cse15 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse30 .cse17 .cse4) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) .cse19) (or .cse11 .cse26 .cse4) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17)) .cse6))) .cse2) (or (and (or .cse22 .cse23) (or .cse5 .cse6 (and (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse16 .cse17) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) .cse15) (or .cse28 .cse13 .cse1) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) .cse19) (or .cse15 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse13 .cse1 .cse29) (or .cse27 .cse1 .cse21) (or .cse1 .cse11) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12))) (or .cse6 (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse15 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse22 .cse27 .cse21) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse15 (and (or .cse24 .cse17) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12)))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse22 .cse11)))) .cse31))))))) is different from true [2023-11-29 02:57:12,985 WARN L876 $PredicateComparison]: unable to prove that (let ((.cse31 (bvadd (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|))) (or (bvslt (bvadd (_ bv5 32) |c_ULTIMATE.start_main_~i~0#1|) c_~N~0) (let ((.cse30 (bvmul (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|))) (let ((.cse22 (= (_ bv8 32) .cse30)) (.cse10 (= (_ bv12 32) .cse30)) (.cse12 (= (bvadd (_ bv8 32) .cse30) (_ bv0 32))) (.cse9 (= (_ bv0 32) (bvadd (_ bv12 32) .cse30))) (.cse4 (bvsrem (bvadd (_ bv1 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse1 (bvsrem .cse31 (_ bv2 32))) (.cse2 (bvsrem (bvadd (_ bv2 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse3 (bvsrem (bvadd (_ bv3 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse29 (= (bvadd (_ bv4 32) .cse30) (_ bv0 32)))) (let ((.cse18 (not .cse29)) (.cse8 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (.cse13 (forall ((v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (.cse21 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (.cse19 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (.cse17 (= (_ bv4 32) .cse30)) (.cse26 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0)))) (.cse27 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0))) (.cse20 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (.cse16 (forall ((v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (.cse14 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (.cse5 (not .cse9)) (.cse6 (not .cse12)) (.cse25 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0))) (.cse11 (not .cse10)) (.cse0 (= (_ bv0 32) .cse30)) (.cse7 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (.cse15 (not .cse22))) (and (or .cse0 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse5) (or .cse6 .cse7 .cse8) (or .cse9 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse11))) (or .cse12 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse11 .cse13 .cse14) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))))) .cse9) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))))) (or .cse7 .cse15 .cse13) (or .cse16 (not .cse17)) (or .cse16 .cse13 .cse18) (or (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse16 .cse6 .cse8) (or .cse16 .cse5 .cse19) (or .cse12 (and (or .cse9 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse11 .cse20 .cse13))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or .cse16 .cse5 .cse21) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) .cse10) (or (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) .cse9) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) .cse0 .cse22) (or (let ((.cse23 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (.cse24 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (.cse28 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (and (or .cse0 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse12 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse9 (and (or .cse11 .cse23 .cse13) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse5))) (or .cse9 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse6 .cse24 .cse8) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))))) (or (and (or .cse0 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse12 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse5) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (or .cse9 (and (or .cse11 .cse23) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))))))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (or .cse6 .cse24 .cse25) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) .cse9))) (or .cse24 .cse15) (or (and (bvsle (bvadd .cse4 .cse1 .cse2 .cse3) c_~N~0) .cse0) .cse22 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (not .cse0) (or .cse6 .cse25) (or .cse5 .cse26) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or .cse12 (and (or .cse5 .cse27) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0)))) (or .cse9 (and (or .cse11 .cse28) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)) .cse10))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse9 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))))))) .cse29) (or .cse13 .cse18) (or .cse24 .cse15 .cse13) (or .cse0 .cse22 (and (or .cse6 .cse8) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse12 (and (or .cse9 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse11 .cse28 .cse13) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or .cse5 .cse21) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))))) (or .cse9 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) .cse10))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse5 .cse19))))) .cse17) (or (and (or (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or .cse16 .cse5 .cse26) (or .cse12 (and (or .cse16 .cse5 .cse27) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse11 .cse20)) .cse9) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or .cse16 .cse6 .cse25) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))))) .cse9) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))))) .cse0 .cse22) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse12 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse11 .cse14)) .cse9) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse6 .cse7 .cse25) (or .cse9 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10)))) .cse0) (or .cse7 .cse15)) .cse29))))) (not (bvslt .cse31 c_~N~0)))) is different from true [2023-11-29 02:57:13,041 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 41 refuted. 0 times theorem prover too weak. 0 trivial. 9 not checked. [2023-11-29 02:57:13,041 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2023-11-29 02:57:13,041 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1531367659] [2023-11-29 02:57:13,041 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1531367659] provided 0 perfect and 2 imperfect interpolant sequences [2023-11-29 02:57:13,041 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2023-11-29 02:57:13,041 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20] total 39 [2023-11-29 02:57:13,042 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [798947338] [2023-11-29 02:57:13,042 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2023-11-29 02:57:13,042 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2023-11-29 02:57:13,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2023-11-29 02:57:13,043 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2023-11-29 02:57:13,044 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=1129, Unknown=2, NotChecked=142, Total=1482 [2023-11-29 02:57:13,044 INFO L87 Difference]: Start difference. First operand 53 states and 57 transitions. Second operand has 39 states, 39 states have (on average 1.4871794871794872) internal successors, (58), 39 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:57:18,611 WARN L876 $PredicateComparison]: unable to prove that (and (not (bvsle c_~N~0 (_ bv0 32))) (let ((.cse31 (bvadd (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|))) (or (bvslt (bvadd (_ bv5 32) |c_ULTIMATE.start_main_~i~0#1|) c_~N~0) (let ((.cse30 (bvmul (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|))) (let ((.cse22 (= (_ bv8 32) .cse30)) (.cse10 (= (_ bv12 32) .cse30)) (.cse12 (= (bvadd (_ bv8 32) .cse30) (_ bv0 32))) (.cse9 (= (_ bv0 32) (bvadd (_ bv12 32) .cse30))) (.cse4 (bvsrem (bvadd (_ bv1 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse1 (bvsrem .cse31 (_ bv2 32))) (.cse2 (bvsrem (bvadd (_ bv2 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse3 (bvsrem (bvadd (_ bv3 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse29 (= (bvadd (_ bv4 32) .cse30) (_ bv0 32)))) (let ((.cse18 (not .cse29)) (.cse8 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (.cse13 (forall ((v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (.cse21 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (.cse19 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (.cse17 (= (_ bv4 32) .cse30)) (.cse26 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0)))) (.cse27 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0))) (.cse20 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (.cse16 (forall ((v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (.cse14 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (.cse5 (not .cse9)) (.cse6 (not .cse12)) (.cse25 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0))) (.cse11 (not .cse10)) (.cse0 (= (_ bv0 32) .cse30)) (.cse7 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (.cse15 (not .cse22))) (and (or .cse0 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse5) (or .cse6 .cse7 .cse8) (or .cse9 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse11))) (or .cse12 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse11 .cse13 .cse14) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))))) .cse9) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))))) (or .cse7 .cse15 .cse13) (or .cse16 (not .cse17)) (or .cse16 .cse13 .cse18) (or (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse16 .cse6 .cse8) (or .cse16 .cse5 .cse19) (or .cse12 (and (or .cse9 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse11 .cse20 .cse13))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or .cse16 .cse5 .cse21) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) .cse10) (or (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) .cse9) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) .cse0 .cse22) (or (let ((.cse23 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (.cse24 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (.cse28 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (and (or .cse0 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse12 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse9 (and (or .cse11 .cse23 .cse13) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse5))) (or .cse9 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse6 .cse24 .cse8) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))))) (or (and (or .cse0 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse12 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse5) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (or .cse9 (and (or .cse11 .cse23) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))))))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (or .cse6 .cse24 .cse25) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) .cse9))) (or .cse24 .cse15) (or (and (bvsle (bvadd .cse4 .cse1 .cse2 .cse3) c_~N~0) .cse0) .cse22 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0)))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (not .cse0) (or .cse6 .cse25) (or .cse5 .cse26) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or .cse12 (and (or .cse5 .cse27) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0)))) (or .cse9 (and (or .cse11 .cse28) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)) .cse10))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse9 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))))))) .cse29) (or .cse13 .cse18) (or .cse24 .cse15 .cse13) (or .cse0 .cse22 (and (or .cse6 .cse8) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse12 (and (or .cse9 (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse11 .cse28 .cse13) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or .cse5 .cse21) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))))) (or .cse9 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0))) .cse10))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 .cse2 .cse3) c_~N~0)))) (or .cse5 .cse19))))) .cse17) (or (and (or (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or .cse16 .cse5 .cse26) (or .cse12 (and (or .cse16 .cse5 .cse27) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or (and (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse11 .cse20)) .cse9) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or .cse16 .cse6 .cse25) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0)))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))))) .cse9) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))))) .cse0 .cse22) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse12 (and (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse10 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse11 .cse14)) .cse9) (or .cse5 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or .cse6 .cse7 .cse25) (or .cse9 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0))) (or .cse11 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse4 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse1 v_arrayElimCell_31 v_arrayElimCell_32 .cse3) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 .cse2 .cse3) c_~N~0) (bvsle (bvadd .cse4 v_arrayElimCell_33 v_arrayElimCell_34 .cse2) c_~N~0))) .cse10)))) .cse0) (or .cse7 .cse15)) .cse29))))) (not (bvslt .cse31 c_~N~0)))) (= |c_ULTIMATE.start_main_~a~0#1.offset| (_ bv0 32)) (= (_ bv0 32) |c_ULTIMATE.start_main_~i~0#1|) (bvule c_~N~0 (_ bv536870911 32))) is different from true [2023-11-29 02:57:22,829 WARN L876 $PredicateComparison]: unable to prove that (and (let ((.cse0 (bvadd (_ bv3 32) |c_ULTIMATE.start_main_~i~0#1|))) (or (bvslt (bvadd (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|) c_~N~0) (not (bvslt .cse0 c_~N~0)) (let ((.cse33 (bvmul (_ bv4 32) |c_ULTIMATE.start_main_~i~0#1|))) (let ((.cse12 (= (_ bv16 32) .cse33)) (.cse15 (= (bvadd (_ bv8 32) .cse33) (_ bv0 32))) (.cse19 (= (bvadd (_ bv4 32) .cse33) (_ bv0 32))) (.cse32 (= (_ bv4 32) .cse33)) (.cse9 (bvsrem |c_ULTIMATE.start_main_~i~0#1| (_ bv2 32))) (.cse5 (= (_ bv12 32) .cse33)) (.cse10 (bvsrem (bvadd (_ bv1 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse8 (bvsrem (bvadd (_ bv2 32) |c_ULTIMATE.start_main_~i~0#1|) (_ bv2 32))) (.cse7 (bvsrem .cse0 (_ bv2 32))) (.cse31 (= (_ bv0 32) .cse33))) (let ((.cse3 (not .cse31)) (.cse14 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (.cse18 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (.cse20 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (.cse4 (forall ((v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (.cse2 (= (_ bv8 32) .cse33)) (.cse23 (not .cse5)) (.cse16 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (.cse28 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0))) (.cse29 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0)))) (.cse1 (forall ((v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (.cse6 (and (bvsle (bvadd .cse10 .cse9 .cse8 .cse7) c_~N~0) .cse32)) (.cse27 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0))) (.cse21 (not .cse19)) (.cse13 (not .cse15)) (.cse24 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (.cse17 (not .cse12)) (.cse22 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (.cse11 (not .cse32))) (and (or .cse1 (not .cse2)) (or .cse1 .cse3 .cse4) (or .cse5 .cse6 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse1 .cse11 .cse4) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse13 .cse1 .cse14) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse15 (and (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse16 .cse17 .cse4))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse13 .cse1 .cse18) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse1 .cse20 .cse21) (or .cse15 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12))))) (or .cse22 .cse23 .cse4) (or (and (or .cse15 (and (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse22 .cse20 .cse21) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse24 .cse17 .cse4)) .cse15) (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17)) .cse19) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse22 .cse11 .cse4) (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) .cse6) (or (let ((.cse25 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (.cse30 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (.cse26 (forall ((v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (and (or .cse3 .cse4) (or .cse5 .cse6 (and (or .cse15 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse17) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))))) (or .cse13 .cse14) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse17) (or (and (or .cse13 .cse18) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) (or .cse15 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse12) (or .cse25 .cse17 .cse4) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) .cse12) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (or .cse11 .cse4) (or .cse20 .cse21))) (or .cse23 .cse26 .cse4) (or (and (or .cse5 (and (or .cse27 .cse21) .cse11 (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or .cse28 .cse13) (or .cse15 (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)) .cse12) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or .cse25 .cse17)))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0))) .cse12) (or .cse15 (and (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or .cse13 .cse29)) .cse6) (or .cse23 .cse26) (or .cse6 (and (or .cse15 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12))) (or .cse27 .cse26 .cse21) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17) (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse11 .cse26) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse15 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or .cse30 .cse17))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17)) .cse19) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))))) .cse31) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse20 .cse26 .cse21) (or .cse15 (and (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12))) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (or .cse15 (and (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (or .cse30 .cse17 .cse4) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12))) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0)))) .cse19) (or .cse11 .cse26 .cse4) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse12) (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 v_arrayElimCell_31 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) .cse17)) .cse6))) .cse2) (or (and (or .cse22 .cse23) (or .cse5 .cse6 (and (or (and (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse16 .cse17) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))))) .cse15) (or .cse28 .cse13 .cse1) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) .cse19) (or .cse15 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse13 .cse1 .cse29) (or .cse27 .cse1 .cse21) (or .cse1 .cse11) (or .cse17 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12))) (or .cse6 (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse15 (and (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or .cse12 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (or .cse22 .cse27 .cse21) (or (and (or .cse13 (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0)))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse15 (and (or .cse24 .cse17) (forall ((v_arrayElimCell_33 (_ BitVec 32))) (or (forall ((v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0))) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse12)))) .cse19) (or (forall ((v_arrayElimCell_32 (_ BitVec 32)) (v_arrayElimCell_31 (_ BitVec 32)) (v_arrayElimCell_34 (_ BitVec 32)) (v_arrayElimCell_33 (_ BitVec 32))) (or (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 v_arrayElimCell_34 .cse7) c_~N~0) (bvsle (bvadd v_arrayElimCell_31 v_arrayElimCell_32 .cse8 .cse7) c_~N~0) (bvsle (bvadd .cse9 v_arrayElimCell_32 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 v_arrayElimCell_34) c_~N~0) (bvsle (bvadd .cse10 .cse9 v_arrayElimCell_33 .cse8) c_~N~0))) .cse17) (or .cse22 .cse11)))) .cse31))))))) (not (bvsle c_~N~0 (_ bv0 32))) (= (_ bv1 32) |c_ULTIMATE.start_main_~i~0#1|) (= |c_ULTIMATE.start_main_~a~0#1.offset| (_ bv0 32)) (bvule c_~N~0 (_ bv536870911 32))) is different from true [2023-11-29 02:57:51,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-11-29 02:57:51,937 INFO L93 Difference]: Finished difference Result 106 states and 116 transitions. [2023-11-29 02:57:51,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2023-11-29 02:57:51,943 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 1.4871794871794872) internal successors, (58), 39 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2023-11-29 02:57:51,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2023-11-29 02:57:51,944 INFO L225 Difference]: With dead ends: 106 [2023-11-29 02:57:51,944 INFO L226 Difference]: Without dead ends: 65 [2023-11-29 02:57:51,946 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 859 ImplicationChecksByTransitivity, 42.1s TimeCoverageRelationStatistics Valid=546, Invalid=2888, Unknown=4, NotChecked=468, Total=3906 [2023-11-29 02:57:51,946 INFO L413 NwaCegarLoop]: 4 mSDtfsCounter, 108 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 600 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 10.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 853 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 600 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 223 IncrementalHoareTripleChecker+Unchecked, 11.1s IncrementalHoareTripleChecker+Time [2023-11-29 02:57:51,947 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [108 Valid, 51 Invalid, 853 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 600 Invalid, 0 Unknown, 223 Unchecked, 11.1s Time] [2023-11-29 02:57:51,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2023-11-29 02:57:51,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 36. [2023-11-29 02:57:51,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:57:51,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2023-11-29 02:57:51,994 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 30 [2023-11-29 02:57:51,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2023-11-29 02:57:51,994 INFO L495 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2023-11-29 02:57:51,994 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 1.4871794871794872) internal successors, (58), 39 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-11-29 02:57:51,994 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2023-11-29 02:57:51,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2023-11-29 02:57:51,995 INFO L187 NwaCegarLoop]: Found error trace [2023-11-29 02:57:51,995 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-11-29 02:57:51,999 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Ended with exit code 0 [2023-11-29 02:57:52,196 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:57:52,196 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2023-11-29 02:57:52,197 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2023-11-29 02:57:52,197 INFO L85 PathProgramCache]: Analyzing trace with hash -1043511359, now seen corresponding path program 10 times [2023-11-29 02:57:52,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2023-11-29 02:57:52,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1045268144] [2023-11-29 02:57:52,197 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2023-11-29 02:57:52,197 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2023-11-29 02:57:52,197 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat [2023-11-29 02:57:52,198 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2023-11-29 02:57:52,199 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_875c0285-2443-4dfb-acc7-30dc3712333d/bin/uautomizer-verify-BQ2R08f2Ya/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2023-11-29 02:57:52,307 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2023-11-29 02:57:52,307 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2023-11-29 02:57:52,313 INFO L262 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 49 conjunts are in the unsatisfiable core [2023-11-29 02:57:52,318 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-11-29 02:57:52,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2023-11-29 02:57:53,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2023-11-29 02:57:53,256 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:57:53,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 34 [2023-11-29 02:57:53,550 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:57:53,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 46 [2023-11-29 02:57:53,935 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2023-11-29 02:57:53,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 50 treesize of output 58 [2023-11-29 02:57:55,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2023-11-29 02:57:56,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:57:57,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:57:58,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:57:59,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:58:00,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2023-11-29 02:58:00,932 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-11-29 02:58:00,932 INFO L327 TraceCheckSpWp]: Computing backward predicates...