./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 84cfde4a Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c -s /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf --- Real Ultimate output --- This is Ultimate 0.2.5-dev-84cfde4 [2024-10-12 00:11:30,165 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-12 00:11:30,261 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-10-12 00:11:30,267 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-12 00:11:30,269 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-12 00:11:30,300 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-12 00:11:30,301 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-12 00:11:30,301 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-12 00:11:30,302 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-12 00:11:30,303 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-12 00:11:30,304 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-12 00:11:30,304 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-12 00:11:30,304 INFO L153 SettingsManager]: * Use SBE=true [2024-10-12 00:11:30,305 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-12 00:11:30,307 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-12 00:11:30,307 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-12 00:11:30,307 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-12 00:11:30,308 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-12 00:11:30,308 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-12 00:11:30,308 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-12 00:11:30,309 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-12 00:11:30,313 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-12 00:11:30,313 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-12 00:11:30,314 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-12 00:11:30,314 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-12 00:11:30,314 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-12 00:11:30,314 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-12 00:11:30,315 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-12 00:11:30,315 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-12 00:11:30,315 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-12 00:11:30,315 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-12 00:11:30,316 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-12 00:11:30,316 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-12 00:11:30,316 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-12 00:11:30,317 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-12 00:11:30,319 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-12 00:11:30,319 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf [2024-10-12 00:11:30,622 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-12 00:11:30,650 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-12 00:11:30,654 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-12 00:11:30,656 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-12 00:11:30,656 INFO L274 PluginConnector]: CDTParser initialized [2024-10-12 00:11:30,658 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2024-10-12 00:11:32,285 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-12 00:11:32,467 INFO L384 CDTParser]: Found 1 translation units. [2024-10-12 00:11:32,468 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2024-10-12 00:11:32,480 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/93da94356/45fe062e2f1d40b5ae93dc43a037f13e/FLAGe5f63ecc9 [2024-10-12 00:11:32,494 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/93da94356/45fe062e2f1d40b5ae93dc43a037f13e [2024-10-12 00:11:32,496 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-12 00:11:32,497 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-12 00:11:32,503 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-12 00:11:32,503 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-12 00:11:32,508 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-12 00:11:32,509 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,513 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@cc98d40 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32, skipping insertion in model container [2024-10-12 00:11:32,513 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,532 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-12 00:11:32,709 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-12 00:11:32,717 INFO L200 MainTranslator]: Completed pre-run [2024-10-12 00:11:32,735 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-12 00:11:32,759 INFO L204 MainTranslator]: Completed translation [2024-10-12 00:11:32,759 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32 WrapperNode [2024-10-12 00:11:32,760 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-12 00:11:32,761 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-12 00:11:32,762 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-12 00:11:32,762 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-12 00:11:32,769 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,777 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,794 INFO L138 Inliner]: procedures = 8, calls = 9, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 33 [2024-10-12 00:11:32,794 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-12 00:11:32,795 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-12 00:11:32,795 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-12 00:11:32,795 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-12 00:11:32,805 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,806 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,807 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,820 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2024-10-12 00:11:32,821 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,822 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,828 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,831 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,836 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,837 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,839 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-12 00:11:32,840 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-12 00:11:32,840 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-12 00:11:32,840 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-12 00:11:32,842 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:32,860 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:32,879 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:32,883 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-12 00:11:32,941 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-12 00:11:32,941 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-12 00:11:32,942 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-12 00:11:32,942 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-12 00:11:32,942 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-12 00:11:32,942 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-12 00:11:33,002 INFO L238 CfgBuilder]: Building ICFG [2024-10-12 00:11:33,004 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-12 00:11:33,109 INFO L? ?]: Removed 3 outVars from TransFormulas that were not future-live. [2024-10-12 00:11:33,109 INFO L287 CfgBuilder]: Performing block encoding [2024-10-12 00:11:33,124 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-12 00:11:33,124 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-12 00:11:33,124 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 12:11:33 BoogieIcfgContainer [2024-10-12 00:11:33,124 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-12 00:11:33,126 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-12 00:11:33,126 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-12 00:11:33,130 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-12 00:11:33,131 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:11:33,132 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 12.10 12:11:32" (1/3) ... [2024-10-12 00:11:33,133 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@de365a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.10 12:11:33, skipping insertion in model container [2024-10-12 00:11:33,135 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:11:33,135 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (2/3) ... [2024-10-12 00:11:33,136 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@de365a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.10 12:11:33, skipping insertion in model container [2024-10-12 00:11:33,136 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:11:33,136 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 12:11:33" (3/3) ... [2024-10-12 00:11:33,138 INFO L332 chiAutomizerObserver]: Analyzing ICFG Arrays01-EquivalentConstantIndices-1.c [2024-10-12 00:11:33,194 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-12 00:11:33,195 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-12 00:11:33,195 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-12 00:11:33,195 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-12 00:11:33,195 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-12 00:11:33,195 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-12 00:11:33,195 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-12 00:11:33,196 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-12 00:11:33,199 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:33,214 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-12 00:11:33,214 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:33,214 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:33,223 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-12 00:11:33,223 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:33,223 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-12 00:11:33,223 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:33,224 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-12 00:11:33,224 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:33,224 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:33,225 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-12 00:11:33,225 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:33,234 INFO L745 eck$LassoCheckResult]: Stem: 5#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 6#L13-3true [2024-10-12 00:11:33,234 INFO L747 eck$LassoCheckResult]: Loop: 6#L13-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 4#L13-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 6#L13-3true [2024-10-12 00:11:33,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:33,239 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-12 00:11:33,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:33,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854895138] [2024-10-12 00:11:33,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:33,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:33,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,341 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:33,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,370 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:33,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:33,373 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-10-12 00:11:33,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:33,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875904723] [2024-10-12 00:11:33,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:33,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:33,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,384 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:33,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,392 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:33,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:33,394 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-10-12 00:11:33,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:33,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248354292] [2024-10-12 00:11:33,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:33,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:33,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,419 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:33,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,440 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:33,748 INFO L204 LassoAnalysis]: Preferences: [2024-10-12 00:11:33,749 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-12 00:11:33,749 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-12 00:11:33,749 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-12 00:11:33,749 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-12 00:11:33,749 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:33,749 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-12 00:11:33,749 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-12 00:11:33,749 INFO L132 ssoRankerPreferences]: Filename of dumped script: Arrays01-EquivalentConstantIndices-1.c_Iteration1_Lasso [2024-10-12 00:11:33,750 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-12 00:11:33,750 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-12 00:11:33,765 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,897 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,901 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,906 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,911 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,914 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:34,056 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-12 00:11:34,059 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-12 00:11:34,062 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:34,062 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:34,064 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:34,088 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-12 00:11:34,089 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-12 00:11:34,104 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-12 00:11:34,105 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-12 00:11:34,105 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-12 00:11:34,105 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-12 00:11:34,110 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-12 00:11:34,111 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-12 00:11:34,117 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-12 00:11:34,138 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-12 00:11:34,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:34,139 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:34,144 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:34,155 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-12 00:11:34,157 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-12 00:11:34,188 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-12 00:11:34,189 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-12 00:11:34,193 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-12 00:11:34,193 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-12 00:11:34,206 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-12 00:11:34,206 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-12 00:11:34,228 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-12 00:11:34,255 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-10-12 00:11:34,256 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2024-10-12 00:11:34,258 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:34,258 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:34,276 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:34,278 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-12 00:11:34,279 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-12 00:11:34,291 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-12 00:11:34,291 INFO L474 LassoAnalysis]: Proved termination. [2024-10-12 00:11:34,292 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 2095 Supporting invariants [] [2024-10-12 00:11:34,305 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-10-12 00:11:34,316 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2024-10-12 00:11:34,354 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,371 INFO L255 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-12 00:11:34,373 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:34,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,395 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-12 00:11:34,395 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:34,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,449 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-12 00:11:34,451 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,497 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 20 states and 27 transitions. Complement of second has 6 states. [2024-10-12 00:11:34,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-12 00:11:34,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 13 transitions. [2024-10-12 00:11:34,512 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 2 letters. Loop has 2 letters. [2024-10-12 00:11:34,512 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-12 00:11:34,512 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 4 letters. Loop has 2 letters. [2024-10-12 00:11:34,512 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-12 00:11:34,512 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 13 transitions. Stem has 2 letters. Loop has 4 letters. [2024-10-12 00:11:34,513 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-12 00:11:34,513 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 27 transitions. [2024-10-12 00:11:34,518 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:34,523 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 8 states and 10 transitions. [2024-10-12 00:11:34,524 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2024-10-12 00:11:34,525 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2024-10-12 00:11:34,525 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2024-10-12 00:11:34,525 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:34,526 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2024-10-12 00:11:34,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2024-10-12 00:11:34,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2024-10-12 00:11:34,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2024-10-12 00:11:34,556 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2024-10-12 00:11:34,557 INFO L425 stractBuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2024-10-12 00:11:34,557 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-12 00:11:34,558 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2024-10-12 00:11:34,558 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:34,559 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:34,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:34,559 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-10-12 00:11:34,560 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:34,560 INFO L745 eck$LassoCheckResult]: Stem: 75#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 76#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 73#L13-3 assume !(main_~i~0#1 < 1048); 74#L13-4 havoc main_~i~0#1; 77#L17-3 [2024-10-12 00:11:34,561 INFO L747 eck$LassoCheckResult]: Loop: 77#L17-3 call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 78#L17-1 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 77#L17-3 [2024-10-12 00:11:34,561 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,561 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2024-10-12 00:11:34,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439732376] [2024-10-12 00:11:34,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:34,642 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [439732376] [2024-10-12 00:11:34,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [439732376] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:11:34,644 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-12 00:11:34,644 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-12 00:11:34,645 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795737466] [2024-10-12 00:11:34,646 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:11:34,649 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:34,649 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,651 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 1 times [2024-10-12 00:11:34,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144770413] [2024-10-12 00:11:34,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,668 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:34,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,683 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:34,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:34,738 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-12 00:11:34,739 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-12 00:11:34,740 INFO L87 Difference]: Start difference. First operand 8 states and 10 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:34,756 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2024-10-12 00:11:34,756 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2024-10-12 00:11:34,756 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:34,757 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2024-10-12 00:11:34,758 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-12 00:11:34,758 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2024-10-12 00:11:34,758 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2024-10-12 00:11:34,759 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:34,759 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-12 00:11:34,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2024-10-12 00:11:34,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2024-10-12 00:11:34,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2024-10-12 00:11:34,761 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2024-10-12 00:11:34,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-12 00:11:34,762 INFO L425 stractBuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2024-10-12 00:11:34,762 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-12 00:11:34,762 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2024-10-12 00:11:34,763 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:34,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:34,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:34,763 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-10-12 00:11:34,763 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:34,763 INFO L745 eck$LassoCheckResult]: Stem: 96#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 97#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 98#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 94#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 95#L13-3 assume !(main_~i~0#1 < 1048); 99#L13-4 havoc main_~i~0#1; 100#L17-3 [2024-10-12 00:11:34,764 INFO L747 eck$LassoCheckResult]: Loop: 100#L17-3 call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 101#L17-1 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 100#L17-3 [2024-10-12 00:11:34,764 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,764 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2024-10-12 00:11:34,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,764 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294913401] [2024-10-12 00:11:34,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,860 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:34,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294913401] [2024-10-12 00:11:34,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1294913401] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:34,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [928401747] [2024-10-12 00:11:34,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,863 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:34,863 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:34,865 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:34,867 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-12 00:11:34,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,910 INFO L255 TraceCheckSpWp]: Trace formula consists of 32 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-12 00:11:34,911 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:34,939 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,939 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:34,962 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,964 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [928401747] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:34,964 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:34,965 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-10-12 00:11:34,965 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817769288] [2024-10-12 00:11:34,965 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:34,965 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:34,965 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,966 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 2 times [2024-10-12 00:11:34,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280540957] [2024-10-12 00:11:34,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,981 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:34,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,992 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:35,036 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:35,037 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-12 00:11:35,037 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-12 00:11:35,037 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:35,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:35,066 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2024-10-12 00:11:35,066 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 15 transitions. [2024-10-12 00:11:35,067 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:35,067 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 15 transitions. [2024-10-12 00:11:35,067 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-12 00:11:35,067 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2024-10-12 00:11:35,067 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 15 transitions. [2024-10-12 00:11:35,068 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:35,068 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 15 transitions. [2024-10-12 00:11:35,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 15 transitions. [2024-10-12 00:11:35,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2024-10-12 00:11:35,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:35,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2024-10-12 00:11:35,070 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 15 transitions. [2024-10-12 00:11:35,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-12 00:11:35,071 INFO L425 stractBuchiCegarLoop]: Abstraction has 14 states and 15 transitions. [2024-10-12 00:11:35,071 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-12 00:11:35,071 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 15 transitions. [2024-10-12 00:11:35,072 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:35,072 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:35,072 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:35,073 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2024-10-12 00:11:35,073 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:35,073 INFO L745 eck$LassoCheckResult]: Stem: 158#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 159#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 160#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 161#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 162#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 156#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 157#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 169#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 168#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 167#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 166#L13-3 assume !(main_~i~0#1 < 1048); 163#L13-4 havoc main_~i~0#1; 164#L17-3 [2024-10-12 00:11:35,073 INFO L747 eck$LassoCheckResult]: Loop: 164#L17-3 call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 165#L17-1 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 164#L17-3 [2024-10-12 00:11:35,074 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:35,074 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2024-10-12 00:11:35,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:35,074 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028603855] [2024-10-12 00:11:35,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:35,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:35,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:35,235 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:35,236 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028603855] [2024-10-12 00:11:35,236 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1028603855] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:35,236 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [819096618] [2024-10-12 00:11:35,237 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-12 00:11:35,237 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:35,237 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:35,240 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:35,242 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-12 00:11:35,295 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-12 00:11:35,295 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:11:35,296 INFO L255 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-12 00:11:35,297 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:35,331 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,332 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:35,415 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [819096618] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:35,416 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:35,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-10-12 00:11:35,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948473238] [2024-10-12 00:11:35,417 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:35,417 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:35,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:35,419 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 3 times [2024-10-12 00:11:35,419 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:35,419 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034116138] [2024-10-12 00:11:35,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:35,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:35,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:35,427 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:35,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:35,434 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:35,491 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:35,492 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-12 00:11:35,493 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-10-12 00:11:35,493 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:35,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:35,559 INFO L93 Difference]: Finished difference Result 26 states and 27 transitions. [2024-10-12 00:11:35,559 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 27 transitions. [2024-10-12 00:11:35,560 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:35,562 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 27 transitions. [2024-10-12 00:11:35,562 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-12 00:11:35,563 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2024-10-12 00:11:35,563 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 27 transitions. [2024-10-12 00:11:35,565 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:35,565 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 27 transitions. [2024-10-12 00:11:35,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 27 transitions. [2024-10-12 00:11:35,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2024-10-12 00:11:35,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.0384615384615385) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:35,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 27 transitions. [2024-10-12 00:11:35,567 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 27 transitions. [2024-10-12 00:11:35,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-12 00:11:35,570 INFO L425 stractBuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2024-10-12 00:11:35,571 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-12 00:11:35,571 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 27 transitions. [2024-10-12 00:11:35,572 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:35,573 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:35,574 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:35,574 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2024-10-12 00:11:35,574 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:35,575 INFO L745 eck$LassoCheckResult]: Stem: 283#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 284#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 280#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 281#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 282#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 278#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 279#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 303#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 302#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 301#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 300#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 299#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 298#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 297#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 296#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 295#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 294#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 293#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 292#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 291#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 290#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 289#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 288#L13-3 assume !(main_~i~0#1 < 1048); 285#L13-4 havoc main_~i~0#1; 286#L17-3 [2024-10-12 00:11:35,575 INFO L747 eck$LassoCheckResult]: Loop: 286#L17-3 call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 287#L17-1 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 286#L17-3 [2024-10-12 00:11:35,576 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:35,576 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2024-10-12 00:11:35,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:35,577 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226668091] [2024-10-12 00:11:35,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:35,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:35,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:35,890 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:35,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1226668091] [2024-10-12 00:11:35,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1226668091] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:35,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1914901269] [2024-10-12 00:11:35,891 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-12 00:11:35,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:35,891 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:35,893 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:35,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-12 00:11:35,979 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2024-10-12 00:11:36,066 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-10-12 00:11:36,067 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:11:36,068 INFO L255 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-12 00:11:36,070 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:36,140 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:36,142 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:36,421 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:36,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1914901269] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:36,423 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:36,423 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-10-12 00:11:36,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414225009] [2024-10-12 00:11:36,423 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:36,424 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:36,424 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:36,424 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 4 times [2024-10-12 00:11:36,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:36,424 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382471450] [2024-10-12 00:11:36,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:36,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:36,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:36,432 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:36,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:36,440 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:36,479 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:36,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-12 00:11:36,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-10-12 00:11:36,482 INFO L87 Difference]: Start difference. First operand 26 states and 27 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:36,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:36,594 INFO L93 Difference]: Finished difference Result 50 states and 51 transitions. [2024-10-12 00:11:36,594 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 50 states and 51 transitions. [2024-10-12 00:11:36,596 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:36,596 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 50 states to 50 states and 51 transitions. [2024-10-12 00:11:36,597 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-12 00:11:36,597 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2024-10-12 00:11:36,597 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 51 transitions. [2024-10-12 00:11:36,597 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:36,597 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 51 transitions. [2024-10-12 00:11:36,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 51 transitions. [2024-10-12 00:11:36,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2024-10-12 00:11:36,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.02) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:36,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2024-10-12 00:11:36,603 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 51 transitions. [2024-10-12 00:11:36,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-12 00:11:36,605 INFO L425 stractBuchiCegarLoop]: Abstraction has 50 states and 51 transitions. [2024-10-12 00:11:36,605 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-12 00:11:36,606 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 51 transitions. [2024-10-12 00:11:36,606 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:36,607 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:36,607 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:36,610 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2024-10-12 00:11:36,610 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:36,610 INFO L745 eck$LassoCheckResult]: Stem: 525#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 526#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 522#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 523#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 524#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 520#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 521#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 569#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 568#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 567#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 566#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 565#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 564#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 563#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 562#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 561#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 560#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 559#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 558#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 557#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 556#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 555#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 554#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 553#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 552#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 551#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 550#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 549#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 548#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 547#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 546#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 545#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 544#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 543#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 542#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 541#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 540#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 539#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 538#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 537#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 536#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 535#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 534#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 533#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 532#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 531#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 530#L13-3 assume !(main_~i~0#1 < 1048); 527#L13-4 havoc main_~i~0#1; 528#L17-3 [2024-10-12 00:11:36,611 INFO L747 eck$LassoCheckResult]: Loop: 528#L17-3 call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 529#L17-1 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 528#L17-3 [2024-10-12 00:11:36,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:36,611 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2024-10-12 00:11:36,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:36,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771948641] [2024-10-12 00:11:36,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:36,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:36,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:37,366 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:37,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:37,368 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771948641] [2024-10-12 00:11:37,368 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771948641] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:37,368 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1258097294] [2024-10-12 00:11:37,368 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-12 00:11:37,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:37,369 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:37,372 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:37,373 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-12 00:11:37,470 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-12 00:11:37,470 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:11:37,476 INFO L255 TraceCheckSpWp]: Trace formula consists of 263 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-10-12 00:11:37,479 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:37,598 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:37,599 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:38,492 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:38,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1258097294] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:38,496 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:38,496 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-10-12 00:11:38,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443922934] [2024-10-12 00:11:38,496 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:38,497 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:38,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:38,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 5 times [2024-10-12 00:11:38,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:38,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008798660] [2024-10-12 00:11:38,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:38,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:38,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:38,507 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:38,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:38,512 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:38,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:38,574 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-10-12 00:11:38,575 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-10-12 00:11:38,576 INFO L87 Difference]: Start difference. First operand 50 states and 51 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:38,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:38,801 INFO L93 Difference]: Finished difference Result 98 states and 99 transitions. [2024-10-12 00:11:38,801 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 98 states and 99 transitions. [2024-10-12 00:11:38,803 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:38,806 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 98 states to 98 states and 99 transitions. [2024-10-12 00:11:38,807 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-12 00:11:38,807 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2024-10-12 00:11:38,807 INFO L73 IsDeterministic]: Start isDeterministic. Operand 98 states and 99 transitions. [2024-10-12 00:11:38,808 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:38,808 INFO L218 hiAutomatonCegarLoop]: Abstraction has 98 states and 99 transitions. [2024-10-12 00:11:38,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states and 99 transitions. [2024-10-12 00:11:38,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2024-10-12 00:11:38,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.010204081632653) internal successors, (99), 97 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:38,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 99 transitions. [2024-10-12 00:11:38,816 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 99 transitions. [2024-10-12 00:11:38,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-10-12 00:11:38,819 INFO L425 stractBuchiCegarLoop]: Abstraction has 98 states and 99 transitions. [2024-10-12 00:11:38,819 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-12 00:11:38,820 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 99 transitions. [2024-10-12 00:11:38,821 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:11:38,821 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:38,821 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:38,824 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2024-10-12 00:11:38,824 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:38,825 INFO L745 eck$LassoCheckResult]: Stem: 1004#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1005#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1006#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1007#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1008#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1002#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1003#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1099#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1098#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1097#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1096#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1095#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1094#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1093#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1092#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1091#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1090#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1089#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1088#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1087#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1086#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1085#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1084#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1083#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1082#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1081#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1080#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1079#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1078#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1077#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1076#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1075#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1074#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1073#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1072#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1071#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1070#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1069#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1068#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1067#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1066#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1065#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1064#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1063#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1062#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1061#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1060#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1059#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1058#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1057#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1056#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1055#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1054#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1053#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1052#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1051#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1050#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1049#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1048#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1047#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1046#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1045#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1044#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1043#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1042#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1041#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1040#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1039#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1038#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1037#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1036#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1035#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1034#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1033#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1032#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1031#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1030#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1029#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1028#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1027#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1026#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1025#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1024#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1023#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1022#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1021#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1020#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1019#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1018#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1017#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1016#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1015#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1014#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1013#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1012#L13-3 assume !(main_~i~0#1 < 1048); 1009#L13-4 havoc main_~i~0#1; 1010#L17-3 [2024-10-12 00:11:38,826 INFO L747 eck$LassoCheckResult]: Loop: 1010#L17-3 call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 1011#L17-1 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 1010#L17-3 [2024-10-12 00:11:38,829 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:38,829 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2024-10-12 00:11:38,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:38,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589829597] [2024-10-12 00:11:38,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:38,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:38,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:40,944 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:40,945 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:40,945 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589829597] [2024-10-12 00:11:40,945 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [589829597] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:40,945 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1642044270] [2024-10-12 00:11:40,946 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-12 00:11:40,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:40,946 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:40,948 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:40,950 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-12 00:12:20,163 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-10-12 00:12:20,163 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:12:20,191 INFO L255 TraceCheckSpWp]: Trace formula consists of 527 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-10-12 00:12:20,195 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:12:20,380 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:12:20,381 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:12:23,355 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:12:23,356 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1642044270] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:12:23,356 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:12:23,356 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-10-12 00:12:23,356 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [640554100] [2024-10-12 00:12:23,356 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:12:23,360 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:12:23,361 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:12:23,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1638, now seen corresponding path program 6 times [2024-10-12 00:12:23,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:12:23,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591749446] [2024-10-12 00:12:23,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:12:23,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:12:23,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:12:23,367 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:12:23,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:12:23,371 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:12:23,409 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:12:23,411 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-10-12 00:12:23,416 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-10-12 00:12:23,419 INFO L87 Difference]: Start difference. First operand 98 states and 99 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:12:23,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:12:23,849 INFO L93 Difference]: Finished difference Result 194 states and 195 transitions. [2024-10-12 00:12:23,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 194 states and 195 transitions. [2024-10-12 00:12:23,851 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:12:23,853 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 194 states to 194 states and 195 transitions. [2024-10-12 00:12:23,853 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-12 00:12:23,853 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2024-10-12 00:12:23,853 INFO L73 IsDeterministic]: Start isDeterministic. Operand 194 states and 195 transitions. [2024-10-12 00:12:23,854 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:12:23,854 INFO L218 hiAutomatonCegarLoop]: Abstraction has 194 states and 195 transitions. [2024-10-12 00:12:23,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states and 195 transitions. [2024-10-12 00:12:23,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 194. [2024-10-12 00:12:23,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 194 states, 194 states have (on average 1.0051546391752577) internal successors, (195), 193 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:12:23,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 195 transitions. [2024-10-12 00:12:23,862 INFO L240 hiAutomatonCegarLoop]: Abstraction has 194 states and 195 transitions. [2024-10-12 00:12:23,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-10-12 00:12:23,864 INFO L425 stractBuchiCegarLoop]: Abstraction has 194 states and 195 transitions. [2024-10-12 00:12:23,864 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-12 00:12:23,864 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 194 states and 195 transitions. [2024-10-12 00:12:23,865 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-12 00:12:23,866 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:12:23,866 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:12:23,869 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2024-10-12 00:12:23,869 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:12:23,871 INFO L745 eck$LassoCheckResult]: Stem: 1966#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1967#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1968#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1969#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1970#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1964#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1965#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2157#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2156#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2155#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2154#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2153#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2152#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2151#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2150#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2149#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2148#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2147#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2146#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2145#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2144#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2143#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2142#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2141#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2140#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2139#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2138#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2137#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2136#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2135#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2134#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2133#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2132#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2131#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2130#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2129#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2128#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2127#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2126#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2125#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2124#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2123#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2122#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2121#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2120#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2119#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2118#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2117#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2116#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2115#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2114#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2113#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2112#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2111#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2110#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2109#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2108#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2107#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2106#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2105#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2104#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2103#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2102#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2101#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2100#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2099#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2098#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2097#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2096#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2095#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2094#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2093#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2092#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2091#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2090#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2089#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2088#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2087#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2086#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2085#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2084#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2083#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2082#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2081#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2080#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2079#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2078#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2077#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2076#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2075#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2074#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2073#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2072#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2071#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2070#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2069#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2068#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2067#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2066#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2065#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2064#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2063#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2062#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2061#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2060#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2059#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2058#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2057#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2056#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2055#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2054#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2053#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2052#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2051#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2050#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2049#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2048#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2047#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2046#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2045#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2044#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2043#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2042#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2041#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2040#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2039#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2038#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2037#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2036#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2035#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2034#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2033#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2032#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2031#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2030#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2029#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2028#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2027#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2026#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2025#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2024#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2023#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2022#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2021#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2020#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2019#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2018#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2017#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2016#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2015#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2014#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2013#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2012#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2011#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2010#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2009#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2008#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2007#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2006#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2005#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2004#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2003#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2002#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2001#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2000#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1999#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1998#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1997#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1996#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1995#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1994#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1993#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1992#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1991#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1990#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1989#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1988#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1987#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1986#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1985#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1984#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1983#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1982#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1981#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1980#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1979#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1978#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1977#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1976#L13-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1975#L13-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1974#L13-3 assume !(main_~i~0#1 < 1048); 1971#L13-4 havoc main_~i~0#1; 1972#L17-3 [2024-10-12 00:12:23,871 INFO L747 eck$LassoCheckResult]: Loop: 1972#L17-3 call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 1973#L17-1 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 1972#L17-3 [2024-10-12 00:12:23,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:12:23,872 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2024-10-12 00:12:23,872 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:12:23,872 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566961501] [2024-10-12 00:12:23,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:12:23,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:12:24,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:12:30,209 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:12:30,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:12:30,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566961501] [2024-10-12 00:12:30,210 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1566961501] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:12:30,210 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1176822570] [2024-10-12 00:12:30,210 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-12 00:12:30,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:12:30,211 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:12:30,215 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:12:30,216 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process