./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 84cfde4a Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c -s /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-84cfde4 [2024-10-12 00:11:30,277 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-12 00:11:30,346 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-10-12 00:11:30,353 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-12 00:11:30,354 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-12 00:11:30,409 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-12 00:11:30,410 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-12 00:11:30,411 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-12 00:11:30,411 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-12 00:11:30,414 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-12 00:11:30,415 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-12 00:11:30,415 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-12 00:11:30,415 INFO L153 SettingsManager]: * Use SBE=true [2024-10-12 00:11:30,416 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-12 00:11:30,416 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-12 00:11:30,416 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-12 00:11:30,417 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-12 00:11:30,417 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-12 00:11:30,421 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-12 00:11:30,422 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-12 00:11:30,422 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-12 00:11:30,423 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-12 00:11:30,423 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-12 00:11:30,423 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-12 00:11:30,423 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-12 00:11:30,424 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-12 00:11:30,424 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-12 00:11:30,424 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-12 00:11:30,424 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-12 00:11:30,424 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-12 00:11:30,425 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-12 00:11:30,425 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-12 00:11:30,425 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-12 00:11:30,426 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-12 00:11:30,426 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-12 00:11:30,428 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-12 00:11:30,429 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 [2024-10-12 00:11:30,730 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-12 00:11:30,753 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-12 00:11:30,756 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-12 00:11:30,757 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-12 00:11:30,758 INFO L274 PluginConnector]: CDTParser initialized [2024-10-12 00:11:30,759 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2024-10-12 00:11:32,291 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-12 00:11:32,471 INFO L384 CDTParser]: Found 1 translation units. [2024-10-12 00:11:32,472 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2024-10-12 00:11:32,479 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/2a5df2e00/d810a494073f4725b334e57b89a3689c/FLAG323a39f71 [2024-10-12 00:11:32,496 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/2a5df2e00/d810a494073f4725b334e57b89a3689c [2024-10-12 00:11:32,498 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-12 00:11:32,500 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-12 00:11:32,501 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-12 00:11:32,502 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-12 00:11:32,507 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-12 00:11:32,507 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,508 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@29ab5fe8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32, skipping insertion in model container [2024-10-12 00:11:32,508 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,525 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-12 00:11:32,675 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-12 00:11:32,681 INFO L200 MainTranslator]: Completed pre-run [2024-10-12 00:11:32,698 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-12 00:11:32,718 INFO L204 MainTranslator]: Completed translation [2024-10-12 00:11:32,719 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32 WrapperNode [2024-10-12 00:11:32,719 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-12 00:11:32,720 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-12 00:11:32,721 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-12 00:11:32,721 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-12 00:11:32,727 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,733 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,747 INFO L138 Inliner]: procedures = 8, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 48 [2024-10-12 00:11:32,748 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-12 00:11:32,749 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-12 00:11:32,749 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-12 00:11:32,750 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-12 00:11:32,759 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,759 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,761 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,771 INFO L175 MemorySlicer]: Split 3 memory accesses to 1 slices as follows [3]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 1 writes are split as follows [1]. [2024-10-12 00:11:32,772 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,773 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,779 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,782 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,784 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,785 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,789 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-12 00:11:32,790 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-12 00:11:32,790 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-12 00:11:32,790 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-12 00:11:32,791 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (1/1) ... [2024-10-12 00:11:32,796 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:32,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:32,824 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:32,826 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-12 00:11:32,864 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-12 00:11:32,865 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-12 00:11:32,865 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-12 00:11:32,866 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-12 00:11:32,866 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-12 00:11:32,866 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-12 00:11:32,933 INFO L238 CfgBuilder]: Building ICFG [2024-10-12 00:11:32,935 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-12 00:11:33,069 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2024-10-12 00:11:33,071 INFO L287 CfgBuilder]: Performing block encoding [2024-10-12 00:11:33,082 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-12 00:11:33,083 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-12 00:11:33,083 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 12:11:33 BoogieIcfgContainer [2024-10-12 00:11:33,084 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-12 00:11:33,085 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-12 00:11:33,085 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-12 00:11:33,088 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-12 00:11:33,088 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:11:33,089 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 12.10 12:11:32" (1/3) ... [2024-10-12 00:11:33,089 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@ccdaaaa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.10 12:11:33, skipping insertion in model container [2024-10-12 00:11:33,091 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:11:33,091 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:11:32" (2/3) ... [2024-10-12 00:11:33,091 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@ccdaaaa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.10 12:11:33, skipping insertion in model container [2024-10-12 00:11:33,091 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:11:33,091 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 12:11:33" (3/3) ... [2024-10-12 00:11:33,092 INFO L332 chiAutomizerObserver]: Analyzing ICFG Arrays03-ValueRestictsIndex-2.c [2024-10-12 00:11:33,144 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-12 00:11:33,144 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-12 00:11:33,145 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-12 00:11:33,145 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-12 00:11:33,145 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-12 00:11:33,145 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-12 00:11:33,145 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-12 00:11:33,146 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-12 00:11:33,149 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:33,162 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2024-10-12 00:11:33,162 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:33,163 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:33,167 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-12 00:11:33,167 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:33,167 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-12 00:11:33,168 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:33,170 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2024-10-12 00:11:33,170 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:33,170 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:33,170 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-12 00:11:33,171 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-12 00:11:33,177 INFO L745 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 3#L15-3true [2024-10-12 00:11:33,177 INFO L747 eck$LassoCheckResult]: Loop: 3#L15-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 7#L15-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3#L15-3true [2024-10-12 00:11:33,183 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:33,184 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-12 00:11:33,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:33,193 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597636232] [2024-10-12 00:11:33,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:33,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:33,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:33,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,286 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:33,289 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:33,289 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-10-12 00:11:33,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:33,290 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246471286] [2024-10-12 00:11:33,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:33,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:33,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,303 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:33,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,317 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:33,322 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:33,323 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-10-12 00:11:33,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:33,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267593981] [2024-10-12 00:11:33,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:33,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:33,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,345 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:33,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:33,355 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:33,574 INFO L204 LassoAnalysis]: Preferences: [2024-10-12 00:11:33,575 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-12 00:11:33,575 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-12 00:11:33,575 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-12 00:11:33,575 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-12 00:11:33,576 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:33,576 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-12 00:11:33,576 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-12 00:11:33,576 INFO L132 ssoRankerPreferences]: Filename of dumped script: Arrays03-ValueRestictsIndex-2.c_Iteration1_Lasso [2024-10-12 00:11:33,576 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-12 00:11:33,576 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-12 00:11:33,607 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,682 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,685 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,687 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,690 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,692 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,696 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,698 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,702 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,705 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,707 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-12 00:11:33,829 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-12 00:11:33,833 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-12 00:11:33,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:33,834 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:33,840 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:33,842 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-12 00:11:33,844 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-12 00:11:33,856 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-12 00:11:33,857 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-12 00:11:33,857 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-12 00:11:33,857 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-12 00:11:33,862 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-12 00:11:33,863 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-12 00:11:33,869 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-12 00:11:33,885 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2024-10-12 00:11:33,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:33,886 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:33,888 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:33,889 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-12 00:11:33,890 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-12 00:11:33,902 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-12 00:11:33,902 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-12 00:11:33,902 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-12 00:11:33,903 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-12 00:11:33,908 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-12 00:11:33,909 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-12 00:11:33,918 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-12 00:11:33,936 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-10-12 00:11:33,936 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2024-10-12 00:11:33,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:11:33,938 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:33,942 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:11:33,947 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-12 00:11:33,949 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-12 00:11:33,978 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-12 00:11:33,978 INFO L474 LassoAnalysis]: Proved termination. [2024-10-12 00:11:33,979 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 2095 Supporting invariants [] [2024-10-12 00:11:33,993 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-10-12 00:11:34,002 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2024-10-12 00:11:34,030 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,049 INFO L255 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-12 00:11:34,050 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:34,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,074 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-12 00:11:34,074 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:34,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,149 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-12 00:11:34,151 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,185 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 26 states and 39 transitions. Complement of second has 6 states. [2024-10-12 00:11:34,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-12 00:11:34,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 19 transitions. [2024-10-12 00:11:34,193 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 2 letters. Loop has 2 letters. [2024-10-12 00:11:34,194 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-12 00:11:34,194 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 4 letters. Loop has 2 letters. [2024-10-12 00:11:34,194 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-12 00:11:34,194 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 2 letters. Loop has 4 letters. [2024-10-12 00:11:34,194 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-12 00:11:34,195 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 39 transitions. [2024-10-12 00:11:34,197 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,199 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 10 states and 13 transitions. [2024-10-12 00:11:34,200 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-12 00:11:34,200 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:34,200 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2024-10-12 00:11:34,201 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:34,201 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-10-12 00:11:34,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2024-10-12 00:11:34,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-10-12 00:11:34,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2024-10-12 00:11:34,250 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-10-12 00:11:34,251 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-10-12 00:11:34,251 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-12 00:11:34,251 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2024-10-12 00:11:34,253 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,254 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:34,254 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:34,254 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:34,257 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:34,261 INFO L745 eck$LassoCheckResult]: Stem: 87#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 88#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 82#L15-3 assume !(main_~i~0#1 < 1048); 80#L15-4 havoc main_~i~0#1; 81#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 89#L20 assume !main_#t~short5#1; 85#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 86#L22-2 [2024-10-12 00:11:34,261 INFO L747 eck$LassoCheckResult]: Loop: 86#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 86#L22-2 [2024-10-12 00:11:34,262 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,262 INFO L85 PathProgramCache]: Analyzing trace with hash 1807952492, now seen corresponding path program 1 times [2024-10-12 00:11:34,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047758166] [2024-10-12 00:11:34,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,274 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-10-12 00:11:34,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,385 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:34,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047758166] [2024-10-12 00:11:34,390 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1047758166] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:11:34,390 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-12 00:11:34,390 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-12 00:11:34,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [725804035] [2024-10-12 00:11:34,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:11:34,400 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:34,401 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,401 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 1 times [2024-10-12 00:11:34,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733266064] [2024-10-12 00:11:34,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,410 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:34,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:34,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:34,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-12 00:11:34,449 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-12 00:11:34,449 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:34,467 INFO L93 Difference]: Finished difference Result 11 states and 13 transitions. [2024-10-12 00:11:34,467 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 13 transitions. [2024-10-12 00:11:34,468 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,468 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 13 transitions. [2024-10-12 00:11:34,468 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-12 00:11:34,469 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:34,469 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 13 transitions. [2024-10-12 00:11:34,470 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:34,470 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2024-10-12 00:11:34,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 13 transitions. [2024-10-12 00:11:34,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2024-10-12 00:11:34,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2024-10-12 00:11:34,472 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2024-10-12 00:11:34,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-12 00:11:34,473 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2024-10-12 00:11:34,473 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-12 00:11:34,473 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2024-10-12 00:11:34,474 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:34,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:34,475 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:34,475 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:34,476 INFO L745 eck$LassoCheckResult]: Stem: 114#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 115#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 109#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 110#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 111#L15-3 assume !(main_~i~0#1 < 1048); 107#L15-4 havoc main_~i~0#1; 108#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 116#L20 assume !main_#t~short5#1; 112#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 113#L22-2 [2024-10-12 00:11:34,476 INFO L747 eck$LassoCheckResult]: Loop: 113#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 113#L22-2 [2024-10-12 00:11:34,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,477 INFO L85 PathProgramCache]: Analyzing trace with hash -369324246, now seen corresponding path program 1 times [2024-10-12 00:11:34,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347919029] [2024-10-12 00:11:34,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,540 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,540 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:34,541 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347919029] [2024-10-12 00:11:34,541 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1347919029] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:34,541 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [259709419] [2024-10-12 00:11:34,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,541 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:34,542 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:34,545 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:34,551 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-12 00:11:34,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,594 INFO L255 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-12 00:11:34,595 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:34,601 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-12 00:11:34,601 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-12 00:11:34,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [259709419] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:11:34,602 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-12 00:11:34,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2024-10-12 00:11:34,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835099013] [2024-10-12 00:11:34,602 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:11:34,603 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:34,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,603 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 2 times [2024-10-12 00:11:34,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187917280] [2024-10-12 00:11:34,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,607 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:34,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,609 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:34,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:34,623 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-12 00:11:34,623 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-10-12 00:11:34,623 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:34,630 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2024-10-12 00:11:34,631 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2024-10-12 00:11:34,631 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,631 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 10 states and 11 transitions. [2024-10-12 00:11:34,632 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-12 00:11:34,632 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:34,632 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2024-10-12 00:11:34,632 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:34,632 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-10-12 00:11:34,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2024-10-12 00:11:34,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-10-12 00:11:34,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2024-10-12 00:11:34,634 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-10-12 00:11:34,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-12 00:11:34,635 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-10-12 00:11:34,635 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-12 00:11:34,635 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2024-10-12 00:11:34,635 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,635 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:34,636 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:34,636 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:34,636 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:34,636 INFO L745 eck$LassoCheckResult]: Stem: 167#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 168#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 163#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 164#L15-3 assume !(main_~i~0#1 < 1048); 160#L15-4 havoc main_~i~0#1; 161#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 169#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 165#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 166#L22-2 [2024-10-12 00:11:34,636 INFO L747 eck$LassoCheckResult]: Loop: 166#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 166#L22-2 [2024-10-12 00:11:34,637 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,637 INFO L85 PathProgramCache]: Analyzing trace with hash -369324308, now seen corresponding path program 1 times [2024-10-12 00:11:34,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,637 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47954836] [2024-10-12 00:11:34,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,711 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:34,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47954836] [2024-10-12 00:11:34,712 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [47954836] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:34,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1479669715] [2024-10-12 00:11:34,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,714 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:34,715 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:34,716 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:34,719 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-12 00:11:34,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:34,765 INFO L255 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-12 00:11:34,765 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:34,786 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,787 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:34,807 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:34,808 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1479669715] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:34,808 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:34,809 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-10-12 00:11:34,809 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939697719] [2024-10-12 00:11:34,809 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:34,810 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:34,810 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,811 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 3 times [2024-10-12 00:11:34,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331286404] [2024-10-12 00:11:34,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,819 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:34,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:34,824 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:34,844 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:34,845 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-12 00:11:34,845 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-12 00:11:34,846 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 2.2857142857142856) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:34,891 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2024-10-12 00:11:34,892 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 17 transitions. [2024-10-12 00:11:34,892 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,893 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 17 transitions. [2024-10-12 00:11:34,893 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-12 00:11:34,893 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:34,893 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 17 transitions. [2024-10-12 00:11:34,893 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:34,893 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-10-12 00:11:34,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 17 transitions. [2024-10-12 00:11:34,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2024-10-12 00:11:34,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:34,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2024-10-12 00:11:34,900 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-10-12 00:11:34,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-12 00:11:34,901 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-10-12 00:11:34,903 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-12 00:11:34,903 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2024-10-12 00:11:34,904 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:34,904 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:34,905 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:34,905 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:34,907 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:34,907 INFO L745 eck$LassoCheckResult]: Stem: 252#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 253#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 247#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 249#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 259#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 258#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 257#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 256#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 255#L15-3 assume !(main_~i~0#1 < 1048); 244#L15-4 havoc main_~i~0#1; 245#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 254#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 250#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 251#L22-2 [2024-10-12 00:11:34,908 INFO L747 eck$LassoCheckResult]: Loop: 251#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 251#L22-2 [2024-10-12 00:11:34,908 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:34,908 INFO L85 PathProgramCache]: Analyzing trace with hash 1716187174, now seen corresponding path program 2 times [2024-10-12 00:11:34,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:34,909 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752566813] [2024-10-12 00:11:34,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:34,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:34,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:35,094 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,095 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:35,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752566813] [2024-10-12 00:11:35,095 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1752566813] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:35,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [770137448] [2024-10-12 00:11:35,095 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-12 00:11:35,095 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:35,095 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:35,098 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:35,110 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-12 00:11:35,153 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-12 00:11:35,153 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:11:35,154 INFO L255 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-12 00:11:35,155 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:35,189 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,189 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:35,257 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [770137448] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:35,259 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:35,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-10-12 00:11:35,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066874578] [2024-10-12 00:11:35,259 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:35,260 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:35,261 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:35,261 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 4 times [2024-10-12 00:11:35,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:35,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175393022] [2024-10-12 00:11:35,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:35,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:35,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:35,269 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:35,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:35,275 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:35,290 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:35,291 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-12 00:11:35,291 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-10-12 00:11:35,292 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:35,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:35,344 INFO L93 Difference]: Finished difference Result 28 states and 29 transitions. [2024-10-12 00:11:35,345 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 29 transitions. [2024-10-12 00:11:35,346 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:35,347 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 29 transitions. [2024-10-12 00:11:35,347 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-12 00:11:35,347 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:35,347 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 29 transitions. [2024-10-12 00:11:35,347 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:35,348 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-10-12 00:11:35,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 29 transitions. [2024-10-12 00:11:35,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2024-10-12 00:11:35,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:35,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2024-10-12 00:11:35,352 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-10-12 00:11:35,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-12 00:11:35,355 INFO L425 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-10-12 00:11:35,358 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-12 00:11:35,358 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2024-10-12 00:11:35,359 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:35,359 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:35,359 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:35,359 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:35,360 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:35,360 INFO L745 eck$LassoCheckResult]: Stem: 396#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 397#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 392#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 393#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 394#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 395#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 399#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 415#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 414#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 413#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 412#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 411#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 410#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 409#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 408#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 407#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 406#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 405#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 404#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 403#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 402#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 401#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 400#L15-3 assume !(main_~i~0#1 < 1048); 388#L15-4 havoc main_~i~0#1; 389#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 398#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 390#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 391#L22-2 [2024-10-12 00:11:35,360 INFO L747 eck$LassoCheckResult]: Loop: 391#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 391#L22-2 [2024-10-12 00:11:35,365 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:35,368 INFO L85 PathProgramCache]: Analyzing trace with hash 1328175130, now seen corresponding path program 3 times [2024-10-12 00:11:35,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:35,369 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1636760471] [2024-10-12 00:11:35,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:35,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:35,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:35,681 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,681 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:35,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1636760471] [2024-10-12 00:11:35,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1636760471] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:35,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [854150885] [2024-10-12 00:11:35,682 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-12 00:11:35,682 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:35,682 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:35,684 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:35,685 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-12 00:11:35,774 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-10-12 00:11:35,775 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:11:35,776 INFO L255 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-12 00:11:35,777 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:35,824 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:35,824 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:36,078 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:36,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [854150885] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:36,079 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:36,079 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-10-12 00:11:36,079 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610060968] [2024-10-12 00:11:36,079 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:36,079 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:36,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:36,080 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 5 times [2024-10-12 00:11:36,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:36,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699787339] [2024-10-12 00:11:36,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:36,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:36,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:36,083 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:36,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:36,085 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:36,094 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:36,094 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-12 00:11:36,095 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-10-12 00:11:36,095 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:36,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:36,173 INFO L93 Difference]: Finished difference Result 52 states and 53 transitions. [2024-10-12 00:11:36,173 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 53 transitions. [2024-10-12 00:11:36,174 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:36,175 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 53 transitions. [2024-10-12 00:11:36,175 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-12 00:11:36,175 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:36,175 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 53 transitions. [2024-10-12 00:11:36,175 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:36,175 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-10-12 00:11:36,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 53 transitions. [2024-10-12 00:11:36,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2024-10-12 00:11:36,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:36,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2024-10-12 00:11:36,178 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-10-12 00:11:36,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-12 00:11:36,179 INFO L425 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-10-12 00:11:36,179 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-12 00:11:36,179 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2024-10-12 00:11:36,180 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:36,180 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:36,180 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:36,180 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:36,181 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:36,181 INFO L745 eck$LassoCheckResult]: Stem: 660#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 661#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 654#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 655#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 656#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 657#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 663#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 703#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 702#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 701#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 700#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 699#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 698#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 697#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 696#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 695#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 694#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 693#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 692#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 691#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 690#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 689#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 688#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 687#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 686#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 685#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 684#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 683#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 682#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 681#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 680#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 679#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 678#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 677#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 676#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 675#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 674#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 673#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 672#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 671#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 670#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 669#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 668#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 667#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 666#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 665#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 664#L15-3 assume !(main_~i~0#1 < 1048); 652#L15-4 havoc main_~i~0#1; 653#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 662#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 658#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 659#L22-2 [2024-10-12 00:11:36,181 INFO L747 eck$LassoCheckResult]: Loop: 659#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 659#L22-2 [2024-10-12 00:11:36,184 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:36,184 INFO L85 PathProgramCache]: Analyzing trace with hash 1458388482, now seen corresponding path program 4 times [2024-10-12 00:11:36,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:36,184 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509630717] [2024-10-12 00:11:36,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:36,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:36,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:36,773 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:36,773 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:36,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509630717] [2024-10-12 00:11:36,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509630717] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:36,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [957347587] [2024-10-12 00:11:36,774 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-12 00:11:36,774 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:36,774 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:36,775 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:36,776 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-12 00:11:36,851 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-12 00:11:36,852 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:11:36,853 INFO L255 TraceCheckSpWp]: Trace formula consists of 281 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-10-12 00:11:36,855 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:36,927 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:36,927 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:37,750 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:37,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [957347587] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:37,751 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:37,751 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-10-12 00:11:37,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643498527] [2024-10-12 00:11:37,751 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:37,752 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:37,752 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:37,752 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 6 times [2024-10-12 00:11:37,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:37,752 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569585593] [2024-10-12 00:11:37,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:37,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:37,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:37,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:37,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:37,758 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:37,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:37,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-10-12 00:11:37,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-10-12 00:11:37,771 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:37,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:37,936 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2024-10-12 00:11:37,936 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 101 transitions. [2024-10-12 00:11:37,937 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:37,938 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 101 transitions. [2024-10-12 00:11:37,938 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-12 00:11:37,938 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:37,938 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 101 transitions. [2024-10-12 00:11:37,939 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:37,939 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-10-12 00:11:37,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 101 transitions. [2024-10-12 00:11:37,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2024-10-12 00:11:37,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:37,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2024-10-12 00:11:37,944 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-10-12 00:11:37,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-10-12 00:11:37,945 INFO L425 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-10-12 00:11:37,946 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-12 00:11:37,946 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2024-10-12 00:11:37,947 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:37,947 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:37,947 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:37,949 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:37,950 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:37,950 INFO L745 eck$LassoCheckResult]: Stem: 1164#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1165#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1158#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1159#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1160#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1161#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1167#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1255#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1253#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1251#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1249#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1247#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1245#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1243#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1241#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1239#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1237#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1235#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1233#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1231#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1229#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1227#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1225#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1223#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1221#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1219#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1217#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1215#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1213#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1211#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1209#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1207#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1205#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1203#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1201#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1199#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1197#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1195#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1193#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1191#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1189#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1187#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1185#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1183#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1181#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1179#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1177#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1175#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1173#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1172#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1171#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1170#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1169#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1168#L15-3 assume !(main_~i~0#1 < 1048); 1156#L15-4 havoc main_~i~0#1; 1157#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 1166#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 1162#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 1163#L22-2 [2024-10-12 00:11:37,954 INFO L747 eck$LassoCheckResult]: Loop: 1163#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 1163#L22-2 [2024-10-12 00:11:37,955 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:37,955 INFO L85 PathProgramCache]: Analyzing trace with hash 546267602, now seen corresponding path program 5 times [2024-10-12 00:11:37,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:37,955 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795162445] [2024-10-12 00:11:37,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:37,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:38,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:11:39,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:39,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:11:39,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795162445] [2024-10-12 00:11:39,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795162445] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:11:39,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2042096844] [2024-10-12 00:11:39,689 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-12 00:11:39,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:11:39,689 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:11:39,691 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:11:39,692 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-12 00:11:53,532 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-10-12 00:11:53,532 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-12 00:11:53,553 INFO L255 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-10-12 00:11:53,556 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-12 00:11:53,705 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:53,705 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-12 00:11:56,240 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:11:56,240 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2042096844] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-12 00:11:56,240 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-12 00:11:56,241 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-10-12 00:11:56,241 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [267411398] [2024-10-12 00:11:56,241 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-12 00:11:56,241 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:11:56,242 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:56,242 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 7 times [2024-10-12 00:11:56,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:56,242 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152673609] [2024-10-12 00:11:56,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:56,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:56,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:56,248 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:11:56,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:11:56,250 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:11:56,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:11:56,306 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-10-12 00:11:56,309 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-10-12 00:11:56,309 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:56,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:11:56,759 INFO L93 Difference]: Finished difference Result 196 states and 197 transitions. [2024-10-12 00:11:56,759 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 197 transitions. [2024-10-12 00:11:56,761 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:56,762 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 197 transitions. [2024-10-12 00:11:56,762 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-12 00:11:56,762 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-12 00:11:56,762 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 197 transitions. [2024-10-12 00:11:56,766 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:11:56,766 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-10-12 00:11:56,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 197 transitions. [2024-10-12 00:11:56,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2024-10-12 00:11:56,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:11:56,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2024-10-12 00:11:56,776 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-10-12 00:11:56,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-10-12 00:11:56,779 INFO L425 stractBuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-10-12 00:11:56,779 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-10-12 00:11:56,779 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2024-10-12 00:11:56,780 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-10-12 00:11:56,780 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:11:56,780 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:11:56,782 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:11:56,782 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-10-12 00:11:56,783 INFO L745 eck$LassoCheckResult]: Stem: 2148#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 2142#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2143#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2144#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2145#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2151#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2335#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2334#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2333#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2332#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2331#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2330#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2329#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2328#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2327#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2326#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2325#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2324#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2323#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2322#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2321#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2320#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2319#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2318#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2317#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2316#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2315#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2314#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2313#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2312#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2311#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2310#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2309#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2308#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2307#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2306#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2305#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2304#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2303#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2302#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2301#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2300#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2299#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2298#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2297#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2296#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2295#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2294#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2293#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2292#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2291#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2290#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2289#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2288#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2287#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2286#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2285#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2284#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2283#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2282#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2281#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2280#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2279#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2278#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2277#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2276#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2275#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2274#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2273#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2272#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2271#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2270#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2269#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2268#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2267#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2266#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2265#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2264#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2263#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2262#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2261#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2260#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2259#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2258#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2257#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2256#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2255#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2253#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2251#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2249#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2247#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2245#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2243#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2241#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2239#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2237#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2235#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2233#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2231#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2229#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2227#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2225#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2223#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2221#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2219#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2217#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2215#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2213#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2211#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2209#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2207#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2205#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2203#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2201#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2199#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2197#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2195#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2193#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2191#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2189#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2187#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2185#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2183#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2181#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2179#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2177#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2175#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2173#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2172#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2171#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2170#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2169#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2168#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2167#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2166#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2165#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2164#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2163#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2161#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2160#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2159#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2158#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2157#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2156#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2155#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2154#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2153#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2152#L15-3 assume !(main_~i~0#1 < 1048); 2140#L15-4 havoc main_~i~0#1; 2141#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 2150#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 2146#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 2147#L22-2 [2024-10-12 00:11:56,784 INFO L747 eck$LassoCheckResult]: Loop: 2147#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 2147#L22-2 [2024-10-12 00:11:56,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:11:56,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1352993138, now seen corresponding path program 6 times [2024-10-12 00:11:56,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:11:56,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019023666] [2024-10-12 00:11:56,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:11:56,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:11:56,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:12:02,098 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:12:02,099 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:12:02,099 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019023666] [2024-10-12 00:12:02,099 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019023666] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-12 00:12:02,099 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [853566219] [2024-10-12 00:12:02,099 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-12 00:12:02,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-12 00:12:02,099 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:12:02,101 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-12 00:12:02,102 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process