./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 84cfde4a Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i -s /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-84cfde4 [2024-10-12 00:41:18,074 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-12 00:41:18,136 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-12 00:41:18,142 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-12 00:41:18,143 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-12 00:41:18,165 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-12 00:41:18,166 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-12 00:41:18,166 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-12 00:41:18,167 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-12 00:41:18,168 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-12 00:41:18,168 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-12 00:41:18,169 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-12 00:41:18,169 INFO L153 SettingsManager]: * Use SBE=true [2024-10-12 00:41:18,170 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-12 00:41:18,173 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-12 00:41:18,173 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-12 00:41:18,173 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-12 00:41:18,173 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-12 00:41:18,173 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-12 00:41:18,173 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-12 00:41:18,174 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-12 00:41:18,174 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-12 00:41:18,174 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-12 00:41:18,174 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-12 00:41:18,174 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-12 00:41:18,174 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-12 00:41:18,175 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-12 00:41:18,176 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-12 00:41:18,176 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-12 00:41:18,176 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-12 00:41:18,176 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-12 00:41:18,176 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-12 00:41:18,177 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 [2024-10-12 00:41:18,400 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-12 00:41:18,421 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-12 00:41:18,425 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-12 00:41:18,426 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-12 00:41:18,427 INFO L274 PluginConnector]: CDTParser initialized [2024-10-12 00:41:18,428 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2024-10-12 00:41:19,687 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-12 00:41:19,912 INFO L384 CDTParser]: Found 1 translation units. [2024-10-12 00:41:19,913 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2024-10-12 00:41:19,931 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/f747bdfaf/258561b9fe0449fea3d87c2e13d8bdd1/FLAGf7ac2d37f [2024-10-12 00:41:20,263 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/data/f747bdfaf/258561b9fe0449fea3d87c2e13d8bdd1 [2024-10-12 00:41:20,266 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-12 00:41:20,267 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-12 00:41:20,268 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-12 00:41:20,268 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-12 00:41:20,272 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-12 00:41:20,272 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,273 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b3f1e4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20, skipping insertion in model container [2024-10-12 00:41:20,273 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,313 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-12 00:41:20,572 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-12 00:41:20,587 INFO L200 MainTranslator]: Completed pre-run [2024-10-12 00:41:20,646 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-12 00:41:20,684 INFO L204 MainTranslator]: Completed translation [2024-10-12 00:41:20,685 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20 WrapperNode [2024-10-12 00:41:20,685 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-12 00:41:20,686 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-12 00:41:20,686 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-12 00:41:20,686 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-12 00:41:20,691 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,706 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,739 INFO L138 Inliner]: procedures = 139, calls = 60, calls flagged for inlining = 29, calls inlined = 42, statements flattened = 443 [2024-10-12 00:41:20,739 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-12 00:41:20,739 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-12 00:41:20,739 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-12 00:41:20,740 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-12 00:41:20,748 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,748 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,754 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,792 INFO L175 MemorySlicer]: Split 51 memory accesses to 2 slices as follows [2, 49]. 96 percent of accesses are in the largest equivalence class. The 4 initializations are split as follows [2, 2]. The 14 writes are split as follows [0, 14]. [2024-10-12 00:41:20,792 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,792 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,810 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,817 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,819 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,822 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,826 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-12 00:41:20,827 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-12 00:41:20,827 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-12 00:41:20,827 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-12 00:41:20,827 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (1/1) ... [2024-10-12 00:41:20,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-12 00:41:20,852 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 [2024-10-12 00:41:20,868 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-12 00:41:20,871 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-12 00:41:20,915 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-10-12 00:41:20,916 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-12 00:41:20,916 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2024-10-12 00:41:20,916 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2024-10-12 00:41:20,916 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2024-10-12 00:41:20,917 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2024-10-12 00:41:20,917 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-12 00:41:20,917 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#0 [2024-10-12 00:41:20,917 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#1 [2024-10-12 00:41:20,917 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-12 00:41:20,917 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-10-12 00:41:20,917 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-12 00:41:20,917 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-12 00:41:21,050 INFO L238 CfgBuilder]: Building ICFG [2024-10-12 00:41:21,054 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-12 00:41:21,523 INFO L? ?]: Removed 244 outVars from TransFormulas that were not future-live. [2024-10-12 00:41:21,523 INFO L287 CfgBuilder]: Performing block encoding [2024-10-12 00:41:21,538 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-12 00:41:21,538 INFO L314 CfgBuilder]: Removed 8 assume(true) statements. [2024-10-12 00:41:21,539 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 12:41:21 BoogieIcfgContainer [2024-10-12 00:41:21,539 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-12 00:41:21,540 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-12 00:41:21,540 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-12 00:41:21,544 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-12 00:41:21,545 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:41:21,545 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 12.10 12:41:20" (1/3) ... [2024-10-12 00:41:21,546 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@764a0630 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.10 12:41:21, skipping insertion in model container [2024-10-12 00:41:21,546 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:41:21,546 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.10 12:41:20" (2/3) ... [2024-10-12 00:41:21,547 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@764a0630 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.10 12:41:21, skipping insertion in model container [2024-10-12 00:41:21,547 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-12 00:41:21,547 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 12:41:21" (3/3) ... [2024-10-12 00:41:21,549 INFO L332 chiAutomizerObserver]: Analyzing ICFG test_mutex_double_lock.i [2024-10-12 00:41:21,592 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-12 00:41:21,592 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-12 00:41:21,592 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-12 00:41:21,592 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-12 00:41:21,593 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-12 00:41:21,593 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-12 00:41:21,593 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-12 00:41:21,593 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-12 00:41:21,596 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 95 states, 94 states have (on average 1.425531914893617) internal successors, (134), 94 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:21,614 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2024-10-12 00:41:21,614 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:41:21,614 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:41:21,619 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:41:21,619 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-12 00:41:21,619 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-12 00:41:21,620 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 95 states, 94 states have (on average 1.425531914893617) internal successors, (134), 94 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:21,624 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2024-10-12 00:41:21,625 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:41:21,625 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:41:21,625 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:41:21,625 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-12 00:41:21,631 INFO L745 eck$LassoCheckResult]: Stem: 42#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 62#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 13#L666true assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 23#L565true assume !(0 == assume_abort_if_not_~cond#1); 15#L564true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 90#ldv_successful_malloc_returnLabel#1true foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 88#L565-2true assume !(0 == assume_abort_if_not_~cond#1); 3#L564-1true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 45#ldv_successful_malloc_returnLabel#2true foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 75#L655-3true [2024-10-12 00:41:21,632 INFO L747 eck$LassoCheckResult]: Loop: 75#L655-3true assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 38#L656true assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset; 57#L655-2true call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 75#L655-3true [2024-10-12 00:41:21,636 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:21,636 INFO L85 PathProgramCache]: Analyzing trace with hash -1482586390, now seen corresponding path program 1 times [2024-10-12 00:41:21,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:21,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566827224] [2024-10-12 00:41:21,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:21,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:21,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:21,787 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:41:21,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:21,836 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:41:21,838 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:21,838 INFO L85 PathProgramCache]: Analyzing trace with hash 59743, now seen corresponding path program 1 times [2024-10-12 00:41:21,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:21,839 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456807028] [2024-10-12 00:41:21,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:21,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:21,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:21,847 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:41:21,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:21,855 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:41:21,856 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:21,856 INFO L85 PathProgramCache]: Analyzing trace with hash 1712557526, now seen corresponding path program 1 times [2024-10-12 00:41:21,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:21,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250503097] [2024-10-12 00:41:21,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:21,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:21,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:41:22,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:41:22,119 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:41:22,119 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250503097] [2024-10-12 00:41:22,119 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1250503097] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:41:22,120 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-12 00:41:22,120 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-12 00:41:22,120 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [445849023] [2024-10-12 00:41:22,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:41:22,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:41:22,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-12 00:41:22,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-12 00:41:22,290 INFO L87 Difference]: Start difference. First operand has 95 states, 94 states have (on average 1.425531914893617) internal successors, (134), 94 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:22,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:41:22,520 INFO L93 Difference]: Finished difference Result 134 states and 151 transitions. [2024-10-12 00:41:22,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 134 states and 151 transitions. [2024-10-12 00:41:22,527 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2024-10-12 00:41:22,534 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 134 states to 105 states and 122 transitions. [2024-10-12 00:41:22,535 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 105 [2024-10-12 00:41:22,535 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 105 [2024-10-12 00:41:22,536 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 122 transitions. [2024-10-12 00:41:22,536 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:41:22,536 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 122 transitions. [2024-10-12 00:41:22,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 122 transitions. [2024-10-12 00:41:22,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 95. [2024-10-12 00:41:22,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.168421052631579) internal successors, (111), 94 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:22,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 111 transitions. [2024-10-12 00:41:22,560 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 111 transitions. [2024-10-12 00:41:22,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-12 00:41:22,564 INFO L425 stractBuchiCegarLoop]: Abstraction has 95 states and 111 transitions. [2024-10-12 00:41:22,565 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-12 00:41:22,565 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 111 transitions. [2024-10-12 00:41:22,566 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 25 [2024-10-12 00:41:22,566 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:41:22,566 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:41:22,567 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:41:22,567 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-12 00:41:22,567 INFO L745 eck$LassoCheckResult]: Stem: 289#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 290#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 260#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 261#L565 assume !(0 == assume_abort_if_not_~cond#1); 262#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 263#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 322#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 243#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 244#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 291#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 301#L655-4 ldv_is_in_set_#res#1 := 0; 292#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 293#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 311#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 294#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 277#L655-9 ldv_is_in_set_#res#1 := 0; 278#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 280#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 279#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 264#L564-2 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 247#ldv_successful_malloc_returnLabel#3 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 248#L592 havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 265#L606 havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 266#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 334#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 246#L655-13 [2024-10-12 00:41:22,568 INFO L747 eck$LassoCheckResult]: Loop: 246#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 309#L656-2 assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset; 245#L655-12 call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 246#L655-13 [2024-10-12 00:41:22,568 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:22,568 INFO L85 PathProgramCache]: Analyzing trace with hash 1979206134, now seen corresponding path program 1 times [2024-10-12 00:41:22,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:22,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818105746] [2024-10-12 00:41:22,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:22,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:22,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:22,653 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:41:22,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:22,722 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:41:22,723 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:22,723 INFO L85 PathProgramCache]: Analyzing trace with hash 137197, now seen corresponding path program 1 times [2024-10-12 00:41:22,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:22,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [837214276] [2024-10-12 00:41:22,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:22,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:22,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:22,732 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:41:22,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:22,737 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:41:22,737 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:22,738 INFO L85 PathProgramCache]: Analyzing trace with hash 1219005912, now seen corresponding path program 1 times [2024-10-12 00:41:22,738 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:22,738 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151200873] [2024-10-12 00:41:22,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:22,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:22,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:41:24,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:41:24,352 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:41:24,353 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151200873] [2024-10-12 00:41:24,353 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1151200873] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:41:24,353 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-12 00:41:24,353 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2024-10-12 00:41:24,353 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445122429] [2024-10-12 00:41:24,354 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:41:24,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:41:24,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-10-12 00:41:24,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2024-10-12 00:41:24,440 INFO L87 Difference]: Start difference. First operand 95 states and 111 transitions. cyclomatic complexity: 23 Second operand has 12 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:25,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:41:25,198 INFO L93 Difference]: Finished difference Result 122 states and 143 transitions. [2024-10-12 00:41:25,198 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 122 states and 143 transitions. [2024-10-12 00:41:25,199 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 31 [2024-10-12 00:41:25,204 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 122 states to 122 states and 143 transitions. [2024-10-12 00:41:25,205 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 122 [2024-10-12 00:41:25,205 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 122 [2024-10-12 00:41:25,207 INFO L73 IsDeterministic]: Start isDeterministic. Operand 122 states and 143 transitions. [2024-10-12 00:41:25,207 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:41:25,207 INFO L218 hiAutomatonCegarLoop]: Abstraction has 122 states and 143 transitions. [2024-10-12 00:41:25,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states and 143 transitions. [2024-10-12 00:41:25,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 115. [2024-10-12 00:41:25,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 115 states have (on average 1.173913043478261) internal successors, (135), 114 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:25,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 135 transitions. [2024-10-12 00:41:25,220 INFO L240 hiAutomatonCegarLoop]: Abstraction has 115 states and 135 transitions. [2024-10-12 00:41:25,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-10-12 00:41:25,221 INFO L425 stractBuchiCegarLoop]: Abstraction has 115 states and 135 transitions. [2024-10-12 00:41:25,221 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-12 00:41:25,222 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 115 states and 135 transitions. [2024-10-12 00:41:25,223 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2024-10-12 00:41:25,223 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:41:25,223 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:41:25,223 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:41:25,224 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-12 00:41:25,224 INFO L745 eck$LassoCheckResult]: Stem: 541#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 542#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 512#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 513#L565 assume !(0 == assume_abort_if_not_~cond#1); 514#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 515#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 575#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 497#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 498#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 543#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 555#L655-4 ldv_is_in_set_#res#1 := 0; 545#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 546#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 564#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 547#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 528#L655-9 ldv_is_in_set_#res#1 := 0; 529#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 531#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 530#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 516#L564-2 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 499#ldv_successful_malloc_returnLabel#3 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 500#L592 havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 517#L606 havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 518#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 527#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 578#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 579#L655-14 ldv_is_in_set_#res#1 := 0; 563#ldv_is_in_set_returnLabel#3 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 611#L669-3 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 610#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 504#L655-18 [2024-10-12 00:41:25,225 INFO L747 eck$LassoCheckResult]: Loop: 504#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 570#L656-3 assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset; 503#L655-17 call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 504#L655-18 [2024-10-12 00:41:25,227 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:25,227 INFO L85 PathProgramCache]: Analyzing trace with hash -1063048648, now seen corresponding path program 1 times [2024-10-12 00:41:25,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:25,228 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171010535] [2024-10-12 00:41:25,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:25,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:25,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:41:25,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:41:25,809 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:41:25,809 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171010535] [2024-10-12 00:41:25,809 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [171010535] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:41:25,809 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-12 00:41:25,809 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-10-12 00:41:25,810 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1770548869] [2024-10-12 00:41:25,810 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:41:25,810 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:41:25,811 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:25,811 INFO L85 PathProgramCache]: Analyzing trace with hash 171952, now seen corresponding path program 1 times [2024-10-12 00:41:25,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:25,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624825755] [2024-10-12 00:41:25,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:25,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:25,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:25,818 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:41:25,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:25,823 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:41:25,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:41:25,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-10-12 00:41:25,934 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-10-12 00:41:25,934 INFO L87 Difference]: Start difference. First operand 115 states and 135 transitions. cyclomatic complexity: 28 Second operand has 11 states, 11 states have (on average 2.727272727272727) internal successors, (30), 10 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:27,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:41:27,203 INFO L93 Difference]: Finished difference Result 167 states and 196 transitions. [2024-10-12 00:41:27,203 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167 states and 196 transitions. [2024-10-12 00:41:27,205 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 43 [2024-10-12 00:41:27,207 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167 states to 167 states and 196 transitions. [2024-10-12 00:41:27,208 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 167 [2024-10-12 00:41:27,208 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 167 [2024-10-12 00:41:27,208 INFO L73 IsDeterministic]: Start isDeterministic. Operand 167 states and 196 transitions. [2024-10-12 00:41:27,209 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:41:27,209 INFO L218 hiAutomatonCegarLoop]: Abstraction has 167 states and 196 transitions. [2024-10-12 00:41:27,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states and 196 transitions. [2024-10-12 00:41:27,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 123. [2024-10-12 00:41:27,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 123 states have (on average 1.1626016260162602) internal successors, (143), 122 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:27,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 143 transitions. [2024-10-12 00:41:27,217 INFO L240 hiAutomatonCegarLoop]: Abstraction has 123 states and 143 transitions. [2024-10-12 00:41:27,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-10-12 00:41:27,218 INFO L425 stractBuchiCegarLoop]: Abstraction has 123 states and 143 transitions. [2024-10-12 00:41:27,218 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-12 00:41:27,218 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 123 states and 143 transitions. [2024-10-12 00:41:27,219 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 31 [2024-10-12 00:41:27,219 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:41:27,219 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:41:27,220 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:41:27,220 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-12 00:41:27,220 INFO L745 eck$LassoCheckResult]: Stem: 867#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 868#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 836#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 837#L565 assume !(0 == assume_abort_if_not_~cond#1); 838#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 839#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 907#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 821#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 822#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 869#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 883#L655-4 ldv_is_in_set_#res#1 := 0; 870#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 871#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 893#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 872#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 852#L655-9 ldv_is_in_set_#res#1 := 0; 853#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 855#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 854#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 840#L564-2 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 823#ldv_successful_malloc_returnLabel#3 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 824#L592 havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 841#L606 havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 842#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 851#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 825#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 826#L656-2 assume ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset;havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;ldv_is_in_set_#res#1 := 1; 890#ldv_is_in_set_returnLabel#3 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 906#L669-3 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 847#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 848#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 884#L656-3 [2024-10-12 00:41:27,221 INFO L747 eck$LassoCheckResult]: Loop: 884#L656-3 assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset; 829#L655-17 call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 830#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 884#L656-3 [2024-10-12 00:41:27,221 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:27,221 INFO L85 PathProgramCache]: Analyzing trace with hash 1455100557, now seen corresponding path program 1 times [2024-10-12 00:41:27,222 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:27,222 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650433279] [2024-10-12 00:41:27,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:27,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:27,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:41:27,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:41:27,300 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:41:27,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650433279] [2024-10-12 00:41:27,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [650433279] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:41:27,300 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-12 00:41:27,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-12 00:41:27,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [480056321] [2024-10-12 00:41:27,301 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:41:27,301 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:41:27,301 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:27,301 INFO L85 PathProgramCache]: Analyzing trace with hash 176812, now seen corresponding path program 2 times [2024-10-12 00:41:27,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:27,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833674060] [2024-10-12 00:41:27,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:27,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:27,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:27,307 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:41:27,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:27,311 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:41:27,429 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:41:27,430 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-12 00:41:27,430 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-12 00:41:27,430 INFO L87 Difference]: Start difference. First operand 123 states and 143 transitions. cyclomatic complexity: 29 Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 4 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:27,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:41:27,466 INFO L93 Difference]: Finished difference Result 96 states and 108 transitions. [2024-10-12 00:41:27,466 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 108 transitions. [2024-10-12 00:41:27,467 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 22 [2024-10-12 00:41:27,467 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 85 states and 97 transitions. [2024-10-12 00:41:27,468 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 85 [2024-10-12 00:41:27,468 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 85 [2024-10-12 00:41:27,468 INFO L73 IsDeterministic]: Start isDeterministic. Operand 85 states and 97 transitions. [2024-10-12 00:41:27,468 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:41:27,468 INFO L218 hiAutomatonCegarLoop]: Abstraction has 85 states and 97 transitions. [2024-10-12 00:41:27,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states and 97 transitions. [2024-10-12 00:41:27,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 83. [2024-10-12 00:41:27,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.144578313253012) internal successors, (95), 82 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:27,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 95 transitions. [2024-10-12 00:41:27,472 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 95 transitions. [2024-10-12 00:41:27,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-12 00:41:27,473 INFO L425 stractBuchiCegarLoop]: Abstraction has 83 states and 95 transitions. [2024-10-12 00:41:27,473 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-12 00:41:27,473 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 95 transitions. [2024-10-12 00:41:27,474 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 22 [2024-10-12 00:41:27,474 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-12 00:41:27,474 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-12 00:41:27,475 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-12 00:41:27,475 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-12 00:41:27,475 INFO L745 eck$LassoCheckResult]: Stem: 1083#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 1084#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 1058#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1059#L565 assume !(0 == assume_abort_if_not_~cond#1); 1060#L564 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1061#ldv_successful_malloc_returnLabel#1 foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1113#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 1047#L564-1 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1048#ldv_successful_malloc_returnLabel#2 foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1085#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1097#L655-4 ldv_is_in_set_#res#1 := 0; 1086#ldv_is_in_set_returnLabel#1 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1087#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 1103#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1088#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1072#L655-9 ldv_is_in_set_#res#1 := 0; 1073#ldv_is_in_set_returnLabel#2 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1074#L636 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1070#L635 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 1071#L668 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1049#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1050#L655-14 ldv_is_in_set_#res#1 := 0; 1112#ldv_is_in_set_returnLabel#3 mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1075#L669-3 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 1066#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1067#L655-18 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1098#L655-19 ldv_is_in_set_#res#1 := 0; 1106#ldv_is_in_set_returnLabel#4 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1091#L636-2 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1092#L635-1 havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 1115#L668-1 havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset := foo_~m2~0#1.base, foo_~m2~0#1.offset;havoc mutex_unlock_#t~ret33#1, mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset;mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset := mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1104#L655-23 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1105#L655-24 ldv_is_in_set_#res#1 := 0; 1129#ldv_is_in_set_returnLabel#5 mutex_unlock_#t~ret33#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1128#L673 assume !(0 == mutex_unlock_#t~ret33#1);havoc mutex_unlock_#t~ret33#1; 1126#L673-2 assume { :begin_inline_ldv_set_del } true;ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset, ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset, ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset, ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset, ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset, ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset, ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset, ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset, ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset, ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset, ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset, ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset, ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset := ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset;ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset := ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset;havoc ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset;havoc ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset := read~$Pointer$#1(ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, 4);ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset := ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset := ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset - 4;havoc ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset;ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset;call ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset := read~$Pointer$#1(ldv_set_del_~m~0#1.base, 4 + ldv_set_del_~m~0#1.offset, 4);ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset := ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;havoc ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset := ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset - 4;havoc ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset;havoc ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset;havoc ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset; 1124#L646-3 [2024-10-12 00:41:27,476 INFO L747 eck$LassoCheckResult]: Loop: 1124#L646-3 assume !!(ldv_set_del_~m~0#1.base != ldv_set_del_~s#1.base || 4 + ldv_set_del_~m~0#1.offset != ldv_set_del_~s#1.offset);call ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset := read~$Pointer$#1(ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, 4); 1125#L647 assume !(ldv_set_del_#t~mem23#1.base == ldv_set_del_~e#1.base && ldv_set_del_#t~mem23#1.offset == ldv_set_del_~e#1.offset);havoc ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset; 1127#L646-2 ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset := read~$Pointer$#1(ldv_set_del_~n~0#1.base, 4 + ldv_set_del_~n~0#1.offset, 4);ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset := ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset;havoc ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset;ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset := ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset - 4;havoc ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset;havoc ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset; 1124#L646-3 [2024-10-12 00:41:27,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:27,477 INFO L85 PathProgramCache]: Analyzing trace with hash 1240533476, now seen corresponding path program 1 times [2024-10-12 00:41:27,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:27,477 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614058883] [2024-10-12 00:41:27,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:27,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:27,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-12 00:41:27,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-12 00:41:27,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-12 00:41:27,526 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [614058883] [2024-10-12 00:41:27,527 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [614058883] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-12 00:41:27,527 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-12 00:41:27,527 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-12 00:41:27,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074615358] [2024-10-12 00:41:27,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-12 00:41:27,528 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-12 00:41:27,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-12 00:41:27,528 INFO L85 PathProgramCache]: Analyzing trace with hash 249534, now seen corresponding path program 1 times [2024-10-12 00:41:27,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-12 00:41:27,529 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386896600] [2024-10-12 00:41:27,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-12 00:41:27,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-12 00:41:27,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:27,534 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-12 00:41:27,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-12 00:41:27,538 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-12 00:41:27,688 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-12 00:41:27,688 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-12 00:41:27,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-12 00:41:27,689 INFO L87 Difference]: Start difference. First operand 83 states and 95 transitions. cyclomatic complexity: 18 Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-12 00:41:27,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-12 00:41:27,698 INFO L93 Difference]: Finished difference Result 18 states and 17 transitions. [2024-10-12 00:41:27,699 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 17 transitions. [2024-10-12 00:41:27,699 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2024-10-12 00:41:27,699 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 0 states and 0 transitions. [2024-10-12 00:41:27,699 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2024-10-12 00:41:27,699 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2024-10-12 00:41:27,699 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2024-10-12 00:41:27,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-12 00:41:27,700 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-10-12 00:41:27,700 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-10-12 00:41:27,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-12 00:41:27,701 INFO L425 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-10-12 00:41:27,702 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-12 00:41:27,702 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2024-10-12 00:41:27,702 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2024-10-12 00:41:27,702 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2024-10-12 00:41:27,709 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 12.10 12:41:27 BoogieIcfgContainer [2024-10-12 00:41:27,710 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2024-10-12 00:41:27,710 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-10-12 00:41:27,711 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-10-12 00:41:27,711 INFO L274 PluginConnector]: Witness Printer initialized [2024-10-12 00:41:27,712 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.10 12:41:21" (3/4) ... [2024-10-12 00:41:27,714 INFO L142 WitnessPrinter]: No result that supports witness generation found [2024-10-12 00:41:27,717 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-10-12 00:41:27,718 INFO L158 Benchmark]: Toolchain (without parser) took 7450.93ms. Allocated memory was 167.8MB in the beginning and 249.6MB in the end (delta: 81.8MB). Free memory was 133.9MB in the beginning and 208.0MB in the end (delta: -74.1MB). Peak memory consumption was 8.7MB. Max. memory is 16.1GB. [2024-10-12 00:41:27,719 INFO L158 Benchmark]: CDTParser took 0.13ms. Allocated memory is still 109.1MB. Free memory is still 82.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-10-12 00:41:27,720 INFO L158 Benchmark]: CACSL2BoogieTranslator took 417.35ms. Allocated memory is still 167.8MB. Free memory was 133.9MB in the beginning and 112.3MB in the end (delta: 21.6MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2024-10-12 00:41:27,720 INFO L158 Benchmark]: Boogie Procedure Inliner took 53.42ms. Allocated memory is still 167.8MB. Free memory was 112.3MB in the beginning and 109.0MB in the end (delta: 3.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-10-12 00:41:27,720 INFO L158 Benchmark]: Boogie Preprocessor took 86.53ms. Allocated memory is still 167.8MB. Free memory was 109.0MB in the beginning and 101.3MB in the end (delta: 7.6MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2024-10-12 00:41:27,721 INFO L158 Benchmark]: RCFGBuilder took 712.86ms. Allocated memory is still 167.8MB. Free memory was 101.3MB in the beginning and 57.8MB in the end (delta: 43.5MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. [2024-10-12 00:41:27,721 INFO L158 Benchmark]: BuchiAutomizer took 6169.70ms. Allocated memory was 167.8MB in the beginning and 249.6MB in the end (delta: 81.8MB). Free memory was 57.3MB in the beginning and 208.0MB in the end (delta: -150.7MB). There was no memory consumed. Max. memory is 16.1GB. [2024-10-12 00:41:27,721 INFO L158 Benchmark]: Witness Printer took 6.91ms. Allocated memory is still 249.6MB. Free memory is still 208.0MB. There was no memory consumed. Max. memory is 16.1GB. [2024-10-12 00:41:27,726 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13ms. Allocated memory is still 109.1MB. Free memory is still 82.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 417.35ms. Allocated memory is still 167.8MB. Free memory was 133.9MB in the beginning and 112.3MB in the end (delta: 21.6MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 53.42ms. Allocated memory is still 167.8MB. Free memory was 112.3MB in the beginning and 109.0MB in the end (delta: 3.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 86.53ms. Allocated memory is still 167.8MB. Free memory was 109.0MB in the beginning and 101.3MB in the end (delta: 7.6MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * RCFGBuilder took 712.86ms. Allocated memory is still 167.8MB. Free memory was 101.3MB in the beginning and 57.8MB in the end (delta: 43.5MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. * BuchiAutomizer took 6169.70ms. Allocated memory was 167.8MB in the beginning and 249.6MB in the end (delta: 81.8MB). Free memory was 57.3MB in the beginning and 208.0MB in the end (delta: -150.7MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 6.91ms. Allocated memory is still 249.6MB. Free memory is still 208.0MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 5 terminating modules (5 trivial, 0 deterministic, 0 nondeterministic). 5 modules have a trivial ranking function, the largest among these consists of 12 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 6.1s and 6 iterations. TraceHistogramMax:1. Analysis of lassos took 3.6s. Construction of modules took 1.4s. Büchi inclusion checks took 0.9s. Highest rank in rank-based complementation 0. Minimization of det autom 5. Minimization of nondet autom 0. Automata minimization 0.0s AutomataMinimizationTime, 4 MinimizatonAttempts, 63 StatesRemovedByMinimization, 4 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 492 SdHoareTripleChecker+Valid, 1.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 492 mSDsluCounter, 1214 SdHoareTripleChecker+Invalid, 1.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 911 mSDsCounter, 61 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 912 IncrementalHoareTripleChecker+Invalid, 973 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 61 mSolverCounterUnsat, 303 mSDtfsCounter, 912 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU3 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2024-10-12 00:41:27,797 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-clean/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE