./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a046e57d Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-mul-div-a046e57-m [2024-10-13 17:01:03,080 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-13 17:01:03,164 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-10-13 17:01:03,171 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-13 17:01:03,172 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-13 17:01:03,208 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-13 17:01:03,208 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-13 17:01:03,209 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-13 17:01:03,209 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-13 17:01:03,210 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-13 17:01:03,210 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-13 17:01:03,211 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-13 17:01:03,211 INFO L153 SettingsManager]: * Use SBE=true [2024-10-13 17:01:03,211 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-13 17:01:03,212 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-13 17:01:03,212 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-13 17:01:03,214 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-13 17:01:03,217 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-13 17:01:03,217 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-13 17:01:03,218 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-13 17:01:03,218 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-13 17:01:03,218 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-13 17:01:03,218 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-13 17:01:03,219 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-13 17:01:03,219 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-13 17:01:03,219 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-13 17:01:03,219 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-13 17:01:03,219 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-13 17:01:03,220 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-13 17:01:03,220 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-13 17:01:03,220 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-13 17:01:03,220 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-13 17:01:03,220 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-13 17:01:03,221 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-13 17:01:03,221 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-13 17:01:03,222 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-13 17:01:03,223 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe [2024-10-13 17:01:03,473 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-13 17:01:03,499 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-13 17:01:03,502 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-13 17:01:03,503 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-13 17:01:03,504 INFO L274 PluginConnector]: CDTParser initialized [2024-10-13 17:01:03,505 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-10-13 17:01:04,947 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-13 17:01:05,165 INFO L384 CDTParser]: Found 1 translation units. [2024-10-13 17:01:05,165 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-10-13 17:01:05,182 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/640a8db92/af397740fff54abbbba4e6acab115f75/FLAG8f160b18f [2024-10-13 17:01:05,199 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/640a8db92/af397740fff54abbbba4e6acab115f75 [2024-10-13 17:01:05,202 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-13 17:01:05,204 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-13 17:01:05,207 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-13 17:01:05,207 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-13 17:01:05,213 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-13 17:01:05,213 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,214 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@39da70b1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05, skipping insertion in model container [2024-10-13 17:01:05,215 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,256 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-13 17:01:05,520 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-13 17:01:05,532 INFO L200 MainTranslator]: Completed pre-run [2024-10-13 17:01:05,584 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-13 17:01:05,613 INFO L204 MainTranslator]: Completed translation [2024-10-13 17:01:05,614 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05 WrapperNode [2024-10-13 17:01:05,614 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-13 17:01:05,616 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-13 17:01:05,616 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-13 17:01:05,616 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-13 17:01:05,622 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,635 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,654 INFO L138 Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 33 [2024-10-13 17:01:05,655 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-13 17:01:05,656 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-13 17:01:05,656 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-13 17:01:05,656 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-13 17:01:05,665 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,665 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,669 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,680 INFO L175 MemorySlicer]: Split 7 memory accesses to 2 slices as follows [4, 3]. 57 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 3 writes are split as follows [2, 1]. [2024-10-13 17:01:05,680 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,680 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,684 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,691 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,692 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,693 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,694 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-13 17:01:05,695 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-13 17:01:05,695 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-13 17:01:05,696 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-13 17:01:05,696 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (1/1) ... [2024-10-13 17:01:05,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-13 17:01:05,711 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:01:05,726 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-13 17:01:05,735 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-13 17:01:05,783 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-13 17:01:05,783 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-10-13 17:01:05,784 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-13 17:01:05,785 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-10-13 17:01:05,785 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-13 17:01:05,785 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-13 17:01:05,785 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-13 17:01:05,785 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-13 17:01:05,906 INFO L238 CfgBuilder]: Building ICFG [2024-10-13 17:01:05,908 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-13 17:01:06,020 INFO L? ?]: Removed 4 outVars from TransFormulas that were not future-live. [2024-10-13 17:01:06,024 INFO L287 CfgBuilder]: Performing block encoding [2024-10-13 17:01:06,037 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-13 17:01:06,038 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-13 17:01:06,038 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 05:01:06 BoogieIcfgContainer [2024-10-13 17:01:06,039 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-13 17:01:06,040 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-13 17:01:06,040 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-13 17:01:06,044 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-13 17:01:06,046 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-13 17:01:06,046 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.10 05:01:05" (1/3) ... [2024-10-13 17:01:06,047 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@78e1aac7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.10 05:01:06, skipping insertion in model container [2024-10-13 17:01:06,047 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-13 17:01:06,047 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:01:05" (2/3) ... [2024-10-13 17:01:06,048 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@78e1aac7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.10 05:01:06, skipping insertion in model container [2024-10-13 17:01:06,048 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-13 17:01:06,048 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 05:01:06" (3/3) ... [2024-10-13 17:01:06,049 INFO L332 chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i [2024-10-13 17:01:06,104 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-13 17:01:06,104 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-13 17:01:06,105 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-13 17:01:06,105 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-13 17:01:06,105 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-13 17:01:06,106 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-13 17:01:06,106 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-13 17:01:06,106 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-13 17:01:06,110 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:06,127 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-10-13 17:01:06,127 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:06,128 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:06,132 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:06,133 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-13 17:01:06,133 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-13 17:01:06,133 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:06,134 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-10-13 17:01:06,134 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:06,135 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:06,135 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:06,135 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-13 17:01:06,142 INFO L745 eck$LassoCheckResult]: Stem: 6#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 5#L549-3true [2024-10-13 17:01:06,143 INFO L747 eck$LassoCheckResult]: Loop: 5#L549-3true call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2#L549-1true assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 7#L551-3true assume !true; 11#L551-4true call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 5#L549-3true [2024-10-13 17:01:06,148 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:06,148 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-13 17:01:06,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:06,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148200968] [2024-10-13 17:01:06,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:06,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:06,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:06,254 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:06,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:06,291 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:06,293 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:06,293 INFO L85 PathProgramCache]: Analyzing trace with hash 1144360, now seen corresponding path program 1 times [2024-10-13 17:01:06,293 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:06,294 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [449397094] [2024-10-13 17:01:06,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:06,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:06,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:06,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:06,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:01:06,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [449397094] [2024-10-13 17:01:06,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [449397094] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:01:06,343 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:01:06,344 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-13 17:01:06,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [868816145] [2024-10-13 17:01:06,344 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:01:06,348 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:01:06,348 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:01:06,376 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-10-13 17:01:06,377 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-10-13 17:01:06,379 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:06,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:01:06,388 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2024-10-13 17:01:06,390 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2024-10-13 17:01:06,391 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-10-13 17:01:06,393 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions. [2024-10-13 17:01:06,394 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-13 17:01:06,394 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-13 17:01:06,395 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2024-10-13 17:01:06,395 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:01:06,395 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-10-13 17:01:06,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2024-10-13 17:01:06,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2024-10-13 17:01:06,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:06,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2024-10-13 17:01:06,420 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-10-13 17:01:06,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-13 17:01:06,424 INFO L425 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-10-13 17:01:06,424 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-13 17:01:06,424 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2024-10-13 17:01:06,425 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-10-13 17:01:06,425 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:06,425 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:06,425 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:06,425 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-10-13 17:01:06,426 INFO L745 eck$LassoCheckResult]: Stem: 33#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 34#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 32#L549-3 [2024-10-13 17:01:06,426 INFO L747 eck$LassoCheckResult]: Loop: 32#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 30#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 31#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 35#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 36#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 32#L549-3 [2024-10-13 17:01:06,426 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:06,426 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2024-10-13 17:01:06,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:06,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288489764] [2024-10-13 17:01:06,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:06,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:06,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:06,442 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:06,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:06,450 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:06,451 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:06,451 INFO L85 PathProgramCache]: Analyzing trace with hash 35468273, now seen corresponding path program 1 times [2024-10-13 17:01:06,451 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:06,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259282232] [2024-10-13 17:01:06,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:06,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:06,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:06,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:06,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:01:06,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259282232] [2024-10-13 17:01:06,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [259282232] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:01:06,615 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:01:06,616 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-13 17:01:06,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288073028] [2024-10-13 17:01:06,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:01:06,616 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:01:06,616 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:01:06,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-13 17:01:06,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-13 17:01:06,617 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:06,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:01:06,665 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2024-10-13 17:01:06,665 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2024-10-13 17:01:06,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2024-10-13 17:01:06,666 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2024-10-13 17:01:06,667 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-10-13 17:01:06,667 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-10-13 17:01:06,667 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2024-10-13 17:01:06,667 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:01:06,667 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-13 17:01:06,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2024-10-13 17:01:06,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2024-10-13 17:01:06,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:06,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2024-10-13 17:01:06,670 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-13 17:01:06,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-13 17:01:06,671 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-13 17:01:06,671 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-13 17:01:06,671 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2024-10-13 17:01:06,672 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2024-10-13 17:01:06,672 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:06,672 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:06,672 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:06,673 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1] [2024-10-13 17:01:06,673 INFO L745 eck$LassoCheckResult]: Stem: 60#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 61#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 57#L549-3 [2024-10-13 17:01:06,673 INFO L747 eck$LassoCheckResult]: Loop: 57#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 55#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 56#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 58#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 59#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 63#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 62#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 57#L549-3 [2024-10-13 17:01:06,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:06,674 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2024-10-13 17:01:06,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:06,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117641561] [2024-10-13 17:01:06,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:06,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:06,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:06,686 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:06,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:06,710 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:06,710 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:06,711 INFO L85 PathProgramCache]: Analyzing trace with hash -274676436, now seen corresponding path program 1 times [2024-10-13 17:01:06,711 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:06,711 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713009272] [2024-10-13 17:01:06,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:06,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:06,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:06,997 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:06,998 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:01:06,999 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713009272] [2024-10-13 17:01:06,999 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [713009272] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-13 17:01:06,999 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1483906953] [2024-10-13 17:01:06,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:07,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-13 17:01:07,000 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:01:07,002 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-13 17:01:07,004 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-10-13 17:01:07,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:07,085 INFO L255 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-13 17:01:07,091 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-13 17:01:07,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-13 17:01:07,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:07,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-10-13 17:01:07,205 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:07,206 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-13 17:01:07,264 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:07,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1483906953] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-13 17:01:07,264 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-13 17:01:07,264 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2024-10-13 17:01:07,265 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [815803937] [2024-10-13 17:01:07,265 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-13 17:01:07,267 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:01:07,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:01:07,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-10-13 17:01:07,268 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2024-10-13 17:01:07,269 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:07,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:01:07,351 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2024-10-13 17:01:07,351 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2024-10-13 17:01:07,352 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2024-10-13 17:01:07,352 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2024-10-13 17:01:07,353 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-10-13 17:01:07,353 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-10-13 17:01:07,353 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2024-10-13 17:01:07,353 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:01:07,353 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-13 17:01:07,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2024-10-13 17:01:07,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2024-10-13 17:01:07,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:07,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2024-10-13 17:01:07,357 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-13 17:01:07,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-13 17:01:07,359 INFO L425 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-13 17:01:07,359 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-13 17:01:07,359 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2024-10-13 17:01:07,361 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2024-10-13 17:01:07,361 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:07,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:07,362 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:07,362 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1] [2024-10-13 17:01:07,363 INFO L745 eck$LassoCheckResult]: Stem: 140#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 141#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 136#L549-3 [2024-10-13 17:01:07,363 INFO L747 eck$LassoCheckResult]: Loop: 136#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 134#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 135#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 137#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 138#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 148#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 146#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 144#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 143#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 142#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 136#L549-3 [2024-10-13 17:01:07,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:07,364 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2024-10-13 17:01:07,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:07,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245896640] [2024-10-13 17:01:07,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:07,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:07,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:07,378 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:07,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:07,390 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:07,393 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:07,393 INFO L85 PathProgramCache]: Analyzing trace with hash 351922269, now seen corresponding path program 2 times [2024-10-13 17:01:07,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:07,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006870679] [2024-10-13 17:01:07,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:07,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:07,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:07,892 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:07,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:01:07,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006870679] [2024-10-13 17:01:07,893 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1006870679] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-13 17:01:07,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [688539322] [2024-10-13 17:01:07,893 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-13 17:01:07,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-13 17:01:07,893 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:01:07,896 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-13 17:01:07,898 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-10-13 17:01:07,965 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-13 17:01:07,965 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-13 17:01:07,966 INFO L255 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 17 conjuncts are in the unsatisfiable core [2024-10-13 17:01:07,971 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-13 17:01:07,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-13 17:01:07,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:08,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:08,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:08,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:08,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-10-13 17:01:08,073 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:08,074 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-13 17:01:08,245 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:08,246 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [688539322] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-13 17:01:08,246 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-13 17:01:08,246 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 18 [2024-10-13 17:01:08,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639119946] [2024-10-13 17:01:08,246 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-13 17:01:08,247 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:01:08,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:01:08,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-10-13 17:01:08,254 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=179, Unknown=0, NotChecked=0, Total=306 [2024-10-13 17:01:08,254 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 18 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:08,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:01:08,447 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2024-10-13 17:01:08,447 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2024-10-13 17:01:08,448 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-10-13 17:01:08,448 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2024-10-13 17:01:08,448 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2024-10-13 17:01:08,448 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2024-10-13 17:01:08,449 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2024-10-13 17:01:08,449 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:01:08,449 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-13 17:01:08,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2024-10-13 17:01:08,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2024-10-13 17:01:08,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:08,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2024-10-13 17:01:08,452 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-13 17:01:08,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-10-13 17:01:08,453 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-13 17:01:08,453 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-13 17:01:08,453 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2024-10-13 17:01:08,454 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-10-13 17:01:08,454 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:08,454 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:08,454 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:08,454 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1] [2024-10-13 17:01:08,455 INFO L745 eck$LassoCheckResult]: Stem: 287#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 288#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 283#L549-3 [2024-10-13 17:01:08,455 INFO L747 eck$LassoCheckResult]: Loop: 283#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 281#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 282#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 284#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 285#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 286#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 307#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 306#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 305#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 304#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 303#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 302#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 301#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 300#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 299#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 298#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 297#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 296#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 295#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 294#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 293#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 292#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 291#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 290#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 289#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 283#L549-3 [2024-10-13 17:01:08,455 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:08,455 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2024-10-13 17:01:08,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:08,456 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342870444] [2024-10-13 17:01:08,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:08,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:08,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:08,462 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:08,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:08,465 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:08,465 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:08,465 INFO L85 PathProgramCache]: Analyzing trace with hash 646907007, now seen corresponding path program 3 times [2024-10-13 17:01:08,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:08,466 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200476370] [2024-10-13 17:01:08,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:08,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:08,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:09,502 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:09,502 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:01:09,502 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1200476370] [2024-10-13 17:01:09,502 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1200476370] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-13 17:01:09,502 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1083373510] [2024-10-13 17:01:09,503 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-13 17:01:09,503 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-13 17:01:09,503 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:01:09,505 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-13 17:01:09,506 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-10-13 17:01:09,611 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-10-13 17:01:09,612 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-13 17:01:09,613 INFO L255 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-10-13 17:01:09,618 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-13 17:01:09,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-13 17:01:09,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,706 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:09,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-10-13 17:01:09,769 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:09,769 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-13 17:01:10,074 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:10,074 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1083373510] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-13 17:01:10,074 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-13 17:01:10,075 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 14, 14] total 37 [2024-10-13 17:01:10,075 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [154630069] [2024-10-13 17:01:10,075 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-13 17:01:10,075 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:01:10,075 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:01:10,076 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-10-13 17:01:10,077 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=566, Invalid=766, Unknown=0, NotChecked=0, Total=1332 [2024-10-13 17:01:10,077 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 37 states, 37 states have (on average 1.864864864864865) internal successors, (69), 37 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:10,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:01:10,421 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2024-10-13 17:01:10,421 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2024-10-13 17:01:10,422 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-10-13 17:01:10,423 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2024-10-13 17:01:10,423 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2024-10-13 17:01:10,423 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2024-10-13 17:01:10,423 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2024-10-13 17:01:10,423 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:01:10,423 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-13 17:01:10,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2024-10-13 17:01:10,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2024-10-13 17:01:10,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:10,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2024-10-13 17:01:10,427 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-13 17:01:10,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-10-13 17:01:10,428 INFO L425 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-13 17:01:10,429 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-13 17:01:10,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2024-10-13 17:01:10,429 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-10-13 17:01:10,429 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:10,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:10,430 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:10,430 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1] [2024-10-13 17:01:10,430 INFO L745 eck$LassoCheckResult]: Stem: 573#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 574#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 569#L549-3 [2024-10-13 17:01:10,431 INFO L747 eck$LassoCheckResult]: Loop: 569#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 567#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 568#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 572#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 570#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 571#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 617#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 616#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 615#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 614#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 613#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 612#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 611#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 610#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 609#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 608#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 607#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 606#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 605#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 604#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 603#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 602#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 601#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 600#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 599#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 598#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 597#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 596#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 595#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 594#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 593#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 592#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 591#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 590#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 589#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 588#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 587#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 586#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 585#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 584#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 583#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 582#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 581#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 580#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 579#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 578#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 577#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 576#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 575#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 569#L549-3 [2024-10-13 17:01:10,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:10,433 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2024-10-13 17:01:10,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:10,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763320887] [2024-10-13 17:01:10,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:10,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:10,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:10,440 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:10,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:10,443 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:10,443 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:10,443 INFO L85 PathProgramCache]: Analyzing trace with hash 1009537987, now seen corresponding path program 4 times [2024-10-13 17:01:10,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:10,443 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414990163] [2024-10-13 17:01:10,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:10,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:10,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:13,334 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:13,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:01:13,335 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414990163] [2024-10-13 17:01:13,338 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [414990163] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-13 17:01:13,338 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [298046161] [2024-10-13 17:01:13,338 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-13 17:01:13,339 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-13 17:01:13,339 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:01:13,340 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-13 17:01:13,342 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-13 17:01:13,638 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-13 17:01:13,638 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-13 17:01:13,642 INFO L255 TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 73 conjuncts are in the unsatisfiable core [2024-10-13 17:01:13,649 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-13 17:01:13,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-13 17:01:13,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,780 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:13,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-10-13 17:01:13,916 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:13,916 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-13 17:01:14,893 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:14,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [298046161] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-13 17:01:14,894 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-13 17:01:14,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 26, 26] total 73 [2024-10-13 17:01:14,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182486057] [2024-10-13 17:01:14,894 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-13 17:01:14,894 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:01:14,895 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:01:14,896 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2024-10-13 17:01:14,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2282, Invalid=2974, Unknown=0, NotChecked=0, Total=5256 [2024-10-13 17:01:14,898 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand has 73 states, 73 states have (on average 1.9315068493150684) internal successors, (141), 73 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:15,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:01:15,870 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2024-10-13 17:01:15,870 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2024-10-13 17:01:15,871 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2024-10-13 17:01:15,872 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2024-10-13 17:01:15,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2024-10-13 17:01:15,875 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2024-10-13 17:01:15,875 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2024-10-13 17:01:15,876 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:01:15,876 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-13 17:01:15,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2024-10-13 17:01:15,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2024-10-13 17:01:15,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:15,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2024-10-13 17:01:15,881 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-13 17:01:15,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2024-10-13 17:01:15,882 INFO L425 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-13 17:01:15,882 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-13 17:01:15,882 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2024-10-13 17:01:15,883 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2024-10-13 17:01:15,883 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:15,883 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:15,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:15,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [47, 46, 1, 1, 1, 1] [2024-10-13 17:01:15,885 INFO L745 eck$LassoCheckResult]: Stem: 1135#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1136#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 1131#L549-3 [2024-10-13 17:01:15,885 INFO L747 eck$LassoCheckResult]: Loop: 1131#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 1129#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1130#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1134#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1132#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1133#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1227#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1226#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1225#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1224#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1223#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1222#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1221#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1220#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1219#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1218#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1217#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1216#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1215#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1214#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1213#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1212#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1211#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1210#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1209#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1208#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1207#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1206#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1205#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1204#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1203#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1202#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1201#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1200#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1199#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1198#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1197#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1196#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1195#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1194#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1193#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1192#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1191#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1190#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1189#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1188#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1187#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1186#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1185#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1184#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1183#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1182#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1181#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1180#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1179#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1178#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1177#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1176#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1175#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1174#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1173#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1172#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1171#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1170#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1169#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1168#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1167#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1166#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1165#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1164#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1163#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1162#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1161#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1160#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1159#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1158#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1157#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1156#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1155#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1154#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1153#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1152#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1151#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1150#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1149#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1148#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1147#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1146#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1145#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1144#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1143#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1142#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1141#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1140#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1139#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1138#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 1137#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 1131#L549-3 [2024-10-13 17:01:15,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:15,885 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2024-10-13 17:01:15,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:15,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569923405] [2024-10-13 17:01:15,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:15,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:15,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:15,891 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:15,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:15,894 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:15,894 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:15,894 INFO L85 PathProgramCache]: Analyzing trace with hash 1846627915, now seen corresponding path program 5 times [2024-10-13 17:01:15,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:15,894 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92632849] [2024-10-13 17:01:15,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:15,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:15,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:01:23,995 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:23,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:01:23,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92632849] [2024-10-13 17:01:23,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [92632849] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-13 17:01:23,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [802549072] [2024-10-13 17:01:23,996 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-13 17:01:23,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-13 17:01:23,997 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:01:23,999 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-13 17:01:24,000 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-13 17:01:43,552 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-10-13 17:01:43,553 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-13 17:01:43,567 INFO L255 TraceCheckSpWp]: Trace formula consists of 722 conjuncts, 143 conjuncts are in the unsatisfiable core [2024-10-13 17:01:43,583 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-13 17:01:43,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-13 17:01:43,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,702 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:43,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-10-13 17:01:44,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-10-13 17:01:44,003 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:44,003 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-13 17:01:46,713 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:01:46,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [802549072] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-13 17:01:46,714 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-13 17:01:46,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 50, 50] total 145 [2024-10-13 17:01:46,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730249241] [2024-10-13 17:01:46,714 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-13 17:01:46,715 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:01:46,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:01:46,718 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 145 interpolants. [2024-10-13 17:01:46,725 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9170, Invalid=11710, Unknown=0, NotChecked=0, Total=20880 [2024-10-13 17:01:46,726 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 2 Second operand has 145 states, 145 states have (on average 1.9655172413793103) internal successors, (285), 145 states have internal predecessors, (285), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:49,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:01:49,514 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2024-10-13 17:01:49,514 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2024-10-13 17:01:49,519 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2024-10-13 17:01:49,521 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2024-10-13 17:01:49,521 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 195 [2024-10-13 17:01:49,521 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 195 [2024-10-13 17:01:49,521 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2024-10-13 17:01:49,523 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:01:49,523 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-13 17:01:49,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2024-10-13 17:01:49,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2024-10-13 17:01:49,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:01:49,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2024-10-13 17:01:49,533 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-13 17:01:49,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2024-10-13 17:01:49,534 INFO L425 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-13 17:01:49,534 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-13 17:01:49,534 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2024-10-13 17:01:49,536 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2024-10-13 17:01:49,536 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:01:49,536 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:01:49,537 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-13 17:01:49,537 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [95, 94, 1, 1, 1, 1] [2024-10-13 17:01:49,538 INFO L745 eck$LassoCheckResult]: Stem: 2249#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2250#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 2245#L549-3 [2024-10-13 17:01:49,538 INFO L747 eck$LassoCheckResult]: Loop: 2245#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2243#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2244#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2248#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2246#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2247#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2437#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2436#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2435#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2434#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2433#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2432#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2431#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2430#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2429#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2428#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2427#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2426#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2425#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2424#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2423#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2422#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2421#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2420#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2419#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2418#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2417#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2416#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2415#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2414#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2413#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2412#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2411#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2410#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2409#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2408#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2407#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2406#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2405#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2404#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2403#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2402#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2401#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2400#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2399#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2398#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2397#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2396#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2395#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2394#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2393#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2392#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2391#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2390#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2389#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2388#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2387#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2386#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2385#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2384#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2383#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2382#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2381#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2380#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2379#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2378#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2377#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2376#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2375#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2374#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2373#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2372#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2371#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2370#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2369#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2368#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2367#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2366#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2365#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2364#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2363#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2362#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2361#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2360#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2359#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2358#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2357#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2356#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2355#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2354#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2353#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2352#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2351#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2350#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2349#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2348#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2347#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2346#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2345#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2344#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2343#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2342#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2341#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2340#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2339#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2338#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2337#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2336#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2335#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2334#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2333#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2332#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2331#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2330#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2329#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2328#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2327#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2326#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2325#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2324#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2323#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2322#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2321#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2320#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2319#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2318#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2317#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2316#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2315#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2314#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2313#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2312#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2311#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2310#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2309#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2308#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2307#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2306#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2305#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2304#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2303#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2302#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2301#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2300#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2299#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2298#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2297#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2296#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2295#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2294#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2293#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2292#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2291#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2290#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2289#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2288#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2287#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2286#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2285#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2284#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2283#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2282#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2281#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2280#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2279#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2278#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2277#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2276#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2275#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2274#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2273#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2272#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2271#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2270#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2269#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2268#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2267#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2266#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2265#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2264#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2263#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2262#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2261#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2260#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2259#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2258#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2257#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2256#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2255#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2254#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2253#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2252#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 2251#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 2245#L549-3 [2024-10-13 17:01:49,539 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:49,539 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2024-10-13 17:01:49,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:49,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517262575] [2024-10-13 17:01:49,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:49,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:49,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:49,545 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:01:49,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:01:49,548 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:01:49,548 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:01:49,549 INFO L85 PathProgramCache]: Analyzing trace with hash -1384860837, now seen corresponding path program 6 times [2024-10-13 17:01:49,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:01:49,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872467656] [2024-10-13 17:01:49,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:01:49,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:01:49,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:02:13,645 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:02:13,645 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:02:13,645 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872467656] [2024-10-13 17:02:13,645 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1872467656] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-13 17:02:13,645 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1332504556] [2024-10-13 17:02:13,645 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-13 17:02:13,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-13 17:02:13,646 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:02:13,648 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-13 17:02:13,649 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process