./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/kundu1.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a046e57d Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/kundu1.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c114a15ea6b1c9b012290758a6a9559b9c02a944706c9768958a3bd9c86822a7 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-mul-div-a046e57-m [2024-10-13 17:43:49,653 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-13 17:43:49,715 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-13 17:43:49,720 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-13 17:43:49,721 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-13 17:43:49,744 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-13 17:43:49,745 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-13 17:43:49,745 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-13 17:43:49,746 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-13 17:43:49,747 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-13 17:43:49,748 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-13 17:43:49,748 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-13 17:43:49,748 INFO L153 SettingsManager]: * Use SBE=true [2024-10-13 17:43:49,749 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-13 17:43:49,751 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-13 17:43:49,751 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-13 17:43:49,751 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-13 17:43:49,752 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-13 17:43:49,752 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-13 17:43:49,752 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-13 17:43:49,752 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-13 17:43:49,752 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-13 17:43:49,753 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-13 17:43:49,753 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-13 17:43:49,753 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-13 17:43:49,753 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-13 17:43:49,753 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-13 17:43:49,753 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-13 17:43:49,754 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-13 17:43:49,754 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-13 17:43:49,754 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-13 17:43:49,754 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-13 17:43:49,754 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-13 17:43:49,754 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-13 17:43:49,754 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-13 17:43:49,755 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-13 17:43:49,755 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-13 17:43:49,755 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-13 17:43:49,755 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-13 17:43:49,755 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c114a15ea6b1c9b012290758a6a9559b9c02a944706c9768958a3bd9c86822a7 [2024-10-13 17:43:49,966 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-13 17:43:49,995 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-13 17:43:49,998 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-13 17:43:49,999 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-13 17:43:49,999 INFO L274 PluginConnector]: CDTParser initialized [2024-10-13 17:43:50,000 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/kundu1.cil.c [2024-10-13 17:43:51,268 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-13 17:43:51,430 INFO L384 CDTParser]: Found 1 translation units. [2024-10-13 17:43:51,431 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/kundu1.cil.c [2024-10-13 17:43:51,447 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/aa9569afa/297fd02810e34250b3a23d0f4f50e255/FLAG9bb022fa6 [2024-10-13 17:43:51,833 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/aa9569afa/297fd02810e34250b3a23d0f4f50e255 [2024-10-13 17:43:51,836 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-13 17:43:51,840 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-13 17:43:51,843 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-13 17:43:51,843 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-13 17:43:51,851 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-13 17:43:51,856 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 05:43:51" (1/1) ... [2024-10-13 17:43:51,856 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@524a36ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:51, skipping insertion in model container [2024-10-13 17:43:51,856 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.10 05:43:51" (1/1) ... [2024-10-13 17:43:51,909 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-13 17:43:52,246 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-13 17:43:52,258 INFO L200 MainTranslator]: Completed pre-run [2024-10-13 17:43:52,301 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-13 17:43:52,331 INFO L204 MainTranslator]: Completed translation [2024-10-13 17:43:52,331 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52 WrapperNode [2024-10-13 17:43:52,331 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-13 17:43:52,332 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-13 17:43:52,332 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-13 17:43:52,332 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-13 17:43:52,341 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,349 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,367 INFO L138 Inliner]: procedures = 32, calls = 37, calls flagged for inlining = 32, calls inlined = 37, statements flattened = 375 [2024-10-13 17:43:52,367 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-13 17:43:52,368 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-13 17:43:52,368 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-13 17:43:52,368 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-13 17:43:52,375 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,376 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,378 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,392 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-13 17:43:52,395 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,395 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,403 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,409 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,413 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,414 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,423 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-13 17:43:52,425 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-13 17:43:52,426 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-13 17:43:52,426 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-13 17:43:52,427 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (1/1) ... [2024-10-13 17:43:52,431 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-13 17:43:52,441 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-13 17:43:52,460 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-13 17:43:52,467 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-13 17:43:52,506 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-13 17:43:52,507 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-13 17:43:52,507 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-13 17:43:52,507 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-13 17:43:52,574 INFO L238 CfgBuilder]: Building ICFG [2024-10-13 17:43:52,576 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-13 17:43:52,842 INFO L? ?]: Removed 68 outVars from TransFormulas that were not future-live. [2024-10-13 17:43:52,842 INFO L287 CfgBuilder]: Performing block encoding [2024-10-13 17:43:52,857 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-13 17:43:52,857 INFO L314 CfgBuilder]: Removed 4 assume(true) statements. [2024-10-13 17:43:52,858 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 05:43:52 BoogieIcfgContainer [2024-10-13 17:43:52,858 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-13 17:43:52,859 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-13 17:43:52,859 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-13 17:43:52,862 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-13 17:43:52,863 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-13 17:43:52,863 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.10 05:43:51" (1/3) ... [2024-10-13 17:43:52,864 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@32b9b760 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.10 05:43:52, skipping insertion in model container [2024-10-13 17:43:52,864 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-13 17:43:52,864 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.10 05:43:52" (2/3) ... [2024-10-13 17:43:52,864 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@32b9b760 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.10 05:43:52, skipping insertion in model container [2024-10-13 17:43:52,864 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-13 17:43:52,865 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 05:43:52" (3/3) ... [2024-10-13 17:43:52,866 INFO L332 chiAutomizerObserver]: Analyzing ICFG kundu1.cil.c [2024-10-13 17:43:52,911 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-13 17:43:52,911 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-13 17:43:52,911 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-13 17:43:52,911 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-13 17:43:52,911 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-13 17:43:52,911 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-13 17:43:52,912 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-13 17:43:52,912 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-13 17:43:52,915 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 128 states, 127 states have (on average 1.4803149606299213) internal successors, (188), 127 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:52,933 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 99 [2024-10-13 17:43:52,935 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:52,936 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:52,943 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:52,944 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:52,944 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-13 17:43:52,945 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 128 states, 127 states have (on average 1.4803149606299213) internal successors, (188), 127 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:52,951 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 99 [2024-10-13 17:43:52,951 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:52,951 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:52,952 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:52,952 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:52,959 INFO L745 eck$LassoCheckResult]: Stem: 30#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 43#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 122#init_model_returnLabel#1true assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 41#update_channels_returnLabel#1true assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 65#L236true assume !(1 == ~P_1_i~0);~P_1_st~0 := 2; 64#L236-2true assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 124#L241-1true assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 91#fire_delta_events_returnLabel#1true assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 6#L117true assume !(1 == ~P_1_pc~0); 21#L117-2true is_P_1_triggered_~__retres1~0#1 := 0; 59#L128true is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 51#is_P_1_triggered_returnLabel#1true activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 56#L383true assume !(0 != activate_threads_~tmp~1#1); 22#L383-2true assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 55#L199true assume 1 == ~C_1_pc~0; 102#L200true assume 1 == ~e~0;is_C_1_triggered_~__retres1~1#1 := 1; 68#L220true is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 119#is_C_1_triggered_returnLabel#1true activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 79#L391true assume !(0 != activate_threads_~tmp___1~1#1); 3#L391-2true havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 108#reset_delta_events_returnLabel#1true assume { :end_inline_reset_delta_events } true; 80#L445-2true [2024-10-13 17:43:52,960 INFO L747 eck$LassoCheckResult]: Loop: 80#L445-2true assume !false; 105#L446true start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 97#L304true assume !true; 82#eval_returnLabel#1true havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;assume { :begin_inline_update_channels } true; 112#update_channels_returnLabel#2true assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0#1 := 3;assume { :begin_inline_fire_delta_events } true; 42#fire_delta_events_returnLabel#2true assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 4#L117-3true assume 1 == ~P_1_pc~0; 60#L118-1true assume 1 == ~P_1_ev~0;is_P_1_triggered_~__retres1~0#1 := 1; 83#L128-1true is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 69#is_P_1_triggered_returnLabel#2true activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 34#L383-3true assume 0 != activate_threads_~tmp~1#1;~P_1_st~0 := 0; 15#L383-5true assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 118#L199-3true assume 1 == ~C_1_pc~0; 19#L200-1true assume 1 == ~e~0;is_C_1_triggered_~__retres1~1#1 := 1; 109#L220-1true is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 57#is_C_1_triggered_returnLabel#2true activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 129#L391-3true assume 0 != activate_threads_~tmp___1~1#1;~C_1_st~0 := 0; 36#L391-5true havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 93#reset_delta_events_returnLabel#2true assume { :end_inline_reset_delta_events } true;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 11#L254-1true assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 40#L267-1true exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 95#exists_runnable_thread_returnLabel#2true start_simulation_#t~ret11#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;start_simulation_~tmp~3#1 := start_simulation_#t~ret11#1;havoc start_simulation_#t~ret11#1; 106#L464true assume !(0 == start_simulation_~tmp~3#1); 23#L464-2true assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;havoc stop_simulation_~tmp~2#1;havoc stop_simulation_~__retres2~0#1;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 26#L254-2true assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 84#L267-2true exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 38#exists_runnable_thread_returnLabel#3true stop_simulation_#t~ret10#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2#1 := stop_simulation_#t~ret10#1;havoc stop_simulation_#t~ret10#1; 5#L419true assume 0 != stop_simulation_~tmp~2#1;stop_simulation_~__retres2~0#1 := 0; 111#L426true stop_simulation_#res#1 := stop_simulation_~__retres2~0#1; 125#stop_simulation_returnLabel#1true start_simulation_#t~ret12#1 := stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;assume { :end_inline_stop_simulation } true;start_simulation_~tmp___0~2#1 := start_simulation_#t~ret12#1;havoc start_simulation_#t~ret12#1; 27#L477true assume !(0 != start_simulation_~tmp___0~2#1); 80#L445-2true [2024-10-13 17:43:52,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:52,965 INFO L85 PathProgramCache]: Analyzing trace with hash -1103808071, now seen corresponding path program 1 times [2024-10-13 17:43:52,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:52,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077244145] [2024-10-13 17:43:52,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:52,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:53,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:53,131 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:53,131 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077244145] [2024-10-13 17:43:53,131 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077244145] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:53,132 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:53,132 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-13 17:43:53,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1642021154] [2024-10-13 17:43:53,134 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:53,136 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-13 17:43:53,137 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:53,137 INFO L85 PathProgramCache]: Analyzing trace with hash -144884610, now seen corresponding path program 1 times [2024-10-13 17:43:53,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:53,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569294387] [2024-10-13 17:43:53,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:53,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:53,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:53,162 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:53,162 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1569294387] [2024-10-13 17:43:53,162 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1569294387] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:53,163 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:53,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-13 17:43:53,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011926141] [2024-10-13 17:43:53,163 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:53,164 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:43:53,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:43:53,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-13 17:43:53,196 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-13 17:43:53,198 INFO L87 Difference]: Start difference. First operand has 128 states, 127 states have (on average 1.4803149606299213) internal successors, (188), 127 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:53,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:43:53,217 INFO L93 Difference]: Finished difference Result 122 states and 172 transitions. [2024-10-13 17:43:53,219 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 122 states and 172 transitions. [2024-10-13 17:43:53,221 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 90 [2024-10-13 17:43:53,229 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 122 states to 115 states and 165 transitions. [2024-10-13 17:43:53,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 115 [2024-10-13 17:43:53,230 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 115 [2024-10-13 17:43:53,231 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 165 transitions. [2024-10-13 17:43:53,231 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:43:53,231 INFO L218 hiAutomatonCegarLoop]: Abstraction has 115 states and 165 transitions. [2024-10-13 17:43:53,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 165 transitions. [2024-10-13 17:43:53,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2024-10-13 17:43:53,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 115 states have (on average 1.434782608695652) internal successors, (165), 114 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:53,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 165 transitions. [2024-10-13 17:43:53,270 INFO L240 hiAutomatonCegarLoop]: Abstraction has 115 states and 165 transitions. [2024-10-13 17:43:53,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-13 17:43:53,277 INFO L425 stractBuchiCegarLoop]: Abstraction has 115 states and 165 transitions. [2024-10-13 17:43:53,277 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-13 17:43:53,277 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 115 states and 165 transitions. [2024-10-13 17:43:53,281 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 90 [2024-10-13 17:43:53,281 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:53,282 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:53,282 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:53,282 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:53,283 INFO L745 eck$LassoCheckResult]: Stem: 313#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 314#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 329#init_model_returnLabel#1 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 326#update_channels_returnLabel#1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 327#L236 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 354#L236-2 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 355#L241-1 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 365#fire_delta_events_returnLabel#1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 266#L117 assume !(1 == ~P_1_pc~0); 267#L117-2 is_P_1_triggered_~__retres1~0#1 := 0; 299#L128 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 341#is_P_1_triggered_returnLabel#1 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 342#L383 assume !(0 != activate_threads_~tmp~1#1); 300#L383-2 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 301#L199 assume 1 == ~C_1_pc~0; 347#L200 assume 1 == ~e~0;is_C_1_triggered_~__retres1~1#1 := 1; 278#L220 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 357#is_C_1_triggered_returnLabel#1 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 361#L391 assume !(0 != activate_threads_~tmp___1~1#1); 259#L391-2 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 260#reset_delta_events_returnLabel#1 assume { :end_inline_reset_delta_events } true; 309#L445-2 [2024-10-13 17:43:53,283 INFO L747 eck$LassoCheckResult]: Loop: 309#L445-2 assume !false; 362#L446 start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 283#L304 assume !false; 366#L280 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 351#L254 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 303#L267 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 285#exists_runnable_thread_returnLabel#1 eval_#t~ret5#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___2~0#1 := eval_#t~ret5#1;havoc eval_#t~ret5#1; 286#L284 assume !(0 != eval_~tmp___2~0#1); 356#eval_returnLabel#1 havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;assume { :begin_inline_update_channels } true; 363#update_channels_returnLabel#2 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0#1 := 3;assume { :begin_inline_fire_delta_events } true; 328#fire_delta_events_returnLabel#2 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 261#L117-3 assume !(1 == ~P_1_pc~0); 262#L117-5 is_P_1_triggered_~__retres1~0#1 := 0; 352#L128-1 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 358#is_P_1_triggered_returnLabel#2 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 316#L383-3 assume 0 != activate_threads_~tmp~1#1;~P_1_st~0 := 0; 287#L383-5 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 288#L199-3 assume 1 == ~C_1_pc~0; 294#L200-1 assume 1 == ~e~0;is_C_1_triggered_~__retres1~1#1 := 1; 295#L220-1 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 349#is_C_1_triggered_returnLabel#2 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 350#L391-3 assume 0 != activate_threads_~tmp___1~1#1;~C_1_st~0 := 0; 318#L391-5 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 319#reset_delta_events_returnLabel#2 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 279#L254-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 280#L267-1 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 325#exists_runnable_thread_returnLabel#2 start_simulation_#t~ret11#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;start_simulation_~tmp~3#1 := start_simulation_#t~ret11#1;havoc start_simulation_#t~ret11#1; 367#L464 assume !(0 == start_simulation_~tmp~3#1); 273#L464-2 assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;havoc stop_simulation_~tmp~2#1;havoc stop_simulation_~__retres2~0#1;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 302#L254-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 306#L267-2 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 323#exists_runnable_thread_returnLabel#3 stop_simulation_#t~ret10#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2#1 := stop_simulation_#t~ret10#1;havoc stop_simulation_#t~ret10#1; 264#L419 assume 0 != stop_simulation_~tmp~2#1;stop_simulation_~__retres2~0#1 := 0; 265#L426 stop_simulation_#res#1 := stop_simulation_~__retres2~0#1; 373#stop_simulation_returnLabel#1 start_simulation_#t~ret12#1 := stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;assume { :end_inline_stop_simulation } true;start_simulation_~tmp___0~2#1 := start_simulation_#t~ret12#1;havoc start_simulation_#t~ret12#1; 308#L477 assume !(0 != start_simulation_~tmp___0~2#1); 309#L445-2 [2024-10-13 17:43:53,284 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:53,284 INFO L85 PathProgramCache]: Analyzing trace with hash 484539831, now seen corresponding path program 1 times [2024-10-13 17:43:53,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:53,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673606850] [2024-10-13 17:43:53,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:53,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:53,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:53,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:53,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673606850] [2024-10-13 17:43:53,476 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1673606850] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:53,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:53,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-13 17:43:53,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [546562566] [2024-10-13 17:43:53,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:53,477 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-13 17:43:53,478 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:53,478 INFO L85 PathProgramCache]: Analyzing trace with hash 771129349, now seen corresponding path program 1 times [2024-10-13 17:43:53,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:53,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213283883] [2024-10-13 17:43:53,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:53,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:53,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:53,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:53,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1213283883] [2024-10-13 17:43:53,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1213283883] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:53,546 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:53,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-13 17:43:53,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [563430011] [2024-10-13 17:43:53,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:53,546 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:43:53,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:43:53,547 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-13 17:43:53,549 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-13 17:43:53,549 INFO L87 Difference]: Start difference. First operand 115 states and 165 transitions. cyclomatic complexity: 51 Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:53,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:43:53,663 INFO L93 Difference]: Finished difference Result 281 states and 389 transitions. [2024-10-13 17:43:53,663 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 281 states and 389 transitions. [2024-10-13 17:43:53,668 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 246 [2024-10-13 17:43:53,673 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 281 states to 281 states and 389 transitions. [2024-10-13 17:43:53,674 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 281 [2024-10-13 17:43:53,674 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 281 [2024-10-13 17:43:53,674 INFO L73 IsDeterministic]: Start isDeterministic. Operand 281 states and 389 transitions. [2024-10-13 17:43:53,677 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:43:53,677 INFO L218 hiAutomatonCegarLoop]: Abstraction has 281 states and 389 transitions. [2024-10-13 17:43:53,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 281 states and 389 transitions. [2024-10-13 17:43:53,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 281 to 262. [2024-10-13 17:43:53,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 262 states, 262 states have (on average 1.3969465648854962) internal successors, (366), 261 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:53,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 366 transitions. [2024-10-13 17:43:53,687 INFO L240 hiAutomatonCegarLoop]: Abstraction has 262 states and 366 transitions. [2024-10-13 17:43:53,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-13 17:43:53,688 INFO L425 stractBuchiCegarLoop]: Abstraction has 262 states and 366 transitions. [2024-10-13 17:43:53,689 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-13 17:43:53,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 262 states and 366 transitions. [2024-10-13 17:43:53,690 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 239 [2024-10-13 17:43:53,690 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:53,690 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:53,691 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:53,691 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:53,691 INFO L745 eck$LassoCheckResult]: Stem: 722#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 723#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 737#init_model_returnLabel#1 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 734#update_channels_returnLabel#1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 735#L236 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 767#L236-2 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 768#L241-1 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 781#fire_delta_events_returnLabel#1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 674#L117 assume !(1 == ~P_1_pc~0); 675#L117-2 is_P_1_triggered_~__retres1~0#1 := 0; 706#L128 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 750#is_P_1_triggered_returnLabel#1 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 751#L383 assume !(0 != activate_threads_~tmp~1#1); 708#L383-2 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 709#L199 assume !(1 == ~C_1_pc~0); 756#L199-2 assume !(2 == ~C_1_pc~0); 687#L209-1 is_C_1_triggered_~__retres1~1#1 := 0; 688#L220 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 770#is_C_1_triggered_returnLabel#1 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 774#L391 assume !(0 != activate_threads_~tmp___1~1#1); 670#L391-2 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 671#reset_delta_events_returnLabel#1 assume { :end_inline_reset_delta_events } true; 716#L445-2 [2024-10-13 17:43:53,691 INFO L747 eck$LassoCheckResult]: Loop: 716#L445-2 assume !false; 775#L446 start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 690#L304 assume !false; 782#L280 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 759#L254 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 710#L267 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 692#exists_runnable_thread_returnLabel#1 eval_#t~ret5#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___2~0#1 := eval_#t~ret5#1;havoc eval_#t~ret5#1; 693#L284 assume !(0 != eval_~tmp___2~0#1); 769#eval_returnLabel#1 havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;assume { :begin_inline_update_channels } true; 779#update_channels_returnLabel#2 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0#1 := 3;assume { :begin_inline_fire_delta_events } true; 736#fire_delta_events_returnLabel#2 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 668#L117-3 assume !(1 == ~P_1_pc~0); 669#L117-5 is_P_1_triggered_~__retres1~0#1 := 0; 773#L128-1 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 771#is_P_1_triggered_returnLabel#2 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 725#L383-3 assume 0 != activate_threads_~tmp~1#1;~P_1_st~0 := 0; 694#L383-5 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 695#L199-3 assume !(1 == ~C_1_pc~0); 790#L199-5 assume !(2 == ~C_1_pc~0); 720#L209-3 is_C_1_triggered_~__retres1~1#1 := 0; 721#L220-1 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 757#is_C_1_triggered_returnLabel#2 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 758#L391-3 assume 0 != activate_threads_~tmp___1~1#1;~C_1_st~0 := 0; 726#L391-5 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 727#reset_delta_events_returnLabel#2 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 683#L254-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 684#L267-1 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 733#exists_runnable_thread_returnLabel#2 start_simulation_#t~ret11#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;start_simulation_~tmp~3#1 := start_simulation_#t~ret11#1;havoc start_simulation_#t~ret11#1; 783#L464 assume !(0 == start_simulation_~tmp~3#1); 680#L464-2 assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;havoc stop_simulation_~tmp~2#1;havoc stop_simulation_~__retres2~0#1;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 707#L254-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 713#L267-2 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 731#exists_runnable_thread_returnLabel#3 stop_simulation_#t~ret10#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2#1 := stop_simulation_#t~ret10#1;havoc stop_simulation_#t~ret10#1; 672#L419 assume 0 != stop_simulation_~tmp~2#1;stop_simulation_~__retres2~0#1 := 0; 673#L426 stop_simulation_#res#1 := stop_simulation_~__retres2~0#1; 791#stop_simulation_returnLabel#1 start_simulation_#t~ret12#1 := stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;assume { :end_inline_stop_simulation } true;start_simulation_~tmp___0~2#1 := start_simulation_#t~ret12#1;havoc start_simulation_#t~ret12#1; 715#L477 assume !(0 != start_simulation_~tmp___0~2#1); 716#L445-2 [2024-10-13 17:43:53,692 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:53,692 INFO L85 PathProgramCache]: Analyzing trace with hash 1818999495, now seen corresponding path program 1 times [2024-10-13 17:43:53,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:53,692 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109500569] [2024-10-13 17:43:53,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:53,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:53,701 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:53,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:53,727 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:53,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:53,729 INFO L85 PathProgramCache]: Analyzing trace with hash -1040524350, now seen corresponding path program 1 times [2024-10-13 17:43:53,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:53,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372338412] [2024-10-13 17:43:53,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:53,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:53,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:53,786 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:53,786 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1372338412] [2024-10-13 17:43:53,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1372338412] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:53,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:53,787 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-13 17:43:53,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013789052] [2024-10-13 17:43:53,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:53,787 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:43:53,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:43:53,788 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-13 17:43:53,788 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-13 17:43:53,788 INFO L87 Difference]: Start difference. First operand 262 states and 366 transitions. cyclomatic complexity: 106 Second operand has 5 states, 5 states have (on average 7.4) internal successors, (37), 5 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:53,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:43:53,861 INFO L93 Difference]: Finished difference Result 283 states and 387 transitions. [2024-10-13 17:43:53,861 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 283 states and 387 transitions. [2024-10-13 17:43:53,863 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 260 [2024-10-13 17:43:53,864 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 283 states to 283 states and 387 transitions. [2024-10-13 17:43:53,864 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 283 [2024-10-13 17:43:53,865 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 283 [2024-10-13 17:43:53,865 INFO L73 IsDeterministic]: Start isDeterministic. Operand 283 states and 387 transitions. [2024-10-13 17:43:53,866 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:43:53,866 INFO L218 hiAutomatonCegarLoop]: Abstraction has 283 states and 387 transitions. [2024-10-13 17:43:53,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states and 387 transitions. [2024-10-13 17:43:53,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 271. [2024-10-13 17:43:53,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 271 states, 271 states have (on average 1.3837638376383763) internal successors, (375), 270 states have internal predecessors, (375), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:53,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 375 transitions. [2024-10-13 17:43:53,875 INFO L240 hiAutomatonCegarLoop]: Abstraction has 271 states and 375 transitions. [2024-10-13 17:43:53,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-13 17:43:53,876 INFO L425 stractBuchiCegarLoop]: Abstraction has 271 states and 375 transitions. [2024-10-13 17:43:53,876 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-13 17:43:53,876 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 271 states and 375 transitions. [2024-10-13 17:43:53,877 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 248 [2024-10-13 17:43:53,877 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:53,877 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:53,878 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:53,878 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:53,878 INFO L745 eck$LassoCheckResult]: Stem: 1276#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 1277#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 1293#init_model_returnLabel#1 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 1290#update_channels_returnLabel#1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 1291#L236 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 1321#L236-2 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 1322#L241-1 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 1336#fire_delta_events_returnLabel#1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 1227#L117 assume !(1 == ~P_1_pc~0); 1228#L117-2 is_P_1_triggered_~__retres1~0#1 := 0; 1259#L128 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 1306#is_P_1_triggered_returnLabel#1 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 1307#L383 assume !(0 != activate_threads_~tmp~1#1); 1261#L383-2 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 1262#L199 assume !(1 == ~C_1_pc~0); 1312#L199-2 assume !(2 == ~C_1_pc~0); 1240#L209-1 is_C_1_triggered_~__retres1~1#1 := 0; 1241#L220 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 1324#is_C_1_triggered_returnLabel#1 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 1329#L391 assume !(0 != activate_threads_~tmp___1~1#1); 1223#L391-2 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1224#reset_delta_events_returnLabel#1 assume { :end_inline_reset_delta_events } true; 1270#L445-2 [2024-10-13 17:43:53,879 INFO L747 eck$LassoCheckResult]: Loop: 1270#L445-2 assume !false; 1330#L446 start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 1440#L304 assume !false; 1439#L280 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 1438#L254 assume !(0 == ~P_1_st~0); 1436#L258 assume !(0 == ~C_1_st~0);exists_runnable_thread_~__retres1~2#1 := 0; 1435#L267 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 1434#exists_runnable_thread_returnLabel#1 eval_#t~ret5#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___2~0#1 := eval_#t~ret5#1;havoc eval_#t~ret5#1; 1432#L284 assume !(0 != eval_~tmp___2~0#1); 1431#eval_returnLabel#1 havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;assume { :begin_inline_update_channels } true; 1430#update_channels_returnLabel#2 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0#1 := 3;assume { :begin_inline_fire_delta_events } true; 1292#fire_delta_events_returnLabel#2 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 1221#L117-3 assume !(1 == ~P_1_pc~0); 1222#L117-5 is_P_1_triggered_~__retres1~0#1 := 0; 1328#L128-1 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 1325#is_P_1_triggered_returnLabel#2 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 1281#L383-3 assume 0 != activate_threads_~tmp~1#1;~P_1_st~0 := 0; 1247#L383-5 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 1248#L199-3 assume !(1 == ~C_1_pc~0); 1349#L199-5 assume 2 == ~C_1_pc~0; 1273#L210-1 assume 1 == ~C_1_ev~0;is_C_1_triggered_~__retres1~1#1 := 1; 1275#L220-1 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 1491#is_C_1_triggered_returnLabel#2 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 1490#L391-3 assume 0 != activate_threads_~tmp___1~1#1;~C_1_st~0 := 0; 1489#L391-5 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1488#reset_delta_events_returnLabel#2 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 1236#L254-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 1237#L267-1 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 1289#exists_runnable_thread_returnLabel#2 start_simulation_#t~ret11#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;start_simulation_~tmp~3#1 := start_simulation_#t~ret11#1;havoc start_simulation_#t~ret11#1; 1339#L464 assume !(0 == start_simulation_~tmp~3#1); 1348#L464-2 assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;havoc stop_simulation_~tmp~2#1;havoc stop_simulation_~__retres2~0#1;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 1458#L254-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 1457#L267-2 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 1456#exists_runnable_thread_returnLabel#3 stop_simulation_#t~ret10#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2#1 := stop_simulation_#t~ret10#1;havoc stop_simulation_#t~ret10#1; 1455#L419 assume 0 != stop_simulation_~tmp~2#1;stop_simulation_~__retres2~0#1 := 0; 1452#L426 stop_simulation_#res#1 := stop_simulation_~__retres2~0#1; 1356#stop_simulation_returnLabel#1 start_simulation_#t~ret12#1 := stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;assume { :end_inline_stop_simulation } true;start_simulation_~tmp___0~2#1 := start_simulation_#t~ret12#1;havoc start_simulation_#t~ret12#1; 1269#L477 assume !(0 != start_simulation_~tmp___0~2#1); 1270#L445-2 [2024-10-13 17:43:53,879 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:53,879 INFO L85 PathProgramCache]: Analyzing trace with hash 1818999495, now seen corresponding path program 2 times [2024-10-13 17:43:53,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:53,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383550099] [2024-10-13 17:43:53,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:53,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:53,887 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:53,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:53,894 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:53,895 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:53,895 INFO L85 PathProgramCache]: Analyzing trace with hash 884081765, now seen corresponding path program 1 times [2024-10-13 17:43:53,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:53,895 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984949114] [2024-10-13 17:43:53,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:53,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:53,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:53,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:53,997 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:53,997 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984949114] [2024-10-13 17:43:53,997 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984949114] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:53,998 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:53,999 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-13 17:43:53,999 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [511981292] [2024-10-13 17:43:53,999 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:53,999 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:43:53,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:43:54,000 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-13 17:43:54,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-13 17:43:54,000 INFO L87 Difference]: Start difference. First operand 271 states and 375 transitions. cyclomatic complexity: 106 Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:43:54,041 INFO L93 Difference]: Finished difference Result 283 states and 384 transitions. [2024-10-13 17:43:54,042 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 283 states and 384 transitions. [2024-10-13 17:43:54,043 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 260 [2024-10-13 17:43:54,046 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 283 states to 283 states and 384 transitions. [2024-10-13 17:43:54,046 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 283 [2024-10-13 17:43:54,046 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 283 [2024-10-13 17:43:54,046 INFO L73 IsDeterministic]: Start isDeterministic. Operand 283 states and 384 transitions. [2024-10-13 17:43:54,047 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:43:54,047 INFO L218 hiAutomatonCegarLoop]: Abstraction has 283 states and 384 transitions. [2024-10-13 17:43:54,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states and 384 transitions. [2024-10-13 17:43:54,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 283. [2024-10-13 17:43:54,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 283 states, 283 states have (on average 1.3568904593639577) internal successors, (384), 282 states have internal predecessors, (384), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 283 states to 283 states and 384 transitions. [2024-10-13 17:43:54,062 INFO L240 hiAutomatonCegarLoop]: Abstraction has 283 states and 384 transitions. [2024-10-13 17:43:54,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-13 17:43:54,063 INFO L425 stractBuchiCegarLoop]: Abstraction has 283 states and 384 transitions. [2024-10-13 17:43:54,066 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-13 17:43:54,066 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 283 states and 384 transitions. [2024-10-13 17:43:54,067 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 260 [2024-10-13 17:43:54,067 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:54,067 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:54,068 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,068 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,068 INFO L745 eck$LassoCheckResult]: Stem: 1837#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 1838#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 1855#init_model_returnLabel#1 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 1852#update_channels_returnLabel#1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 1853#L236 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 1883#L236-2 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 1884#L241-1 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 1898#fire_delta_events_returnLabel#1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 1790#L117 assume !(1 == ~P_1_pc~0); 1791#L117-2 is_P_1_triggered_~__retres1~0#1 := 0; 1822#L128 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 1868#is_P_1_triggered_returnLabel#1 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 1869#L383 assume !(0 != activate_threads_~tmp~1#1); 1824#L383-2 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 1825#L199 assume !(1 == ~C_1_pc~0); 1874#L199-2 assume !(2 == ~C_1_pc~0); 1803#L209-1 is_C_1_triggered_~__retres1~1#1 := 0; 1804#L220 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 1885#is_C_1_triggered_returnLabel#1 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 1890#L391 assume !(0 != activate_threads_~tmp___1~1#1); 1786#L391-2 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1787#reset_delta_events_returnLabel#1 assume { :end_inline_reset_delta_events } true; 1910#L445-2 [2024-10-13 17:43:54,068 INFO L747 eck$LassoCheckResult]: Loop: 1910#L445-2 assume !false; 2028#L446 start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 2025#L304 assume !false; 2023#L280 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 2021#L254 assume !(0 == ~P_1_st~0); 2018#L258 assume !(0 == ~C_1_st~0);exists_runnable_thread_~__retres1~2#1 := 0; 2016#L267 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 2012#exists_runnable_thread_returnLabel#1 eval_#t~ret5#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___2~0#1 := eval_#t~ret5#1;havoc eval_#t~ret5#1; 2010#L284 assume !(0 != eval_~tmp___2~0#1); 1893#eval_returnLabel#1 havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;assume { :begin_inline_update_channels } true; 1894#update_channels_returnLabel#2 assume { :end_inline_update_channels } true;start_simulation_~kernel_st~0#1 := 3;assume { :begin_inline_fire_delta_events } true; 1912#fire_delta_events_returnLabel#2 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 2026#L117-3 assume !(1 == ~P_1_pc~0); 2024#L117-5 is_P_1_triggered_~__retres1~0#1 := 0; 2022#L128-1 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 2020#is_P_1_triggered_returnLabel#2 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 2017#L383-3 assume !(0 != activate_threads_~tmp~1#1); 2013#L383-5 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 2011#L199-3 assume !(1 == ~C_1_pc~0); 2003#L199-5 assume !(2 == ~C_1_pc~0); 2000#L209-3 is_C_1_triggered_~__retres1~1#1 := 0; 1998#L220-1 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 1875#is_C_1_triggered_returnLabel#2 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 1876#L391-3 assume 0 != activate_threads_~tmp___1~1#1;~C_1_st~0 := 0; 1844#L391-5 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 1845#reset_delta_events_returnLabel#2 assume { :end_inline_reset_delta_events } true;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 1799#L254-1 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 1800#L267-1 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 1851#exists_runnable_thread_returnLabel#2 start_simulation_#t~ret11#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;start_simulation_~tmp~3#1 := start_simulation_#t~ret11#1;havoc start_simulation_#t~ret11#1; 1900#L464 assume !(0 == start_simulation_~tmp~3#1); 1908#L464-2 assume { :begin_inline_stop_simulation } true;havoc stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;havoc stop_simulation_~tmp~2#1;havoc stop_simulation_~__retres2~0#1;assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 2038#L254-2 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 2037#L267-2 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 2035#exists_runnable_thread_returnLabel#3 stop_simulation_#t~ret10#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;stop_simulation_~tmp~2#1 := stop_simulation_#t~ret10#1;havoc stop_simulation_#t~ret10#1; 2034#L419 assume 0 != stop_simulation_~tmp~2#1;stop_simulation_~__retres2~0#1 := 0; 2033#L426 stop_simulation_#res#1 := stop_simulation_~__retres2~0#1; 2032#stop_simulation_returnLabel#1 start_simulation_#t~ret12#1 := stop_simulation_#res#1;havoc stop_simulation_#t~ret10#1, stop_simulation_~tmp~2#1, stop_simulation_~__retres2~0#1;assume { :end_inline_stop_simulation } true;start_simulation_~tmp___0~2#1 := start_simulation_#t~ret12#1;havoc start_simulation_#t~ret12#1; 2031#L477 assume !(0 != start_simulation_~tmp___0~2#1); 1910#L445-2 [2024-10-13 17:43:54,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,070 INFO L85 PathProgramCache]: Analyzing trace with hash 1818999495, now seen corresponding path program 3 times [2024-10-13 17:43:54,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1318044120] [2024-10-13 17:43:54,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,081 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:54,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,099 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:54,100 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,100 INFO L85 PathProgramCache]: Analyzing trace with hash 2094101156, now seen corresponding path program 1 times [2024-10-13 17:43:54,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395990301] [2024-10-13 17:43:54,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:54,135 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:54,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:54,136 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395990301] [2024-10-13 17:43:54,137 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [395990301] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:54,137 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:54,137 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-13 17:43:54,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1710234506] [2024-10-13 17:43:54,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:54,137 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-13 17:43:54,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:43:54,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-13 17:43:54,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-13 17:43:54,138 INFO L87 Difference]: Start difference. First operand 283 states and 384 transitions. cyclomatic complexity: 103 Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:43:54,161 INFO L93 Difference]: Finished difference Result 427 states and 570 transitions. [2024-10-13 17:43:54,161 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 427 states and 570 transitions. [2024-10-13 17:43:54,163 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 397 [2024-10-13 17:43:54,192 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 427 states to 427 states and 570 transitions. [2024-10-13 17:43:54,192 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 427 [2024-10-13 17:43:54,192 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 427 [2024-10-13 17:43:54,192 INFO L73 IsDeterministic]: Start isDeterministic. Operand 427 states and 570 transitions. [2024-10-13 17:43:54,193 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:43:54,193 INFO L218 hiAutomatonCegarLoop]: Abstraction has 427 states and 570 transitions. [2024-10-13 17:43:54,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states and 570 transitions. [2024-10-13 17:43:54,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 427. [2024-10-13 17:43:54,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 427 states have (on average 1.334894613583138) internal successors, (570), 426 states have internal predecessors, (570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 570 transitions. [2024-10-13 17:43:54,227 INFO L240 hiAutomatonCegarLoop]: Abstraction has 427 states and 570 transitions. [2024-10-13 17:43:54,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-13 17:43:54,232 INFO L425 stractBuchiCegarLoop]: Abstraction has 427 states and 570 transitions. [2024-10-13 17:43:54,232 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-13 17:43:54,232 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 427 states and 570 transitions. [2024-10-13 17:43:54,234 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 397 [2024-10-13 17:43:54,234 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:54,234 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:54,234 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,234 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,235 INFO L745 eck$LassoCheckResult]: Stem: 2552#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 2553#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 2569#init_model_returnLabel#1 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 2565#update_channels_returnLabel#1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 2566#L236 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 2599#L236-2 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 2600#L241-1 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 2615#fire_delta_events_returnLabel#1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 2505#L117 assume !(1 == ~P_1_pc~0); 2506#L117-2 is_P_1_triggered_~__retres1~0#1 := 0; 2537#L128 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 2582#is_P_1_triggered_returnLabel#1 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 2583#L383 assume !(0 != activate_threads_~tmp~1#1); 2538#L383-2 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 2539#L199 assume !(1 == ~C_1_pc~0); 2588#L199-2 assume !(2 == ~C_1_pc~0); 2515#L209-1 is_C_1_triggered_~__retres1~1#1 := 0; 2516#L220 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 2601#is_C_1_triggered_returnLabel#1 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 2607#L391 assume !(0 != activate_threads_~tmp___1~1#1); 2499#L391-2 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 2500#reset_delta_events_returnLabel#1 assume { :end_inline_reset_delta_events } true; 2627#L445-2 assume !false; 2867#L446 start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 2863#L304 [2024-10-13 17:43:54,235 INFO L747 eck$LassoCheckResult]: Loop: 2863#L304 assume !false; 2788#L280 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 2789#L254 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 2803#L267 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 2871#exists_runnable_thread_returnLabel#1 eval_#t~ret5#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___2~0#1 := eval_#t~ret5#1;havoc eval_#t~ret5#1; 2870#L284 assume 0 != eval_~tmp___2~0#1; 2869#L284-1 assume 0 == ~P_1_st~0;havoc eval_#t~nondet6#1;eval_~tmp~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1; 2632#L293 assume !(0 != eval_~tmp~0#1); 2633#L289 assume !(0 == ~C_1_st~0); 2863#L304 [2024-10-13 17:43:54,236 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,237 INFO L85 PathProgramCache]: Analyzing trace with hash 6828137, now seen corresponding path program 1 times [2024-10-13 17:43:54,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030006759] [2024-10-13 17:43:54,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,247 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:54,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,258 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:54,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,259 INFO L85 PathProgramCache]: Analyzing trace with hash 602709065, now seen corresponding path program 1 times [2024-10-13 17:43:54,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,259 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1489121760] [2024-10-13 17:43:54,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:54,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,269 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:54,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,269 INFO L85 PathProgramCache]: Analyzing trace with hash 462446817, now seen corresponding path program 1 times [2024-10-13 17:43:54,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844660010] [2024-10-13 17:43:54,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:54,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:54,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:54,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844660010] [2024-10-13 17:43:54,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1844660010] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:54,309 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:54,309 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-13 17:43:54,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122003556] [2024-10-13 17:43:54,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:54,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:43:54,384 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-13 17:43:54,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-13 17:43:54,384 INFO L87 Difference]: Start difference. First operand 427 states and 570 transitions. cyclomatic complexity: 146 Second operand has 3 states, 2 states have (on average 16.5) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:43:54,437 INFO L93 Difference]: Finished difference Result 706 states and 924 transitions. [2024-10-13 17:43:54,437 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 706 states and 924 transitions. [2024-10-13 17:43:54,441 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 652 [2024-10-13 17:43:54,444 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 706 states to 706 states and 924 transitions. [2024-10-13 17:43:54,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 706 [2024-10-13 17:43:54,445 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 706 [2024-10-13 17:43:54,446 INFO L73 IsDeterministic]: Start isDeterministic. Operand 706 states and 924 transitions. [2024-10-13 17:43:54,447 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:43:54,447 INFO L218 hiAutomatonCegarLoop]: Abstraction has 706 states and 924 transitions. [2024-10-13 17:43:54,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states and 924 transitions. [2024-10-13 17:43:54,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 706. [2024-10-13 17:43:54,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 706 states, 706 states have (on average 1.3087818696883853) internal successors, (924), 705 states have internal predecessors, (924), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 706 states to 706 states and 924 transitions. [2024-10-13 17:43:54,456 INFO L240 hiAutomatonCegarLoop]: Abstraction has 706 states and 924 transitions. [2024-10-13 17:43:54,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-13 17:43:54,458 INFO L425 stractBuchiCegarLoop]: Abstraction has 706 states and 924 transitions. [2024-10-13 17:43:54,458 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-13 17:43:54,458 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 706 states and 924 transitions. [2024-10-13 17:43:54,467 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 652 [2024-10-13 17:43:54,467 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:54,467 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:54,472 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,473 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,473 INFO L745 eck$LassoCheckResult]: Stem: 3693#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 3694#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 3712#init_model_returnLabel#1 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 3708#update_channels_returnLabel#1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 3709#L236 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 3740#L236-2 assume !(1 == ~C_1_i~0);~C_1_st~0 := 2; 3741#L241-1 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 3759#fire_delta_events_returnLabel#1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 3646#L117 assume !(1 == ~P_1_pc~0); 3647#L117-2 is_P_1_triggered_~__retres1~0#1 := 0; 3898#L128 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 3896#is_P_1_triggered_returnLabel#1 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 3731#L383 assume !(0 != activate_threads_~tmp~1#1); 3681#L383-2 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 3682#L199 assume !(1 == ~C_1_pc~0); 3730#L199-2 assume !(2 == ~C_1_pc~0); 3882#L209-1 is_C_1_triggered_~__retres1~1#1 := 0; 3879#L220 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 3878#is_C_1_triggered_returnLabel#1 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 3877#L391 assume 0 != activate_threads_~tmp___1~1#1;~C_1_st~0 := 0; 3642#L391-2 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 3643#reset_delta_events_returnLabel#1 assume { :end_inline_reset_delta_events } true; 3771#L445-2 assume !false; 3921#L446 start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 3880#L304 [2024-10-13 17:43:54,473 INFO L747 eck$LassoCheckResult]: Loop: 3880#L304 assume !false; 3918#L280 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 3915#L254 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 3893#L267 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 3892#exists_runnable_thread_returnLabel#1 eval_#t~ret5#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___2~0#1 := eval_#t~ret5#1;havoc eval_#t~ret5#1; 3890#L284 assume 0 != eval_~tmp___2~0#1; 3887#L284-1 assume 0 == ~P_1_st~0;havoc eval_#t~nondet6#1;eval_~tmp~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1; 3885#L293 assume !(0 != eval_~tmp~0#1); 3884#L289 assume 0 == ~C_1_st~0;havoc eval_#t~nondet7#1;eval_~tmp___1~0#1 := eval_#t~nondet7#1;havoc eval_#t~nondet7#1; 3837#L308 assume !(0 != eval_~tmp___1~0#1); 3880#L304 [2024-10-13 17:43:54,474 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,474 INFO L85 PathProgramCache]: Analyzing trace with hash -1683962647, now seen corresponding path program 1 times [2024-10-13 17:43:54,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682589814] [2024-10-13 17:43:54,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-13 17:43:54,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-13 17:43:54,520 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-13 17:43:54,520 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682589814] [2024-10-13 17:43:54,520 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [682589814] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-13 17:43:54,520 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-13 17:43:54,521 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-13 17:43:54,522 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064513878] [2024-10-13 17:43:54,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-13 17:43:54,523 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-13 17:43:54,523 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,523 INFO L85 PathProgramCache]: Analyzing trace with hash 1504109555, now seen corresponding path program 1 times [2024-10-13 17:43:54,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144345403] [2024-10-13 17:43:54,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,534 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:54,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,537 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:54,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-13 17:43:54,595 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-13 17:43:54,596 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-13 17:43:54,596 INFO L87 Difference]: Start difference. First operand 706 states and 924 transitions. cyclomatic complexity: 221 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-13 17:43:54,610 INFO L93 Difference]: Finished difference Result 687 states and 901 transitions. [2024-10-13 17:43:54,610 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 687 states and 901 transitions. [2024-10-13 17:43:54,617 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 652 [2024-10-13 17:43:54,623 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 687 states to 687 states and 901 transitions. [2024-10-13 17:43:54,624 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 687 [2024-10-13 17:43:54,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 687 [2024-10-13 17:43:54,628 INFO L73 IsDeterministic]: Start isDeterministic. Operand 687 states and 901 transitions. [2024-10-13 17:43:54,630 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-13 17:43:54,630 INFO L218 hiAutomatonCegarLoop]: Abstraction has 687 states and 901 transitions. [2024-10-13 17:43:54,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 687 states and 901 transitions. [2024-10-13 17:43:54,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 687 to 687. [2024-10-13 17:43:54,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 687 states, 687 states have (on average 1.3114992721979621) internal successors, (901), 686 states have internal predecessors, (901), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-13 17:43:54,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 687 states to 687 states and 901 transitions. [2024-10-13 17:43:54,650 INFO L240 hiAutomatonCegarLoop]: Abstraction has 687 states and 901 transitions. [2024-10-13 17:43:54,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-13 17:43:54,655 INFO L425 stractBuchiCegarLoop]: Abstraction has 687 states and 901 transitions. [2024-10-13 17:43:54,656 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-13 17:43:54,656 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 687 states and 901 transitions. [2024-10-13 17:43:54,660 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 652 [2024-10-13 17:43:54,663 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-13 17:43:54,663 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-13 17:43:54,664 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,664 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-13 17:43:54,664 INFO L745 eck$LassoCheckResult]: Stem: 5095#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2);call #Ultimate.allocInit(12, 3);~max_loop~0 := 0;~num~0 := 0;~i~0 := 0;~e~0 := 0;~timer~0 := 0;~data_0~0 := 0;~data_1~0 := 0;~P_1_pc~0 := 0;~P_1_st~0 := 0;~P_1_i~0 := 0;~P_1_ev~0 := 0;~C_1_pc~0 := 0;~C_1_st~0 := 0;~C_1_i~0 := 0;~C_1_ev~0 := 0;~C_1_pr~0 := 0; 5096#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~1#1;havoc main_~count~0#1;havoc main_~__retres2~1#1;~num~0 := 0;~i~0 := 0;~max_loop~0 := 2;~timer~0 := 0;~P_1_pc~0 := 0;~C_1_pc~0 := 0;main_~count~0#1 := 0;assume { :begin_inline_init_model } true;~P_1_i~0 := 1;~C_1_i~0 := 1; 5113#init_model_returnLabel#1 assume { :end_inline_init_model } true;assume { :begin_inline_start_simulation } true;havoc start_simulation_#t~ret11#1, start_simulation_#t~ret12#1, start_simulation_~kernel_st~0#1, start_simulation_~tmp~3#1, start_simulation_~tmp___0~2#1;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~tmp~3#1;havoc start_simulation_~tmp___0~2#1;start_simulation_~kernel_st~0#1 := 0;assume { :begin_inline_update_channels } true; 5109#update_channels_returnLabel#1 assume { :end_inline_update_channels } true;assume { :begin_inline_init_threads } true; 5110#L236 assume 1 == ~P_1_i~0;~P_1_st~0 := 0; 5141#L236-2 assume 1 == ~C_1_i~0;~C_1_st~0 := 0; 5142#L241-1 assume { :end_inline_init_threads } true;assume { :begin_inline_fire_delta_events } true; 5159#fire_delta_events_returnLabel#1 assume { :end_inline_fire_delta_events } true;assume { :begin_inline_activate_threads } true;havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;havoc activate_threads_~tmp~1#1;havoc activate_threads_~tmp___0~1#1;havoc activate_threads_~tmp___1~1#1;assume { :begin_inline_is_P_1_triggered } true;havoc is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;havoc is_P_1_triggered_~__retres1~0#1; 5045#L117 assume !(1 == ~P_1_pc~0); 5046#L117-2 is_P_1_triggered_~__retres1~0#1 := 0; 5079#L128 is_P_1_triggered_#res#1 := is_P_1_triggered_~__retres1~0#1; 5126#is_P_1_triggered_returnLabel#1 activate_threads_#t~ret8#1 := is_P_1_triggered_#res#1;havoc is_P_1_triggered_~__retres1~0#1;assume { :end_inline_is_P_1_triggered } true;activate_threads_~tmp~1#1 := activate_threads_#t~ret8#1;havoc activate_threads_#t~ret8#1; 5127#L383 assume !(0 != activate_threads_~tmp~1#1); 5080#L383-2 assume { :begin_inline_is_C_1_triggered } true;havoc is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;havoc is_C_1_triggered_~__retres1~1#1; 5081#L199 assume !(1 == ~C_1_pc~0); 5132#L199-2 assume !(2 == ~C_1_pc~0); 5055#L209-1 is_C_1_triggered_~__retres1~1#1 := 0; 5056#L220 is_C_1_triggered_#res#1 := is_C_1_triggered_~__retres1~1#1; 5144#is_C_1_triggered_returnLabel#1 activate_threads_#t~ret9#1 := is_C_1_triggered_#res#1;havoc is_C_1_triggered_~__retres1~1#1;assume { :end_inline_is_C_1_triggered } true;activate_threads_~tmp___1~1#1 := activate_threads_#t~ret9#1;havoc activate_threads_#t~ret9#1; 5152#L391 assume !(0 != activate_threads_~tmp___1~1#1); 5039#L391-2 havoc activate_threads_#t~ret8#1, activate_threads_#t~ret9#1, activate_threads_~tmp~1#1, activate_threads_~tmp___0~1#1, activate_threads_~tmp___1~1#1;assume { :end_inline_activate_threads } true;assume { :begin_inline_reset_delta_events } true; 5040#reset_delta_events_returnLabel#1 assume { :end_inline_reset_delta_events } true; 5174#L445-2 assume !false; 5359#L446 start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~ret5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1; 5340#L304 [2024-10-13 17:43:54,664 INFO L747 eck$LassoCheckResult]: Loop: 5340#L304 assume !false; 5358#L280 assume { :begin_inline_exists_runnable_thread } true;havoc exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;havoc exists_runnable_thread_~__retres1~2#1; 5356#L254 assume 0 == ~P_1_st~0;exists_runnable_thread_~__retres1~2#1 := 1; 5355#L267 exists_runnable_thread_#res#1 := exists_runnable_thread_~__retres1~2#1; 5352#exists_runnable_thread_returnLabel#1 eval_#t~ret5#1 := exists_runnable_thread_#res#1;havoc exists_runnable_thread_~__retres1~2#1;assume { :end_inline_exists_runnable_thread } true;eval_~tmp___2~0#1 := eval_#t~ret5#1;havoc eval_#t~ret5#1; 5350#L284 assume 0 != eval_~tmp___2~0#1; 5348#L284-1 assume 0 == ~P_1_st~0;havoc eval_#t~nondet6#1;eval_~tmp~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1; 5345#L293 assume !(0 != eval_~tmp~0#1); 5342#L289 assume 0 == ~C_1_st~0;havoc eval_#t~nondet7#1;eval_~tmp___1~0#1 := eval_#t~nondet7#1;havoc eval_#t~nondet7#1; 5244#L308 assume !(0 != eval_~tmp___1~0#1); 5340#L304 [2024-10-13 17:43:54,666 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,666 INFO L85 PathProgramCache]: Analyzing trace with hash 6828137, now seen corresponding path program 2 times [2024-10-13 17:43:54,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,666 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757529937] [2024-10-13 17:43:54,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,685 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:54,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,698 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:54,704 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1504109555, now seen corresponding path program 2 times [2024-10-13 17:43:54,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461042854] [2024-10-13 17:43:54,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,714 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:54,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,722 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:54,722 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-13 17:43:54,722 INFO L85 PathProgramCache]: Analyzing trace with hash 1450947163, now seen corresponding path program 1 times [2024-10-13 17:43:54,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-13 17:43:54,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148141650] [2024-10-13 17:43:54,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-13 17:43:54,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-13 17:43:54,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,741 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:54,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:54,762 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-13 17:43:55,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:55,561 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-13 17:43:55,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-13 17:43:55,698 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 13.10 05:43:55 BoogieIcfgContainer [2024-10-13 17:43:55,699 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2024-10-13 17:43:55,699 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-10-13 17:43:55,699 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-10-13 17:43:55,700 INFO L274 PluginConnector]: Witness Printer initialized [2024-10-13 17:43:55,700 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.10 05:43:52" (3/4) ... [2024-10-13 17:43:55,701 INFO L136 WitnessPrinter]: Generating witness for non-termination counterexample [2024-10-13 17:43:55,752 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2024-10-13 17:43:55,752 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-10-13 17:43:55,753 INFO L158 Benchmark]: Toolchain (without parser) took 3913.23ms. Allocated memory was 123.7MB in the beginning and 230.7MB in the end (delta: 107.0MB). Free memory was 69.7MB in the beginning and 172.2MB in the end (delta: -102.4MB). Peak memory consumption was 4.8MB. Max. memory is 16.1GB. [2024-10-13 17:43:55,753 INFO L158 Benchmark]: CDTParser took 0.57ms. Allocated memory is still 123.7MB. Free memory is still 93.0MB. There was no memory consumed. Max. memory is 16.1GB. [2024-10-13 17:43:55,754 INFO L158 Benchmark]: CACSL2BoogieTranslator took 488.64ms. Allocated memory was 123.7MB in the beginning and 167.8MB in the end (delta: 44.0MB). Free memory was 69.4MB in the beginning and 136.6MB in the end (delta: -67.2MB). Peak memory consumption was 18.6MB. Max. memory is 16.1GB. [2024-10-13 17:43:55,754 INFO L158 Benchmark]: Boogie Procedure Inliner took 35.17ms. Allocated memory is still 167.8MB. Free memory was 136.6MB in the beginning and 133.7MB in the end (delta: 2.9MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2024-10-13 17:43:55,754 INFO L158 Benchmark]: Boogie Preprocessor took 56.22ms. Allocated memory is still 167.8MB. Free memory was 133.7MB in the beginning and 131.1MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2024-10-13 17:43:55,754 INFO L158 Benchmark]: RCFGBuilder took 432.49ms. Allocated memory is still 167.8MB. Free memory was 131.1MB in the beginning and 108.5MB in the end (delta: 22.6MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. [2024-10-13 17:43:55,755 INFO L158 Benchmark]: BuchiAutomizer took 2840.27ms. Allocated memory was 167.8MB in the beginning and 230.7MB in the end (delta: 62.9MB). Free memory was 108.5MB in the beginning and 176.4MB in the end (delta: -67.8MB). There was no memory consumed. Max. memory is 16.1GB. [2024-10-13 17:43:55,755 INFO L158 Benchmark]: Witness Printer took 52.54ms. Allocated memory is still 230.7MB. Free memory was 176.4MB in the beginning and 172.2MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-10-13 17:43:55,756 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.57ms. Allocated memory is still 123.7MB. Free memory is still 93.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 488.64ms. Allocated memory was 123.7MB in the beginning and 167.8MB in the end (delta: 44.0MB). Free memory was 69.4MB in the beginning and 136.6MB in the end (delta: -67.2MB). Peak memory consumption was 18.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 35.17ms. Allocated memory is still 167.8MB. Free memory was 136.6MB in the beginning and 133.7MB in the end (delta: 2.9MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 56.22ms. Allocated memory is still 167.8MB. Free memory was 133.7MB in the beginning and 131.1MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 432.49ms. Allocated memory is still 167.8MB. Free memory was 131.1MB in the beginning and 108.5MB in the end (delta: 22.6MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. * BuchiAutomizer took 2840.27ms. Allocated memory was 167.8MB in the beginning and 230.7MB in the end (delta: 62.9MB). Free memory was 108.5MB in the beginning and 176.4MB in the end (delta: -67.8MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 52.54ms. Allocated memory is still 230.7MB. Free memory was 176.4MB in the beginning and 172.2MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 7 terminating modules (7 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.7 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 687 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.7s and 8 iterations. TraceHistogramMax:1. Analysis of lassos took 1.9s. Construction of modules took 0.2s. Büchi inclusion checks took 0.4s. Highest rank in rank-based complementation 0. Minimization of det autom 7. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 7 MinimizatonAttempts, 31 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 882 SdHoareTripleChecker+Valid, 0.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 882 mSDsluCounter, 2525 SdHoareTripleChecker+Invalid, 0.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1408 mSDsCounter, 58 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 182 IncrementalHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 58 mSolverCounterUnsat, 1117 mSDtfsCounter, 182 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI3 SFLT0 conc1 concLT0 SILN1 SILU0 SILI2 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 279]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L25] int max_loop ; [L26] int num ; [L27] int i ; [L28] int e ; [L29] int timer ; [L30] char data_0 ; [L31] char data_1 ; [L74] int P_1_pc; [L75] int P_1_st ; [L76] int P_1_i ; [L77] int P_1_ev ; [L132] int C_1_pc ; [L133] int C_1_st ; [L134] int C_1_i ; [L135] int C_1_ev ; [L136] int C_1_pr ; VAL [C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, timer=0] [L500] int count ; [L501] int __retres2 ; [L505] num = 0 [L506] i = 0 [L507] max_loop = 2 [L509] timer = 0 [L510] P_1_pc = 0 [L511] C_1_pc = 0 [L513] count = 0 [L514] CALL init_model() [L493] P_1_i = 1 [L494] C_1_i = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L514] RET init_model() [L515] CALL start_simulation() [L431] int kernel_st ; [L432] int tmp ; [L433] int tmp___0 ; [L437] kernel_st = 0 [L438] FCALL update_channels() [L439] CALL init_threads() [L236] COND TRUE (int )P_1_i == 1 [L237] P_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L241] COND TRUE (int )C_1_i == 1 [L242] C_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L439] RET init_threads() [L440] FCALL fire_delta_events() [L441] CALL activate_threads() [L375] int tmp ; [L376] int tmp___0 ; [L377] int tmp___1 ; [L381] CALL, EXPR is_P_1_triggered() [L114] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L117] COND FALSE !((int )P_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L127] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, __retres1=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L129] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, \result=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L381] RET, EXPR is_P_1_triggered() [L381] tmp = is_P_1_triggered() [L383] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L389] CALL, EXPR is_C_1_triggered() [L196] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L199] COND FALSE !((int )C_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L209] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L219] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, __retres1=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L221] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, \result=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L389] RET, EXPR is_C_1_triggered() [L389] tmp___1 = is_C_1_triggered() [L391] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L441] RET activate_threads() [L442] FCALL reset_delta_events() [L445] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L448] kernel_st = 1 [L449] CALL eval() [L272] int tmp ; [L273] int tmp___0 ; [L274] int tmp___1 ; [L275] int tmp___2 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] Loop: [L279] COND TRUE 1 [L282] CALL, EXPR exists_runnable_thread() [L251] int __retres1 ; [L254] COND TRUE (int )P_1_st == 0 [L255] __retres1 = 1 [L268] return (__retres1); [L282] RET, EXPR exists_runnable_thread() [L282] tmp___2 = exists_runnable_thread() [L284] COND TRUE \read(tmp___2) [L289] COND TRUE (int )P_1_st == 0 [L291] tmp = __VERIFIER_nondet_int() [L293] COND FALSE !(\read(tmp)) [L304] COND TRUE (int )C_1_st == 0 [L306] tmp___1 = __VERIFIER_nondet_int() [L308] COND FALSE !(\read(tmp___1)) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 279]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L25] int max_loop ; [L26] int num ; [L27] int i ; [L28] int e ; [L29] int timer ; [L30] char data_0 ; [L31] char data_1 ; [L74] int P_1_pc; [L75] int P_1_st ; [L76] int P_1_i ; [L77] int P_1_ev ; [L132] int C_1_pc ; [L133] int C_1_st ; [L134] int C_1_i ; [L135] int C_1_ev ; [L136] int C_1_pr ; VAL [C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, timer=0] [L500] int count ; [L501] int __retres2 ; [L505] num = 0 [L506] i = 0 [L507] max_loop = 2 [L509] timer = 0 [L510] P_1_pc = 0 [L511] C_1_pc = 0 [L513] count = 0 [L514] CALL init_model() [L493] P_1_i = 1 [L494] C_1_i = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L514] RET init_model() [L515] CALL start_simulation() [L431] int kernel_st ; [L432] int tmp ; [L433] int tmp___0 ; [L437] kernel_st = 0 [L438] FCALL update_channels() [L439] CALL init_threads() [L236] COND TRUE (int )P_1_i == 1 [L237] P_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L241] COND TRUE (int )C_1_i == 1 [L242] C_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L439] RET init_threads() [L440] FCALL fire_delta_events() [L441] CALL activate_threads() [L375] int tmp ; [L376] int tmp___0 ; [L377] int tmp___1 ; [L381] CALL, EXPR is_P_1_triggered() [L114] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L117] COND FALSE !((int )P_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L127] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, __retres1=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L129] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, \result=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L381] RET, EXPR is_P_1_triggered() [L381] tmp = is_P_1_triggered() [L383] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L389] CALL, EXPR is_C_1_triggered() [L196] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L199] COND FALSE !((int )C_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L209] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L219] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, __retres1=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L221] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, \result=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L389] RET, EXPR is_C_1_triggered() [L389] tmp___1 = is_C_1_triggered() [L391] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L441] RET activate_threads() [L442] FCALL reset_delta_events() [L445] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] [L448] kernel_st = 1 [L449] CALL eval() [L272] int tmp ; [L273] int tmp___0 ; [L274] int tmp___1 ; [L275] int tmp___2 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, timer=0] Loop: [L279] COND TRUE 1 [L282] CALL, EXPR exists_runnable_thread() [L251] int __retres1 ; [L254] COND TRUE (int )P_1_st == 0 [L255] __retres1 = 1 [L268] return (__retres1); [L282] RET, EXPR exists_runnable_thread() [L282] tmp___2 = exists_runnable_thread() [L284] COND TRUE \read(tmp___2) [L289] COND TRUE (int )P_1_st == 0 [L291] tmp = __VERIFIER_nondet_int() [L293] COND FALSE !(\read(tmp)) [L304] COND TRUE (int )C_1_st == 0 [L306] tmp___1 = __VERIFIER_nondet_int() [L308] COND FALSE !(\read(tmp___1)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2024-10-13 17:43:55,783 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)