./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 61a67961 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef --- Real Ultimate output --- This is Ultimate 0.2.5-wip.fs.cvc5-61a6796-m [2024-10-15 00:17:36,705 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-15 00:17:36,768 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-10-15 00:17:36,775 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-15 00:17:36,775 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-15 00:17:36,813 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-15 00:17:36,814 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-15 00:17:36,814 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-15 00:17:36,815 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-15 00:17:36,815 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-15 00:17:36,816 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-15 00:17:36,816 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-15 00:17:36,817 INFO L153 SettingsManager]: * Use SBE=true [2024-10-15 00:17:36,817 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-15 00:17:36,819 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-15 00:17:36,820 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-15 00:17:36,820 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-15 00:17:36,820 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-15 00:17:36,821 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-15 00:17:36,823 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-15 00:17:36,824 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-15 00:17:36,824 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-15 00:17:36,825 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-15 00:17:36,828 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-15 00:17:36,828 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-15 00:17:36,829 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-15 00:17:36,829 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-15 00:17:36,829 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-15 00:17:36,829 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-15 00:17:36,830 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-15 00:17:36,830 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-15 00:17:36,830 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-15 00:17:36,830 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-15 00:17:36,831 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-15 00:17:36,831 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-15 00:17:36,833 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-15 00:17:36,833 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef [2024-10-15 00:17:37,120 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-15 00:17:37,148 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-15 00:17:37,153 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-15 00:17:37,156 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-15 00:17:37,157 INFO L274 PluginConnector]: CDTParser initialized [2024-10-15 00:17:37,158 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2024-10-15 00:17:38,693 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-15 00:17:38,935 INFO L384 CDTParser]: Found 1 translation units. [2024-10-15 00:17:38,936 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2024-10-15 00:17:38,952 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e3d4d3973/71a856602cb2457e8fb5fb304970e411/FLAG88dc6f1e7 [2024-10-15 00:17:39,272 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e3d4d3973/71a856602cb2457e8fb5fb304970e411 [2024-10-15 00:17:39,274 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-15 00:17:39,275 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-15 00:17:39,277 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-15 00:17:39,277 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-15 00:17:39,282 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-15 00:17:39,282 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,283 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@30821e39 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39, skipping insertion in model container [2024-10-15 00:17:39,284 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,317 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-15 00:17:39,623 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-15 00:17:39,636 INFO L200 MainTranslator]: Completed pre-run [2024-10-15 00:17:39,739 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-15 00:17:39,782 INFO L204 MainTranslator]: Completed translation [2024-10-15 00:17:39,783 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39 WrapperNode [2024-10-15 00:17:39,783 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-15 00:17:39,784 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-15 00:17:39,784 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-15 00:17:39,784 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-15 00:17:39,793 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,806 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,826 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 55 [2024-10-15 00:17:39,827 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-15 00:17:39,827 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-15 00:17:39,828 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-15 00:17:39,828 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-15 00:17:39,841 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,845 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,855 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,883 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2024-10-15 00:17:39,884 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,884 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,891 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,898 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,899 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,900 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,902 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-15 00:17:39,903 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-15 00:17:39,903 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-15 00:17:39,903 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-15 00:17:39,904 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (1/1) ... [2024-10-15 00:17:39,909 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:39,922 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:39,940 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:39,944 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-15 00:17:39,998 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-15 00:17:39,999 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-15 00:17:40,000 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-15 00:17:40,000 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-15 00:17:40,000 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-15 00:17:40,001 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-15 00:17:40,073 INFO L238 CfgBuilder]: Building ICFG [2024-10-15 00:17:40,075 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-15 00:17:40,210 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2024-10-15 00:17:40,210 INFO L287 CfgBuilder]: Performing block encoding [2024-10-15 00:17:40,226 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-15 00:17:40,226 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-15 00:17:40,226 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.10 12:17:40 BoogieIcfgContainer [2024-10-15 00:17:40,227 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-15 00:17:40,227 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-15 00:17:40,227 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-15 00:17:40,231 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-15 00:17:40,231 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-15 00:17:40,231 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 15.10 12:17:39" (1/3) ... [2024-10-15 00:17:40,232 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@22bfd903 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 15.10 12:17:40, skipping insertion in model container [2024-10-15 00:17:40,234 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-15 00:17:40,234 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:17:39" (2/3) ... [2024-10-15 00:17:40,235 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@22bfd903 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 15.10 12:17:40, skipping insertion in model container [2024-10-15 00:17:40,235 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-15 00:17:40,235 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.10 12:17:40" (3/3) ... [2024-10-15 00:17:40,236 INFO L332 chiAutomizerObserver]: Analyzing ICFG array16_alloca_fixed.i [2024-10-15 00:17:40,289 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-15 00:17:40,289 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-15 00:17:40,289 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-15 00:17:40,289 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-15 00:17:40,289 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-15 00:17:40,290 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-15 00:17:40,290 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-15 00:17:40,290 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-15 00:17:40,293 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:40,307 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-15 00:17:40,307 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:40,307 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:40,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2024-10-15 00:17:40,312 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-15 00:17:40,312 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-15 00:17:40,312 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:40,314 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-15 00:17:40,314 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:40,314 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:40,314 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2024-10-15 00:17:40,314 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-15 00:17:40,320 INFO L745 eck$LassoCheckResult]: Stem: 10#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 11#L367true assume !(main_~length~0#1 < 1); 6#L367-2true call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3#L369true assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4#L370-3true [2024-10-15 00:17:40,320 INFO L747 eck$LassoCheckResult]: Loop: 4#L370-3true assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12#L372true assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15#L370-2true main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4#L370-3true [2024-10-15 00:17:40,325 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:40,326 INFO L85 PathProgramCache]: Analyzing trace with hash 28695753, now seen corresponding path program 1 times [2024-10-15 00:17:40,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:40,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376687759] [2024-10-15 00:17:40,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:40,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:40,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:40,434 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:40,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:40,466 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:40,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:40,469 INFO L85 PathProgramCache]: Analyzing trace with hash 51737, now seen corresponding path program 1 times [2024-10-15 00:17:40,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:40,469 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799419025] [2024-10-15 00:17:40,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:40,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:40,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:40,499 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:40,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:40,518 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:40,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:40,520 INFO L85 PathProgramCache]: Analyzing trace with hash 176707665, now seen corresponding path program 1 times [2024-10-15 00:17:40,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:40,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317566581] [2024-10-15 00:17:40,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:40,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:40,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:40,552 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:40,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:40,585 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:40,939 INFO L204 LassoAnalysis]: Preferences: [2024-10-15 00:17:40,939 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-15 00:17:40,940 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-15 00:17:40,940 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-15 00:17:40,940 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-15 00:17:40,941 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:40,941 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-15 00:17:40,941 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-15 00:17:40,941 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration1_Lasso [2024-10-15 00:17:40,941 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-15 00:17:40,942 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-15 00:17:40,962 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:40,973 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:40,976 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,120 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,124 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,127 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,131 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,134 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,138 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,142 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,144 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:41,391 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-15 00:17:41,395 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-15 00:17:41,397 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:41,397 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:41,400 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:41,401 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-15 00:17:41,403 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:41,416 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:41,417 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:41,417 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:41,417 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:41,417 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:41,420 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:41,420 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:41,425 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:41,441 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-15 00:17:41,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:41,443 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:41,445 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:41,446 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-15 00:17:41,447 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:41,461 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:41,461 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:41,461 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:41,462 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:41,462 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:41,463 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:41,463 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:41,465 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:41,481 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-10-15 00:17:41,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:41,482 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:41,484 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:41,485 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-15 00:17:41,486 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:41,499 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:41,499 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:41,500 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:41,500 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:41,505 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-15 00:17:41,505 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-15 00:17:41,511 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:41,528 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-10-15 00:17:41,530 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:41,530 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:41,532 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:41,533 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-10-15 00:17:41,535 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:41,548 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:41,549 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:41,549 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:41,549 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:41,554 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-15 00:17:41,555 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-15 00:17:41,559 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:41,572 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2024-10-15 00:17:41,573 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:41,574 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:41,575 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:41,577 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-10-15 00:17:41,578 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:41,588 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:41,589 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:41,589 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:41,589 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:41,602 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-15 00:17:41,602 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-15 00:17:41,621 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-15 00:17:41,675 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2024-10-15 00:17:41,676 INFO L444 ModelExtractionUtils]: 1 out of 19 variables were initially zero. Simplification set additionally 14 variables to zero. [2024-10-15 00:17:41,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:41,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:41,698 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:41,700 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-10-15 00:17:41,701 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-15 00:17:41,716 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-15 00:17:41,716 INFO L474 LassoAnalysis]: Proved termination. [2024-10-15 00:17:41,717 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 2*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-10-15 00:17:41,732 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-10-15 00:17:41,748 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2024-10-15 00:17:41,761 WARN L953 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-15 00:17:41,762 WARN L953 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-15 00:17:41,764 WARN L953 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2024-10-15 00:17:41,783 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:41,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:41,803 INFO L255 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-15 00:17:41,804 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:41,853 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-10-15 00:17:41,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:41,906 INFO L255 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-15 00:17:41,907 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:41,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:41,989 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-15 00:17:41,991 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:42,048 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 28 states and 40 transitions. Complement of second has 6 states. [2024-10-15 00:17:42,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-15 00:17:42,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:42,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 23 transitions. [2024-10-15 00:17:42,059 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 5 letters. Loop has 3 letters. [2024-10-15 00:17:42,060 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:17:42,060 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 8 letters. Loop has 3 letters. [2024-10-15 00:17:42,060 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:17:42,060 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 5 letters. Loop has 6 letters. [2024-10-15 00:17:42,061 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:17:42,062 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 40 transitions. [2024-10-15 00:17:42,064 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:42,069 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 12 states and 17 transitions. [2024-10-15 00:17:42,070 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-15 00:17:42,071 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-10-15 00:17:42,071 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2024-10-15 00:17:42,072 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:17:42,072 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-15 00:17:42,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2024-10-15 00:17:42,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2024-10-15 00:17:42,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:42,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 17 transitions. [2024-10-15 00:17:42,097 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-15 00:17:42,097 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-15 00:17:42,097 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-15 00:17:42,097 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 17 transitions. [2024-10-15 00:17:42,099 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:42,099 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:42,099 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:42,100 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:42,100 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:42,100 INFO L745 eck$LassoCheckResult]: Stem: 109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 110#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 111#L367 assume !(main_~length~0#1 < 1); 103#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 104#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 105#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 108#L370-4 main_~j~0#1 := 0; 107#L378-2 [2024-10-15 00:17:42,101 INFO L747 eck$LassoCheckResult]: Loop: 107#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 106#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 107#L378-2 [2024-10-15 00:17:42,101 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:42,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1806815510, now seen corresponding path program 1 times [2024-10-15 00:17:42,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:42,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160010045] [2024-10-15 00:17:42,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:42,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:42,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:42,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:42,219 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:42,219 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160010045] [2024-10-15 00:17:42,220 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [160010045] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-15 00:17:42,220 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-15 00:17:42,220 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-15 00:17:42,221 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [48274783] [2024-10-15 00:17:42,221 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-15 00:17:42,224 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:42,225 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:42,225 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 1 times [2024-10-15 00:17:42,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:42,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [462145300] [2024-10-15 00:17:42,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:42,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:42,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,236 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:42,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,243 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:42,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:42,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-15 00:17:42,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-10-15 00:17:42,307 INFO L87 Difference]: Start difference. First operand 12 states and 17 transitions. cyclomatic complexity: 7 Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:42,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:42,333 INFO L93 Difference]: Finished difference Result 14 states and 19 transitions. [2024-10-15 00:17:42,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 19 transitions. [2024-10-15 00:17:42,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:42,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 19 transitions. [2024-10-15 00:17:42,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-10-15 00:17:42,336 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-10-15 00:17:42,336 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 19 transitions. [2024-10-15 00:17:42,336 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:17:42,336 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 19 transitions. [2024-10-15 00:17:42,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 19 transitions. [2024-10-15 00:17:42,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2024-10-15 00:17:42,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:42,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 16 transitions. [2024-10-15 00:17:42,338 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 16 transitions. [2024-10-15 00:17:42,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-15 00:17:42,339 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2024-10-15 00:17:42,339 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-15 00:17:42,339 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 16 transitions. [2024-10-15 00:17:42,340 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:42,340 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:42,340 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:42,341 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:42,341 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:42,341 INFO L745 eck$LassoCheckResult]: Stem: 142#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 143#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 144#L367 assume !(main_~length~0#1 < 1); 136#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 137#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 138#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 145#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 147#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 146#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 139#L370-4 main_~j~0#1 := 0; 140#L378-2 [2024-10-15 00:17:42,341 INFO L747 eck$LassoCheckResult]: Loop: 140#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 141#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 140#L378-2 [2024-10-15 00:17:42,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:42,342 INFO L85 PathProgramCache]: Analyzing trace with hash -1982565540, now seen corresponding path program 1 times [2024-10-15 00:17:42,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:42,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738195472] [2024-10-15 00:17:42,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:42,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:42,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,356 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:42,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,381 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:42,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:42,381 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 2 times [2024-10-15 00:17:42,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:42,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969643909] [2024-10-15 00:17:42,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:42,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:42,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,394 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:42,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,405 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:42,408 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:42,409 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996831, now seen corresponding path program 1 times [2024-10-15 00:17:42,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:42,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335121740] [2024-10-15 00:17:42,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:42,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:42,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,443 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:42,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:42,483 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:42,767 INFO L204 LassoAnalysis]: Preferences: [2024-10-15 00:17:42,767 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-15 00:17:42,768 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-15 00:17:42,768 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-15 00:17:42,768 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-15 00:17:42,768 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:42,768 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-15 00:17:42,768 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-15 00:17:42,768 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration3_Lasso [2024-10-15 00:17:42,768 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-15 00:17:42,769 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-15 00:17:42,771 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,777 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,779 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,782 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,784 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,788 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,791 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,794 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,921 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,923 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:42,927 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:17:43,151 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-15 00:17:43,152 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-15 00:17:43,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,152 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,156 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,157 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-10-15 00:17:43,158 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,171 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,172 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:43,172 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,172 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,172 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,173 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:43,173 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:43,175 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:43,191 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-10-15 00:17:43,192 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,192 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,194 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,196 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-10-15 00:17:43,197 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,210 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,210 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:43,211 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,211 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,211 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,211 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:43,212 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:43,213 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:43,228 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-10-15 00:17:43,229 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,229 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,230 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,234 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,235 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-10-15 00:17:43,248 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,248 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:43,248 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,248 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,248 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,249 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:43,249 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:43,253 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:43,270 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2024-10-15 00:17:43,271 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,271 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,272 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,274 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-10-15 00:17:43,276 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,288 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,288 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:43,288 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,288 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,289 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,289 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:43,289 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:43,290 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:43,301 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-10-15 00:17:43,301 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,302 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,303 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,304 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-10-15 00:17:43,304 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,314 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,315 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:43,315 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,315 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,315 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,315 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:43,315 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:43,316 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:43,327 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-10-15 00:17:43,327 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,328 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,329 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,329 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-10-15 00:17:43,330 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,341 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,341 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:43,341 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,341 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,341 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,342 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:43,342 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:43,343 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:43,355 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2024-10-15 00:17:43,355 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,355 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,356 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,357 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-10-15 00:17:43,358 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,368 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,368 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-15 00:17:43,368 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,368 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,368 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,368 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-15 00:17:43,369 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-15 00:17:43,370 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:17:43,385 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-10-15 00:17:43,385 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,385 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,387 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,389 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-10-15 00:17:43,390 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:17:43,401 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:17:43,402 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:17:43,402 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:17:43,402 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:17:43,407 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-15 00:17:43,408 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-15 00:17:43,417 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-15 00:17:43,454 INFO L443 ModelExtractionUtils]: Simplification made 18 calls to the SMT solver. [2024-10-15 00:17:43,454 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 14 variables to zero. [2024-10-15 00:17:43,455 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:17:43,455 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:43,457 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:17:43,460 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-10-15 00:17:43,460 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-15 00:17:43,475 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-10-15 00:17:43,475 INFO L474 LassoAnalysis]: Proved termination. [2024-10-15 00:17:43,475 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~j~0#1, v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2) = -2*ULTIMATE.start_main_~j~0#1 + 1*v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2 Supporting invariants [-2*ULTIMATE.start_main_~length~0#1 + 1*v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2 >= 0] [2024-10-15 00:17:43,493 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-10-15 00:17:43,504 INFO L156 tatePredicateManager]: 3 out of 4 supporting invariants were superfluous and have been removed [2024-10-15 00:17:43,507 WARN L953 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-15 00:17:43,508 WARN L953 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-15 00:17:43,557 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:43,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:43,587 INFO L255 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-10-15 00:17:43,588 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-10-15 00:17:43,589 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:43,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:43,749 INFO L255 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-15 00:17:43,750 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:43,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:43,777 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.6 stem predicates 2 loop predicates [2024-10-15 00:17:43,777 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6 Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:43,933 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6. Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 16 states and 22 transitions. Complement of second has 10 states. [2024-10-15 00:17:43,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 8 states 6 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-15 00:17:43,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:43,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 15 transitions. [2024-10-15 00:17:43,935 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 10 letters. Loop has 2 letters. [2024-10-15 00:17:43,935 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:17:43,935 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 12 letters. Loop has 2 letters. [2024-10-15 00:17:43,935 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:17:43,935 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 10 letters. Loop has 4 letters. [2024-10-15 00:17:43,936 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:17:43,936 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 22 transitions. [2024-10-15 00:17:43,936 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:43,937 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 22 transitions. [2024-10-15 00:17:43,937 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2024-10-15 00:17:43,937 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2024-10-15 00:17:43,937 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 22 transitions. [2024-10-15 00:17:43,937 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:43,937 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-15 00:17:43,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 22 transitions. [2024-10-15 00:17:43,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2024-10-15 00:17:43,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:43,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2024-10-15 00:17:43,939 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-15 00:17:43,940 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-15 00:17:43,940 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-15 00:17:43,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2024-10-15 00:17:43,940 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:43,940 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:43,940 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:43,941 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:43,941 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:43,941 INFO L745 eck$LassoCheckResult]: Stem: 269#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 270#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 268#L367 assume !(main_~length~0#1 < 1); 259#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 260#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 261#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 271#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 274#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 272#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 266#L370-4 main_~j~0#1 := 0; 267#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 262#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 263#L378-2 [2024-10-15 00:17:43,941 INFO L747 eck$LassoCheckResult]: Loop: 263#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 273#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 263#L378-2 [2024-10-15 00:17:43,942 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:43,942 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996833, now seen corresponding path program 1 times [2024-10-15 00:17:43,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:43,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371987265] [2024-10-15 00:17:43,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:43,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:43,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:44,388 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:44,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:44,388 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [371987265] [2024-10-15 00:17:44,389 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [371987265] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:44,389 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1233849217] [2024-10-15 00:17:44,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:44,389 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:44,389 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:44,391 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:44,393 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-10-15 00:17:44,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:44,441 INFO L255 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-10-15 00:17:44,442 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:44,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-15 00:17:44,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-15 00:17:44,548 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:44,549 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:44,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-15 00:17:44,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-15 00:17:44,622 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:44,623 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1233849217] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:44,623 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:44,623 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2024-10-15 00:17:44,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130250623] [2024-10-15 00:17:44,623 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:44,624 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:44,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:44,624 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 3 times [2024-10-15 00:17:44,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:44,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046717169] [2024-10-15 00:17:44,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:44,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:44,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:44,635 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:44,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:44,640 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:44,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:44,698 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-10-15 00:17:44,699 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2024-10-15 00:17:44,699 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 9 Second operand has 16 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:44,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:44,840 INFO L93 Difference]: Finished difference Result 30 states and 41 transitions. [2024-10-15 00:17:44,840 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 41 transitions. [2024-10-15 00:17:44,841 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:17:44,842 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 29 states and 40 transitions. [2024-10-15 00:17:44,842 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-15 00:17:44,843 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-15 00:17:44,843 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 40 transitions. [2024-10-15 00:17:44,843 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:44,843 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 40 transitions. [2024-10-15 00:17:44,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 40 transitions. [2024-10-15 00:17:44,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2024-10-15 00:17:44,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:44,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2024-10-15 00:17:44,846 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2024-10-15 00:17:44,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-15 00:17:44,847 INFO L425 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2024-10-15 00:17:44,847 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-15 00:17:44,847 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2024-10-15 00:17:44,848 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:44,848 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:44,848 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:44,849 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:44,849 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:44,849 INFO L745 eck$LassoCheckResult]: Stem: 405#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 406#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 407#L367 assume !(main_~length~0#1 < 1); 396#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 397#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 398#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 408#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 411#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 416#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 415#L370-4 main_~j~0#1 := 0; 414#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 403#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 404#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 401#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 402#L378-2 [2024-10-15 00:17:44,849 INFO L747 eck$LassoCheckResult]: Loop: 402#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 412#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 402#L378-2 [2024-10-15 00:17:44,850 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:44,850 INFO L85 PathProgramCache]: Analyzing trace with hash -645453020, now seen corresponding path program 1 times [2024-10-15 00:17:44,850 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:44,850 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147540227] [2024-10-15 00:17:44,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:44,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:44,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:44,972 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:44,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:44,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147540227] [2024-10-15 00:17:44,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [147540227] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:44,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1148811906] [2024-10-15 00:17:44,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:44,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:44,973 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:44,977 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:44,979 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-10-15 00:17:45,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:45,026 INFO L255 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-15 00:17:45,027 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:45,074 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:45,074 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:45,110 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:45,111 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1148811906] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:45,111 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:45,111 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2024-10-15 00:17:45,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037339454] [2024-10-15 00:17:45,111 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:45,112 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:45,112 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:45,112 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 4 times [2024-10-15 00:17:45,112 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:45,112 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084139260] [2024-10-15 00:17:45,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:45,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:45,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:45,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:45,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:45,121 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:45,169 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:45,169 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-10-15 00:17:45,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-10-15 00:17:45,170 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 13 Second operand has 11 states, 11 states have (on average 2.272727272727273) internal successors, (25), 11 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:45,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:45,248 INFO L93 Difference]: Finished difference Result 48 states and 64 transitions. [2024-10-15 00:17:45,248 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 64 transitions. [2024-10-15 00:17:45,249 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:17:45,249 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 43 states and 57 transitions. [2024-10-15 00:17:45,250 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2024-10-15 00:17:45,250 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2024-10-15 00:17:45,250 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 57 transitions. [2024-10-15 00:17:45,250 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:45,250 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 57 transitions. [2024-10-15 00:17:45,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 57 transitions. [2024-10-15 00:17:45,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 37. [2024-10-15 00:17:45,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3513513513513513) internal successors, (50), 36 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:45,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 50 transitions. [2024-10-15 00:17:45,253 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 50 transitions. [2024-10-15 00:17:45,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-15 00:17:45,255 INFO L425 stractBuchiCegarLoop]: Abstraction has 37 states and 50 transitions. [2024-10-15 00:17:45,255 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-15 00:17:45,255 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 50 transitions. [2024-10-15 00:17:45,255 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:17:45,256 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:45,256 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:45,256 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:45,256 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:45,256 INFO L745 eck$LassoCheckResult]: Stem: 575#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 576#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 573#L367 assume main_~length~0#1 < 1;main_~length~0#1 := 1; 564#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 565#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 597#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 595#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 591#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 592#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 590#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 589#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 587#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 568#L370-4 main_~j~0#1 := 0; 569#L378-2 [2024-10-15 00:17:45,257 INFO L747 eck$LassoCheckResult]: Loop: 569#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 570#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 569#L378-2 [2024-10-15 00:17:45,257 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:45,257 INFO L85 PathProgramCache]: Analyzing trace with hash 1080825110, now seen corresponding path program 1 times [2024-10-15 00:17:45,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:45,257 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512894214] [2024-10-15 00:17:45,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:45,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:45,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:45,315 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:45,315 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:45,315 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [512894214] [2024-10-15 00:17:45,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [512894214] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:45,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [462025610] [2024-10-15 00:17:45,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:45,318 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:45,318 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:45,320 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:45,322 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-10-15 00:17:45,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:45,372 INFO L255 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-15 00:17:45,373 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:45,410 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:45,410 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-15 00:17:45,410 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [462025610] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-15 00:17:45,411 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-15 00:17:45,411 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2024-10-15 00:17:45,411 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1684453111] [2024-10-15 00:17:45,411 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-15 00:17:45,411 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:45,412 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:45,412 INFO L85 PathProgramCache]: Analyzing trace with hash 2310, now seen corresponding path program 1 times [2024-10-15 00:17:45,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:45,412 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557731660] [2024-10-15 00:17:45,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:45,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:45,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:45,416 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:45,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:45,420 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:45,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:45,475 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-15 00:17:45,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-10-15 00:17:45,476 INFO L87 Difference]: Start difference. First operand 37 states and 50 transitions. cyclomatic complexity: 20 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:45,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:45,496 INFO L93 Difference]: Finished difference Result 30 states and 39 transitions. [2024-10-15 00:17:45,496 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 39 transitions. [2024-10-15 00:17:45,497 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:45,497 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 24 states and 32 transitions. [2024-10-15 00:17:45,497 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-15 00:17:45,497 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-15 00:17:45,497 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 32 transitions. [2024-10-15 00:17:45,497 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:45,497 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-15 00:17:45,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 32 transitions. [2024-10-15 00:17:45,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2024-10-15 00:17:45,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.3333333333333333) internal successors, (32), 23 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:45,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2024-10-15 00:17:45,500 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-15 00:17:45,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-15 00:17:45,501 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-15 00:17:45,501 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-15 00:17:45,501 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 32 transitions. [2024-10-15 00:17:45,502 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:45,502 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:45,502 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:45,502 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:45,502 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:45,503 INFO L745 eck$LassoCheckResult]: Stem: 686#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 687#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 688#L367 assume !(main_~length~0#1 < 1); 677#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 678#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 679#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 689#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 693#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 690#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 691#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 699#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 696#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 684#L370-4 main_~j~0#1 := 0; 685#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 680#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 681#L378-2 [2024-10-15 00:17:45,503 INFO L747 eck$LassoCheckResult]: Loop: 681#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 692#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 681#L378-2 [2024-10-15 00:17:45,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:45,503 INFO L85 PathProgramCache]: Analyzing trace with hash -1295959587, now seen corresponding path program 1 times [2024-10-15 00:17:45,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:45,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162227681] [2024-10-15 00:17:45,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:45,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:45,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:46,094 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:46,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:46,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162227681] [2024-10-15 00:17:46,095 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [162227681] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:46,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1918507091] [2024-10-15 00:17:46,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:46,095 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:46,095 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:46,098 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:46,101 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-10-15 00:17:46,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:46,159 INFO L255 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-10-15 00:17:46,162 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:46,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-15 00:17:46,254 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2024-10-15 00:17:46,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2024-10-15 00:17:46,276 INFO L349 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2024-10-15 00:17:46,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2024-10-15 00:17:46,404 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-15 00:17:46,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 12 [2024-10-15 00:17:46,422 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:46,423 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:46,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-15 00:17:46,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-15 00:17:46,592 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-15 00:17:46,592 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1918507091] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:46,592 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:46,593 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7] total 21 [2024-10-15 00:17:46,593 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [259632244] [2024-10-15 00:17:46,593 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:46,593 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:46,595 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:46,595 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 5 times [2024-10-15 00:17:46,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:46,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494509479] [2024-10-15 00:17:46,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:46,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:46,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:46,601 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:46,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:46,606 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:46,657 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:46,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-10-15 00:17:46,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=360, Unknown=0, NotChecked=0, Total=462 [2024-10-15 00:17:46,660 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. cyclomatic complexity: 12 Second operand has 22 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:47,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:47,414 INFO L93 Difference]: Finished difference Result 37 states and 47 transitions. [2024-10-15 00:17:47,414 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 47 transitions. [2024-10-15 00:17:47,415 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:17:47,415 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 35 states and 45 transitions. [2024-10-15 00:17:47,415 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-15 00:17:47,416 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-15 00:17:47,416 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 45 transitions. [2024-10-15 00:17:47,416 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:47,416 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 45 transitions. [2024-10-15 00:17:47,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 45 transitions. [2024-10-15 00:17:47,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 19. [2024-10-15 00:17:47,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:47,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2024-10-15 00:17:47,418 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 24 transitions. [2024-10-15 00:17:47,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-10-15 00:17:47,419 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 24 transitions. [2024-10-15 00:17:47,419 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-15 00:17:47,419 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 24 transitions. [2024-10-15 00:17:47,420 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:47,420 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:47,420 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:47,420 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:47,420 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:47,421 INFO L745 eck$LassoCheckResult]: Stem: 870#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 871#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 872#L367 assume !(main_~length~0#1 < 1); 861#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 862#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 863#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 873#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 879#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 874#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 875#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 876#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 878#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 864#L370-4 main_~j~0#1 := 0; 865#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 868#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 869#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 866#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 867#L378-2 [2024-10-15 00:17:47,421 INFO L747 eck$LassoCheckResult]: Loop: 867#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 877#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 867#L378-2 [2024-10-15 00:17:47,421 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:47,421 INFO L85 PathProgramCache]: Analyzing trace with hash -685994466, now seen corresponding path program 2 times [2024-10-15 00:17:47,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:47,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081147951] [2024-10-15 00:17:47,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:47,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:47,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:47,773 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:47,773 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:47,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2081147951] [2024-10-15 00:17:47,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2081147951] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:47,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [586866753] [2024-10-15 00:17:47,773 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-15 00:17:47,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:47,775 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:47,777 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:47,778 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-10-15 00:17:47,838 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-15 00:17:47,839 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:17:47,840 INFO L255 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-10-15 00:17:47,841 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:47,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-15 00:17:48,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-15 00:17:48,054 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:48,054 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:48,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:17:48,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:17:48,158 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:48,159 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [586866753] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:48,159 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:48,159 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 18 [2024-10-15 00:17:48,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630953511] [2024-10-15 00:17:48,159 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:48,160 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:48,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:48,160 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 6 times [2024-10-15 00:17:48,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:48,160 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8675044] [2024-10-15 00:17:48,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:48,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:48,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:48,166 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:48,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:48,171 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:48,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:48,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-10-15 00:17:48,222 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2024-10-15 00:17:48,222 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. cyclomatic complexity: 8 Second operand has 19 states, 18 states have (on average 2.0) internal successors, (36), 19 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:48,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:48,386 INFO L93 Difference]: Finished difference Result 35 states and 45 transitions. [2024-10-15 00:17:48,388 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 45 transitions. [2024-10-15 00:17:48,388 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:17:48,389 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 34 states and 44 transitions. [2024-10-15 00:17:48,389 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-15 00:17:48,389 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-15 00:17:48,389 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 44 transitions. [2024-10-15 00:17:48,389 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:48,389 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 44 transitions. [2024-10-15 00:17:48,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 44 transitions. [2024-10-15 00:17:48,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2024-10-15 00:17:48,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.2962962962962963) internal successors, (35), 26 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:48,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 35 transitions. [2024-10-15 00:17:48,395 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 35 transitions. [2024-10-15 00:17:48,396 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-15 00:17:48,396 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 35 transitions. [2024-10-15 00:17:48,396 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-10-15 00:17:48,396 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 35 transitions. [2024-10-15 00:17:48,397 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:48,397 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:48,397 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:48,397 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:48,398 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:48,398 INFO L745 eck$LassoCheckResult]: Stem: 1050#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1051#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1052#L367 assume !(main_~length~0#1 < 1); 1041#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1042#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1043#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1053#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1061#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1054#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1055#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1056#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1058#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1059#L370-4 main_~j~0#1 := 0; 1064#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1063#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1057#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1048#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1049#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1046#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1047#L378-2 [2024-10-15 00:17:48,398 INFO L747 eck$LassoCheckResult]: Loop: 1047#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1062#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1047#L378-2 [2024-10-15 00:17:48,398 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:48,398 INFO L85 PathProgramCache]: Analyzing trace with hash -2110686111, now seen corresponding path program 3 times [2024-10-15 00:17:48,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:48,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470695954] [2024-10-15 00:17:48,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:48,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:48,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:48,504 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:48,505 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:48,505 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470695954] [2024-10-15 00:17:48,505 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470695954] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:48,505 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [593061699] [2024-10-15 00:17:48,505 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-15 00:17:48,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:48,506 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:48,508 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:48,509 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-10-15 00:17:48,577 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-10-15 00:17:48,578 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:17:48,580 INFO L255 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-15 00:17:48,582 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:48,657 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:48,657 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:48,713 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:48,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [593061699] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:48,713 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:48,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 14 [2024-10-15 00:17:48,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993661708] [2024-10-15 00:17:48,713 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:48,714 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:48,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:48,714 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 7 times [2024-10-15 00:17:48,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:48,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108722032] [2024-10-15 00:17:48,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:48,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:48,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:48,720 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:48,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:48,724 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:48,774 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:48,775 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-10-15 00:17:48,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2024-10-15 00:17:48,775 INFO L87 Difference]: Start difference. First operand 27 states and 35 transitions. cyclomatic complexity: 12 Second operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:48,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:48,853 INFO L93 Difference]: Finished difference Result 38 states and 47 transitions. [2024-10-15 00:17:48,853 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 47 transitions. [2024-10-15 00:17:48,854 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:48,854 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 32 states and 41 transitions. [2024-10-15 00:17:48,854 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-15 00:17:48,855 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-15 00:17:48,855 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 41 transitions. [2024-10-15 00:17:48,855 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:48,855 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-15 00:17:48,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 41 transitions. [2024-10-15 00:17:48,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 29. [2024-10-15 00:17:48,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 28 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:48,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2024-10-15 00:17:48,859 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 37 transitions. [2024-10-15 00:17:48,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-15 00:17:48,860 INFO L425 stractBuchiCegarLoop]: Abstraction has 29 states and 37 transitions. [2024-10-15 00:17:48,862 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-10-15 00:17:48,862 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 37 transitions. [2024-10-15 00:17:48,863 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:48,863 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:48,863 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:48,863 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:48,863 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:48,864 INFO L745 eck$LassoCheckResult]: Stem: 1240#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1241#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1242#L367 assume !(main_~length~0#1 < 1); 1231#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1232#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1233#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1243#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1246#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1244#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1245#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1259#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1258#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1253#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1257#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1254#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1234#L370-4 main_~j~0#1 := 0; 1235#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1238#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1239#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1236#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1237#L378-2 [2024-10-15 00:17:48,864 INFO L747 eck$LassoCheckResult]: Loop: 1237#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1248#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1237#L378-2 [2024-10-15 00:17:48,867 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:48,867 INFO L85 PathProgramCache]: Analyzing trace with hash -761055450, now seen corresponding path program 1 times [2024-10-15 00:17:48,867 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:48,867 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869102063] [2024-10-15 00:17:48,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:48,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:48,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:49,369 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:49,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:49,370 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869102063] [2024-10-15 00:17:49,370 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1869102063] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:49,370 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1306835621] [2024-10-15 00:17:49,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:49,370 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:49,370 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:49,372 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:49,374 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-10-15 00:17:49,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:49,440 INFO L255 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-10-15 00:17:49,442 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:49,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-15 00:17:49,516 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-15 00:17:49,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 17 [2024-10-15 00:17:49,537 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-15 00:17:49,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2024-10-15 00:17:49,803 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-15 00:17:49,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 14 [2024-10-15 00:17:49,818 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:49,818 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:50,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:17:50,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:17:50,011 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-15 00:17:50,012 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1306835621] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:50,012 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:50,012 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 9] total 18 [2024-10-15 00:17:50,012 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [716331692] [2024-10-15 00:17:50,012 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:50,014 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:50,014 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:50,014 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 8 times [2024-10-15 00:17:50,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:50,014 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257827687] [2024-10-15 00:17:50,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:50,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:50,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:50,020 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:50,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:50,025 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:50,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:50,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-10-15 00:17:50,070 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=270, Unknown=0, NotChecked=0, Total=342 [2024-10-15 00:17:50,071 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. cyclomatic complexity: 12 Second operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 19 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:51,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:51,014 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-10-15 00:17:51,014 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 57 transitions. [2024-10-15 00:17:51,015 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:17:51,015 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 44 states and 55 transitions. [2024-10-15 00:17:51,015 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-15 00:17:51,015 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-15 00:17:51,015 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 55 transitions. [2024-10-15 00:17:51,016 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:51,016 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 55 transitions. [2024-10-15 00:17:51,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 55 transitions. [2024-10-15 00:17:51,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 24. [2024-10-15 00:17:51,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.25) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:51,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 30 transitions. [2024-10-15 00:17:51,021 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 30 transitions. [2024-10-15 00:17:51,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-15 00:17:51,023 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 30 transitions. [2024-10-15 00:17:51,023 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-10-15 00:17:51,023 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 30 transitions. [2024-10-15 00:17:51,023 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:51,024 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:51,024 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:51,024 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:51,024 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:51,025 INFO L745 eck$LassoCheckResult]: Stem: 1459#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1460#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1461#L367 assume !(main_~length~0#1 < 1); 1450#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1451#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1452#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1462#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1471#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1463#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1464#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1465#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1467#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1469#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1470#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1468#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1453#L370-4 main_~j~0#1 := 0; 1454#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1457#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1458#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1466#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1473#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1455#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1456#L378-2 [2024-10-15 00:17:51,025 INFO L747 eck$LassoCheckResult]: Loop: 1456#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1472#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1456#L378-2 [2024-10-15 00:17:51,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:51,025 INFO L85 PathProgramCache]: Analyzing trace with hash -1622874713, now seen corresponding path program 4 times [2024-10-15 00:17:51,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:51,026 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628929003] [2024-10-15 00:17:51,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:51,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:51,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:51,400 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:51,400 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:51,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1628929003] [2024-10-15 00:17:51,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1628929003] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:51,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1418270669] [2024-10-15 00:17:51,401 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-15 00:17:51,401 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:51,401 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:51,404 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:51,405 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2024-10-15 00:17:51,465 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-15 00:17:51,466 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:17:51,467 INFO L255 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-10-15 00:17:51,469 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:51,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-15 00:17:51,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2024-10-15 00:17:51,614 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:51,614 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:51,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:17:51,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:17:51,745 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:51,745 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1418270669] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:51,745 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:51,745 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2024-10-15 00:17:51,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735633020] [2024-10-15 00:17:51,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:51,746 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:51,746 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:51,746 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 9 times [2024-10-15 00:17:51,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:51,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545610314] [2024-10-15 00:17:51,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:51,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:51,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:51,751 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:51,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:51,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:51,803 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:51,804 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-10-15 00:17:51,804 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2024-10-15 00:17:51,804 INFO L87 Difference]: Start difference. First operand 24 states and 30 transitions. cyclomatic complexity: 9 Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 17 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:51,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:51,989 INFO L93 Difference]: Finished difference Result 42 states and 53 transitions. [2024-10-15 00:17:51,989 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 53 transitions. [2024-10-15 00:17:51,990 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:17:51,990 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 41 states and 52 transitions. [2024-10-15 00:17:51,990 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-15 00:17:51,990 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-15 00:17:51,991 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 52 transitions. [2024-10-15 00:17:51,991 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:51,991 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 52 transitions. [2024-10-15 00:17:51,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 52 transitions. [2024-10-15 00:17:51,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 32. [2024-10-15 00:17:51,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.28125) internal successors, (41), 31 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:51,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 41 transitions. [2024-10-15 00:17:51,994 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-15 00:17:51,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-15 00:17:51,995 INFO L425 stractBuchiCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-15 00:17:51,995 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-10-15 00:17:51,995 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 41 transitions. [2024-10-15 00:17:51,996 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:51,996 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:51,996 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:51,996 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:51,996 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:51,997 INFO L745 eck$LassoCheckResult]: Stem: 1673#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1674#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1675#L367 assume !(main_~length~0#1 < 1); 1664#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1665#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1666#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1676#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1682#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1683#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1688#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1689#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1677#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1678#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1679#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1687#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1667#L370-4 main_~j~0#1 := 0; 1668#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1693#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1692#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1671#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1672#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1681#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1690#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1669#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1670#L378-2 [2024-10-15 00:17:51,997 INFO L747 eck$LassoCheckResult]: Loop: 1670#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1691#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1670#L378-2 [2024-10-15 00:17:51,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:51,998 INFO L85 PathProgramCache]: Analyzing trace with hash -509471318, now seen corresponding path program 5 times [2024-10-15 00:17:51,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:51,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013815991] [2024-10-15 00:17:51,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:51,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:52,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:52,140 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:52,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:52,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013815991] [2024-10-15 00:17:52,141 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2013815991] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:52,141 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1321326845] [2024-10-15 00:17:52,141 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-15 00:17:52,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:52,141 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:52,143 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:52,146 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2024-10-15 00:17:52,219 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2024-10-15 00:17:52,220 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:17:52,221 INFO L255 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-10-15 00:17:52,224 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:52,324 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:52,324 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:52,403 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:52,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1321326845] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:52,404 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:52,404 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 17 [2024-10-15 00:17:52,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [49467807] [2024-10-15 00:17:52,405 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:52,405 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:52,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:52,405 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 10 times [2024-10-15 00:17:52,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:52,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757375526] [2024-10-15 00:17:52,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:52,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:52,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:52,410 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:52,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:52,414 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:52,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:52,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-10-15 00:17:52,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2024-10-15 00:17:52,464 INFO L87 Difference]: Start difference. First operand 32 states and 41 transitions. cyclomatic complexity: 13 Second operand has 17 states, 17 states have (on average 2.235294117647059) internal successors, (38), 17 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:52,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:17:52,551 INFO L93 Difference]: Finished difference Result 45 states and 55 transitions. [2024-10-15 00:17:52,551 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 55 transitions. [2024-10-15 00:17:52,552 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:52,552 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 37 states and 47 transitions. [2024-10-15 00:17:52,553 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-15 00:17:52,553 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-15 00:17:52,553 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 47 transitions. [2024-10-15 00:17:52,553 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:17:52,553 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-15 00:17:52,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 47 transitions. [2024-10-15 00:17:52,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 34. [2024-10-15 00:17:52,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:17:52,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 43 transitions. [2024-10-15 00:17:52,555 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 43 transitions. [2024-10-15 00:17:52,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-15 00:17:52,556 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 43 transitions. [2024-10-15 00:17:52,556 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-10-15 00:17:52,556 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 43 transitions. [2024-10-15 00:17:52,557 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:17:52,557 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:17:52,557 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:17:52,557 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:17:52,558 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:17:52,558 INFO L745 eck$LassoCheckResult]: Stem: 1909#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1910#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1908#L367 assume !(main_~length~0#1 < 1); 1899#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1900#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1901#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1911#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1914#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1912#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1913#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1932#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1931#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1930#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1929#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1928#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1923#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1927#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1925#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1921#L370-4 main_~j~0#1 := 0; 1920#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1915#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1919#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1917#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1916#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1904#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1905#L378-2 [2024-10-15 00:17:52,558 INFO L747 eck$LassoCheckResult]: Loop: 1905#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1918#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1905#L378-2 [2024-10-15 00:17:52,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:52,559 INFO L85 PathProgramCache]: Analyzing trace with hash 1285147747, now seen corresponding path program 2 times [2024-10-15 00:17:52,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:52,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [618074523] [2024-10-15 00:17:52,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:52,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:52,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:17:53,038 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:53,038 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:17:53,038 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [618074523] [2024-10-15 00:17:53,038 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [618074523] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:17:53,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2082965543] [2024-10-15 00:17:53,039 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-15 00:17:53,039 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:17:53,039 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:17:53,042 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:17:53,045 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2024-10-15 00:17:53,115 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-15 00:17:53,116 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:17:53,117 INFO L255 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-10-15 00:17:53,119 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:17:53,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-15 00:17:53,297 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-15 00:17:53,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-10-15 00:17:53,310 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-15 00:17:53,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2024-10-15 00:17:53,559 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-15 00:17:53,561 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-15 00:17:53,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 12 [2024-10-15 00:17:53,576 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:17:53,576 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:17:53,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:17:53,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:17:53,783 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-15 00:17:53,784 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2082965543] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:17:53,784 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:17:53,784 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 11] total 26 [2024-10-15 00:17:53,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065746105] [2024-10-15 00:17:53,784 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:17:53,784 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:17:53,785 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:17:53,785 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 11 times [2024-10-15 00:17:53,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:17:53,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758890587] [2024-10-15 00:17:53,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:17:53,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:17:53,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:53,792 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:17:53,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:17:53,796 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:17:53,842 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:17:53,844 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-15 00:17:53,844 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=586, Unknown=0, NotChecked=0, Total=702 [2024-10-15 00:17:53,844 INFO L87 Difference]: Start difference. First operand 34 states and 43 transitions. cyclomatic complexity: 13 Second operand has 27 states, 26 states have (on average 2.0384615384615383) internal successors, (53), 27 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:06,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:06,312 INFO L93 Difference]: Finished difference Result 55 states and 67 transitions. [2024-10-15 00:18:06,313 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 67 transitions. [2024-10-15 00:18:06,313 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:18:06,314 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 53 states and 65 transitions. [2024-10-15 00:18:06,314 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-15 00:18:06,314 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-15 00:18:06,314 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 65 transitions. [2024-10-15 00:18:06,315 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:06,315 INFO L218 hiAutomatonCegarLoop]: Abstraction has 53 states and 65 transitions. [2024-10-15 00:18:06,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 65 transitions. [2024-10-15 00:18:06,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 29. [2024-10-15 00:18:06,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2413793103448276) internal successors, (36), 28 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:06,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 36 transitions. [2024-10-15 00:18:06,317 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 36 transitions. [2024-10-15 00:18:06,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-15 00:18:06,318 INFO L425 stractBuchiCegarLoop]: Abstraction has 29 states and 36 transitions. [2024-10-15 00:18:06,318 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-10-15 00:18:06,318 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 36 transitions. [2024-10-15 00:18:06,318 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:06,318 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:06,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:06,319 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:06,319 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:06,319 INFO L745 eck$LassoCheckResult]: Stem: 2185#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2186#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2187#L367 assume !(main_~length~0#1 < 1); 2176#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2177#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2178#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2188#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2200#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2189#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2190#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2191#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2193#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2199#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2198#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2197#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2195#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2196#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2194#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2179#L370-4 main_~j~0#1 := 0; 2180#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2183#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2184#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2192#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2204#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2202#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2201#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2181#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2182#L378-2 [2024-10-15 00:18:06,319 INFO L747 eck$LassoCheckResult]: Loop: 2182#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2203#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2182#L378-2 [2024-10-15 00:18:06,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:06,320 INFO L85 PathProgramCache]: Analyzing trace with hash -1665431516, now seen corresponding path program 6 times [2024-10-15 00:18:06,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:06,320 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785539721] [2024-10-15 00:18:06,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:06,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:06,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:06,737 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:06,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:06,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [785539721] [2024-10-15 00:18:06,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [785539721] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:06,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1892752591] [2024-10-15 00:18:06,738 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-15 00:18:06,739 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:06,739 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:06,741 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:06,742 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2024-10-15 00:18:06,817 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2024-10-15 00:18:06,817 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:06,819 INFO L255 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-10-15 00:18:06,820 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:06,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-15 00:18:07,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-15 00:18:07,196 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:07,197 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:07,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:18:07,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:18:07,340 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:07,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1892752591] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:07,341 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:07,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 26 [2024-10-15 00:18:07,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873478385] [2024-10-15 00:18:07,341 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:07,341 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:07,341 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:07,341 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 12 times [2024-10-15 00:18:07,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:07,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136456734] [2024-10-15 00:18:07,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:07,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:07,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:07,345 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:07,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:07,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:07,399 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:07,400 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-15 00:18:07,400 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=609, Unknown=0, NotChecked=0, Total=702 [2024-10-15 00:18:07,401 INFO L87 Difference]: Start difference. First operand 29 states and 36 transitions. cyclomatic complexity: 10 Second operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 27 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:07,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:07,777 INFO L93 Difference]: Finished difference Result 49 states and 61 transitions. [2024-10-15 00:18:07,777 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 61 transitions. [2024-10-15 00:18:07,778 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:18:07,778 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 48 states and 60 transitions. [2024-10-15 00:18:07,778 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-15 00:18:07,778 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-15 00:18:07,778 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 60 transitions. [2024-10-15 00:18:07,779 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:07,779 INFO L218 hiAutomatonCegarLoop]: Abstraction has 48 states and 60 transitions. [2024-10-15 00:18:07,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 60 transitions. [2024-10-15 00:18:07,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 37. [2024-10-15 00:18:07,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:07,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 47 transitions. [2024-10-15 00:18:07,781 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-15 00:18:07,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-15 00:18:07,782 INFO L425 stractBuchiCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-15 00:18:07,782 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-10-15 00:18:07,782 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 47 transitions. [2024-10-15 00:18:07,782 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:07,782 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:07,782 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:07,783 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:07,783 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:07,783 INFO L745 eck$LassoCheckResult]: Stem: 2457#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2458#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2459#L367 assume !(main_~length~0#1 < 1); 2448#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2449#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2450#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2460#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2477#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2461#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2462#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2465#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2466#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2476#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2475#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2474#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2473#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2469#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2467#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2455#L370-4 main_~j~0#1 := 0; 2456#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2480#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2464#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2453#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2454#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2479#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2478#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2472#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2471#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2451#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2452#L378-2 [2024-10-15 00:18:07,783 INFO L747 eck$LassoCheckResult]: Loop: 2452#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2470#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2452#L378-2 [2024-10-15 00:18:07,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:07,784 INFO L85 PathProgramCache]: Analyzing trace with hash 1543113959, now seen corresponding path program 7 times [2024-10-15 00:18:07,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:07,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448719212] [2024-10-15 00:18:07,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:07,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:07,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:07,962 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 13 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:07,962 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:07,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448719212] [2024-10-15 00:18:07,963 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448719212] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:07,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1335613315] [2024-10-15 00:18:07,963 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-10-15 00:18:07,963 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:07,963 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:07,965 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:07,967 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2024-10-15 00:18:08,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:08,041 INFO L255 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-15 00:18:08,042 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:08,167 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:08,168 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:08,265 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:08,265 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1335613315] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:08,265 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:08,265 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 20 [2024-10-15 00:18:08,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651766646] [2024-10-15 00:18:08,266 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:08,266 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:08,266 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:08,266 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 13 times [2024-10-15 00:18:08,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:08,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470009015] [2024-10-15 00:18:08,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:08,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:08,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:08,270 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:08,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:08,274 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:08,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:08,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-10-15 00:18:08,333 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2024-10-15 00:18:08,333 INFO L87 Difference]: Start difference. First operand 37 states and 47 transitions. cyclomatic complexity: 14 Second operand has 20 states, 20 states have (on average 2.3) internal successors, (46), 20 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:08,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:08,430 INFO L93 Difference]: Finished difference Result 52 states and 63 transitions. [2024-10-15 00:18:08,430 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 63 transitions. [2024-10-15 00:18:08,431 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:08,431 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 42 states and 53 transitions. [2024-10-15 00:18:08,431 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-15 00:18:08,431 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-15 00:18:08,431 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42 states and 53 transitions. [2024-10-15 00:18:08,432 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:08,432 INFO L218 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2024-10-15 00:18:08,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states and 53 transitions. [2024-10-15 00:18:08,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 39. [2024-10-15 00:18:08,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.2564102564102564) internal successors, (49), 38 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:08,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 49 transitions. [2024-10-15 00:18:08,435 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 49 transitions. [2024-10-15 00:18:08,436 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-15 00:18:08,436 INFO L425 stractBuchiCegarLoop]: Abstraction has 39 states and 49 transitions. [2024-10-15 00:18:08,436 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-10-15 00:18:08,436 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 49 transitions. [2024-10-15 00:18:08,437 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:08,437 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:08,437 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:08,437 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:08,437 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:08,438 INFO L745 eck$LassoCheckResult]: Stem: 2737#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2738#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2739#L367 assume !(main_~length~0#1 < 1); 2728#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2729#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2730#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2740#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2743#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2741#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2742#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2766#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2765#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2764#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2763#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2762#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2761#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2760#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2759#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2754#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2758#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2755#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2752#L370-4 main_~j~0#1 := 0; 2751#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2744#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2750#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2749#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2748#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2746#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2745#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2733#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2734#L378-2 [2024-10-15 00:18:08,438 INFO L747 eck$LassoCheckResult]: Loop: 2734#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2747#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2734#L378-2 [2024-10-15 00:18:08,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:08,439 INFO L85 PathProgramCache]: Analyzing trace with hash -2086076244, now seen corresponding path program 3 times [2024-10-15 00:18:08,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:08,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748897022] [2024-10-15 00:18:08,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:08,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:08,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:09,104 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:09,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:09,104 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748897022] [2024-10-15 00:18:09,105 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748897022] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:09,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [470095029] [2024-10-15 00:18:09,105 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-15 00:18:09,105 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:09,105 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:09,107 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:09,108 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2024-10-15 00:18:09,203 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-10-15 00:18:09,203 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:09,205 INFO L255 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-10-15 00:18:09,207 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:09,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-15 00:18:09,300 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-15 00:18:09,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 17 [2024-10-15 00:18:09,318 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-15 00:18:09,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2024-10-15 00:18:09,693 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-15 00:18:09,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 14 [2024-10-15 00:18:09,714 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:09,714 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:09,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:18:09,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:18:09,979 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 45 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-15 00:18:09,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [470095029] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:09,980 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:09,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 13] total 24 [2024-10-15 00:18:09,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542006748] [2024-10-15 00:18:09,980 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:09,981 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:09,981 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:09,981 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 14 times [2024-10-15 00:18:09,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:09,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391964195] [2024-10-15 00:18:09,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:09,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:09,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:09,989 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:09,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:09,993 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:10,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:10,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-15 00:18:10,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=506, Unknown=0, NotChecked=0, Total=600 [2024-10-15 00:18:10,051 INFO L87 Difference]: Start difference. First operand 39 states and 49 transitions. cyclomatic complexity: 14 Second operand has 25 states, 24 states have (on average 2.1666666666666665) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:11,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:11,271 INFO L93 Difference]: Finished difference Result 64 states and 77 transitions. [2024-10-15 00:18:11,271 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 64 states and 77 transitions. [2024-10-15 00:18:11,272 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:18:11,273 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 64 states to 62 states and 75 transitions. [2024-10-15 00:18:11,273 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-15 00:18:11,273 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-15 00:18:11,273 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 75 transitions. [2024-10-15 00:18:11,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:11,274 INFO L218 hiAutomatonCegarLoop]: Abstraction has 62 states and 75 transitions. [2024-10-15 00:18:11,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 75 transitions. [2024-10-15 00:18:11,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 34. [2024-10-15 00:18:11,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2352941176470589) internal successors, (42), 33 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:11,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-10-15 00:18:11,276 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-10-15 00:18:11,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-10-15 00:18:11,278 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-10-15 00:18:11,278 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-10-15 00:18:11,278 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 42 transitions. [2024-10-15 00:18:11,278 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:11,278 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:11,279 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:11,279 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:11,279 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:11,279 INFO L745 eck$LassoCheckResult]: Stem: 3054#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3055#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3056#L367 assume !(main_~length~0#1 < 1); 3045#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3046#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3047#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3057#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3060#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3058#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3059#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3063#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3064#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3073#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3072#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3071#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3070#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3069#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3068#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3066#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3067#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3065#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3048#L370-4 main_~j~0#1 := 0; 3049#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3061#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3062#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3052#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3053#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3078#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3077#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3076#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3075#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3050#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3051#L378-2 [2024-10-15 00:18:11,280 INFO L747 eck$LassoCheckResult]: Loop: 3051#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3074#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3051#L378-2 [2024-10-15 00:18:11,280 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:11,280 INFO L85 PathProgramCache]: Analyzing trace with hash 19338925, now seen corresponding path program 8 times [2024-10-15 00:18:11,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:11,280 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844915490] [2024-10-15 00:18:11,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:11,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:11,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:11,813 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:11,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:11,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844915490] [2024-10-15 00:18:11,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844915490] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:11,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1040761404] [2024-10-15 00:18:11,814 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-15 00:18:11,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:11,814 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:11,817 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:11,819 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2024-10-15 00:18:11,897 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-15 00:18:11,897 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:11,899 INFO L255 TraceCheckSpWp]: Trace formula consists of 163 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-10-15 00:18:11,900 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:12,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-15 00:18:12,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-15 00:18:12,354 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:12,354 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:12,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:18:12,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:18:12,567 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:12,567 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1040761404] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:12,567 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:12,567 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 30 [2024-10-15 00:18:12,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792797617] [2024-10-15 00:18:12,568 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:12,568 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:12,568 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:12,568 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 15 times [2024-10-15 00:18:12,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:12,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513976415] [2024-10-15 00:18:12,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:12,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:12,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:12,572 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:12,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:12,575 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:12,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:12,622 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2024-10-15 00:18:12,623 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=822, Unknown=0, NotChecked=0, Total=930 [2024-10-15 00:18:12,623 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. cyclomatic complexity: 11 Second operand has 31 states, 30 states have (on average 2.2) internal successors, (66), 31 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:12,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:12,996 INFO L93 Difference]: Finished difference Result 56 states and 69 transitions. [2024-10-15 00:18:12,996 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 69 transitions. [2024-10-15 00:18:12,997 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:18:12,997 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 55 states and 68 transitions. [2024-10-15 00:18:12,997 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-15 00:18:12,997 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-15 00:18:12,997 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 68 transitions. [2024-10-15 00:18:12,998 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:12,998 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 68 transitions. [2024-10-15 00:18:12,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 68 transitions. [2024-10-15 00:18:12,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 42. [2024-10-15 00:18:12,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2619047619047619) internal successors, (53), 41 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:13,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 53 transitions. [2024-10-15 00:18:13,000 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2024-10-15 00:18:13,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-15 00:18:13,002 INFO L425 stractBuchiCegarLoop]: Abstraction has 42 states and 53 transitions. [2024-10-15 00:18:13,002 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-10-15 00:18:13,002 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 53 transitions. [2024-10-15 00:18:13,002 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:13,002 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:13,002 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:13,003 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:13,003 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:13,003 INFO L745 eck$LassoCheckResult]: Stem: 3372#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3373#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3374#L367 assume !(main_~length~0#1 < 1); 3363#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3364#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3365#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3375#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3393#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3376#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3377#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3380#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3381#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3391#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3390#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3389#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3388#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3387#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3386#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3385#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3384#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3382#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3370#L370-4 main_~j~0#1 := 0; 3371#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3400#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3379#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3368#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3369#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3399#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3398#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3397#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3396#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3395#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3394#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3366#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3367#L378-2 [2024-10-15 00:18:13,003 INFO L747 eck$LassoCheckResult]: Loop: 3367#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3392#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3367#L378-2 [2024-10-15 00:18:13,006 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:13,006 INFO L85 PathProgramCache]: Analyzing trace with hash 1404837168, now seen corresponding path program 9 times [2024-10-15 00:18:13,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:13,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1579099446] [2024-10-15 00:18:13,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:13,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:13,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:13,254 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:13,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:13,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1579099446] [2024-10-15 00:18:13,254 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1579099446] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:13,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1684120637] [2024-10-15 00:18:13,254 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-15 00:18:13,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:13,254 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:13,257 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:13,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2024-10-15 00:18:13,363 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-10-15 00:18:13,364 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:13,366 INFO L255 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-10-15 00:18:13,367 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:13,570 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:13,571 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:13,701 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:13,702 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1684120637] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:13,702 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:13,702 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 23 [2024-10-15 00:18:13,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438574699] [2024-10-15 00:18:13,702 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:13,703 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:13,703 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:13,703 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 16 times [2024-10-15 00:18:13,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:13,703 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909095632] [2024-10-15 00:18:13,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:13,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:13,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:13,707 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:13,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:13,710 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:13,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:13,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-10-15 00:18:13,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=382, Unknown=0, NotChecked=0, Total=506 [2024-10-15 00:18:13,761 INFO L87 Difference]: Start difference. First operand 42 states and 53 transitions. cyclomatic complexity: 15 Second operand has 23 states, 23 states have (on average 2.3043478260869565) internal successors, (53), 23 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:13,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:13,859 INFO L93 Difference]: Finished difference Result 59 states and 71 transitions. [2024-10-15 00:18:13,859 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 71 transitions. [2024-10-15 00:18:13,859 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:13,860 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 47 states and 59 transitions. [2024-10-15 00:18:13,860 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-15 00:18:13,860 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-15 00:18:13,860 INFO L73 IsDeterministic]: Start isDeterministic. Operand 47 states and 59 transitions. [2024-10-15 00:18:13,860 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:13,860 INFO L218 hiAutomatonCegarLoop]: Abstraction has 47 states and 59 transitions. [2024-10-15 00:18:13,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states and 59 transitions. [2024-10-15 00:18:13,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 44. [2024-10-15 00:18:13,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.25) internal successors, (55), 43 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:13,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 55 transitions. [2024-10-15 00:18:13,866 INFO L240 hiAutomatonCegarLoop]: Abstraction has 44 states and 55 transitions. [2024-10-15 00:18:13,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-10-15 00:18:13,867 INFO L425 stractBuchiCegarLoop]: Abstraction has 44 states and 55 transitions. [2024-10-15 00:18:13,868 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-10-15 00:18:13,868 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 55 transitions. [2024-10-15 00:18:13,869 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:13,869 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:13,869 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:13,870 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:13,870 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:13,871 INFO L745 eck$LassoCheckResult]: Stem: 3697#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3698#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3699#L367 assume !(main_~length~0#1 < 1); 3688#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3689#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3690#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3700#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3703#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3701#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3702#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3731#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3730#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3729#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3728#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3727#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3726#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3725#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3724#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3723#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3722#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3721#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3716#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3720#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3717#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3714#L370-4 main_~j~0#1 := 0; 3713#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3704#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3712#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3711#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3710#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3709#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3708#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3706#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3705#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3693#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3694#L378-2 [2024-10-15 00:18:13,871 INFO L747 eck$LassoCheckResult]: Loop: 3694#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3707#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3694#L378-2 [2024-10-15 00:18:13,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:13,875 INFO L85 PathProgramCache]: Analyzing trace with hash -242230295, now seen corresponding path program 4 times [2024-10-15 00:18:13,875 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:13,876 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613518219] [2024-10-15 00:18:13,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:13,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:13,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:14,652 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:14,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:14,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613518219] [2024-10-15 00:18:14,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1613518219] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:14,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [517111596] [2024-10-15 00:18:14,653 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-15 00:18:14,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:14,653 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:14,656 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:14,657 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2024-10-15 00:18:14,745 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-15 00:18:14,746 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:14,748 INFO L255 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-10-15 00:18:14,750 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:14,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-15 00:18:14,838 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-15 00:18:14,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 17 [2024-10-15 00:18:14,855 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-15 00:18:14,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2024-10-15 00:18:15,214 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-15 00:18:15,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 14 [2024-10-15 00:18:15,236 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:15,237 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:15,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:18:15,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:18:15,451 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 69 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-15 00:18:15,451 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [517111596] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:15,451 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:15,451 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 15] total 26 [2024-10-15 00:18:15,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513765190] [2024-10-15 00:18:15,452 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:15,452 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:15,452 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:15,452 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 17 times [2024-10-15 00:18:15,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:15,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1234170159] [2024-10-15 00:18:15,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:15,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:15,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:15,456 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:15,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:15,462 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:15,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:15,519 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-15 00:18:15,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=601, Unknown=0, NotChecked=0, Total=702 [2024-10-15 00:18:15,520 INFO L87 Difference]: Start difference. First operand 44 states and 55 transitions. cyclomatic complexity: 15 Second operand has 27 states, 26 states have (on average 2.1923076923076925) internal successors, (57), 27 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:16,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:16,106 INFO L93 Difference]: Finished difference Result 73 states and 87 transitions. [2024-10-15 00:18:16,106 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 87 transitions. [2024-10-15 00:18:16,107 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:18:16,107 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 71 states and 85 transitions. [2024-10-15 00:18:16,107 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-15 00:18:16,107 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-15 00:18:16,108 INFO L73 IsDeterministic]: Start isDeterministic. Operand 71 states and 85 transitions. [2024-10-15 00:18:16,108 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:16,108 INFO L218 hiAutomatonCegarLoop]: Abstraction has 71 states and 85 transitions. [2024-10-15 00:18:16,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states and 85 transitions. [2024-10-15 00:18:16,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 39. [2024-10-15 00:18:16,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.2307692307692308) internal successors, (48), 38 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:16,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 48 transitions. [2024-10-15 00:18:16,112 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 48 transitions. [2024-10-15 00:18:16,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-10-15 00:18:16,113 INFO L425 stractBuchiCegarLoop]: Abstraction has 39 states and 48 transitions. [2024-10-15 00:18:16,113 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-10-15 00:18:16,114 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 48 transitions. [2024-10-15 00:18:16,114 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:16,114 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:16,114 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:16,114 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:16,114 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:16,115 INFO L745 eck$LassoCheckResult]: Stem: 4063#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4064#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4062#L367 assume !(main_~length~0#1 < 1); 4053#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4054#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4055#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4065#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4084#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4066#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4067#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4068#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4071#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4083#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4082#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4081#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4080#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4079#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4078#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4077#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4076#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4075#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4073#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4074#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4072#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4056#L370-4 main_~j~0#1 := 0; 4057#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4069#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4070#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4060#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4061#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4091#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4090#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4089#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4088#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4087#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4086#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4058#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4059#L378-2 [2024-10-15 00:18:16,115 INFO L747 eck$LassoCheckResult]: Loop: 4059#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4085#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4059#L378-2 [2024-10-15 00:18:16,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:16,115 INFO L85 PathProgramCache]: Analyzing trace with hash -1876148438, now seen corresponding path program 10 times [2024-10-15 00:18:16,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:16,115 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834353508] [2024-10-15 00:18:16,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:16,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:16,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:16,725 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:16,726 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:16,726 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834353508] [2024-10-15 00:18:16,726 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834353508] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:16,726 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1151206263] [2024-10-15 00:18:16,726 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-15 00:18:16,726 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:16,726 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:16,729 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:16,730 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2024-10-15 00:18:16,816 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-15 00:18:16,816 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:16,818 INFO L255 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-10-15 00:18:16,820 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:16,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-15 00:18:17,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2024-10-15 00:18:17,098 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:17,098 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:17,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:18:17,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:18:17,342 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:17,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1151206263] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:17,342 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:17,342 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 25 [2024-10-15 00:18:17,342 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1214852922] [2024-10-15 00:18:17,343 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:17,343 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:17,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:17,343 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 18 times [2024-10-15 00:18:17,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:17,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054008777] [2024-10-15 00:18:17,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:17,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:17,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:17,347 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:17,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:17,350 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:17,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:17,429 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-10-15 00:18:17,430 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=577, Unknown=0, NotChecked=0, Total=650 [2024-10-15 00:18:17,430 INFO L87 Difference]: Start difference. First operand 39 states and 48 transitions. cyclomatic complexity: 12 Second operand has 26 states, 25 states have (on average 2.2) internal successors, (55), 26 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:17,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:17,940 INFO L93 Difference]: Finished difference Result 63 states and 77 transitions. [2024-10-15 00:18:17,940 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 77 transitions. [2024-10-15 00:18:17,940 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:18:17,941 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 62 states and 76 transitions. [2024-10-15 00:18:17,941 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-15 00:18:17,941 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-15 00:18:17,941 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 76 transitions. [2024-10-15 00:18:17,942 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:17,942 INFO L218 hiAutomatonCegarLoop]: Abstraction has 62 states and 76 transitions. [2024-10-15 00:18:17,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 76 transitions. [2024-10-15 00:18:17,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 47. [2024-10-15 00:18:17,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.2553191489361701) internal successors, (59), 46 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:17,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 59 transitions. [2024-10-15 00:18:17,944 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 59 transitions. [2024-10-15 00:18:17,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-10-15 00:18:17,945 INFO L425 stractBuchiCegarLoop]: Abstraction has 47 states and 59 transitions. [2024-10-15 00:18:17,945 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-10-15 00:18:17,945 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 59 transitions. [2024-10-15 00:18:17,946 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:17,946 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:17,946 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:17,946 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:17,947 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:17,947 INFO L745 eck$LassoCheckResult]: Stem: 4413#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4414#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4415#L367 assume !(main_~length~0#1 < 1); 4404#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4405#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4406#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4416#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4436#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4417#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4418#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4419#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4422#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4435#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4434#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4433#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4432#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4431#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4430#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4429#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4428#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4427#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4426#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4425#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4423#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4407#L370-4 main_~j~0#1 := 0; 4408#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4446#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4421#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4411#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4412#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4445#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4444#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4443#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4442#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4441#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4440#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4439#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4438#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4409#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4410#L378-2 [2024-10-15 00:18:17,947 INFO L747 eck$LassoCheckResult]: Loop: 4410#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4437#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4410#L378-2 [2024-10-15 00:18:17,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:17,948 INFO L85 PathProgramCache]: Analyzing trace with hash 907614829, now seen corresponding path program 11 times [2024-10-15 00:18:17,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:17,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905293907] [2024-10-15 00:18:17,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:17,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:17,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:18,216 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 31 proven. 62 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:18,216 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:18,217 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905293907] [2024-10-15 00:18:18,217 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905293907] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:18,217 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1507622613] [2024-10-15 00:18:18,217 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-15 00:18:18,217 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:18,217 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:18,220 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:18,221 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2024-10-15 00:18:18,369 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2024-10-15 00:18:18,369 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:18,371 INFO L255 TraceCheckSpWp]: Trace formula consists of 202 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-10-15 00:18:18,372 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:18,565 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 42 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:18,566 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:18,693 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 36 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:18,693 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1507622613] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:18,693 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:18,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 26 [2024-10-15 00:18:18,694 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [882331496] [2024-10-15 00:18:18,694 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:18,694 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:18,694 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:18,694 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 19 times [2024-10-15 00:18:18,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:18,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1426228524] [2024-10-15 00:18:18,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:18,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:18,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:18,704 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:18,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:18,707 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:18,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:18,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-10-15 00:18:18,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=493, Unknown=0, NotChecked=0, Total=650 [2024-10-15 00:18:18,760 INFO L87 Difference]: Start difference. First operand 47 states and 59 transitions. cyclomatic complexity: 16 Second operand has 26 states, 26 states have (on average 2.269230769230769) internal successors, (59), 26 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:18,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:18:18,856 INFO L93 Difference]: Finished difference Result 66 states and 79 transitions. [2024-10-15 00:18:18,857 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 79 transitions. [2024-10-15 00:18:18,857 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:18,857 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 52 states and 65 transitions. [2024-10-15 00:18:18,857 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-15 00:18:18,857 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-15 00:18:18,858 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 65 transitions. [2024-10-15 00:18:18,858 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-15 00:18:18,858 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 65 transitions. [2024-10-15 00:18:18,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 65 transitions. [2024-10-15 00:18:18,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 49. [2024-10-15 00:18:18,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.2448979591836735) internal successors, (61), 48 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:18,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 61 transitions. [2024-10-15 00:18:18,859 INFO L240 hiAutomatonCegarLoop]: Abstraction has 49 states and 61 transitions. [2024-10-15 00:18:18,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-10-15 00:18:18,860 INFO L425 stractBuchiCegarLoop]: Abstraction has 49 states and 61 transitions. [2024-10-15 00:18:18,860 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-10-15 00:18:18,861 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 61 transitions. [2024-10-15 00:18:18,861 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:18:18,861 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:18:18,861 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:18:18,862 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:18:18,862 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:18:18,863 INFO L745 eck$LassoCheckResult]: Stem: 4783#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4784#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4785#L367 assume !(main_~length~0#1 < 1); 4774#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4775#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4776#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4786#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4789#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4787#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4788#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4822#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4821#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4820#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4819#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4818#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4817#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4816#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4815#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4814#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4813#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4812#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4811#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4810#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4809#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4804#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4808#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4805#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4802#L370-4 main_~j~0#1 := 0; 4801#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4790#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4800#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4799#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4798#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4797#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4796#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4795#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4794#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4792#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4791#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4779#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4780#L378-2 [2024-10-15 00:18:18,863 INFO L747 eck$LassoCheckResult]: Loop: 4780#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4793#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4780#L378-2 [2024-10-15 00:18:18,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:18,863 INFO L85 PathProgramCache]: Analyzing trace with hash 168453938, now seen corresponding path program 5 times [2024-10-15 00:18:18,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:18,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630449353] [2024-10-15 00:18:18,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:18,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:18,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:18:19,602 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:19,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:18:19,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630449353] [2024-10-15 00:18:19,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [630449353] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:18:19,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1057957751] [2024-10-15 00:18:19,602 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-15 00:18:19,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:18:19,603 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:18:19,606 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:18:19,607 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2024-10-15 00:18:19,716 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2024-10-15 00:18:19,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:18:19,718 INFO L255 TraceCheckSpWp]: Trace formula consists of 212 conjuncts, 42 conjuncts are in the unsatisfiable core [2024-10-15 00:18:19,720 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:18:19,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-15 00:18:19,986 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-15 00:18:19,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-10-15 00:18:19,997 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-15 00:18:19,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2024-10-15 00:18:20,505 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-15 00:18:20,507 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-15 00:18:20,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 12 [2024-10-15 00:18:20,524 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:18:20,524 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:18:20,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2024-10-15 00:18:20,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-10-15 00:18:20,822 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 98 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-15 00:18:20,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1057957751] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:18:20,822 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:18:20,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 20, 18] total 40 [2024-10-15 00:18:20,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011800509] [2024-10-15 00:18:20,823 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:18:20,823 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:18:20,823 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:18:20,823 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 20 times [2024-10-15 00:18:20,823 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:18:20,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024850209] [2024-10-15 00:18:20,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:18:20,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:18:20,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:20,831 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:18:20,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:18:20,835 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:18:20,886 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:18:20,886 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-10-15 00:18:20,887 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=176, Invalid=1464, Unknown=0, NotChecked=0, Total=1640 [2024-10-15 00:18:20,887 INFO L87 Difference]: Start difference. First operand 49 states and 61 transitions. cyclomatic complexity: 16 Second operand has 41 states, 40 states have (on average 2.075) internal successors, (83), 41 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:18:46,235 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0]