./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-examples/standard_sentinel-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 61a67961 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-examples/standard_sentinel-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 --- Real Ultimate output --- This is Ultimate 0.2.5-wip.fs.cvc5-61a6796-m [2024-10-15 00:19:21,782 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-15 00:19:21,864 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-15 00:19:21,869 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-15 00:19:21,869 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-15 00:19:21,889 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-15 00:19:21,890 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-15 00:19:21,890 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-15 00:19:21,891 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-15 00:19:21,891 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-15 00:19:21,892 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-15 00:19:21,892 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-15 00:19:21,893 INFO L153 SettingsManager]: * Use SBE=true [2024-10-15 00:19:21,895 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-15 00:19:21,896 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-15 00:19:21,896 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-15 00:19:21,897 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-15 00:19:21,897 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-15 00:19:21,897 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-15 00:19:21,898 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-15 00:19:21,898 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-15 00:19:21,901 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-15 00:19:21,901 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-15 00:19:21,901 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-15 00:19:21,902 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-15 00:19:21,902 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-15 00:19:21,902 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-15 00:19:21,903 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-15 00:19:21,903 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-15 00:19:21,903 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-15 00:19:21,903 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-15 00:19:21,904 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-15 00:19:21,904 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-15 00:19:21,904 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-15 00:19:21,905 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-15 00:19:21,905 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-15 00:19:21,905 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-15 00:19:21,906 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-15 00:19:21,906 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-15 00:19:21,907 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 [2024-10-15 00:19:22,189 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-15 00:19:22,220 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-15 00:19:22,224 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-15 00:19:22,225 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-15 00:19:22,226 INFO L274 PluginConnector]: CDTParser initialized [2024-10-15 00:19:22,228 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-examples/standard_sentinel-2.i [2024-10-15 00:19:23,703 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-15 00:19:23,914 INFO L384 CDTParser]: Found 1 translation units. [2024-10-15 00:19:23,915 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-examples/standard_sentinel-2.i [2024-10-15 00:19:23,923 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7bbe2966b/1fd248205d924a5fa34f913f3eac8f20/FLAGb143788a4 [2024-10-15 00:19:23,937 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7bbe2966b/1fd248205d924a5fa34f913f3eac8f20 [2024-10-15 00:19:23,940 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-15 00:19:23,941 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-15 00:19:23,942 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-15 00:19:23,942 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-15 00:19:23,948 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-15 00:19:23,949 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.10 12:19:23" (1/1) ... [2024-10-15 00:19:23,950 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@64c9f5b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:23, skipping insertion in model container [2024-10-15 00:19:23,950 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.10 12:19:23" (1/1) ... [2024-10-15 00:19:23,972 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-15 00:19:24,132 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-15 00:19:24,145 INFO L200 MainTranslator]: Completed pre-run [2024-10-15 00:19:24,167 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-15 00:19:24,195 INFO L204 MainTranslator]: Completed translation [2024-10-15 00:19:24,195 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24 WrapperNode [2024-10-15 00:19:24,196 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-15 00:19:24,197 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-15 00:19:24,197 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-15 00:19:24,197 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-15 00:19:24,204 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,214 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,236 INFO L138 Inliner]: procedures = 16, calls = 14, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 53 [2024-10-15 00:19:24,237 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-15 00:19:24,238 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-15 00:19:24,238 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-15 00:19:24,238 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-15 00:19:24,248 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,248 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,250 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,262 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 2 writes are split as follows [0, 2]. [2024-10-15 00:19:24,262 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,263 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,267 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,270 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,273 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,274 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,275 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-15 00:19:24,277 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-15 00:19:24,277 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-15 00:19:24,277 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-15 00:19:24,278 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (1/1) ... [2024-10-15 00:19:24,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:19:24,295 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:24,316 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:19:24,320 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-15 00:19:24,367 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-15 00:19:24,368 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-15 00:19:24,368 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-10-15 00:19:24,368 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-15 00:19:24,368 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-15 00:19:24,368 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-10-15 00:19:24,369 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-15 00:19:24,369 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-15 00:19:24,369 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-15 00:19:24,369 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-10-15 00:19:24,369 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-15 00:19:24,446 INFO L238 CfgBuilder]: Building ICFG [2024-10-15 00:19:24,448 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-15 00:19:24,613 INFO L? ?]: Removed 10 outVars from TransFormulas that were not future-live. [2024-10-15 00:19:24,613 INFO L287 CfgBuilder]: Performing block encoding [2024-10-15 00:19:24,629 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-15 00:19:24,629 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-15 00:19:24,630 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.10 12:19:24 BoogieIcfgContainer [2024-10-15 00:19:24,630 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-15 00:19:24,632 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-15 00:19:24,632 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-15 00:19:24,635 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-15 00:19:24,636 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-15 00:19:24,637 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 15.10 12:19:23" (1/3) ... [2024-10-15 00:19:24,638 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2f0c216f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 15.10 12:19:24, skipping insertion in model container [2024-10-15 00:19:24,638 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-15 00:19:24,639 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.10 12:19:24" (2/3) ... [2024-10-15 00:19:24,639 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2f0c216f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 15.10 12:19:24, skipping insertion in model container [2024-10-15 00:19:24,639 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-15 00:19:24,640 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.10 12:19:24" (3/3) ... [2024-10-15 00:19:24,642 INFO L332 chiAutomizerObserver]: Analyzing ICFG standard_sentinel-2.i [2024-10-15 00:19:24,700 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-15 00:19:24,700 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-15 00:19:24,700 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-15 00:19:24,701 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-15 00:19:24,702 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-15 00:19:24,702 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-15 00:19:24,702 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-15 00:19:24,702 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-15 00:19:24,737 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:24,761 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:19:24,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:24,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:24,770 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-15 00:19:24,770 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:24,770 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-15 00:19:24,771 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:24,773 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-15 00:19:24,774 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:24,774 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:24,774 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-15 00:19:24,774 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:24,781 INFO L745 eck$LassoCheckResult]: Stem: 14#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 11#L20-3true [2024-10-15 00:19:24,782 INFO L747 eck$LassoCheckResult]: Loop: 11#L20-3true assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12#L20-2true main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11#L20-3true [2024-10-15 00:19:24,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:24,791 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-15 00:19:24,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:24,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369090939] [2024-10-15 00:19:24,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:24,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:24,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:24,936 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:24,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:24,964 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:24,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:24,967 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-10-15 00:19:24,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:24,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379041478] [2024-10-15 00:19:24,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:24,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:24,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:24,982 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:24,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:24,999 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:25,001 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:25,001 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-10-15 00:19:25,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:25,001 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280382652] [2024-10-15 00:19:25,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:25,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:25,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:25,027 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:25,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:25,052 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:25,443 INFO L204 LassoAnalysis]: Preferences: [2024-10-15 00:19:25,444 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-15 00:19:25,444 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-15 00:19:25,444 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-15 00:19:25,445 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-15 00:19:25,445 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:19:25,445 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-15 00:19:25,446 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-15 00:19:25,446 INFO L132 ssoRankerPreferences]: Filename of dumped script: standard_sentinel-2.i_Iteration1_Lasso [2024-10-15 00:19:25,446 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-15 00:19:25,446 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-15 00:19:25,466 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,697 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,700 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,713 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,716 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,718 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,722 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,725 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,729 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,733 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,736 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-15 00:19:25,955 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-15 00:19:25,959 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-15 00:19:25,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:19:25,961 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:25,964 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:19:25,965 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-15 00:19:25,967 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:19:25,983 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:19:25,983 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:19:25,984 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:19:25,984 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:19:25,990 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-15 00:19:25,990 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-15 00:19:25,996 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:19:26,016 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-15 00:19:26,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:19:26,017 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:26,018 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:19:26,019 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-15 00:19:26,020 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:19:26,034 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:19:26,034 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:19:26,034 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:19:26,034 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:19:26,039 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-15 00:19:26,039 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-15 00:19:26,050 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-15 00:19:26,068 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-10-15 00:19:26,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:19:26,069 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:26,071 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:19:26,073 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-15 00:19:26,074 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-15 00:19:26,088 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-15 00:19:26,088 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-15 00:19:26,088 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-15 00:19:26,089 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-15 00:19:26,095 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-15 00:19:26,095 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-15 00:19:26,107 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-15 00:19:26,134 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2024-10-15 00:19:26,135 INFO L444 ModelExtractionUtils]: 4 out of 13 variables were initially zero. Simplification set additionally 6 variables to zero. [2024-10-15 00:19:26,137 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-15 00:19:26,137 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:26,146 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-15 00:19:26,147 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-10-15 00:19:26,149 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-15 00:19:26,164 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-15 00:19:26,165 INFO L474 LassoAnalysis]: Proved termination. [2024-10-15 00:19:26,165 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-10-15 00:19:26,182 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-10-15 00:19:26,203 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2024-10-15 00:19:26,217 WARN L953 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-15 00:19:26,221 WARN L953 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-15 00:19:26,258 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:26,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:26,283 INFO L255 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-15 00:19:26,284 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:19:26,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:26,308 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-15 00:19:26,309 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:19:26,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:26,386 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-15 00:19:26,389 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:26,443 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 34 states and 47 transitions. Complement of second has 6 states. [2024-10-15 00:19:26,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-15 00:19:26,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:26,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 23 transitions. [2024-10-15 00:19:26,455 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 2 letters. Loop has 2 letters. [2024-10-15 00:19:26,455 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:19:26,456 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 4 letters. Loop has 2 letters. [2024-10-15 00:19:26,457 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:19:26,457 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 2 letters. Loop has 4 letters. [2024-10-15 00:19:26,457 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-15 00:19:26,458 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 47 transitions. [2024-10-15 00:19:26,461 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:26,466 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 9 states and 11 transitions. [2024-10-15 00:19:26,467 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-15 00:19:26,468 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-15 00:19:26,468 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions. [2024-10-15 00:19:26,468 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:19:26,469 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-10-15 00:19:26,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions. [2024-10-15 00:19:26,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2024-10-15 00:19:26,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:26,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2024-10-15 00:19:26,496 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-10-15 00:19:26,496 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-10-15 00:19:26,497 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-15 00:19:26,497 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 11 transitions. [2024-10-15 00:19:26,498 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:26,498 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:26,498 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:26,499 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2024-10-15 00:19:26,499 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:26,499 INFO L745 eck$LassoCheckResult]: Stem: 111#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 112#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 104#L20-3 assume !(main_~i~0#1 < 100000); 105#L20-4 havoc main_~i~0#1; 110#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 109#L28-3 [2024-10-15 00:19:26,500 INFO L747 eck$LassoCheckResult]: Loop: 109#L28-3 call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 108#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 109#L28-3 [2024-10-15 00:19:26,501 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:26,501 INFO L85 PathProgramCache]: Analyzing trace with hash 28696936, now seen corresponding path program 1 times [2024-10-15 00:19:26,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:26,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1726608721] [2024-10-15 00:19:26,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:26,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:26,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:26,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:26,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:19:26,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1726608721] [2024-10-15 00:19:26,611 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1726608721] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-15 00:19:26,611 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-15 00:19:26,612 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-15 00:19:26,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337986120] [2024-10-15 00:19:26,613 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-15 00:19:26,615 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:19:26,616 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:26,616 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 1 times [2024-10-15 00:19:26,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:26,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127481111] [2024-10-15 00:19:26,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:26,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:26,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:26,631 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:26,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:26,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:26,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:19:26,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-15 00:19:26,691 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-15 00:19:26,692 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:26,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:19:26,707 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2024-10-15 00:19:26,708 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2024-10-15 00:19:26,708 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:26,708 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2024-10-15 00:19:26,709 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-15 00:19:26,709 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-15 00:19:26,709 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2024-10-15 00:19:26,709 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:19:26,709 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-10-15 00:19:26,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2024-10-15 00:19:26,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2024-10-15 00:19:26,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:26,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2024-10-15 00:19:26,712 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-15 00:19:26,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-15 00:19:26,713 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-15 00:19:26,714 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-15 00:19:26,715 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2024-10-15 00:19:26,715 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:26,715 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:26,716 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:26,716 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-15 00:19:26,716 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:26,716 INFO L745 eck$LassoCheckResult]: Stem: 136#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 137#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 131#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 132#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 133#L20-3 assume !(main_~i~0#1 < 100000); 134#L20-4 havoc main_~i~0#1; 135#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 130#L28-3 [2024-10-15 00:19:26,717 INFO L747 eck$LassoCheckResult]: Loop: 130#L28-3 call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 129#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 130#L28-3 [2024-10-15 00:19:26,738 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:26,738 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669542, now seen corresponding path program 1 times [2024-10-15 00:19:26,738 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:26,738 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802585044] [2024-10-15 00:19:26,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:26,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:26,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:26,787 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-10-15 00:19:26,840 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:26,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:19:26,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802585044] [2024-10-15 00:19:26,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802585044] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:19:26,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1917767660] [2024-10-15 00:19:26,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:26,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:19:26,842 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:26,844 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:19:26,845 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-15 00:19:26,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:26,890 INFO L255 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-15 00:19:26,891 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:19:26,903 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:26,904 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:19:26,926 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:26,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1917767660] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:19:26,928 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:19:26,928 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-10-15 00:19:26,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [662151029] [2024-10-15 00:19:26,928 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:19:26,929 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:19:26,930 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:26,930 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 2 times [2024-10-15 00:19:26,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:26,931 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066958378] [2024-10-15 00:19:26,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:26,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:26,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:26,938 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:26,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:26,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:26,988 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:19:26,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-15 00:19:26,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-15 00:19:26,989 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:27,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:19:27,017 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2024-10-15 00:19:27,017 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2024-10-15 00:19:27,017 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:27,018 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2024-10-15 00:19:27,018 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-15 00:19:27,018 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-15 00:19:27,018 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2024-10-15 00:19:27,018 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:19:27,018 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-15 00:19:27,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2024-10-15 00:19:27,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2024-10-15 00:19:27,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:27,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2024-10-15 00:19:27,022 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-15 00:19:27,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-15 00:19:27,023 INFO L425 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-15 00:19:27,023 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-15 00:19:27,023 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2024-10-15 00:19:27,024 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:27,024 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:27,024 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:27,024 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1] [2024-10-15 00:19:27,025 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:27,026 INFO L745 eck$LassoCheckResult]: Stem: 207#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 208#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 199#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 200#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 201#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 202#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 203#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 213#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 212#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 211#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 210#L20-3 assume !(main_~i~0#1 < 100000); 209#L20-4 havoc main_~i~0#1; 206#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 205#L28-3 [2024-10-15 00:19:27,026 INFO L747 eck$LassoCheckResult]: Loop: 205#L28-3 call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 204#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 205#L28-3 [2024-10-15 00:19:27,026 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:27,026 INFO L85 PathProgramCache]: Analyzing trace with hash 82232672, now seen corresponding path program 2 times [2024-10-15 00:19:27,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:27,027 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [560588241] [2024-10-15 00:19:27,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:27,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:27,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:27,143 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:27,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:19:27,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [560588241] [2024-10-15 00:19:27,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [560588241] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:19:27,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1792553264] [2024-10-15 00:19:27,144 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-15 00:19:27,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:19:27,145 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:27,147 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:19:27,148 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-15 00:19:27,213 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-15 00:19:27,214 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:19:27,215 INFO L255 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-15 00:19:27,216 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:19:27,246 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:27,246 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:19:27,321 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:27,322 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1792553264] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:19:27,322 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:19:27,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-10-15 00:19:27,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589995890] [2024-10-15 00:19:27,323 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:19:27,324 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:19:27,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:27,324 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 3 times [2024-10-15 00:19:27,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:27,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301842606] [2024-10-15 00:19:27,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:27,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:27,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:27,329 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:27,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:27,332 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:27,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:19:27,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-15 00:19:27,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-10-15 00:19:27,387 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 2.0) internal successors, (26), 13 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:27,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:19:27,427 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2024-10-15 00:19:27,427 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2024-10-15 00:19:27,428 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:27,428 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2024-10-15 00:19:27,429 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-15 00:19:27,429 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-15 00:19:27,429 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2024-10-15 00:19:27,429 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:19:27,429 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-15 00:19:27,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2024-10-15 00:19:27,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2024-10-15 00:19:27,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:27,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2024-10-15 00:19:27,436 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-15 00:19:27,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-15 00:19:27,437 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-15 00:19:27,437 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-15 00:19:27,437 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2024-10-15 00:19:27,438 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:27,438 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:27,438 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:27,439 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1] [2024-10-15 00:19:27,439 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:27,439 INFO L745 eck$LassoCheckResult]: Stem: 337#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 338#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 329#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 330#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 331#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 332#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 333#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 355#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 354#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 353#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 352#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 351#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 350#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 349#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 348#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 347#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 346#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 345#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 344#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 343#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 342#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 341#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 340#L20-3 assume !(main_~i~0#1 < 100000); 339#L20-4 havoc main_~i~0#1; 336#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 335#L28-3 [2024-10-15 00:19:27,439 INFO L747 eck$LassoCheckResult]: Loop: 335#L28-3 call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 334#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 335#L28-3 [2024-10-15 00:19:27,441 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:27,442 INFO L85 PathProgramCache]: Analyzing trace with hash 1520933460, now seen corresponding path program 3 times [2024-10-15 00:19:27,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:27,442 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078439460] [2024-10-15 00:19:27,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:27,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:27,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:27,761 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:27,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:19:27,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078439460] [2024-10-15 00:19:27,763 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078439460] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:19:27,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1503080394] [2024-10-15 00:19:27,763 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-15 00:19:27,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:19:27,763 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:27,767 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:19:27,769 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-15 00:19:27,898 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-10-15 00:19:27,899 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:19:27,900 INFO L255 TraceCheckSpWp]: Trace formula consists of 155 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-15 00:19:27,902 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:19:27,961 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:27,961 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:19:28,227 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:28,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1503080394] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:19:28,228 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:19:28,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-10-15 00:19:28,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044113980] [2024-10-15 00:19:28,228 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:19:28,229 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:19:28,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:28,229 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 4 times [2024-10-15 00:19:28,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:28,229 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399873003] [2024-10-15 00:19:28,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:28,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:28,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:28,238 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:28,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:28,242 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:28,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:19:28,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-15 00:19:28,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-10-15 00:19:28,280 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 25 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:28,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:19:28,355 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2024-10-15 00:19:28,355 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2024-10-15 00:19:28,356 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:28,357 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2024-10-15 00:19:28,357 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-15 00:19:28,357 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-15 00:19:28,357 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2024-10-15 00:19:28,358 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:19:28,358 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-15 00:19:28,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2024-10-15 00:19:28,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2024-10-15 00:19:28,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:28,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2024-10-15 00:19:28,361 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-15 00:19:28,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-15 00:19:28,363 INFO L425 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-15 00:19:28,363 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-15 00:19:28,363 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2024-10-15 00:19:28,364 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:28,364 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:28,364 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:28,365 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1] [2024-10-15 00:19:28,365 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:28,365 INFO L745 eck$LassoCheckResult]: Stem: 587#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 588#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 579#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 580#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 581#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 582#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 583#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 629#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 628#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 627#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 626#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 625#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 624#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 623#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 622#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 621#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 620#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 619#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 618#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 617#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 616#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 615#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 614#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 613#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 612#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 611#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 610#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 609#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 608#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 607#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 606#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 605#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 604#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 603#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 602#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 601#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 600#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 599#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 598#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 597#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 596#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 595#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 594#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 593#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 592#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 591#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 590#L20-3 assume !(main_~i~0#1 < 100000); 589#L20-4 havoc main_~i~0#1; 586#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 585#L28-3 [2024-10-15 00:19:28,365 INFO L747 eck$LassoCheckResult]: Loop: 585#L28-3 call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 584#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 585#L28-3 [2024-10-15 00:19:28,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:28,366 INFO L85 PathProgramCache]: Analyzing trace with hash -96806340, now seen corresponding path program 4 times [2024-10-15 00:19:28,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:28,367 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669033891] [2024-10-15 00:19:28,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:28,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:28,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:29,080 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:29,081 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:19:29,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [669033891] [2024-10-15 00:19:29,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [669033891] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:19:29,082 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1991156022] [2024-10-15 00:19:29,082 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-15 00:19:29,082 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:19:29,082 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:29,084 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:19:29,086 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-15 00:19:29,195 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-15 00:19:29,196 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:19:29,202 INFO L255 TraceCheckSpWp]: Trace formula consists of 287 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-10-15 00:19:29,206 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:19:29,300 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:29,300 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:19:30,157 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:30,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1991156022] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:19:30,157 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:19:30,158 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-10-15 00:19:30,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097956751] [2024-10-15 00:19:30,158 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:19:30,158 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:19:30,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:30,159 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 5 times [2024-10-15 00:19:30,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:30,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87727120] [2024-10-15 00:19:30,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:30,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:30,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:30,167 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:19:30,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:19:30,171 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:19:30,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:19:30,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-10-15 00:19:30,207 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-10-15 00:19:30,208 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 2.0) internal successors, (98), 49 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:30,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:19:30,403 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2024-10-15 00:19:30,403 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2024-10-15 00:19:30,405 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:30,406 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2024-10-15 00:19:30,406 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-15 00:19:30,407 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-15 00:19:30,407 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2024-10-15 00:19:30,407 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:19:30,407 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-15 00:19:30,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2024-10-15 00:19:30,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2024-10-15 00:19:30,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:19:30,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2024-10-15 00:19:30,413 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-15 00:19:30,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-10-15 00:19:30,416 INFO L425 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-15 00:19:30,416 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-15 00:19:30,416 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2024-10-15 00:19:30,417 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:19:30,417 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:19:30,417 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:19:30,420 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1] [2024-10-15 00:19:30,421 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:19:30,421 INFO L745 eck$LassoCheckResult]: Stem: 1077#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 1078#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 1069#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1070#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1071#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1072#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1073#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1167#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1166#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1165#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1164#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1163#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1162#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1161#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1160#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1159#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1158#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1157#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1156#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1155#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1154#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1153#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1152#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1151#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1150#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1149#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1148#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1147#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1146#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1145#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1144#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1143#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1142#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1141#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1140#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1139#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1138#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1137#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1136#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1135#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1134#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1133#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1132#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1131#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1130#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1129#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1128#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1127#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1126#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1125#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1124#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1123#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1122#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1121#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1120#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1119#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1118#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1117#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1116#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1115#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1114#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1113#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1112#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1111#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1110#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1109#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1108#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1107#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1106#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1105#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1104#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1103#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1102#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1101#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1100#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1099#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1098#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1097#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1096#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1095#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1094#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1093#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1092#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1091#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1090#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1089#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1088#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1087#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1086#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1085#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1084#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1083#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1082#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1081#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1080#L20-3 assume !(main_~i~0#1 < 100000); 1079#L20-4 havoc main_~i~0#1; 1076#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 1075#L28-3 [2024-10-15 00:19:30,421 INFO L747 eck$LassoCheckResult]: Loop: 1075#L28-3 call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 1074#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 1075#L28-3 [2024-10-15 00:19:30,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:19:30,422 INFO L85 PathProgramCache]: Analyzing trace with hash -21777908, now seen corresponding path program 5 times [2024-10-15 00:19:30,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:19:30,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517215444] [2024-10-15 00:19:30,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:19:30,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:19:30,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:19:32,783 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:19:32,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:19:32,784 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [517215444] [2024-10-15 00:19:32,784 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [517215444] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:19:32,784 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1491691864] [2024-10-15 00:19:32,784 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-15 00:19:32,784 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:19:32,784 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:19:32,786 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:19:32,788 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-15 00:20:12,978 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-10-15 00:20:12,978 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-15 00:20:13,003 INFO L255 TraceCheckSpWp]: Trace formula consists of 551 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-10-15 00:20:13,008 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-15 00:20:13,177 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:20:13,177 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-15 00:20:16,100 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:20:16,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1491691864] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-15 00:20:16,100 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-15 00:20:16,100 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-10-15 00:20:16,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1582481179] [2024-10-15 00:20:16,101 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-15 00:20:16,101 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-15 00:20:16,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:20:16,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1734, now seen corresponding path program 6 times [2024-10-15 00:20:16,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:20:16,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250532982] [2024-10-15 00:20:16,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:20:16,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:20:16,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:20:16,107 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-15 00:20:16,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-15 00:20:16,110 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-15 00:20:16,154 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-15 00:20:16,156 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-10-15 00:20:16,161 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-10-15 00:20:16,162 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 2.0) internal successors, (194), 97 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:20:16,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-15 00:20:16,526 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2024-10-15 00:20:16,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2024-10-15 00:20:16,528 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:20:16,534 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2024-10-15 00:20:16,534 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-15 00:20:16,534 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-15 00:20:16,534 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2024-10-15 00:20:16,535 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-15 00:20:16,535 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-15 00:20:16,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2024-10-15 00:20:16,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2024-10-15 00:20:16,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-15 00:20:16,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2024-10-15 00:20:16,547 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-15 00:20:16,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-10-15 00:20:16,548 INFO L425 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-15 00:20:16,548 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-15 00:20:16,548 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2024-10-15 00:20:16,549 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-15 00:20:16,550 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-15 00:20:16,550 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-15 00:20:16,556 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1] [2024-10-15 00:20:16,556 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-15 00:20:16,557 INFO L745 eck$LassoCheckResult]: Stem: 2047#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2); 2048#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0; 2039#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2040#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2041#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2042#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2043#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2233#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2232#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2231#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2230#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2229#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2228#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2227#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2226#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2225#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2224#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2223#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2222#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2221#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2220#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2219#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2218#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2217#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2216#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2215#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2214#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2213#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2212#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2211#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2210#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2209#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2208#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2207#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2206#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2205#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2204#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2203#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2202#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2201#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2200#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2199#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2198#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2197#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2196#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2195#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2194#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2193#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2192#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2191#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2190#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2189#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2188#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2187#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2186#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2185#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2184#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2183#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2182#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2181#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2180#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2179#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2178#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2177#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2176#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2175#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2174#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2173#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2172#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2171#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2170#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2169#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2168#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2167#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2166#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2165#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2164#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2163#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2162#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2161#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2160#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2159#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2158#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2157#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2156#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2155#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2154#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2153#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2152#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2151#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2150#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2149#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2148#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2147#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2146#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2145#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2144#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2143#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2142#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2141#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2140#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2139#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2138#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2137#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2136#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2135#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2134#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2133#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2132#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2131#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2130#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2129#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2128#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2127#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2126#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2125#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2124#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2123#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2122#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2121#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2120#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2119#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2118#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2117#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2116#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2115#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2114#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2113#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2112#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2111#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2110#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2109#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2108#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2107#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2106#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2105#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2104#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2103#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2102#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2101#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2100#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2099#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2098#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2097#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2096#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2095#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2094#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2093#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2092#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2091#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2090#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2089#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2088#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2087#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2086#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2085#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2084#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2083#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2082#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2081#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2080#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2079#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2078#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2077#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2076#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2075#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2074#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2073#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2072#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2071#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2070#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2069#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2068#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2067#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2066#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2065#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2064#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2063#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2062#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2061#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2060#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2059#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2058#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2057#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2056#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2055#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2054#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2053#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2052#L20-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2051#L20-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2050#L20-3 assume !(main_~i~0#1 < 100000); 2049#L20-4 havoc main_~i~0#1; 2046#L25 assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0; 2045#L28-3 [2024-10-15 00:20:16,557 INFO L747 eck$LassoCheckResult]: Loop: 2045#L28-3 call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4); 2044#L28-1 assume !!(main_#t~mem5#1 != main_~marker~0#1);havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1; 2045#L28-3 [2024-10-15 00:20:16,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-15 00:20:16,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1766769068, now seen corresponding path program 6 times [2024-10-15 00:20:16,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-15 00:20:16,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [914885118] [2024-10-15 00:20:16,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-15 00:20:16,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-15 00:20:16,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-15 00:20:22,789 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-15 00:20:22,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-15 00:20:22,790 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [914885118] [2024-10-15 00:20:22,790 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [914885118] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-15 00:20:22,790 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [384232899] [2024-10-15 00:20:22,790 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-15 00:20:22,790 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-15 00:20:22,791 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-15 00:20:22,796 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-15 00:20:22,797 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process