./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4a390ef5 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d69e4513fb8989bf305d8f9ce21862e8623f2a3d0c8146e8e7fb7e8c658a7eff --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4a390ef-m [2024-10-24 23:47:21,585 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-24 23:47:21,643 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-10-24 23:47:21,648 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-24 23:47:21,651 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-24 23:47:21,683 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-24 23:47:21,684 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-24 23:47:21,686 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-24 23:47:21,686 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-24 23:47:21,687 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-24 23:47:21,689 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-24 23:47:21,689 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-24 23:47:21,689 INFO L153 SettingsManager]: * Use SBE=true [2024-10-24 23:47:21,692 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-24 23:47:21,692 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-24 23:47:21,693 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-24 23:47:21,693 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-24 23:47:21,693 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-24 23:47:21,693 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-24 23:47:21,693 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-24 23:47:21,694 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-24 23:47:21,694 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-24 23:47:21,696 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-24 23:47:21,696 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-24 23:47:21,696 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-24 23:47:21,697 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-24 23:47:21,697 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-24 23:47:21,697 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-24 23:47:21,697 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-24 23:47:21,698 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-24 23:47:21,698 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-24 23:47:21,699 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-24 23:47:21,699 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-24 23:47:21,699 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-24 23:47:21,699 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-24 23:47:21,700 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-24 23:47:21,700 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d69e4513fb8989bf305d8f9ce21862e8623f2a3d0c8146e8e7fb7e8c658a7eff [2024-10-24 23:47:21,964 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-24 23:47:21,984 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-24 23:47:21,987 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-24 23:47:21,988 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-24 23:47:21,989 INFO L274 PluginConnector]: CDTParser initialized [2024-10-24 23:47:21,990 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c [2024-10-24 23:47:23,377 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-24 23:47:23,590 INFO L384 CDTParser]: Found 1 translation units. [2024-10-24 23:47:23,590 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/LexIndexValue-Array-1.c [2024-10-24 23:47:23,599 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/502b10e8d/c2801270a76640b5b3d623efa884326a/FLAG2ca8118f7 [2024-10-24 23:47:23,614 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/502b10e8d/c2801270a76640b5b3d623efa884326a [2024-10-24 23:47:23,616 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-24 23:47:23,618 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-24 23:47:23,619 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-24 23:47:23,619 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-24 23:47:23,625 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-24 23:47:23,626 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,627 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7c823ccc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23, skipping insertion in model container [2024-10-24 23:47:23,627 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,649 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-24 23:47:23,842 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 23:47:23,850 INFO L200 MainTranslator]: Completed pre-run [2024-10-24 23:47:23,867 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 23:47:23,892 INFO L204 MainTranslator]: Completed translation [2024-10-24 23:47:23,893 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23 WrapperNode [2024-10-24 23:47:23,893 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-24 23:47:23,895 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-24 23:47:23,895 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-24 23:47:23,895 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-24 23:47:23,902 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,910 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,929 INFO L138 Inliner]: procedures = 8, calls = 9, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 48 [2024-10-24 23:47:23,929 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-24 23:47:23,930 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-24 23:47:23,930 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-24 23:47:23,930 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-24 23:47:23,941 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,944 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,946 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,956 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2024-10-24 23:47:23,956 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,956 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,961 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,967 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,968 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,969 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,971 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-24 23:47:23,972 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-24 23:47:23,972 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-24 23:47:23,973 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-24 23:47:23,974 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (1/1) ... [2024-10-24 23:47:23,979 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:47:23,993 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:24,022 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:47:24,026 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-24 23:47:24,082 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-24 23:47:24,082 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-24 23:47:24,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-24 23:47:24,083 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-24 23:47:24,083 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-24 23:47:24,084 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-24 23:47:24,151 INFO L238 CfgBuilder]: Building ICFG [2024-10-24 23:47:24,154 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-24 23:47:24,288 INFO L? ?]: Removed 4 outVars from TransFormulas that were not future-live. [2024-10-24 23:47:24,289 INFO L287 CfgBuilder]: Performing block encoding [2024-10-24 23:47:24,304 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-24 23:47:24,305 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-24 23:47:24,306 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 11:47:24 BoogieIcfgContainer [2024-10-24 23:47:24,307 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-24 23:47:24,308 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-24 23:47:24,308 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-24 23:47:24,312 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-24 23:47:24,313 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-24 23:47:24,313 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 24.10 11:47:23" (1/3) ... [2024-10-24 23:47:24,314 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1dc941f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.10 11:47:24, skipping insertion in model container [2024-10-24 23:47:24,316 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-24 23:47:24,316 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:47:23" (2/3) ... [2024-10-24 23:47:24,316 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1dc941f9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.10 11:47:24, skipping insertion in model container [2024-10-24 23:47:24,316 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-24 23:47:24,316 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 11:47:24" (3/3) ... [2024-10-24 23:47:24,318 INFO L332 chiAutomizerObserver]: Analyzing ICFG LexIndexValue-Array-1.c [2024-10-24 23:47:24,437 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-24 23:47:24,438 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-24 23:47:24,438 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-24 23:47:24,439 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-24 23:47:24,439 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-24 23:47:24,439 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-24 23:47:24,439 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-24 23:47:24,440 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-24 23:47:24,444 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:24,469 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-10-24 23:47:24,469 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:24,470 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:24,474 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-24 23:47:24,475 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:47:24,475 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-24 23:47:24,475 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:24,478 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-10-24 23:47:24,478 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:24,478 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:24,478 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-24 23:47:24,478 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:47:24,486 INFO L745 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 8#L14-3true [2024-10-24 23:47:24,487 INFO L747 eck$LassoCheckResult]: Loop: 8#L14-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 13#L14-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 8#L14-3true [2024-10-24 23:47:24,492 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:24,493 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-24 23:47:24,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:24,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582276808] [2024-10-24 23:47:24,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:24,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:24,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:24,607 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:24,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:24,640 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:24,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:24,643 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-10-24 23:47:24,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:24,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461552688] [2024-10-24 23:47:24,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:24,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:24,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:24,660 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:24,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:24,674 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:24,679 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:24,679 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-10-24 23:47:24,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:24,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371828673] [2024-10-24 23:47:24,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:24,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:24,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:24,713 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:24,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:24,737 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:25,053 INFO L204 LassoAnalysis]: Preferences: [2024-10-24 23:47:25,054 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-24 23:47:25,054 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-24 23:47:25,054 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-24 23:47:25,054 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-24 23:47:25,055 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:47:25,055 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-24 23:47:25,055 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-24 23:47:25,055 INFO L132 ssoRankerPreferences]: Filename of dumped script: LexIndexValue-Array-1.c_Iteration1_Lasso [2024-10-24 23:47:25,055 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-24 23:47:25,057 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-24 23:47:25,081 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,180 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,185 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,188 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,194 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,200 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,204 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,207 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,211 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,215 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,218 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:47:25,374 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-24 23:47:25,379 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-24 23:47:25,381 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:47:25,381 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:25,383 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:47:25,385 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-24 23:47:25,386 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:47:25,398 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:47:25,399 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:47:25,399 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:47:25,399 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:47:25,406 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-24 23:47:25,406 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-24 23:47:25,412 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:47:25,425 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-24 23:47:25,425 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:47:25,425 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:25,427 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:47:25,428 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-24 23:47:25,429 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:47:25,439 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:47:25,440 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:47:25,440 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:47:25,440 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:47:25,445 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-24 23:47:25,446 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-24 23:47:25,456 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-24 23:47:25,470 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-10-24 23:47:25,471 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2024-10-24 23:47:25,472 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:47:25,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:25,498 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:47:25,500 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-24 23:47:25,501 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-24 23:47:25,512 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-24 23:47:25,513 INFO L474 LassoAnalysis]: Proved termination. [2024-10-24 23:47:25,513 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 2095 Supporting invariants [] [2024-10-24 23:47:25,530 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-10-24 23:47:25,537 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2024-10-24 23:47:25,573 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:25,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:25,589 INFO L255 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-24 23:47:25,591 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:47:25,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:25,608 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-24 23:47:25,608 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:47:25,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:25,660 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-24 23:47:25,662 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:25,703 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 24 states and 35 transitions. Complement of second has 6 states. [2024-10-24 23:47:25,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-24 23:47:25,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:25,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 17 transitions. [2024-10-24 23:47:25,712 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 17 transitions. Stem has 2 letters. Loop has 2 letters. [2024-10-24 23:47:25,712 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:47:25,712 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 17 transitions. Stem has 4 letters. Loop has 2 letters. [2024-10-24 23:47:25,712 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:47:25,713 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 17 transitions. Stem has 2 letters. Loop has 4 letters. [2024-10-24 23:47:25,713 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:47:25,714 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 35 transitions. [2024-10-24 23:47:25,716 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:25,718 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 10 states and 14 transitions. [2024-10-24 23:47:25,719 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-10-24 23:47:25,719 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-24 23:47:25,720 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 14 transitions. [2024-10-24 23:47:25,720 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:47:25,720 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2024-10-24 23:47:25,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 14 transitions. [2024-10-24 23:47:25,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-10-24 23:47:25,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.4) internal successors, (14), 9 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:25,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 14 transitions. [2024-10-24 23:47:25,739 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2024-10-24 23:47:25,740 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 14 transitions. [2024-10-24 23:47:25,740 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-24 23:47:25,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 14 transitions. [2024-10-24 23:47:25,740 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:25,740 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:25,740 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:25,741 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-10-24 23:47:25,741 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-24 23:47:25,741 INFO L745 eck$LassoCheckResult]: Stem: 82#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 83#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 84#L14-3 assume !(main_~i~0#1 < 1048); 80#L14-4 havoc main_~i~0#1; 77#L19-2 [2024-10-24 23:47:25,741 INFO L747 eck$LassoCheckResult]: Loop: 77#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 78#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 79#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 81#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 77#L19-2 [2024-10-24 23:47:25,742 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:25,742 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2024-10-24 23:47:25,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:25,742 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930517166] [2024-10-24 23:47:25,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:25,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:25,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:25,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:25,827 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:47:25,827 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [930517166] [2024-10-24 23:47:25,828 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [930517166] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 23:47:25,828 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 23:47:25,828 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-24 23:47:25,828 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [236745562] [2024-10-24 23:47:25,829 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 23:47:25,834 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:47:25,835 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:25,835 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 1 times [2024-10-24 23:47:25,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:25,835 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456178237] [2024-10-24 23:47:25,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:25,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:25,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:25,850 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:25,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:25,864 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:25,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:47:25,976 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-24 23:47:25,977 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-24 23:47:25,978 INFO L87 Difference]: Start difference. First operand 10 states and 14 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:25,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:47:25,992 INFO L93 Difference]: Finished difference Result 11 states and 14 transitions. [2024-10-24 23:47:25,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 14 transitions. [2024-10-24 23:47:25,993 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:25,994 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 14 transitions. [2024-10-24 23:47:25,994 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-24 23:47:25,995 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-24 23:47:25,995 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 14 transitions. [2024-10-24 23:47:25,995 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:47:25,996 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 14 transitions. [2024-10-24 23:47:25,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 14 transitions. [2024-10-24 23:47:25,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2024-10-24 23:47:25,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:25,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2024-10-24 23:47:25,998 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-10-24 23:47:25,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-24 23:47:25,999 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-10-24 23:47:26,000 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-24 23:47:26,001 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2024-10-24 23:47:26,001 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:26,001 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:26,002 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:26,002 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-10-24 23:47:26,002 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-24 23:47:26,002 INFO L745 eck$LassoCheckResult]: Stem: 109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 110#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 111#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 112#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 113#L14-3 assume !(main_~i~0#1 < 1048); 107#L14-4 havoc main_~i~0#1; 104#L19-2 [2024-10-24 23:47:26,002 INFO L747 eck$LassoCheckResult]: Loop: 104#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 105#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 106#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 108#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 104#L19-2 [2024-10-24 23:47:26,004 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:26,004 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2024-10-24 23:47:26,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:26,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1432975716] [2024-10-24 23:47:26,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:26,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:26,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:26,091 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:26,092 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:47:26,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1432975716] [2024-10-24 23:47:26,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1432975716] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:47:26,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [76284029] [2024-10-24 23:47:26,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:26,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:47:26,093 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:26,096 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:47:26,097 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-24 23:47:26,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:26,140 INFO L255 TraceCheckSpWp]: Trace formula consists of 34 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-24 23:47:26,141 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:47:26,162 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:26,162 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:47:26,196 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:26,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [76284029] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:47:26,198 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:47:26,198 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-10-24 23:47:26,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800923755] [2024-10-24 23:47:26,199 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:47:26,200 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:47:26,200 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:26,200 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 2 times [2024-10-24 23:47:26,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:26,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258448327] [2024-10-24 23:47:26,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:26,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:26,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:26,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:26,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:26,221 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:26,350 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-10-24 23:47:26,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:47:26,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-24 23:47:26,385 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-24 23:47:26,386 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:26,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:47:26,449 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2024-10-24 23:47:26,449 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 19 transitions. [2024-10-24 23:47:26,452 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:26,452 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 19 transitions. [2024-10-24 23:47:26,452 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-24 23:47:26,452 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-24 23:47:26,453 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 19 transitions. [2024-10-24 23:47:26,453 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:47:26,453 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2024-10-24 23:47:26,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 19 transitions. [2024-10-24 23:47:26,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2024-10-24 23:47:26,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.1875) internal successors, (19), 15 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:26,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2024-10-24 23:47:26,454 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2024-10-24 23:47:26,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-24 23:47:26,455 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 19 transitions. [2024-10-24 23:47:26,455 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-24 23:47:26,455 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 19 transitions. [2024-10-24 23:47:26,456 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:26,456 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:26,456 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:26,457 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2024-10-24 23:47:26,459 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-24 23:47:26,460 INFO L745 eck$LassoCheckResult]: Stem: 175#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 176#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 177#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 178#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 179#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 180#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 181#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 185#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 184#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 183#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 182#L14-3 assume !(main_~i~0#1 < 1048); 173#L14-4 havoc main_~i~0#1; 170#L19-2 [2024-10-24 23:47:26,460 INFO L747 eck$LassoCheckResult]: Loop: 170#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 171#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 172#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 174#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 170#L19-2 [2024-10-24 23:47:26,461 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:26,461 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2024-10-24 23:47:26,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:26,461 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58361440] [2024-10-24 23:47:26,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:26,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:26,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:26,597 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:26,598 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:47:26,599 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [58361440] [2024-10-24 23:47:26,599 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [58361440] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:47:26,599 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1112370339] [2024-10-24 23:47:26,599 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-24 23:47:26,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:47:26,600 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:26,601 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:47:26,606 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-24 23:47:26,661 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-24 23:47:26,661 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:47:26,661 INFO L255 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-24 23:47:26,662 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:47:26,688 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:26,688 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:47:26,764 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:26,764 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1112370339] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:47:26,765 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:47:26,765 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-10-24 23:47:26,765 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1728005269] [2024-10-24 23:47:26,765 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:47:26,765 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:47:26,766 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:26,766 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 3 times [2024-10-24 23:47:26,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:26,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078611426] [2024-10-24 23:47:26,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:26,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:26,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:26,774 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:26,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:26,780 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:26,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:47:26,856 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-24 23:47:26,856 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-10-24 23:47:26,856 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. cyclomatic complexity: 5 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:26,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:47:26,922 INFO L93 Difference]: Finished difference Result 28 states and 31 transitions. [2024-10-24 23:47:26,922 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 31 transitions. [2024-10-24 23:47:26,923 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:26,923 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 31 transitions. [2024-10-24 23:47:26,923 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-24 23:47:26,924 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-24 23:47:26,924 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 31 transitions. [2024-10-24 23:47:26,924 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:47:26,924 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2024-10-24 23:47:26,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 31 transitions. [2024-10-24 23:47:26,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2024-10-24 23:47:26,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1071428571428572) internal successors, (31), 27 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:26,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2024-10-24 23:47:26,927 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2024-10-24 23:47:26,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-24 23:47:26,928 INFO L425 stractBuchiCegarLoop]: Abstraction has 28 states and 31 transitions. [2024-10-24 23:47:26,928 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-24 23:47:26,929 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 31 transitions. [2024-10-24 23:47:26,929 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:26,930 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:26,930 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:26,930 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2024-10-24 23:47:26,930 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-24 23:47:26,931 INFO L745 eck$LassoCheckResult]: Stem: 301#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 302#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 303#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 304#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 305#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 306#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 307#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 323#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 322#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 321#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 320#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 319#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 318#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 317#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 316#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 315#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 314#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 313#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 312#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 311#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 310#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 309#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 308#L14-3 assume !(main_~i~0#1 < 1048); 299#L14-4 havoc main_~i~0#1; 296#L19-2 [2024-10-24 23:47:26,931 INFO L747 eck$LassoCheckResult]: Loop: 296#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 297#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 298#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 300#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 296#L19-2 [2024-10-24 23:47:26,932 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:26,932 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2024-10-24 23:47:26,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:26,932 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861014929] [2024-10-24 23:47:26,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:26,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:26,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:27,242 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:27,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:47:27,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861014929] [2024-10-24 23:47:27,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1861014929] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:47:27,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1476400307] [2024-10-24 23:47:27,243 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-24 23:47:27,243 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:47:27,243 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:27,246 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:47:27,248 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-24 23:47:27,353 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-10-24 23:47:27,353 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:47:27,354 INFO L255 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-24 23:47:27,356 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:47:27,419 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:27,419 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:47:27,662 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:27,662 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1476400307] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:47:27,663 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:47:27,663 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-10-24 23:47:27,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504188099] [2024-10-24 23:47:27,663 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:47:27,663 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:47:27,664 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:27,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 4 times [2024-10-24 23:47:27,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:27,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077728926] [2024-10-24 23:47:27,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:27,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:27,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:27,671 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:27,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:27,675 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:27,749 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:47:27,750 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-24 23:47:27,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-10-24 23:47:27,751 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. cyclomatic complexity: 5 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:27,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:47:27,832 INFO L93 Difference]: Finished difference Result 52 states and 55 transitions. [2024-10-24 23:47:27,832 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 55 transitions. [2024-10-24 23:47:27,833 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:27,834 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 55 transitions. [2024-10-24 23:47:27,834 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-24 23:47:27,834 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-24 23:47:27,834 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 55 transitions. [2024-10-24 23:47:27,835 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:47:27,835 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2024-10-24 23:47:27,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 55 transitions. [2024-10-24 23:47:27,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2024-10-24 23:47:27,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0576923076923077) internal successors, (55), 51 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:27,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2024-10-24 23:47:27,838 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2024-10-24 23:47:27,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-24 23:47:27,839 INFO L425 stractBuchiCegarLoop]: Abstraction has 52 states and 55 transitions. [2024-10-24 23:47:27,839 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-24 23:47:27,840 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 55 transitions. [2024-10-24 23:47:27,841 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:27,841 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:27,841 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:27,842 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2024-10-24 23:47:27,842 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-24 23:47:27,842 INFO L745 eck$LassoCheckResult]: Stem: 547#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 548#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 549#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 550#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 551#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 552#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 553#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 593#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 592#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 591#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 590#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 589#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 588#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 587#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 586#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 585#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 584#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 583#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 582#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 581#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 580#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 579#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 578#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 577#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 576#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 575#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 574#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 573#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 572#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 571#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 570#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 569#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 568#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 567#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 566#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 565#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 564#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 563#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 562#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 561#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 560#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 559#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 558#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 557#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 556#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 555#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 554#L14-3 assume !(main_~i~0#1 < 1048); 545#L14-4 havoc main_~i~0#1; 542#L19-2 [2024-10-24 23:47:27,843 INFO L747 eck$LassoCheckResult]: Loop: 542#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 543#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 544#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 546#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 542#L19-2 [2024-10-24 23:47:27,843 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:27,843 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2024-10-24 23:47:27,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:27,843 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214519640] [2024-10-24 23:47:27,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:27,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:27,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:28,492 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:28,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:47:28,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214519640] [2024-10-24 23:47:28,493 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [214519640] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:47:28,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1119380465] [2024-10-24 23:47:28,493 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-24 23:47:28,493 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:47:28,494 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:28,496 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:47:28,498 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-24 23:47:28,602 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-24 23:47:28,602 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:47:28,604 INFO L255 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-10-24 23:47:28,608 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:47:28,716 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:28,717 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:47:29,550 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:29,551 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1119380465] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:47:29,553 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:47:29,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-10-24 23:47:29,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699693385] [2024-10-24 23:47:29,553 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:47:29,554 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:47:29,554 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:29,554 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 5 times [2024-10-24 23:47:29,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:29,555 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646635654] [2024-10-24 23:47:29,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:29,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:29,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:29,564 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:47:29,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:47:29,573 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:47:29,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:47:29,651 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-10-24 23:47:29,652 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-10-24 23:47:29,653 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. cyclomatic complexity: 5 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:29,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:47:29,837 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2024-10-24 23:47:29,837 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 103 transitions. [2024-10-24 23:47:29,839 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:29,844 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 103 transitions. [2024-10-24 23:47:29,844 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-24 23:47:29,844 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-24 23:47:29,844 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 103 transitions. [2024-10-24 23:47:29,845 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:47:29,845 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2024-10-24 23:47:29,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 103 transitions. [2024-10-24 23:47:29,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2024-10-24 23:47:29,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.03) internal successors, (103), 99 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:47:29,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2024-10-24 23:47:29,854 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2024-10-24 23:47:29,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-10-24 23:47:29,856 INFO L425 stractBuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2024-10-24 23:47:29,856 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-24 23:47:29,856 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 103 transitions. [2024-10-24 23:47:29,857 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:47:29,857 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:47:29,857 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:47:29,863 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2024-10-24 23:47:29,863 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-24 23:47:29,863 INFO L745 eck$LassoCheckResult]: Stem: 1033#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1034#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 1035#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1036#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1037#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1038#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1039#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1127#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1126#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1125#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1124#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1123#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1122#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1121#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1120#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1119#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1118#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1117#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1116#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1115#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1114#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1113#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1112#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1111#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1110#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1109#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1108#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1107#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1106#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1105#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1104#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1103#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1102#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1101#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1100#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1099#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1098#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1097#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1096#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1095#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1094#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1093#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1092#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1091#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1090#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1089#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1088#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1087#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1086#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1085#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1084#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1083#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1082#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1081#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1080#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1079#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1078#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1077#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1076#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1075#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1074#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1073#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1072#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1071#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1070#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1069#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1068#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1067#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1066#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1065#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1064#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1063#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1062#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1061#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1060#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1059#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1058#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1057#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1056#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1055#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1054#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1053#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1052#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1051#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1050#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1049#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1048#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1047#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1046#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1045#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1044#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1043#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1042#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 1041#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1040#L14-3 assume !(main_~i~0#1 < 1048); 1031#L14-4 havoc main_~i~0#1; 1028#L19-2 [2024-10-24 23:47:29,863 INFO L747 eck$LassoCheckResult]: Loop: 1028#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 1029#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 1030#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 1032#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1028#L19-2 [2024-10-24 23:47:29,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:47:29,864 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2024-10-24 23:47:29,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:47:29,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806038362] [2024-10-24 23:47:29,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:47:29,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:47:29,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:47:32,004 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:47:32,004 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:47:32,004 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806038362] [2024-10-24 23:47:32,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806038362] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:47:32,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [96269392] [2024-10-24 23:47:32,005 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-24 23:47:32,005 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:47:32,005 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:47:32,007 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:47:32,009 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-24 23:48:07,570 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-10-24 23:48:07,570 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:48:07,592 INFO L255 TraceCheckSpWp]: Trace formula consists of 529 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-10-24 23:48:07,597 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:48:07,777 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:48:07,777 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:48:10,399 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:48:10,400 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [96269392] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:48:10,400 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:48:10,400 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-10-24 23:48:10,400 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039651129] [2024-10-24 23:48:10,400 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:48:10,401 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:48:10,401 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:48:10,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 6 times [2024-10-24 23:48:10,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:48:10,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877036208] [2024-10-24 23:48:10,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:48:10,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:48:10,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:48:10,408 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:48:10,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:48:10,414 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:48:10,484 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:48:10,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-10-24 23:48:10,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-10-24 23:48:10,489 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. cyclomatic complexity: 5 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:48:10,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:48:10,849 INFO L93 Difference]: Finished difference Result 196 states and 199 transitions. [2024-10-24 23:48:10,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 199 transitions. [2024-10-24 23:48:10,852 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:48:10,854 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 199 transitions. [2024-10-24 23:48:10,854 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-24 23:48:10,854 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-10-24 23:48:10,854 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 199 transitions. [2024-10-24 23:48:10,857 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:48:10,857 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2024-10-24 23:48:10,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 199 transitions. [2024-10-24 23:48:10,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2024-10-24 23:48:10,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0153061224489797) internal successors, (199), 195 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:48:10,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 199 transitions. [2024-10-24 23:48:10,871 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2024-10-24 23:48:10,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-10-24 23:48:10,875 INFO L425 stractBuchiCegarLoop]: Abstraction has 196 states and 199 transitions. [2024-10-24 23:48:10,876 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-24 23:48:10,876 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 199 transitions. [2024-10-24 23:48:10,878 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-10-24 23:48:10,878 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:48:10,878 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:48:10,880 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2024-10-24 23:48:10,881 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-10-24 23:48:10,881 INFO L745 eck$LassoCheckResult]: Stem: 1999#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2000#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~short3#1, main_#t~nondet4#1, main_#t~post5#1, main_#t~mem6#1, main_#t~post7#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~k~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~k~0#1 := 0;main_~i~0#1 := 0; 2001#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2002#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2003#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2004#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2005#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2189#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2188#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2187#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2186#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2185#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2184#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2183#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2182#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2181#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2180#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2179#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2178#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2177#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2176#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2175#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2174#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2173#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2172#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2171#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2170#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2169#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2168#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2167#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2166#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2165#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2164#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2163#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2162#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2161#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2160#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2159#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2158#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2157#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2156#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2155#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2154#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2153#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2152#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2151#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2150#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2149#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2148#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2147#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2146#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2145#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2144#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2143#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2142#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2141#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2140#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2139#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2138#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2137#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2136#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2135#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2134#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2133#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2132#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2131#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2130#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2129#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2128#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2127#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2126#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2125#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2124#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2123#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2122#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2121#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2120#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2119#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2118#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2117#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2116#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2115#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2114#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2113#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2112#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2111#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2110#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2109#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2108#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2107#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2106#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2105#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2104#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2103#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2102#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2101#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2100#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2099#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2098#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2097#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2096#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2095#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2094#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2093#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2092#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2091#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2090#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2089#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2088#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2087#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2086#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2085#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2084#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2083#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2082#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2081#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2080#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2079#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2078#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2077#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2076#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2075#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2074#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2073#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2072#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2071#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2070#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2069#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2068#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2067#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2066#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2065#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2064#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2063#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2062#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2061#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2060#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2059#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2058#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2057#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2056#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2055#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2054#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2053#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2052#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2051#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2050#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2049#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2048#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2047#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2046#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2045#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2044#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2043#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2042#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2041#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2040#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2039#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2038#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2037#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2036#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2035#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2034#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2033#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2032#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2031#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2030#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2029#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2028#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2027#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2026#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2025#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2024#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2023#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2022#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2021#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2020#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2019#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2018#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2017#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2016#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2015#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2014#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2013#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2012#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2011#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2010#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2009#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2008#L14-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1; 2007#L14-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2006#L14-3 assume !(main_~i~0#1 < 1048); 1997#L14-4 havoc main_~i~0#1; 1994#L19-2 [2024-10-24 23:48:10,881 INFO L747 eck$LassoCheckResult]: Loop: 1994#L19-2 main_#t~short3#1 := main_~k~0#1 < 1048; 1995#L18-1 assume main_#t~short3#1;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short3#1 := main_#t~mem2#1 >= 0; 1996#L18-3 assume !!main_#t~short3#1;havoc main_#t~mem2#1;havoc main_#t~short3#1;havoc main_#t~nondet4#1; 1998#L19 assume 0 != main_#t~nondet4#1;havoc main_#t~nondet4#1;main_#t~post5#1 := main_~k~0#1;main_~k~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1994#L19-2 [2024-10-24 23:48:10,882 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:48:10,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2024-10-24 23:48:10,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:48:10,882 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826919848] [2024-10-24 23:48:10,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:48:10,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:48:11,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:48:17,119 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:48:17,119 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:48:17,119 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826919848] [2024-10-24 23:48:17,120 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1826919848] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:48:17,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1657335767] [2024-10-24 23:48:17,120 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-24 23:48:17,120 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:48:17,120 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:48:17,122 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:48:17,123 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process