./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4a390ef5 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4a390ef-m [2024-10-24 23:56:24,713 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-24 23:56:24,786 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-10-24 23:56:24,793 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-24 23:56:24,793 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-24 23:56:24,816 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-24 23:56:24,816 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-24 23:56:24,817 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-24 23:56:24,817 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-24 23:56:24,818 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-24 23:56:24,818 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-24 23:56:24,818 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-24 23:56:24,819 INFO L153 SettingsManager]: * Use SBE=true [2024-10-24 23:56:24,819 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-24 23:56:24,819 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-24 23:56:24,820 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-24 23:56:24,820 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-24 23:56:24,823 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-24 23:56:24,823 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-24 23:56:24,824 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-24 23:56:24,824 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-24 23:56:24,825 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-24 23:56:24,825 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-24 23:56:24,825 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-24 23:56:24,825 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-24 23:56:24,826 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-24 23:56:24,826 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-24 23:56:24,826 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-24 23:56:24,827 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-24 23:56:24,827 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-24 23:56:24,827 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-24 23:56:24,828 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-24 23:56:24,828 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-24 23:56:24,828 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-24 23:56:24,829 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-24 23:56:24,829 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-24 23:56:24,829 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef [2024-10-24 23:56:25,083 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-24 23:56:25,121 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-24 23:56:25,124 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-24 23:56:25,126 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-24 23:56:25,127 INFO L274 PluginConnector]: CDTParser initialized [2024-10-24 23:56:25,129 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2024-10-24 23:56:26,563 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-24 23:56:26,805 INFO L384 CDTParser]: Found 1 translation units. [2024-10-24 23:56:26,805 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2024-10-24 23:56:26,815 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/670da56d7/de8e61deda624dd28d891a0d2744b397/FLAG1bdd57147 [2024-10-24 23:56:26,827 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/670da56d7/de8e61deda624dd28d891a0d2744b397 [2024-10-24 23:56:26,829 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-24 23:56:26,830 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-24 23:56:26,832 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-24 23:56:26,832 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-24 23:56:26,837 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-24 23:56:26,838 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 11:56:26" (1/1) ... [2024-10-24 23:56:26,839 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@518b7d82 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:26, skipping insertion in model container [2024-10-24 23:56:26,839 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 11:56:26" (1/1) ... [2024-10-24 23:56:26,874 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-24 23:56:27,271 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 23:56:27,284 INFO L200 MainTranslator]: Completed pre-run [2024-10-24 23:56:27,339 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 23:56:27,375 INFO L204 MainTranslator]: Completed translation [2024-10-24 23:56:27,375 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27 WrapperNode [2024-10-24 23:56:27,375 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-24 23:56:27,376 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-24 23:56:27,377 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-24 23:56:27,377 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-24 23:56:27,384 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,397 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,420 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 55 [2024-10-24 23:56:27,421 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-24 23:56:27,422 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-24 23:56:27,422 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-24 23:56:27,422 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-24 23:56:27,434 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,434 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,437 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,457 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2024-10-24 23:56:27,458 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,458 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,467 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,474 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,477 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,478 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,480 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-24 23:56:27,481 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-24 23:56:27,481 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-24 23:56:27,481 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-24 23:56:27,482 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (1/1) ... [2024-10-24 23:56:27,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:27,500 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:27,519 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:27,522 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-24 23:56:27,578 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-24 23:56:27,578 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-24 23:56:27,578 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-24 23:56:27,579 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-24 23:56:27,579 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-24 23:56:27,579 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-24 23:56:27,660 INFO L238 CfgBuilder]: Building ICFG [2024-10-24 23:56:27,664 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-24 23:56:27,816 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2024-10-24 23:56:27,816 INFO L287 CfgBuilder]: Performing block encoding [2024-10-24 23:56:27,829 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-24 23:56:27,829 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-24 23:56:27,830 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 11:56:27 BoogieIcfgContainer [2024-10-24 23:56:27,830 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-24 23:56:27,831 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-24 23:56:27,831 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-24 23:56:27,835 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-24 23:56:27,836 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-24 23:56:27,836 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 24.10 11:56:26" (1/3) ... [2024-10-24 23:56:27,837 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1bc16252 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.10 11:56:27, skipping insertion in model container [2024-10-24 23:56:27,838 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-24 23:56:27,838 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 11:56:27" (2/3) ... [2024-10-24 23:56:27,839 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1bc16252 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.10 11:56:27, skipping insertion in model container [2024-10-24 23:56:27,839 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-24 23:56:27,839 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 11:56:27" (3/3) ... [2024-10-24 23:56:27,841 INFO L332 chiAutomizerObserver]: Analyzing ICFG array16_alloca_fixed.i [2024-10-24 23:56:27,895 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-24 23:56:27,895 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-24 23:56:27,896 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-24 23:56:27,896 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-24 23:56:27,896 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-24 23:56:27,896 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-24 23:56:27,896 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-24 23:56:27,897 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-24 23:56:27,901 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:27,916 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-24 23:56:27,916 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:27,916 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:27,921 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2024-10-24 23:56:27,922 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-24 23:56:27,922 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-24 23:56:27,922 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:27,923 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-24 23:56:27,924 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:27,924 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:27,924 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2024-10-24 23:56:27,924 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-24 23:56:27,931 INFO L745 eck$LassoCheckResult]: Stem: 10#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 11#L367true assume !(main_~length~0#1 < 1); 6#L367-2true call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3#L369true assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4#L370-3true [2024-10-24 23:56:27,932 INFO L747 eck$LassoCheckResult]: Loop: 4#L370-3true assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12#L372true assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15#L370-2true main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4#L370-3true [2024-10-24 23:56:27,937 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:27,938 INFO L85 PathProgramCache]: Analyzing trace with hash 28695753, now seen corresponding path program 1 times [2024-10-24 23:56:27,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:27,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102684386] [2024-10-24 23:56:27,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:27,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:28,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:28,067 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:28,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:28,109 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:28,113 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:28,113 INFO L85 PathProgramCache]: Analyzing trace with hash 51737, now seen corresponding path program 1 times [2024-10-24 23:56:28,113 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:28,113 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064597106] [2024-10-24 23:56:28,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:28,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:28,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:28,145 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:28,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:28,174 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:28,177 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:28,177 INFO L85 PathProgramCache]: Analyzing trace with hash 176707665, now seen corresponding path program 1 times [2024-10-24 23:56:28,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:28,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409300878] [2024-10-24 23:56:28,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:28,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:28,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:28,209 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:28,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:28,241 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:28,605 INFO L204 LassoAnalysis]: Preferences: [2024-10-24 23:56:28,606 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-24 23:56:28,606 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-24 23:56:28,606 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-24 23:56:28,606 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-24 23:56:28,607 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:28,607 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-24 23:56:28,608 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-24 23:56:28,608 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration1_Lasso [2024-10-24 23:56:28,608 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-24 23:56:28,608 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-24 23:56:28,627 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,641 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,644 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,815 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,818 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,822 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,826 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,829 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,833 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,836 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:28,839 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:29,117 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-24 23:56:29,122 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-24 23:56:29,123 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:29,124 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:29,126 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:29,128 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-24 23:56:29,130 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:29,143 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:29,143 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:29,144 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:29,144 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:29,144 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:29,146 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:29,146 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:29,152 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:29,168 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-24 23:56:29,169 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:29,169 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:29,173 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:29,174 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-24 23:56:29,175 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:29,188 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:29,188 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:29,189 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:29,189 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:29,189 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:29,189 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:29,189 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:29,192 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:29,206 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:29,206 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:29,206 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:29,207 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:29,208 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-24 23:56:29,209 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:29,220 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:29,220 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:29,220 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:29,220 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:29,226 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-24 23:56:29,226 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-24 23:56:29,234 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:29,249 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:29,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:29,250 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:29,252 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:29,253 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-10-24 23:56:29,254 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:29,267 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:29,267 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:29,267 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:29,268 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:29,272 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-24 23:56:29,272 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-24 23:56:29,279 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:29,293 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:29,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:29,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:29,295 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:29,296 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-10-24 23:56:29,298 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:29,308 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:29,308 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:29,309 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:29,309 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:29,316 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-24 23:56:29,317 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-24 23:56:29,330 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-24 23:56:29,365 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2024-10-24 23:56:29,365 INFO L444 ModelExtractionUtils]: 1 out of 19 variables were initially zero. Simplification set additionally 14 variables to zero. [2024-10-24 23:56:29,367 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:29,367 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:29,384 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:29,388 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-10-24 23:56:29,389 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-24 23:56:29,404 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-24 23:56:29,404 INFO L474 LassoAnalysis]: Proved termination. [2024-10-24 23:56:29,405 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 2*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-10-24 23:56:29,421 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-10-24 23:56:29,440 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2024-10-24 23:56:29,449 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-24 23:56:29,450 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-24 23:56:29,452 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2024-10-24 23:56:29,467 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:29,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:29,485 INFO L255 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-24 23:56:29,487 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:29,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:29,521 INFO L255 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-24 23:56:29,522 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:29,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:29,596 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-24 23:56:29,597 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:29,652 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 28 states and 40 transitions. Complement of second has 6 states. [2024-10-24 23:56:29,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-24 23:56:29,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:29,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 23 transitions. [2024-10-24 23:56:29,665 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 5 letters. Loop has 3 letters. [2024-10-24 23:56:29,666 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:56:29,666 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 8 letters. Loop has 3 letters. [2024-10-24 23:56:29,667 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:56:29,667 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 5 letters. Loop has 6 letters. [2024-10-24 23:56:29,667 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:56:29,668 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 40 transitions. [2024-10-24 23:56:29,671 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:29,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 12 states and 17 transitions. [2024-10-24 23:56:29,677 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-24 23:56:29,678 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-10-24 23:56:29,679 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2024-10-24 23:56:29,679 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:56:29,679 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-24 23:56:29,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2024-10-24 23:56:29,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2024-10-24 23:56:29,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:29,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 17 transitions. [2024-10-24 23:56:29,704 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-24 23:56:29,704 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-24 23:56:29,705 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-24 23:56:29,705 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 17 transitions. [2024-10-24 23:56:29,706 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:29,706 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:29,707 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:29,707 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:29,707 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:29,708 INFO L745 eck$LassoCheckResult]: Stem: 109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 110#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 111#L367 assume !(main_~length~0#1 < 1); 103#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 104#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 105#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 108#L370-4 main_~j~0#1 := 0; 107#L378-2 [2024-10-24 23:56:29,708 INFO L747 eck$LassoCheckResult]: Loop: 107#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 106#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 107#L378-2 [2024-10-24 23:56:29,709 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:29,710 INFO L85 PathProgramCache]: Analyzing trace with hash 1806815510, now seen corresponding path program 1 times [2024-10-24 23:56:29,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:29,710 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941692925] [2024-10-24 23:56:29,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:29,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:29,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:29,844 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:29,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:29,858 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:29,859 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941692925] [2024-10-24 23:56:29,859 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941692925] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 23:56:29,860 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 23:56:29,860 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 23:56:29,860 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495383502] [2024-10-24 23:56:29,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 23:56:29,863 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:29,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:29,864 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 1 times [2024-10-24 23:56:29,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:29,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198628667] [2024-10-24 23:56:29,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:29,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:29,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:29,878 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:29,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:29,886 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:29,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:29,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 23:56:29,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-10-24 23:56:29,962 INFO L87 Difference]: Start difference. First operand 12 states and 17 transitions. cyclomatic complexity: 7 Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:29,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:29,993 INFO L93 Difference]: Finished difference Result 14 states and 19 transitions. [2024-10-24 23:56:29,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 19 transitions. [2024-10-24 23:56:29,994 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:29,994 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 19 transitions. [2024-10-24 23:56:29,994 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-10-24 23:56:29,994 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-10-24 23:56:29,994 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 19 transitions. [2024-10-24 23:56:29,994 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:56:29,994 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 19 transitions. [2024-10-24 23:56:29,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 19 transitions. [2024-10-24 23:56:29,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2024-10-24 23:56:29,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:29,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 16 transitions. [2024-10-24 23:56:29,996 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 16 transitions. [2024-10-24 23:56:29,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 23:56:29,998 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2024-10-24 23:56:29,998 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-24 23:56:29,999 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 16 transitions. [2024-10-24 23:56:30,001 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:30,001 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:30,001 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:30,002 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:30,002 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:30,003 INFO L745 eck$LassoCheckResult]: Stem: 142#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 143#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 144#L367 assume !(main_~length~0#1 < 1); 136#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 137#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 138#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 145#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 147#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 146#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 139#L370-4 main_~j~0#1 := 0; 140#L378-2 [2024-10-24 23:56:30,003 INFO L747 eck$LassoCheckResult]: Loop: 140#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 141#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 140#L378-2 [2024-10-24 23:56:30,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:30,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1982565540, now seen corresponding path program 1 times [2024-10-24 23:56:30,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:30,004 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58454877] [2024-10-24 23:56:30,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:30,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:30,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:30,029 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:30,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:30,041 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:30,041 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:30,042 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 2 times [2024-10-24 23:56:30,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:30,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535624394] [2024-10-24 23:56:30,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:30,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:30,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:30,049 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:30,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:30,065 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:30,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:30,069 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996831, now seen corresponding path program 1 times [2024-10-24 23:56:30,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:30,069 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181703088] [2024-10-24 23:56:30,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:30,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:30,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:30,091 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:30,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:30,115 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:30,384 INFO L204 LassoAnalysis]: Preferences: [2024-10-24 23:56:30,385 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-24 23:56:30,385 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-24 23:56:30,385 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-24 23:56:30,385 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-24 23:56:30,385 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,385 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-24 23:56:30,385 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-24 23:56:30,386 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration3_Lasso [2024-10-24 23:56:30,386 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-24 23:56:30,386 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-24 23:56:30,388 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,394 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,397 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,399 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,401 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,404 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,407 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,410 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,536 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,538 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,541 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-24 23:56:30,758 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-24 23:56:30,759 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-24 23:56:30,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,759 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,761 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,763 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-10-24 23:56:30,764 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,777 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,777 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:30,777 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,777 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,777 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,778 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:30,778 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:30,779 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:30,794 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-10-24 23:56:30,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,795 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,797 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,798 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-10-24 23:56:30,799 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,811 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,812 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:30,812 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,812 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,812 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,813 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:30,813 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:30,816 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:30,831 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:30,832 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,833 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,835 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,837 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-10-24 23:56:30,839 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,851 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,851 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:30,852 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,852 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,852 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,853 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:30,853 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:30,854 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:30,866 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:30,866 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,866 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,867 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,868 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-10-24 23:56:30,869 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,879 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,879 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:30,879 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,879 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,879 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,880 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:30,880 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:30,881 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:30,891 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:30,892 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,892 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,893 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,895 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-10-24 23:56:30,896 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,905 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,905 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:30,906 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,906 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,906 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,906 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:30,906 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:30,907 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:30,918 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:30,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,919 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,920 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,921 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-10-24 23:56:30,922 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,932 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,932 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:30,932 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,932 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,932 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,933 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:30,933 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:30,934 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:30,948 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:30,949 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,949 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,950 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,950 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-10-24 23:56:30,951 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,961 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,961 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-24 23:56:30,961 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,961 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,961 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,961 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-24 23:56:30,961 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-24 23:56:30,962 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-24 23:56:30,973 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:30,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:30,974 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:30,975 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:30,976 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-10-24 23:56:30,977 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-24 23:56:30,987 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-24 23:56:30,987 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-24 23:56:30,987 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-24 23:56:30,987 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-24 23:56:30,993 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-24 23:56:30,993 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-24 23:56:31,003 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-24 23:56:31,036 INFO L443 ModelExtractionUtils]: Simplification made 18 calls to the SMT solver. [2024-10-24 23:56:31,036 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 14 variables to zero. [2024-10-24 23:56:31,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-24 23:56:31,037 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:31,040 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-24 23:56:31,042 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-10-24 23:56:31,043 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-24 23:56:31,058 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-10-24 23:56:31,058 INFO L474 LassoAnalysis]: Proved termination. [2024-10-24 23:56:31,058 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~j~0#1, v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2) = -2*ULTIMATE.start_main_~j~0#1 + 1*v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2 Supporting invariants [-2*ULTIMATE.start_main_~length~0#1 + 1*v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2 >= 0] [2024-10-24 23:56:31,075 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-10-24 23:56:31,086 INFO L156 tatePredicateManager]: 3 out of 4 supporting invariants were superfluous and have been removed [2024-10-24 23:56:31,089 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-24 23:56:31,090 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-24 23:56:31,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:31,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:31,136 INFO L255 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-10-24 23:56:31,137 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:31,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:31,303 INFO L255 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-24 23:56:31,304 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:31,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:31,334 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.6 stem predicates 2 loop predicates [2024-10-24 23:56:31,334 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6 Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:31,421 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2024-10-24 23:56:31,538 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6. Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 16 states and 22 transitions. Complement of second has 10 states. [2024-10-24 23:56:31,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 8 states 6 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-24 23:56:31,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:31,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 15 transitions. [2024-10-24 23:56:31,540 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 10 letters. Loop has 2 letters. [2024-10-24 23:56:31,540 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:56:31,540 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 12 letters. Loop has 2 letters. [2024-10-24 23:56:31,540 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:56:31,540 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 10 letters. Loop has 4 letters. [2024-10-24 23:56:31,540 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-24 23:56:31,541 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 22 transitions. [2024-10-24 23:56:31,541 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:31,542 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 22 transitions. [2024-10-24 23:56:31,542 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2024-10-24 23:56:31,542 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2024-10-24 23:56:31,542 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 22 transitions. [2024-10-24 23:56:31,542 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:31,543 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-24 23:56:31,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 22 transitions. [2024-10-24 23:56:31,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2024-10-24 23:56:31,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:31,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2024-10-24 23:56:31,544 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-24 23:56:31,545 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-24 23:56:31,545 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-24 23:56:31,545 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2024-10-24 23:56:31,546 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:31,546 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:31,546 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:31,546 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:31,547 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:31,547 INFO L745 eck$LassoCheckResult]: Stem: 269#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 270#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 268#L367 assume !(main_~length~0#1 < 1); 259#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 260#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 261#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 271#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 274#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 272#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 266#L370-4 main_~j~0#1 := 0; 267#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 262#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 263#L378-2 [2024-10-24 23:56:31,547 INFO L747 eck$LassoCheckResult]: Loop: 263#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 273#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 263#L378-2 [2024-10-24 23:56:31,548 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:31,548 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996833, now seen corresponding path program 1 times [2024-10-24 23:56:31,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:31,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495483915] [2024-10-24 23:56:31,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:31,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:31,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:32,017 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:32,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:32,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495483915] [2024-10-24 23:56:32,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495483915] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:32,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [886195892] [2024-10-24 23:56:32,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:32,018 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:32,018 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:32,019 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:32,020 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-10-24 23:56:32,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:32,072 INFO L255 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-10-24 23:56:32,073 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:32,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-24 23:56:32,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-24 23:56:32,178 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:32,178 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:32,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-24 23:56:32,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-24 23:56:32,258 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:32,258 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [886195892] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:32,258 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:32,258 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2024-10-24 23:56:32,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54054059] [2024-10-24 23:56:32,259 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:32,259 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:32,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:32,259 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 3 times [2024-10-24 23:56:32,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:32,259 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153989299] [2024-10-24 23:56:32,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:32,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:32,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:32,269 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:32,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:32,273 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:32,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:32,326 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-10-24 23:56:32,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2024-10-24 23:56:32,327 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 9 Second operand has 16 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:32,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:32,453 INFO L93 Difference]: Finished difference Result 30 states and 41 transitions. [2024-10-24 23:56:32,453 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 41 transitions. [2024-10-24 23:56:32,454 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:32,454 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 29 states and 40 transitions. [2024-10-24 23:56:32,455 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-24 23:56:32,455 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-24 23:56:32,455 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 40 transitions. [2024-10-24 23:56:32,455 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:32,455 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 40 transitions. [2024-10-24 23:56:32,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 40 transitions. [2024-10-24 23:56:32,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2024-10-24 23:56:32,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:32,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2024-10-24 23:56:32,457 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2024-10-24 23:56:32,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-24 23:56:32,458 INFO L425 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2024-10-24 23:56:32,458 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-24 23:56:32,458 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2024-10-24 23:56:32,459 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:32,459 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:32,459 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:32,459 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:32,459 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:32,459 INFO L745 eck$LassoCheckResult]: Stem: 405#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 406#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 407#L367 assume !(main_~length~0#1 < 1); 396#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 397#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 398#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 408#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 411#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 416#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 415#L370-4 main_~j~0#1 := 0; 414#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 403#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 404#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 401#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 402#L378-2 [2024-10-24 23:56:32,459 INFO L747 eck$LassoCheckResult]: Loop: 402#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 412#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 402#L378-2 [2024-10-24 23:56:32,460 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:32,460 INFO L85 PathProgramCache]: Analyzing trace with hash -645453020, now seen corresponding path program 1 times [2024-10-24 23:56:32,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:32,460 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830257806] [2024-10-24 23:56:32,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:32,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:32,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:32,547 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:32,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:32,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830257806] [2024-10-24 23:56:32,549 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1830257806] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:32,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2025101253] [2024-10-24 23:56:32,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:32,550 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:32,550 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:32,553 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:32,554 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-10-24 23:56:32,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:32,609 INFO L255 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-24 23:56:32,610 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:32,678 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:32,679 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:32,717 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:32,717 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2025101253] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:32,718 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:32,718 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2024-10-24 23:56:32,718 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1369038275] [2024-10-24 23:56:32,718 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:32,719 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:32,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:32,719 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 4 times [2024-10-24 23:56:32,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:32,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605333496] [2024-10-24 23:56:32,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:32,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:32,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:32,724 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:32,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:32,728 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:32,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:32,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-10-24 23:56:32,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-10-24 23:56:32,781 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 13 Second operand has 11 states, 11 states have (on average 2.272727272727273) internal successors, (25), 11 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:32,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:32,866 INFO L93 Difference]: Finished difference Result 48 states and 64 transitions. [2024-10-24 23:56:32,867 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 64 transitions. [2024-10-24 23:56:32,868 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:32,868 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 43 states and 57 transitions. [2024-10-24 23:56:32,868 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2024-10-24 23:56:32,869 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2024-10-24 23:56:32,869 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 57 transitions. [2024-10-24 23:56:32,869 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:32,869 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 57 transitions. [2024-10-24 23:56:32,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 57 transitions. [2024-10-24 23:56:32,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 37. [2024-10-24 23:56:32,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3513513513513513) internal successors, (50), 36 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:32,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 50 transitions. [2024-10-24 23:56:32,873 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 50 transitions. [2024-10-24 23:56:32,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-24 23:56:32,874 INFO L425 stractBuchiCegarLoop]: Abstraction has 37 states and 50 transitions. [2024-10-24 23:56:32,874 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-24 23:56:32,874 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 50 transitions. [2024-10-24 23:56:32,875 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:32,875 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:32,875 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:32,876 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:32,876 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:32,876 INFO L745 eck$LassoCheckResult]: Stem: 575#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 576#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 573#L367 assume main_~length~0#1 < 1;main_~length~0#1 := 1; 564#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 565#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 597#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 595#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 591#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 592#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 590#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 589#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 587#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 568#L370-4 main_~j~0#1 := 0; 569#L378-2 [2024-10-24 23:56:32,876 INFO L747 eck$LassoCheckResult]: Loop: 569#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 570#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 569#L378-2 [2024-10-24 23:56:32,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:32,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1080825110, now seen corresponding path program 1 times [2024-10-24 23:56:32,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:32,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912844004] [2024-10-24 23:56:32,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:32,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:32,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:32,946 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:32,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:32,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912844004] [2024-10-24 23:56:32,946 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [912844004] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:32,947 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1939072890] [2024-10-24 23:56:32,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:32,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:32,949 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:32,951 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:32,954 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-10-24 23:56:33,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:33,006 INFO L255 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-24 23:56:33,007 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:33,040 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:33,040 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-24 23:56:33,040 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1939072890] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 23:56:33,040 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-24 23:56:33,041 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2024-10-24 23:56:33,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317139686] [2024-10-24 23:56:33,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 23:56:33,041 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:33,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:33,042 INFO L85 PathProgramCache]: Analyzing trace with hash 2310, now seen corresponding path program 1 times [2024-10-24 23:56:33,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:33,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766186366] [2024-10-24 23:56:33,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:33,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:33,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:33,046 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:33,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:33,051 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:33,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:33,105 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-24 23:56:33,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-10-24 23:56:33,105 INFO L87 Difference]: Start difference. First operand 37 states and 50 transitions. cyclomatic complexity: 20 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:33,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:33,130 INFO L93 Difference]: Finished difference Result 30 states and 39 transitions. [2024-10-24 23:56:33,130 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 39 transitions. [2024-10-24 23:56:33,131 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:33,131 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 24 states and 32 transitions. [2024-10-24 23:56:33,131 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-24 23:56:33,131 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-24 23:56:33,131 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 32 transitions. [2024-10-24 23:56:33,131 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:33,131 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-24 23:56:33,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 32 transitions. [2024-10-24 23:56:33,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2024-10-24 23:56:33,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.3333333333333333) internal successors, (32), 23 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:33,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2024-10-24 23:56:33,135 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-24 23:56:33,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-24 23:56:33,136 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-24 23:56:33,136 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-24 23:56:33,136 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 32 transitions. [2024-10-24 23:56:33,137 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:33,137 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:33,137 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:33,137 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:33,137 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:33,137 INFO L745 eck$LassoCheckResult]: Stem: 686#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 687#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 688#L367 assume !(main_~length~0#1 < 1); 677#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 678#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 679#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 689#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 693#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 690#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 691#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 699#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 696#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 684#L370-4 main_~j~0#1 := 0; 685#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 680#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 681#L378-2 [2024-10-24 23:56:33,138 INFO L747 eck$LassoCheckResult]: Loop: 681#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 692#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 681#L378-2 [2024-10-24 23:56:33,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:33,138 INFO L85 PathProgramCache]: Analyzing trace with hash -1295959587, now seen corresponding path program 1 times [2024-10-24 23:56:33,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:33,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556890230] [2024-10-24 23:56:33,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:33,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:33,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:33,623 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:33,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:33,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [556890230] [2024-10-24 23:56:33,624 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [556890230] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:33,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1457903986] [2024-10-24 23:56:33,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:33,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:33,624 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:33,626 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:33,628 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-10-24 23:56:33,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:33,679 INFO L255 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-10-24 23:56:33,682 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:33,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-24 23:56:33,771 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2024-10-24 23:56:33,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2024-10-24 23:56:33,787 INFO L349 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2024-10-24 23:56:33,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2024-10-24 23:56:34,351 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-24 23:56:34,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 12 [2024-10-24 23:56:34,368 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:34,368 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:34,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-24 23:56:34,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-24 23:56:34,531 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 23:56:34,531 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1457903986] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:34,531 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:34,531 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7] total 21 [2024-10-24 23:56:34,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1557100599] [2024-10-24 23:56:34,532 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:34,532 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:34,532 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:34,532 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 5 times [2024-10-24 23:56:34,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:34,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1777343185] [2024-10-24 23:56:34,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:34,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:34,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:34,537 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:34,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:34,540 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:34,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:34,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-10-24 23:56:34,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=358, Unknown=2, NotChecked=0, Total=462 [2024-10-24 23:56:34,592 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. cyclomatic complexity: 12 Second operand has 22 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:35,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:35,689 INFO L93 Difference]: Finished difference Result 37 states and 47 transitions. [2024-10-24 23:56:35,689 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 47 transitions. [2024-10-24 23:56:35,690 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:35,690 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 35 states and 45 transitions. [2024-10-24 23:56:35,690 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-24 23:56:35,690 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-24 23:56:35,691 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 45 transitions. [2024-10-24 23:56:35,691 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:35,691 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 45 transitions. [2024-10-24 23:56:35,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 45 transitions. [2024-10-24 23:56:35,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 19. [2024-10-24 23:56:35,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:35,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2024-10-24 23:56:35,693 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 24 transitions. [2024-10-24 23:56:35,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-10-24 23:56:35,694 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 24 transitions. [2024-10-24 23:56:35,694 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-24 23:56:35,694 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 24 transitions. [2024-10-24 23:56:35,694 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:35,694 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:35,694 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:35,695 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:35,695 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:35,695 INFO L745 eck$LassoCheckResult]: Stem: 870#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 871#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 872#L367 assume !(main_~length~0#1 < 1); 861#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 862#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 863#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 873#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 879#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 874#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 875#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 876#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 878#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 864#L370-4 main_~j~0#1 := 0; 865#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 868#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 869#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 866#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 867#L378-2 [2024-10-24 23:56:35,695 INFO L747 eck$LassoCheckResult]: Loop: 867#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 877#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 867#L378-2 [2024-10-24 23:56:35,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:35,696 INFO L85 PathProgramCache]: Analyzing trace with hash -685994466, now seen corresponding path program 2 times [2024-10-24 23:56:35,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:35,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892473786] [2024-10-24 23:56:35,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:35,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:35,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:35,959 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:35,960 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:35,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892473786] [2024-10-24 23:56:35,960 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [892473786] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:35,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2082299531] [2024-10-24 23:56:35,960 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-24 23:56:35,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:35,960 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:35,962 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:35,964 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-10-24 23:56:36,028 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-24 23:56:36,029 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:36,030 INFO L255 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-10-24 23:56:36,031 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:36,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-24 23:56:36,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-24 23:56:36,226 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:36,226 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:36,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:36,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:36,323 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:36,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2082299531] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:36,323 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:36,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 18 [2024-10-24 23:56:36,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [485849530] [2024-10-24 23:56:36,323 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:36,323 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:36,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:36,324 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 6 times [2024-10-24 23:56:36,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:36,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214590545] [2024-10-24 23:56:36,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:36,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:36,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:36,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:36,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:36,333 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:36,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:36,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-10-24 23:56:36,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2024-10-24 23:56:36,390 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. cyclomatic complexity: 8 Second operand has 19 states, 18 states have (on average 2.0) internal successors, (36), 19 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:36,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:36,548 INFO L93 Difference]: Finished difference Result 35 states and 45 transitions. [2024-10-24 23:56:36,548 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 45 transitions. [2024-10-24 23:56:36,549 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:36,549 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 34 states and 44 transitions. [2024-10-24 23:56:36,549 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-24 23:56:36,549 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-24 23:56:36,549 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 44 transitions. [2024-10-24 23:56:36,549 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:36,550 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 44 transitions. [2024-10-24 23:56:36,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 44 transitions. [2024-10-24 23:56:36,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2024-10-24 23:56:36,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.2962962962962963) internal successors, (35), 26 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:36,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 35 transitions. [2024-10-24 23:56:36,554 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 35 transitions. [2024-10-24 23:56:36,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-24 23:56:36,555 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 35 transitions. [2024-10-24 23:56:36,555 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-10-24 23:56:36,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 35 transitions. [2024-10-24 23:56:36,555 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:36,555 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:36,556 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:36,556 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:36,556 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:36,556 INFO L745 eck$LassoCheckResult]: Stem: 1050#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1051#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1052#L367 assume !(main_~length~0#1 < 1); 1041#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1042#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1043#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1053#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1061#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1054#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1055#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1056#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1058#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1059#L370-4 main_~j~0#1 := 0; 1064#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1063#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1057#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1048#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1049#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1046#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1047#L378-2 [2024-10-24 23:56:36,556 INFO L747 eck$LassoCheckResult]: Loop: 1047#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1062#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1047#L378-2 [2024-10-24 23:56:36,557 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:36,557 INFO L85 PathProgramCache]: Analyzing trace with hash -2110686111, now seen corresponding path program 3 times [2024-10-24 23:56:36,557 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:36,557 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30909685] [2024-10-24 23:56:36,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:36,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:36,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:36,658 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:36,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:36,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30909685] [2024-10-24 23:56:36,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [30909685] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:36,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [721227318] [2024-10-24 23:56:36,658 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-24 23:56:36,658 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:36,659 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:36,662 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:36,663 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-10-24 23:56:36,721 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-10-24 23:56:36,722 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:36,722 INFO L255 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-24 23:56:36,723 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:36,787 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:36,787 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:36,843 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:36,843 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [721227318] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:36,843 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:36,843 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 14 [2024-10-24 23:56:36,843 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1860576227] [2024-10-24 23:56:36,844 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:36,844 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:36,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:36,844 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 7 times [2024-10-24 23:56:36,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:36,844 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015773691] [2024-10-24 23:56:36,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:36,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:36,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:36,849 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:36,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:36,852 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:36,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:36,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-10-24 23:56:36,902 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2024-10-24 23:56:36,902 INFO L87 Difference]: Start difference. First operand 27 states and 35 transitions. cyclomatic complexity: 12 Second operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:36,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:36,973 INFO L93 Difference]: Finished difference Result 38 states and 47 transitions. [2024-10-24 23:56:36,973 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 47 transitions. [2024-10-24 23:56:36,973 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:36,974 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 32 states and 41 transitions. [2024-10-24 23:56:36,974 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-24 23:56:36,974 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-24 23:56:36,974 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 41 transitions. [2024-10-24 23:56:36,974 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:36,974 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-24 23:56:36,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 41 transitions. [2024-10-24 23:56:36,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 29. [2024-10-24 23:56:36,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 28 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:36,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2024-10-24 23:56:36,978 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 37 transitions. [2024-10-24 23:56:36,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-24 23:56:36,979 INFO L425 stractBuchiCegarLoop]: Abstraction has 29 states and 37 transitions. [2024-10-24 23:56:36,979 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-10-24 23:56:36,979 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 37 transitions. [2024-10-24 23:56:36,980 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:36,980 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:36,980 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:36,980 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:36,980 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:36,980 INFO L745 eck$LassoCheckResult]: Stem: 1240#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1241#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1242#L367 assume !(main_~length~0#1 < 1); 1231#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1232#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1233#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1243#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1246#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1244#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1245#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1259#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1258#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1253#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1257#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1254#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1234#L370-4 main_~j~0#1 := 0; 1235#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1238#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1239#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1236#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1237#L378-2 [2024-10-24 23:56:36,981 INFO L747 eck$LassoCheckResult]: Loop: 1237#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1248#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1237#L378-2 [2024-10-24 23:56:36,981 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:36,981 INFO L85 PathProgramCache]: Analyzing trace with hash -761055450, now seen corresponding path program 1 times [2024-10-24 23:56:36,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:36,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886913739] [2024-10-24 23:56:36,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:36,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:37,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:37,402 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:37,403 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:37,403 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886913739] [2024-10-24 23:56:37,403 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [886913739] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:37,403 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1174220289] [2024-10-24 23:56:37,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:37,403 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:37,404 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:37,406 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:37,407 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-10-24 23:56:37,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:37,468 INFO L255 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-10-24 23:56:37,470 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:37,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-24 23:56:37,537 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-24 23:56:37,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2024-10-24 23:56:37,555 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-24 23:56:37,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2024-10-24 23:56:38,325 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-24 23:56:38,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 12 [2024-10-24 23:56:38,338 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:38,338 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:38,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:38,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:38,495 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 23:56:38,495 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1174220289] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:38,495 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:38,496 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 9] total 18 [2024-10-24 23:56:38,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349170166] [2024-10-24 23:56:38,496 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:38,497 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:38,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:38,498 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 8 times [2024-10-24 23:56:38,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:38,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590235968] [2024-10-24 23:56:38,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:38,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:38,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:38,506 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:38,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:38,510 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:38,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:38,559 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-10-24 23:56:38,559 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=269, Unknown=1, NotChecked=0, Total=342 [2024-10-24 23:56:38,560 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. cyclomatic complexity: 12 Second operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 19 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:39,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:39,360 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-10-24 23:56:39,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 57 transitions. [2024-10-24 23:56:39,360 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:39,361 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 44 states and 55 transitions. [2024-10-24 23:56:39,361 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-24 23:56:39,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-24 23:56:39,361 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 55 transitions. [2024-10-24 23:56:39,361 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:39,361 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 55 transitions. [2024-10-24 23:56:39,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 55 transitions. [2024-10-24 23:56:39,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 24. [2024-10-24 23:56:39,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.25) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:39,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 30 transitions. [2024-10-24 23:56:39,363 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 30 transitions. [2024-10-24 23:56:39,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-24 23:56:39,364 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 30 transitions. [2024-10-24 23:56:39,364 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-10-24 23:56:39,364 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 30 transitions. [2024-10-24 23:56:39,365 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:39,365 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:39,365 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:39,365 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:39,365 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:39,365 INFO L745 eck$LassoCheckResult]: Stem: 1459#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1460#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1461#L367 assume !(main_~length~0#1 < 1); 1450#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1451#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1452#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1462#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1471#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1463#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1464#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1465#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1467#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1469#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1470#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1468#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1453#L370-4 main_~j~0#1 := 0; 1454#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1457#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1458#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1466#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1473#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1455#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1456#L378-2 [2024-10-24 23:56:39,365 INFO L747 eck$LassoCheckResult]: Loop: 1456#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1472#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1456#L378-2 [2024-10-24 23:56:39,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:39,366 INFO L85 PathProgramCache]: Analyzing trace with hash -1622874713, now seen corresponding path program 4 times [2024-10-24 23:56:39,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:39,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613830702] [2024-10-24 23:56:39,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:39,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:39,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:39,755 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:39,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:39,756 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613830702] [2024-10-24 23:56:39,756 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1613830702] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:39,756 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1883125404] [2024-10-24 23:56:39,756 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-24 23:56:39,756 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:39,756 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:39,760 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:39,761 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2024-10-24 23:56:39,823 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-24 23:56:39,823 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:39,824 INFO L255 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-10-24 23:56:39,826 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:39,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-24 23:56:39,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2024-10-24 23:56:39,925 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:39,925 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:40,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:40,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:40,036 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:40,037 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1883125404] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:40,037 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:40,037 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2024-10-24 23:56:40,037 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [808325380] [2024-10-24 23:56:40,037 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:40,037 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:40,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:40,038 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 9 times [2024-10-24 23:56:40,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:40,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719936583] [2024-10-24 23:56:40,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:40,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:40,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:40,042 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:40,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:40,045 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:40,092 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:40,092 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-10-24 23:56:40,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2024-10-24 23:56:40,093 INFO L87 Difference]: Start difference. First operand 24 states and 30 transitions. cyclomatic complexity: 9 Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 17 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:40,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:40,293 INFO L93 Difference]: Finished difference Result 42 states and 53 transitions. [2024-10-24 23:56:40,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 53 transitions. [2024-10-24 23:56:40,294 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:40,295 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 41 states and 52 transitions. [2024-10-24 23:56:40,295 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-24 23:56:40,295 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-24 23:56:40,295 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 52 transitions. [2024-10-24 23:56:40,295 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:40,295 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 52 transitions. [2024-10-24 23:56:40,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 52 transitions. [2024-10-24 23:56:40,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 32. [2024-10-24 23:56:40,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.28125) internal successors, (41), 31 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:40,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 41 transitions. [2024-10-24 23:56:40,297 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-24 23:56:40,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-24 23:56:40,302 INFO L425 stractBuchiCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-24 23:56:40,302 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-10-24 23:56:40,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 41 transitions. [2024-10-24 23:56:40,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:40,302 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:40,302 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:40,303 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:40,303 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:40,303 INFO L745 eck$LassoCheckResult]: Stem: 1673#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1674#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1675#L367 assume !(main_~length~0#1 < 1); 1664#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1665#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1666#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1676#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1682#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1683#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1688#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1689#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1677#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1678#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1679#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1687#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1667#L370-4 main_~j~0#1 := 0; 1668#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1693#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1692#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1671#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1672#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1681#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1690#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1669#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1670#L378-2 [2024-10-24 23:56:40,303 INFO L747 eck$LassoCheckResult]: Loop: 1670#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1691#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1670#L378-2 [2024-10-24 23:56:40,304 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:40,304 INFO L85 PathProgramCache]: Analyzing trace with hash -509471318, now seen corresponding path program 5 times [2024-10-24 23:56:40,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:40,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766389085] [2024-10-24 23:56:40,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:40,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:40,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:40,446 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:40,447 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:40,447 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766389085] [2024-10-24 23:56:40,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1766389085] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:40,447 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [89411402] [2024-10-24 23:56:40,447 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-24 23:56:40,447 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:40,447 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:40,449 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:40,450 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2024-10-24 23:56:40,519 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2024-10-24 23:56:40,520 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:40,520 INFO L255 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-10-24 23:56:40,521 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:40,625 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:40,625 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:40,689 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:40,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [89411402] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:40,689 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:40,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 17 [2024-10-24 23:56:40,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833521102] [2024-10-24 23:56:40,689 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:40,690 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:40,690 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:40,690 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 10 times [2024-10-24 23:56:40,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:40,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035753778] [2024-10-24 23:56:40,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:40,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:40,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:40,693 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:40,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:40,696 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:40,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:40,739 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-10-24 23:56:40,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2024-10-24 23:56:40,740 INFO L87 Difference]: Start difference. First operand 32 states and 41 transitions. cyclomatic complexity: 13 Second operand has 17 states, 17 states have (on average 2.235294117647059) internal successors, (38), 17 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:40,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:40,819 INFO L93 Difference]: Finished difference Result 45 states and 55 transitions. [2024-10-24 23:56:40,820 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 55 transitions. [2024-10-24 23:56:40,820 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:40,820 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 37 states and 47 transitions. [2024-10-24 23:56:40,820 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-24 23:56:40,820 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-24 23:56:40,820 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 47 transitions. [2024-10-24 23:56:40,821 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:40,821 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-24 23:56:40,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 47 transitions. [2024-10-24 23:56:40,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 34. [2024-10-24 23:56:40,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:40,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 43 transitions. [2024-10-24 23:56:40,823 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 43 transitions. [2024-10-24 23:56:40,825 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-24 23:56:40,826 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 43 transitions. [2024-10-24 23:56:40,827 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-10-24 23:56:40,827 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 43 transitions. [2024-10-24 23:56:40,828 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:40,828 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:40,828 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:40,828 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:40,828 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:40,829 INFO L745 eck$LassoCheckResult]: Stem: 1909#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1910#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1908#L367 assume !(main_~length~0#1 < 1); 1899#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1900#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1901#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1911#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1914#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1912#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1913#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1932#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1931#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1930#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1929#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1928#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1923#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1927#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1925#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1921#L370-4 main_~j~0#1 := 0; 1920#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1915#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1919#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1917#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1916#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1904#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1905#L378-2 [2024-10-24 23:56:40,829 INFO L747 eck$LassoCheckResult]: Loop: 1905#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1918#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1905#L378-2 [2024-10-24 23:56:40,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:40,830 INFO L85 PathProgramCache]: Analyzing trace with hash 1285147747, now seen corresponding path program 2 times [2024-10-24 23:56:40,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:40,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499831585] [2024-10-24 23:56:40,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:40,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:40,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:41,282 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:41,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:41,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499831585] [2024-10-24 23:56:41,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499831585] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:41,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1116213565] [2024-10-24 23:56:41,283 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-24 23:56:41,283 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:41,284 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:41,286 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:41,288 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2024-10-24 23:56:41,351 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-24 23:56:41,351 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:41,352 INFO L255 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-10-24 23:56:41,354 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:41,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-24 23:56:41,523 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-24 23:56:41,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-10-24 23:56:41,539 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-24 23:56:41,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2024-10-24 23:56:41,778 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-24 23:56:41,779 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-24 23:56:41,780 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 12 [2024-10-24 23:56:41,791 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:41,791 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:41,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:41,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:41,955 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 23:56:41,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1116213565] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:41,955 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:41,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 11] total 26 [2024-10-24 23:56:41,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939583753] [2024-10-24 23:56:41,955 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:41,955 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:41,956 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:41,956 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 11 times [2024-10-24 23:56:41,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:41,956 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785479135] [2024-10-24 23:56:41,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:41,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:41,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:41,959 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:41,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:41,962 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:42,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:42,023 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-24 23:56:42,024 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=586, Unknown=0, NotChecked=0, Total=702 [2024-10-24 23:56:42,024 INFO L87 Difference]: Start difference. First operand 34 states and 43 transitions. cyclomatic complexity: 13 Second operand has 27 states, 26 states have (on average 2.0384615384615383) internal successors, (53), 27 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:42,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:42,446 INFO L93 Difference]: Finished difference Result 55 states and 67 transitions. [2024-10-24 23:56:42,446 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 67 transitions. [2024-10-24 23:56:42,447 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:42,447 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 53 states and 65 transitions. [2024-10-24 23:56:42,449 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-24 23:56:42,449 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-24 23:56:42,449 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 65 transitions. [2024-10-24 23:56:42,450 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:42,450 INFO L218 hiAutomatonCegarLoop]: Abstraction has 53 states and 65 transitions. [2024-10-24 23:56:42,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 65 transitions. [2024-10-24 23:56:42,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 29. [2024-10-24 23:56:42,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2413793103448276) internal successors, (36), 28 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:42,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 36 transitions. [2024-10-24 23:56:42,454 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 36 transitions. [2024-10-24 23:56:42,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-24 23:56:42,455 INFO L425 stractBuchiCegarLoop]: Abstraction has 29 states and 36 transitions. [2024-10-24 23:56:42,456 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-10-24 23:56:42,457 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 36 transitions. [2024-10-24 23:56:42,457 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:42,457 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:42,457 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:42,458 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:42,458 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:42,458 INFO L745 eck$LassoCheckResult]: Stem: 2185#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2186#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2187#L367 assume !(main_~length~0#1 < 1); 2176#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2177#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2178#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2188#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2200#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2189#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2190#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2191#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2193#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2199#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2198#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2197#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2195#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2196#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2194#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2179#L370-4 main_~j~0#1 := 0; 2180#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2183#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2184#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2192#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2204#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2202#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2201#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2181#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2182#L378-2 [2024-10-24 23:56:42,459 INFO L747 eck$LassoCheckResult]: Loop: 2182#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2203#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2182#L378-2 [2024-10-24 23:56:42,459 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:42,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1665431516, now seen corresponding path program 6 times [2024-10-24 23:56:42,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:42,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803025991] [2024-10-24 23:56:42,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:42,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:42,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:42,838 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:42,839 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:42,839 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803025991] [2024-10-24 23:56:42,839 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [803025991] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:42,839 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [548972855] [2024-10-24 23:56:42,839 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-24 23:56:42,839 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:42,840 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:42,841 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:42,843 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2024-10-24 23:56:42,914 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2024-10-24 23:56:42,914 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:42,916 INFO L255 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-10-24 23:56:42,917 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:43,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-24 23:56:43,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-24 23:56:43,253 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:43,253 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:43,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:43,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:43,409 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:43,409 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [548972855] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:43,409 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:43,409 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 26 [2024-10-24 23:56:43,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121151043] [2024-10-24 23:56:43,410 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:43,410 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:43,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:43,410 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 12 times [2024-10-24 23:56:43,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:43,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138520176] [2024-10-24 23:56:43,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:43,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:43,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:43,415 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:43,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:43,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:43,458 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:43,459 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-24 23:56:43,459 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=609, Unknown=0, NotChecked=0, Total=702 [2024-10-24 23:56:43,459 INFO L87 Difference]: Start difference. First operand 29 states and 36 transitions. cyclomatic complexity: 10 Second operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 27 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:43,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:43,735 INFO L93 Difference]: Finished difference Result 49 states and 61 transitions. [2024-10-24 23:56:43,735 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 61 transitions. [2024-10-24 23:56:43,736 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:43,736 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 48 states and 60 transitions. [2024-10-24 23:56:43,736 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-24 23:56:43,736 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-24 23:56:43,736 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 60 transitions. [2024-10-24 23:56:43,736 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:43,736 INFO L218 hiAutomatonCegarLoop]: Abstraction has 48 states and 60 transitions. [2024-10-24 23:56:43,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 60 transitions. [2024-10-24 23:56:43,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 37. [2024-10-24 23:56:43,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:43,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 47 transitions. [2024-10-24 23:56:43,739 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-24 23:56:43,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-24 23:56:43,740 INFO L425 stractBuchiCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-24 23:56:43,740 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-10-24 23:56:43,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 47 transitions. [2024-10-24 23:56:43,740 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:43,740 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:43,740 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:43,741 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:43,741 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:43,741 INFO L745 eck$LassoCheckResult]: Stem: 2457#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2458#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2459#L367 assume !(main_~length~0#1 < 1); 2448#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2449#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2450#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2460#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2477#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2461#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2462#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2465#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2466#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2476#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2475#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2474#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2473#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2469#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2467#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2455#L370-4 main_~j~0#1 := 0; 2456#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2480#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2464#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2453#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2454#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2479#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2478#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2472#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2471#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2451#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2452#L378-2 [2024-10-24 23:56:43,741 INFO L747 eck$LassoCheckResult]: Loop: 2452#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2470#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2452#L378-2 [2024-10-24 23:56:43,741 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:43,742 INFO L85 PathProgramCache]: Analyzing trace with hash 1543113959, now seen corresponding path program 7 times [2024-10-24 23:56:43,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:43,742 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [91626258] [2024-10-24 23:56:43,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:43,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:43,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:43,918 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 13 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:43,919 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:43,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [91626258] [2024-10-24 23:56:43,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [91626258] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:43,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [519461069] [2024-10-24 23:56:43,919 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-10-24 23:56:43,919 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:43,919 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:43,921 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:43,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2024-10-24 23:56:43,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:43,997 INFO L255 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-24 23:56:43,998 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:44,120 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:44,121 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:44,211 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:44,212 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [519461069] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:44,212 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:44,212 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 20 [2024-10-24 23:56:44,212 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761098603] [2024-10-24 23:56:44,212 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:44,212 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:44,213 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:44,213 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 13 times [2024-10-24 23:56:44,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:44,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932360177] [2024-10-24 23:56:44,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:44,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:44,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:44,218 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:44,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:44,220 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:44,268 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:44,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-10-24 23:56:44,269 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2024-10-24 23:56:44,269 INFO L87 Difference]: Start difference. First operand 37 states and 47 transitions. cyclomatic complexity: 14 Second operand has 20 states, 20 states have (on average 2.3) internal successors, (46), 20 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:44,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:44,358 INFO L93 Difference]: Finished difference Result 52 states and 63 transitions. [2024-10-24 23:56:44,359 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 63 transitions. [2024-10-24 23:56:44,359 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:44,359 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 42 states and 53 transitions. [2024-10-24 23:56:44,359 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-24 23:56:44,360 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-24 23:56:44,360 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42 states and 53 transitions. [2024-10-24 23:56:44,360 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:44,360 INFO L218 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2024-10-24 23:56:44,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states and 53 transitions. [2024-10-24 23:56:44,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 39. [2024-10-24 23:56:44,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.2564102564102564) internal successors, (49), 38 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:44,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 49 transitions. [2024-10-24 23:56:44,362 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 49 transitions. [2024-10-24 23:56:44,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-24 23:56:44,364 INFO L425 stractBuchiCegarLoop]: Abstraction has 39 states and 49 transitions. [2024-10-24 23:56:44,364 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-10-24 23:56:44,364 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 49 transitions. [2024-10-24 23:56:44,365 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:44,365 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:44,365 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:44,365 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:44,365 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:44,366 INFO L745 eck$LassoCheckResult]: Stem: 2737#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2738#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2739#L367 assume !(main_~length~0#1 < 1); 2728#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2729#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2730#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2740#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2743#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2741#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2742#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2766#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2765#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2764#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2763#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2762#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2761#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2760#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2759#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2754#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2758#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2755#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2752#L370-4 main_~j~0#1 := 0; 2751#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2744#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2750#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2749#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2748#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2746#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2745#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2733#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2734#L378-2 [2024-10-24 23:56:44,366 INFO L747 eck$LassoCheckResult]: Loop: 2734#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2747#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2734#L378-2 [2024-10-24 23:56:44,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:44,366 INFO L85 PathProgramCache]: Analyzing trace with hash -2086076244, now seen corresponding path program 3 times [2024-10-24 23:56:44,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:44,366 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296035151] [2024-10-24 23:56:44,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:44,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:44,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:44,914 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:44,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:44,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296035151] [2024-10-24 23:56:44,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [296035151] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:44,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1671760912] [2024-10-24 23:56:44,915 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-24 23:56:44,915 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:44,915 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:44,917 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:44,919 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2024-10-24 23:56:45,007 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-10-24 23:56:45,008 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:45,009 INFO L255 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-10-24 23:56:45,011 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:45,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-24 23:56:45,101 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-24 23:56:45,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2024-10-24 23:56:45,118 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-24 23:56:45,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2024-10-24 23:56:46,245 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-24 23:56:46,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 12 [2024-10-24 23:56:46,263 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:46,263 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:46,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:46,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:46,481 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 45 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 23:56:46,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1671760912] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:46,482 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:46,482 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 13] total 24 [2024-10-24 23:56:46,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674071072] [2024-10-24 23:56:46,482 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:46,483 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:46,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:46,484 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 14 times [2024-10-24 23:56:46,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:46,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351079139] [2024-10-24 23:56:46,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:46,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:46,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:46,492 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:46,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:46,496 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:46,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:46,554 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-24 23:56:46,555 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=502, Unknown=4, NotChecked=0, Total=600 [2024-10-24 23:56:46,555 INFO L87 Difference]: Start difference. First operand 39 states and 49 transitions. cyclomatic complexity: 14 Second operand has 25 states, 24 states have (on average 2.1666666666666665) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:48,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:48,091 INFO L93 Difference]: Finished difference Result 64 states and 77 transitions. [2024-10-24 23:56:48,091 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 64 states and 77 transitions. [2024-10-24 23:56:48,091 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:48,093 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 64 states to 62 states and 75 transitions. [2024-10-24 23:56:48,093 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-24 23:56:48,093 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-24 23:56:48,093 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 75 transitions. [2024-10-24 23:56:48,094 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:48,094 INFO L218 hiAutomatonCegarLoop]: Abstraction has 62 states and 75 transitions. [2024-10-24 23:56:48,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 75 transitions. [2024-10-24 23:56:48,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 34. [2024-10-24 23:56:48,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2352941176470589) internal successors, (42), 33 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:48,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-10-24 23:56:48,099 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-10-24 23:56:48,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-10-24 23:56:48,101 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-10-24 23:56:48,101 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-10-24 23:56:48,101 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 42 transitions. [2024-10-24 23:56:48,101 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:48,102 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:48,102 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:48,102 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:48,102 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:48,102 INFO L745 eck$LassoCheckResult]: Stem: 3054#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3055#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3056#L367 assume !(main_~length~0#1 < 1); 3045#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3046#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3047#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3057#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3060#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3058#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3059#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3063#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3064#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3073#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3072#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3071#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3070#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3069#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3068#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3066#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3067#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3065#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3048#L370-4 main_~j~0#1 := 0; 3049#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3061#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3062#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3052#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3053#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3078#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3077#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3076#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3075#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3050#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3051#L378-2 [2024-10-24 23:56:48,103 INFO L747 eck$LassoCheckResult]: Loop: 3051#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3074#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3051#L378-2 [2024-10-24 23:56:48,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:48,103 INFO L85 PathProgramCache]: Analyzing trace with hash 19338925, now seen corresponding path program 8 times [2024-10-24 23:56:48,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:48,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166482246] [2024-10-24 23:56:48,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:48,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:48,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:48,611 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:48,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:48,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1166482246] [2024-10-24 23:56:48,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1166482246] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:48,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1469497962] [2024-10-24 23:56:48,612 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-24 23:56:48,612 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:48,613 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:48,614 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:48,616 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2024-10-24 23:56:48,696 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-24 23:56:48,696 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:48,698 INFO L255 TraceCheckSpWp]: Trace formula consists of 163 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-10-24 23:56:48,699 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:48,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-24 23:56:49,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-24 23:56:49,089 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:49,089 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:49,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:49,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:49,264 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:49,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1469497962] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:49,264 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:49,265 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 30 [2024-10-24 23:56:49,265 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786783037] [2024-10-24 23:56:49,265 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:49,265 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:49,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:49,266 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 15 times [2024-10-24 23:56:49,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:49,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281349155] [2024-10-24 23:56:49,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:49,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:49,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:49,270 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:49,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:49,273 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:49,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:49,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2024-10-24 23:56:49,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=822, Unknown=0, NotChecked=0, Total=930 [2024-10-24 23:56:49,320 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. cyclomatic complexity: 11 Second operand has 31 states, 30 states have (on average 2.2) internal successors, (66), 31 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:49,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:49,674 INFO L93 Difference]: Finished difference Result 56 states and 69 transitions. [2024-10-24 23:56:49,674 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 69 transitions. [2024-10-24 23:56:49,675 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:49,675 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 55 states and 68 transitions. [2024-10-24 23:56:49,675 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-24 23:56:49,675 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-24 23:56:49,676 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 68 transitions. [2024-10-24 23:56:49,676 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:49,676 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 68 transitions. [2024-10-24 23:56:49,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 68 transitions. [2024-10-24 23:56:49,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 42. [2024-10-24 23:56:49,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2619047619047619) internal successors, (53), 41 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:49,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 53 transitions. [2024-10-24 23:56:49,679 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2024-10-24 23:56:49,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-24 23:56:49,681 INFO L425 stractBuchiCegarLoop]: Abstraction has 42 states and 53 transitions. [2024-10-24 23:56:49,681 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-10-24 23:56:49,682 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 53 transitions. [2024-10-24 23:56:49,682 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:49,682 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:49,682 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:49,682 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:49,682 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:49,684 INFO L745 eck$LassoCheckResult]: Stem: 3372#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3373#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3374#L367 assume !(main_~length~0#1 < 1); 3363#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3364#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3365#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3375#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3393#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3376#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3377#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3380#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3381#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3391#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3390#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3389#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3388#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3387#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3386#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3385#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3384#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3382#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3370#L370-4 main_~j~0#1 := 0; 3371#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3400#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3379#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3368#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3369#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3399#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3398#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3397#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3396#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3395#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3394#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3366#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3367#L378-2 [2024-10-24 23:56:49,684 INFO L747 eck$LassoCheckResult]: Loop: 3367#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3392#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3367#L378-2 [2024-10-24 23:56:49,685 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:49,685 INFO L85 PathProgramCache]: Analyzing trace with hash 1404837168, now seen corresponding path program 9 times [2024-10-24 23:56:49,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:49,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524285202] [2024-10-24 23:56:49,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:49,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:49,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:49,914 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:49,915 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:49,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524285202] [2024-10-24 23:56:49,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [524285202] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:49,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2130333429] [2024-10-24 23:56:49,915 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-24 23:56:49,916 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:49,916 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:49,918 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:49,919 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2024-10-24 23:56:50,022 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-10-24 23:56:50,022 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:50,024 INFO L255 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-10-24 23:56:50,025 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:50,175 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:50,176 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:50,306 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:50,306 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2130333429] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:50,307 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:50,307 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 23 [2024-10-24 23:56:50,307 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126017302] [2024-10-24 23:56:50,307 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:50,307 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:50,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:50,308 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 16 times [2024-10-24 23:56:50,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:50,308 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633039676] [2024-10-24 23:56:50,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:50,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:50,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:50,311 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:50,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:50,314 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:50,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:50,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-10-24 23:56:50,359 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=382, Unknown=0, NotChecked=0, Total=506 [2024-10-24 23:56:50,359 INFO L87 Difference]: Start difference. First operand 42 states and 53 transitions. cyclomatic complexity: 15 Second operand has 23 states, 23 states have (on average 2.3043478260869565) internal successors, (53), 23 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:50,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:50,459 INFO L93 Difference]: Finished difference Result 59 states and 71 transitions. [2024-10-24 23:56:50,459 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 71 transitions. [2024-10-24 23:56:50,459 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:50,460 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 47 states and 59 transitions. [2024-10-24 23:56:50,460 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-24 23:56:50,460 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-24 23:56:50,460 INFO L73 IsDeterministic]: Start isDeterministic. Operand 47 states and 59 transitions. [2024-10-24 23:56:50,460 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:50,460 INFO L218 hiAutomatonCegarLoop]: Abstraction has 47 states and 59 transitions. [2024-10-24 23:56:50,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states and 59 transitions. [2024-10-24 23:56:50,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 44. [2024-10-24 23:56:50,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.25) internal successors, (55), 43 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:50,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 55 transitions. [2024-10-24 23:56:50,463 INFO L240 hiAutomatonCegarLoop]: Abstraction has 44 states and 55 transitions. [2024-10-24 23:56:50,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-10-24 23:56:50,466 INFO L425 stractBuchiCegarLoop]: Abstraction has 44 states and 55 transitions. [2024-10-24 23:56:50,466 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-10-24 23:56:50,466 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 55 transitions. [2024-10-24 23:56:50,466 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:50,467 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:50,467 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:50,467 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:50,467 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:50,467 INFO L745 eck$LassoCheckResult]: Stem: 3697#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3698#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3699#L367 assume !(main_~length~0#1 < 1); 3688#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3689#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3690#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3700#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3703#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3701#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3702#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3731#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3730#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3729#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3728#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3727#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3726#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3725#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3724#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3723#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 3722#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3721#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3716#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3720#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 3717#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3714#L370-4 main_~j~0#1 := 0; 3713#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3704#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3712#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3711#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3710#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3709#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3708#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3706#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3705#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3693#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3694#L378-2 [2024-10-24 23:56:50,467 INFO L747 eck$LassoCheckResult]: Loop: 3694#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3707#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3694#L378-2 [2024-10-24 23:56:50,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:50,468 INFO L85 PathProgramCache]: Analyzing trace with hash -242230295, now seen corresponding path program 4 times [2024-10-24 23:56:50,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:50,468 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [876376255] [2024-10-24 23:56:50,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:50,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:50,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:51,088 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:51,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:51,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [876376255] [2024-10-24 23:56:51,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [876376255] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:51,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [746084322] [2024-10-24 23:56:51,089 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-24 23:56:51,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:51,089 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:51,090 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:51,091 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2024-10-24 23:56:51,162 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-24 23:56:51,162 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:51,163 INFO L255 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-10-24 23:56:51,165 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:51,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-24 23:56:51,232 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-24 23:56:51,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2024-10-24 23:56:51,245 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-24 23:56:51,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2024-10-24 23:56:51,634 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-24 23:56:51,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 12 [2024-10-24 23:56:51,653 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:51,653 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:51,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:51,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:51,782 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 69 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 23:56:51,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [746084322] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:51,783 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:51,783 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 15] total 26 [2024-10-24 23:56:51,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96158018] [2024-10-24 23:56:51,783 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:51,783 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:51,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:51,784 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 17 times [2024-10-24 23:56:51,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:51,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874947116] [2024-10-24 23:56:51,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:51,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:51,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:51,788 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:51,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:51,791 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:51,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:51,838 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-24 23:56:51,839 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=601, Unknown=0, NotChecked=0, Total=702 [2024-10-24 23:56:51,839 INFO L87 Difference]: Start difference. First operand 44 states and 55 transitions. cyclomatic complexity: 15 Second operand has 27 states, 26 states have (on average 2.1923076923076925) internal successors, (57), 27 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:53,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:53,123 INFO L93 Difference]: Finished difference Result 73 states and 87 transitions. [2024-10-24 23:56:53,123 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 87 transitions. [2024-10-24 23:56:53,124 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:53,124 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 71 states and 85 transitions. [2024-10-24 23:56:53,124 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-24 23:56:53,124 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-24 23:56:53,124 INFO L73 IsDeterministic]: Start isDeterministic. Operand 71 states and 85 transitions. [2024-10-24 23:56:53,124 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:53,125 INFO L218 hiAutomatonCegarLoop]: Abstraction has 71 states and 85 transitions. [2024-10-24 23:56:53,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states and 85 transitions. [2024-10-24 23:56:53,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 39. [2024-10-24 23:56:53,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.2307692307692308) internal successors, (48), 38 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:53,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 48 transitions. [2024-10-24 23:56:53,127 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 48 transitions. [2024-10-24 23:56:53,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-10-24 23:56:53,129 INFO L425 stractBuchiCegarLoop]: Abstraction has 39 states and 48 transitions. [2024-10-24 23:56:53,129 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-10-24 23:56:53,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 48 transitions. [2024-10-24 23:56:53,129 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:53,129 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:53,129 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:53,130 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:53,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:53,130 INFO L745 eck$LassoCheckResult]: Stem: 4063#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4064#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4062#L367 assume !(main_~length~0#1 < 1); 4053#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4054#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4055#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4065#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4084#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4066#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4067#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4068#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4071#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4083#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4082#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4081#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4080#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4079#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4078#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4077#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4076#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4075#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4073#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4074#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4072#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4056#L370-4 main_~j~0#1 := 0; 4057#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4069#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4070#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4060#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4061#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4091#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4090#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4089#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4088#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4087#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4086#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4058#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4059#L378-2 [2024-10-24 23:56:53,130 INFO L747 eck$LassoCheckResult]: Loop: 4059#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4085#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4059#L378-2 [2024-10-24 23:56:53,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:53,131 INFO L85 PathProgramCache]: Analyzing trace with hash -1876148438, now seen corresponding path program 10 times [2024-10-24 23:56:53,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:53,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564336034] [2024-10-24 23:56:53,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:53,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:53,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:53,733 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:53,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:53,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564336034] [2024-10-24 23:56:53,733 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1564336034] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:53,733 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2021622425] [2024-10-24 23:56:53,733 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-24 23:56:53,734 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:53,734 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:53,736 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:53,738 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2024-10-24 23:56:53,822 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-24 23:56:53,822 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:53,823 INFO L255 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-10-24 23:56:53,824 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:53,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-24 23:56:54,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2024-10-24 23:56:54,017 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:54,017 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:54,161 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:54,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:54,184 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:54,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2021622425] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:54,184 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:54,185 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 25 [2024-10-24 23:56:54,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18912248] [2024-10-24 23:56:54,185 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:54,185 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:54,185 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:54,185 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 18 times [2024-10-24 23:56:54,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:54,185 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689611494] [2024-10-24 23:56:54,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:54,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:54,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:54,189 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:54,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:54,192 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:54,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:54,237 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-10-24 23:56:54,237 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=577, Unknown=0, NotChecked=0, Total=650 [2024-10-24 23:56:54,238 INFO L87 Difference]: Start difference. First operand 39 states and 48 transitions. cyclomatic complexity: 12 Second operand has 26 states, 25 states have (on average 2.2) internal successors, (55), 26 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:54,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:54,583 INFO L93 Difference]: Finished difference Result 63 states and 77 transitions. [2024-10-24 23:56:54,583 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 77 transitions. [2024-10-24 23:56:54,584 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:56:54,584 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 62 states and 76 transitions. [2024-10-24 23:56:54,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-24 23:56:54,584 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-24 23:56:54,585 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 76 transitions. [2024-10-24 23:56:54,585 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:54,585 INFO L218 hiAutomatonCegarLoop]: Abstraction has 62 states and 76 transitions. [2024-10-24 23:56:54,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 76 transitions. [2024-10-24 23:56:54,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 47. [2024-10-24 23:56:54,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.2553191489361701) internal successors, (59), 46 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:54,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 59 transitions. [2024-10-24 23:56:54,587 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 59 transitions. [2024-10-24 23:56:54,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-10-24 23:56:54,592 INFO L425 stractBuchiCegarLoop]: Abstraction has 47 states and 59 transitions. [2024-10-24 23:56:54,592 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-10-24 23:56:54,592 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 59 transitions. [2024-10-24 23:56:54,592 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:54,593 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:54,595 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:54,595 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:54,595 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:54,596 INFO L745 eck$LassoCheckResult]: Stem: 4413#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4414#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4415#L367 assume !(main_~length~0#1 < 1); 4404#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4405#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4406#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4416#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4436#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4417#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4418#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4419#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4422#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4435#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4434#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4433#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4432#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4431#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4430#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4429#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4428#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4427#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4426#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4425#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4423#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4407#L370-4 main_~j~0#1 := 0; 4408#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4446#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4421#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4411#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4412#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4445#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4444#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4443#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4442#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4441#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4440#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4439#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4438#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4409#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4410#L378-2 [2024-10-24 23:56:54,596 INFO L747 eck$LassoCheckResult]: Loop: 4410#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4437#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4410#L378-2 [2024-10-24 23:56:54,596 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:54,596 INFO L85 PathProgramCache]: Analyzing trace with hash 907614829, now seen corresponding path program 11 times [2024-10-24 23:56:54,596 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:54,596 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379425860] [2024-10-24 23:56:54,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:54,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:54,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:54,840 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 31 proven. 62 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:54,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:54,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379425860] [2024-10-24 23:56:54,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [379425860] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:54,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [563046391] [2024-10-24 23:56:54,841 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-24 23:56:54,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:54,841 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:54,843 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:54,846 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2024-10-24 23:56:54,995 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2024-10-24 23:56:54,996 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:54,997 INFO L255 TraceCheckSpWp]: Trace formula consists of 202 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-10-24 23:56:54,998 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:55,158 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 42 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:55,159 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:55,271 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 36 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:55,271 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [563046391] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:55,272 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:55,272 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 26 [2024-10-24 23:56:55,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902722475] [2024-10-24 23:56:55,272 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:55,272 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:55,272 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:55,272 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 19 times [2024-10-24 23:56:55,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:55,273 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436598110] [2024-10-24 23:56:55,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:55,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:55,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:55,276 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:55,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:55,279 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:55,319 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:55,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-10-24 23:56:55,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=493, Unknown=0, NotChecked=0, Total=650 [2024-10-24 23:56:55,320 INFO L87 Difference]: Start difference. First operand 47 states and 59 transitions. cyclomatic complexity: 16 Second operand has 26 states, 26 states have (on average 2.269230769230769) internal successors, (59), 26 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:55,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:56:55,399 INFO L93 Difference]: Finished difference Result 66 states and 79 transitions. [2024-10-24 23:56:55,399 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 79 transitions. [2024-10-24 23:56:55,399 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:55,400 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 52 states and 65 transitions. [2024-10-24 23:56:55,400 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-24 23:56:55,400 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-24 23:56:55,400 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 65 transitions. [2024-10-24 23:56:55,400 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:56:55,400 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 65 transitions. [2024-10-24 23:56:55,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 65 transitions. [2024-10-24 23:56:55,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 49. [2024-10-24 23:56:55,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.2448979591836735) internal successors, (61), 48 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:56:55,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 61 transitions. [2024-10-24 23:56:55,402 INFO L240 hiAutomatonCegarLoop]: Abstraction has 49 states and 61 transitions. [2024-10-24 23:56:55,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-10-24 23:56:55,403 INFO L425 stractBuchiCegarLoop]: Abstraction has 49 states and 61 transitions. [2024-10-24 23:56:55,403 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-10-24 23:56:55,403 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 61 transitions. [2024-10-24 23:56:55,403 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:56:55,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:56:55,403 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:56:55,404 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:56:55,404 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:56:55,404 INFO L745 eck$LassoCheckResult]: Stem: 4783#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4784#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4785#L367 assume !(main_~length~0#1 < 1); 4774#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4775#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4776#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4786#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4789#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4787#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4788#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4822#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4821#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4820#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4819#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4818#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4817#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4816#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4815#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4814#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4813#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4812#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4811#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 4810#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4809#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4804#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4808#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4805#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4802#L370-4 main_~j~0#1 := 0; 4801#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4790#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4800#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4799#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4798#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4797#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4796#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4795#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4794#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4792#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4791#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4779#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4780#L378-2 [2024-10-24 23:56:55,404 INFO L747 eck$LassoCheckResult]: Loop: 4780#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4793#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4780#L378-2 [2024-10-24 23:56:55,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:55,405 INFO L85 PathProgramCache]: Analyzing trace with hash 168453938, now seen corresponding path program 5 times [2024-10-24 23:56:55,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:55,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532587187] [2024-10-24 23:56:55,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:55,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:55,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:56:56,094 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:56,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:56:56,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532587187] [2024-10-24 23:56:56,095 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1532587187] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:56:56,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717161667] [2024-10-24 23:56:56,095 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-24 23:56:56,095 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:56:56,096 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:56:56,098 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:56:56,099 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2024-10-24 23:56:56,228 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2024-10-24 23:56:56,228 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:56:56,231 INFO L255 TraceCheckSpWp]: Trace formula consists of 212 conjuncts, 42 conjuncts are in the unsatisfiable core [2024-10-24 23:56:56,232 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:56:56,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-24 23:56:56,488 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-24 23:56:56,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-10-24 23:56:56,498 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-24 23:56:56,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2024-10-24 23:56:57,115 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-24 23:56:57,116 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-24 23:56:57,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 12 [2024-10-24 23:56:57,134 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:56:57,134 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:56:57,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-24 23:56:57,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-24 23:56:57,391 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 98 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 23:56:57,391 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717161667] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:56:57,391 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:56:57,392 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 20, 18] total 40 [2024-10-24 23:56:57,392 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321881871] [2024-10-24 23:56:57,392 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:56:57,392 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:56:57,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:56:57,392 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 20 times [2024-10-24 23:56:57,392 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:56:57,392 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [211601832] [2024-10-24 23:56:57,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:56:57,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:56:57,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:57,395 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:56:57,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:56:57,398 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:56:57,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:56:57,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-10-24 23:56:57,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=176, Invalid=1463, Unknown=1, NotChecked=0, Total=1640 [2024-10-24 23:56:57,446 INFO L87 Difference]: Start difference. First operand 49 states and 61 transitions. cyclomatic complexity: 16 Second operand has 41 states, 40 states have (on average 2.075) internal successors, (83), 41 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:57:10,267 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2024-10-24 23:57:22,297 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0] [2024-10-24 23:57:23,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:57:23,028 INFO L93 Difference]: Finished difference Result 82 states and 97 transitions. [2024-10-24 23:57:23,029 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 97 transitions. [2024-10-24 23:57:23,029 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-24 23:57:23,029 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 80 states and 95 transitions. [2024-10-24 23:57:23,029 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-24 23:57:23,030 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-24 23:57:23,030 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 95 transitions. [2024-10-24 23:57:23,030 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-24 23:57:23,030 INFO L218 hiAutomatonCegarLoop]: Abstraction has 80 states and 95 transitions. [2024-10-24 23:57:23,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 95 transitions. [2024-10-24 23:57:23,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 44. [2024-10-24 23:57:23,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.2272727272727273) internal successors, (54), 43 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:57:23,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 54 transitions. [2024-10-24 23:57:23,031 INFO L240 hiAutomatonCegarLoop]: Abstraction has 44 states and 54 transitions. [2024-10-24 23:57:23,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-10-24 23:57:23,032 INFO L425 stractBuchiCegarLoop]: Abstraction has 44 states and 54 transitions. [2024-10-24 23:57:23,032 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-10-24 23:57:23,032 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 54 transitions. [2024-10-24 23:57:23,033 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-24 23:57:23,033 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-24 23:57:23,033 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-24 23:57:23,033 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 23:57:23,033 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-24 23:57:23,033 INFO L745 eck$LassoCheckResult]: Stem: 5212#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5213#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 5214#L367 assume !(main_~length~0#1 < 1); 5203#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 5204#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 5205#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5215#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 5237#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 5216#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5217#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 5218#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 5221#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5236#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 5235#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 5234#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5233#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 5232#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 5231#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5230#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 5229#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 5228#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5227#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 5226#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 5225#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5223#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 5224#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 5222#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 5206#L370-4 main_~j~0#1 := 0; 5207#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5219#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5220#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5210#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5211#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5246#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5245#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5244#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5243#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5242#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5241#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5240#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5239#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5208#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 5209#L378-2 [2024-10-24 23:57:23,034 INFO L747 eck$LassoCheckResult]: Loop: 5209#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5238#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5209#L378-2 [2024-10-24 23:57:23,034 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:57:23,034 INFO L85 PathProgramCache]: Analyzing trace with hash 976299187, now seen corresponding path program 12 times [2024-10-24 23:57:23,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:57:23,035 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912998594] [2024-10-24 23:57:23,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:57:23,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:57:23,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 23:57:23,729 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:57:23,730 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 23:57:23,730 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912998594] [2024-10-24 23:57:23,730 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [912998594] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 23:57:23,730 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1517035431] [2024-10-24 23:57:23,730 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-24 23:57:23,730 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 23:57:23,731 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 23:57:23,733 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 23:57:23,734 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2024-10-24 23:57:23,883 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2024-10-24 23:57:23,884 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 23:57:23,885 INFO L255 TraceCheckSpWp]: Trace formula consists of 217 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-10-24 23:57:23,887 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 23:57:24,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 1 [2024-10-24 23:57:24,540 INFO L349 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2024-10-24 23:57:24,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2024-10-24 23:57:24,556 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 36 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:57:24,556 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 23:57:25,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2024-10-24 23:57:25,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 14 [2024-10-24 23:57:25,323 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 30 proven. 82 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 23:57:25,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1517035431] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 23:57:25,324 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 23:57:25,324 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 20, 20] total 48 [2024-10-24 23:57:25,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271490409] [2024-10-24 23:57:25,324 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 23:57:25,324 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-24 23:57:25,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 23:57:25,324 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 21 times [2024-10-24 23:57:25,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 23:57:25,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35814477] [2024-10-24 23:57:25,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 23:57:25,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 23:57:25,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:57:25,328 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 23:57:25,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 23:57:25,331 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 23:57:25,368 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 23:57:25,369 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-10-24 23:57:25,370 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=287, Invalid=2065, Unknown=0, NotChecked=0, Total=2352 [2024-10-24 23:57:25,370 INFO L87 Difference]: Start difference. First operand 44 states and 54 transitions. cyclomatic complexity: 13 Second operand has 49 states, 48 states have (on average 2.0208333333333335) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 23:57:27,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 23:57:27,482 INFO L93 Difference]: Finished difference Result 63 states and 74 transitions. [2024-10-24 23:57:27,482 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 74 transitions. [2024-10-24 23:57:27,482 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2024-10-24 23:57:27,482 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 0 states and 0 transitions. [2024-10-24 23:57:27,482 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2024-10-24 23:57:27,482 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2024-10-24 23:57:27,483 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2024-10-24 23:57:27,483 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-24 23:57:27,483 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-10-24 23:57:27,483 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-10-24 23:57:27,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-10-24 23:57:27,484 INFO L425 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-10-24 23:57:27,484 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-10-24 23:57:27,484 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2024-10-24 23:57:27,484 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2024-10-24 23:57:27,484 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2024-10-24 23:57:27,489 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 24.10 11:57:27 BoogieIcfgContainer [2024-10-24 23:57:27,489 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2024-10-24 23:57:27,490 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-10-24 23:57:27,490 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-10-24 23:57:27,490 INFO L274 PluginConnector]: Witness Printer initialized [2024-10-24 23:57:27,490 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 11:56:27" (3/4) ... [2024-10-24 23:57:27,492 INFO L142 WitnessPrinter]: No result that supports witness generation found [2024-10-24 23:57:27,492 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-10-24 23:57:27,493 INFO L158 Benchmark]: Toolchain (without parser) took 60663.12ms. Allocated memory was 165.7MB in the beginning and 427.8MB in the end (delta: 262.1MB). Free memory was 96.4MB in the beginning and 248.7MB in the end (delta: -152.4MB). Peak memory consumption was 109.4MB. Max. memory is 16.1GB. [2024-10-24 23:57:27,493 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 165.7MB. Free memory is still 140.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-10-24 23:57:27,493 INFO L158 Benchmark]: CACSL2BoogieTranslator took 544.19ms. Allocated memory is still 165.7MB. Free memory was 96.1MB in the beginning and 124.6MB in the end (delta: -28.5MB). Peak memory consumption was 9.7MB. Max. memory is 16.1GB. [2024-10-24 23:57:27,493 INFO L158 Benchmark]: Boogie Procedure Inliner took 44.76ms. Allocated memory is still 165.7MB. Free memory was 124.6MB in the beginning and 123.0MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. [2024-10-24 23:57:27,494 INFO L158 Benchmark]: Boogie Preprocessor took 58.32ms. Allocated memory is still 165.7MB. Free memory was 122.5MB in the beginning and 121.0MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2024-10-24 23:57:27,494 INFO L158 Benchmark]: RCFGBuilder took 349.18ms. Allocated memory is still 165.7MB. Free memory was 121.0MB in the beginning and 108.8MB in the end (delta: 12.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2024-10-24 23:57:27,494 INFO L158 Benchmark]: BuchiAutomizer took 59658.92ms. Allocated memory was 165.7MB in the beginning and 427.8MB in the end (delta: 262.1MB). Free memory was 108.8MB in the beginning and 248.7MB in the end (delta: -140.0MB). Peak memory consumption was 124.8MB. Max. memory is 16.1GB. [2024-10-24 23:57:27,494 INFO L158 Benchmark]: Witness Printer took 2.62ms. Allocated memory is still 427.8MB. Free memory is still 248.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-10-24 23:57:27,495 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 165.7MB. Free memory is still 140.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 544.19ms. Allocated memory is still 165.7MB. Free memory was 96.1MB in the beginning and 124.6MB in the end (delta: -28.5MB). Peak memory consumption was 9.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 44.76ms. Allocated memory is still 165.7MB. Free memory was 124.6MB in the beginning and 123.0MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 58.32ms. Allocated memory is still 165.7MB. Free memory was 122.5MB in the beginning and 121.0MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 349.18ms. Allocated memory is still 165.7MB. Free memory was 121.0MB in the beginning and 108.8MB in the end (delta: 12.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * BuchiAutomizer took 59658.92ms. Allocated memory was 165.7MB in the beginning and 427.8MB in the end (delta: 262.1MB). Free memory was 108.8MB in the beginning and 248.7MB in the end (delta: -140.0MB). Peak memory consumption was 124.8MB. Max. memory is 16.1GB. * Witness Printer took 2.62ms. Allocated memory is still 427.8MB. Free memory is still 248.7MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: #length - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: ~arr~0!offset - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: #length - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 23 terminating modules (21 trivial, 2 deterministic, 0 nondeterministic). One deterministic module has affine ranking function null and consists of 4 locations. One deterministic module has affine ranking function null and consists of 8 locations. 21 modules have a trivial ranking function, the largest among these consists of 49 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 59.6s and 24 iterations. TraceHistogramMax:7. Analysis of lassos took 23.7s. Construction of modules took 30.9s. Büchi inclusion checks took 4.7s. Highest rank in rank-based complementation 3. Minimization of det autom 3. Minimization of nondet autom 20. Automata minimization 0.1s AutomataMinimizationTime, 22 MinimizatonAttempts, 241 StatesRemovedByMinimization, 19 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 15 mSolverCounterUnknown, 1032 SdHoareTripleChecker+Valid, 31.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1031 mSDsluCounter, 1524 SdHoareTripleChecker+Invalid, 30.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1314 mSDsCounter, 231 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 6221 IncrementalHoareTripleChecker+Invalid, 6467 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 231 mSolverCounterUnsat, 210 mSDtfsCounter, 6221 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc0 concLT0 SILN0 SILU21 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital105 mio100 ax100 hnf100 lsp100 ukn82 mio100 lsp56 div180 bol100 ite100 ukn100 eq150 hnf94 smp64 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 28ms VariablesStem: 3 VariablesLoop: 2 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2024-10-24 23:57:27,518 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Ended with exit code 0 [2024-10-24 23:57:27,720 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:27,918 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:28,118 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:28,318 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2024-10-24 23:57:28,519 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Ended with exit code 0 [2024-10-24 23:57:28,719 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:28,919 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:29,119 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:29,319 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2024-10-24 23:57:29,520 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Ended with exit code 0 [2024-10-24 23:57:29,720 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:29,920 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:30,121 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:30,320 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:30,521 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2024-10-24 23:57:30,721 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:30,921 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:31,121 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2024-10-24 23:57:31,321 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-10-24 23:57:31,518 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE