./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/termination.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit


--------------------------------------------------------------------------------


Checking for termination
Using default analysis
Version 4a390ef5
Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b4e7977192ae56aeb09dc050b873d7b40c1e47d710f31b358c00a46d3bffe743
--- Real Ultimate output ---
This is Ultimate 0.2.5-dev-4a390ef-m
[2024-10-25 00:46:10,465 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2024-10-25 00:46:10,539 INFO  L114        SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf
[2024-10-25 00:46:10,545 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2024-10-25 00:46:10,547 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-10-25 00:46:10,577 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2024-10-25 00:46:10,579 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-10-25 00:46:10,579 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-10-25 00:46:10,580 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-10-25 00:46:10,581 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2024-10-25 00:46:10,582 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-10-25 00:46:10,582 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2024-10-25 00:46:10,583 INFO  L153        SettingsManager]:  * Use SBE=true
[2024-10-25 00:46:10,583 INFO  L151        SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2024-10-25 00:46:10,584 INFO  L153        SettingsManager]:  * NCSB implementation=INTSET_LAZY3
[2024-10-25 00:46:10,584 INFO  L153        SettingsManager]:  * Use old map elimination=false
[2024-10-25 00:46:10,584 INFO  L153        SettingsManager]:  * Use external solver (rank synthesis)=false
[2024-10-25 00:46:10,585 INFO  L153        SettingsManager]:  * Use only trivial implications for array writes=true
[2024-10-25 00:46:10,585 INFO  L153        SettingsManager]:  * Rank analysis=LINEAR_WITH_GUESSES
[2024-10-25 00:46:10,586 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-10-25 00:46:10,586 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=ASSUME
[2024-10-25 00:46:10,588 INFO  L153        SettingsManager]:  * sizeof long=4
[2024-10-25 00:46:10,588 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2024-10-25 00:46:10,589 INFO  L153        SettingsManager]:  * sizeof POINTER=4
[2024-10-25 00:46:10,592 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2024-10-25 00:46:10,592 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=ASSUME
[2024-10-25 00:46:10,592 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=ASSUME
[2024-10-25 00:46:10,593 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=ASSUME
[2024-10-25 00:46:10,593 INFO  L153        SettingsManager]:  * Allow undefined functions=false
[2024-10-25 00:46:10,593 INFO  L153        SettingsManager]:  * Check unreachability of reach_error function=false
[2024-10-25 00:46:10,593 INFO  L153        SettingsManager]:  * sizeof long double=12
[2024-10-25 00:46:10,593 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2024-10-25 00:46:10,594 INFO  L153        SettingsManager]:  * Assume nondeterminstic values are in range=false
[2024-10-25 00:46:10,594 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2024-10-25 00:46:10,594 INFO  L151        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-10-25 00:46:10,594 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2024-10-25 00:46:10,595 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-10-25 00:46:10,595 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2024-10-25 00:46:10,598 INFO  L151        SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2024-10-25 00:46:10,598 INFO  L153        SettingsManager]:  * TransformationType=MODULO_NEIGHBOR
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b4e7977192ae56aeb09dc050b873d7b40c1e47d710f31b358c00a46d3bffe743
[2024-10-25 00:46:10,869 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2024-10-25 00:46:10,893 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-10-25 00:46:10,896 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-10-25 00:46:10,898 INFO  L270        PluginConnector]: Initializing CDTParser...
[2024-10-25 00:46:10,898 INFO  L274        PluginConnector]: CDTParser initialized
[2024-10-25 00:46:10,900 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c
[2024-10-25 00:46:12,382 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2024-10-25 00:46:12,615 INFO  L384              CDTParser]: Found 1 translation units.
[2024-10-25 00:46:12,616 INFO  L180              CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.1.ufo.BOUNDED-12.pals.c
[2024-10-25 00:46:12,638 INFO  L427              CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9aa91a659/3861079ff6184558991cd9fd68271ce7/FLAGe44241b65
[2024-10-25 00:46:12,970 INFO  L435              CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9aa91a659/3861079ff6184558991cd9fd68271ce7
[2024-10-25 00:46:12,972 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-10-25 00:46:12,973 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2024-10-25 00:46:12,974 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-10-25 00:46:12,974 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-10-25 00:46:12,979 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2024-10-25 00:46:12,980 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.10 12:46:12" (1/1) ...
[2024-10-25 00:46:12,980 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@65997cf1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:12, skipping insertion in model container
[2024-10-25 00:46:12,980 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.10 12:46:12" (1/1) ...
[2024-10-25 00:46:13,018 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2024-10-25 00:46:13,264 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-10-25 00:46:13,275 INFO  L200         MainTranslator]: Completed pre-run
[2024-10-25 00:46:13,327 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-10-25 00:46:13,363 INFO  L204         MainTranslator]: Completed translation
[2024-10-25 00:46:13,364 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13 WrapperNode
[2024-10-25 00:46:13,364 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-10-25 00:46:13,365 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-10-25 00:46:13,365 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-10-25 00:46:13,366 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2024-10-25 00:46:13,373 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,391 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,456 INFO  L138                Inliner]: procedures = 25, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 379
[2024-10-25 00:46:13,457 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-10-25 00:46:13,457 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-10-25 00:46:13,457 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2024-10-25 00:46:13,457 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2024-10-25 00:46:13,474 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,475 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,478 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,496 INFO  L175           MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-10-25 00:46:13,496 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,497 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,516 INFO  L184        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,525 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,531 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,533 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,540 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-10-25 00:46:13,543 INFO  L112        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-10-25 00:46:13,543 INFO  L270        PluginConnector]: Initializing RCFGBuilder...
[2024-10-25 00:46:13,543 INFO  L274        PluginConnector]: RCFGBuilder initialized
[2024-10-25 00:46:13,544 INFO  L184        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (1/1) ...
[2024-10-25 00:46:13,549 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-10-25 00:46:13,559 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-10-25 00:46:13,572 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-10-25 00:46:13,574 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2024-10-25 00:46:13,616 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-10-25 00:46:13,616 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#0
[2024-10-25 00:46:13,616 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-10-25 00:46:13,617 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-10-25 00:46:13,699 INFO  L238             CfgBuilder]: Building ICFG
[2024-10-25 00:46:13,701 INFO  L264             CfgBuilder]: Building CFG for each procedure with an implementation
[2024-10-25 00:46:14,114 INFO  L?                        ?]: Removed 45 outVars from TransFormulas that were not future-live.
[2024-10-25 00:46:14,114 INFO  L287             CfgBuilder]: Performing block encoding
[2024-10-25 00:46:14,131 INFO  L309             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-10-25 00:46:14,134 INFO  L314             CfgBuilder]: Removed 1 assume(true) statements.
[2024-10-25 00:46:14,134 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.10 12:46:14 BoogieIcfgContainer
[2024-10-25 00:46:14,135 INFO  L131        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-10-25 00:46:14,136 INFO  L112        PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2024-10-25 00:46:14,136 INFO  L270        PluginConnector]: Initializing BuchiAutomizer...
[2024-10-25 00:46:14,140 INFO  L274        PluginConnector]: BuchiAutomizer initialized
[2024-10-25 00:46:14,140 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-10-25 00:46:14,141 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 25.10 12:46:12" (1/3) ...
[2024-10-25 00:46:14,142 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2664065b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.10 12:46:14, skipping insertion in model container
[2024-10-25 00:46:14,142 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-10-25 00:46:14,142 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.10 12:46:13" (2/3) ...
[2024-10-25 00:46:14,142 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2664065b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.10 12:46:14, skipping insertion in model container
[2024-10-25 00:46:14,142 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-10-25 00:46:14,142 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.10 12:46:14" (3/3) ...
[2024-10-25 00:46:14,145 INFO  L332   chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.1.ufo.BOUNDED-12.pals.c
[2024-10-25 00:46:14,193 INFO  L300   stractBuchiCegarLoop]: Interprodecural is true
[2024-10-25 00:46:14,193 INFO  L301   stractBuchiCegarLoop]: Hoare is None
[2024-10-25 00:46:14,193 INFO  L302   stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2024-10-25 00:46:14,193 INFO  L303   stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2024-10-25 00:46:14,193 INFO  L304   stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2024-10-25 00:46:14,193 INFO  L305   stractBuchiCegarLoop]: Difference is false
[2024-10-25 00:46:14,193 INFO  L306   stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2024-10-25 00:46:14,194 INFO  L310   stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2024-10-25 00:46:14,198 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 98 states, 97 states have (on average 1.7525773195876289) internal successors, (170), 97 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:14,216 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 48
[2024-10-25 00:46:14,216 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-10-25 00:46:14,216 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-10-25 00:46:14,224 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:14,224 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:14,224 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 1 ============
[2024-10-25 00:46:14,225 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 98 states, 97 states have (on average 1.7525773195876289) internal successors, (170), 97 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:14,231 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 48
[2024-10-25 00:46:14,231 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-10-25 00:46:14,232 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-10-25 00:46:14,233 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:14,233 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:14,241 INFO  L745   eck$LassoCheckResult]: Stem: 22#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 27#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 57#L230true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 94#L230-1true init_#res#1 := init_~tmp~0#1; 68#init_returnLabel#1true main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 29#L22true assume !(0 == assume_abort_if_not_~cond#1); 73#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 25#L469-2true 
[2024-10-25 00:46:14,242 INFO  L747   eck$LassoCheckResult]: Loop: 25#L469-2true assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 14#L78true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 31#L78-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 84#L106true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 34#L106-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 30#L131true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 72#L131-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 92#L156true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 26#L156-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 71#L181true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 32#L181-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 24#L206true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 53#L206-2true havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 51#L399true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 88#L399-1true check_#res#1 := check_~tmp~1#1; 11#check_returnLabel#1true main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 28#L502true assume !(0 == assert_~arg#1 % 256); 89#L497true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 25#L469-2true 
[2024-10-25 00:46:14,248 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:14,248 INFO  L85        PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times
[2024-10-25 00:46:14,257 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:14,257 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213862341]
[2024-10-25 00:46:14,258 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:14,258 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:14,394 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-10-25 00:46:14,662 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-10-25 00:46:14,663 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-10-25 00:46:14,663 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213862341]
[2024-10-25 00:46:14,664 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213862341] provided 1 perfect and 0 imperfect interpolant sequences
[2024-10-25 00:46:14,664 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-10-25 00:46:14,664 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-10-25 00:46:14,666 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29142629]
[2024-10-25 00:46:14,667 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-10-25 00:46:14,671 INFO  L750   eck$LassoCheckResult]: stem already infeasible
[2024-10-25 00:46:14,671 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:14,672 INFO  L85        PathProgramCache]: Analyzing trace with hash 1869415403, now seen corresponding path program 1 times
[2024-10-25 00:46:14,672 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:14,672 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286037565]
[2024-10-25 00:46:14,672 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:14,673 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:14,795 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-10-25 00:46:15,094 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-10-25 00:46:15,094 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-10-25 00:46:15,094 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286037565]
[2024-10-25 00:46:15,094 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1286037565] provided 1 perfect and 0 imperfect interpolant sequences
[2024-10-25 00:46:15,094 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-10-25 00:46:15,095 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-10-25 00:46:15,095 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572471612]
[2024-10-25 00:46:15,095 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-10-25 00:46:15,096 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-10-25 00:46:15,098 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-10-25 00:46:15,132 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-10-25 00:46:15,133 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-10-25 00:46:15,135 INFO  L87              Difference]: Start difference. First operand  has 98 states, 97 states have (on average 1.7525773195876289) internal successors, (170), 97 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand  has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:15,244 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-10-25 00:46:15,248 INFO  L93              Difference]: Finished difference Result 100 states and 168 transitions.
[2024-10-25 00:46:15,250 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 168 transitions.
[2024-10-25 00:46:15,253 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 46
[2024-10-25 00:46:15,263 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 92 states and 121 transitions.
[2024-10-25 00:46:15,264 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 92
[2024-10-25 00:46:15,265 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 92
[2024-10-25 00:46:15,266 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 92 states and 121 transitions.
[2024-10-25 00:46:15,267 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-10-25 00:46:15,267 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions.
[2024-10-25 00:46:15,282 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 92 states and 121 transitions.
[2024-10-25 00:46:15,293 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92.
[2024-10-25 00:46:15,294 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 92 states, 92 states have (on average 1.315217391304348) internal successors, (121), 91 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:15,295 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 121 transitions.
[2024-10-25 00:46:15,296 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions.
[2024-10-25 00:46:15,301 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-10-25 00:46:15,305 INFO  L425   stractBuchiCegarLoop]: Abstraction has 92 states and 121 transitions.
[2024-10-25 00:46:15,305 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 2 ============
[2024-10-25 00:46:15,305 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 121 transitions.
[2024-10-25 00:46:15,309 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 46
[2024-10-25 00:46:15,312 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-10-25 00:46:15,312 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-10-25 00:46:15,314 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:15,314 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:15,314 INFO  L745   eck$LassoCheckResult]: Stem: 278#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 279#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 233#L230 assume 0 == ~r1~0; 234#L231 assume ~id1~0 >= 0; 245#L232 assume 0 == ~st1~0; 302#L233 assume ~send1~0 == ~id1~0; 223#L234 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 224#L235 assume ~id2~0 >= 0; 295#L236 assume 0 == ~st2~0; 283#L237 assume ~send2~0 == ~id2~0; 268#L238 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 269#L239 assume ~id3~0 >= 0; 266#L240 assume 0 == ~st3~0; 267#L241 assume ~send3~0 == ~id3~0; 273#L242 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 241#L243 assume ~id4~0 >= 0; 235#L244 assume 0 == ~st4~0; 236#L245 assume ~send4~0 == ~id4~0; 272#L246 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 288#L247 assume ~id5~0 >= 0; 289#L248 assume 0 == ~st5~0; 225#L249 assume ~send5~0 == ~id5~0; 226#L250 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 246#L251 assume ~id6~0 >= 0; 247#L252 assume 0 == ~st6~0; 252#L253 assume ~send6~0 == ~id6~0; 253#L254 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 254#L255 assume ~id1~0 != ~id2~0; 255#L256 assume ~id1~0 != ~id3~0; 297#L257 assume ~id1~0 != ~id4~0; 280#L258 assume ~id1~0 != ~id5~0; 212#L259 assume ~id1~0 != ~id6~0; 213#L260 assume ~id2~0 != ~id3~0; 303#L261 assume ~id2~0 != ~id4~0; 298#L262 assume ~id2~0 != ~id5~0; 299#L263 assume ~id2~0 != ~id6~0; 300#L264 assume ~id3~0 != ~id4~0; 221#L265 assume ~id3~0 != ~id5~0; 222#L266 assume ~id3~0 != ~id6~0; 242#L267 assume ~id4~0 != ~id5~0; 258#L268 assume ~id4~0 != ~id6~0; 259#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 301#L230-1 init_#res#1 := init_~tmp~0#1; 262#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 263#L22 assume !(0 == assume_abort_if_not_~cond#1); 276#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 277#L469-2 
[2024-10-25 00:46:15,316 INFO  L747   eck$LassoCheckResult]: Loop: 277#L469-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 260#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 240#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 294#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 296#L106-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 292#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 274#L131-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 275#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 284#L156-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 270#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 271#L181-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 281#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 219#L206-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 220#L399 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 243#L399-1 check_#res#1 := check_~tmp~1#1; 256#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 257#L502 assume !(0 == assert_~arg#1 % 256); 290#L497 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 277#L469-2 
[2024-10-25 00:46:15,316 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:15,317 INFO  L85        PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times
[2024-10-25 00:46:15,317 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:15,317 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607242119]
[2024-10-25 00:46:15,317 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:15,318 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:15,363 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:15,364 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-10-25 00:46:15,394 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:15,434 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-10-25 00:46:15,435 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:15,436 INFO  L85        PathProgramCache]: Analyzing trace with hash 1869415403, now seen corresponding path program 2 times
[2024-10-25 00:46:15,436 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:15,436 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238969780]
[2024-10-25 00:46:15,437 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:15,437 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:15,485 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-10-25 00:46:15,672 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-10-25 00:46:15,673 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-10-25 00:46:15,673 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238969780]
[2024-10-25 00:46:15,673 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [238969780] provided 1 perfect and 0 imperfect interpolant sequences
[2024-10-25 00:46:15,674 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-10-25 00:46:15,674 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-10-25 00:46:15,674 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700711398]
[2024-10-25 00:46:15,675 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-10-25 00:46:15,675 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-10-25 00:46:15,675 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-10-25 00:46:15,676 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-10-25 00:46:15,676 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-10-25 00:46:15,676 INFO  L87              Difference]: Start difference. First operand 92 states and 121 transitions. cyclomatic complexity: 30 Second operand  has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:15,705 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-10-25 00:46:15,705 INFO  L93              Difference]: Finished difference Result 95 states and 123 transitions.
[2024-10-25 00:46:15,705 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 123 transitions.
[2024-10-25 00:46:15,706 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 46
[2024-10-25 00:46:15,709 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 92 states and 118 transitions.
[2024-10-25 00:46:15,711 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 92
[2024-10-25 00:46:15,711 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 92
[2024-10-25 00:46:15,711 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 92 states and 118 transitions.
[2024-10-25 00:46:15,712 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-10-25 00:46:15,712 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions.
[2024-10-25 00:46:15,713 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 92 states and 118 transitions.
[2024-10-25 00:46:15,718 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92.
[2024-10-25 00:46:15,719 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 92 states, 92 states have (on average 1.2826086956521738) internal successors, (118), 91 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:15,720 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 118 transitions.
[2024-10-25 00:46:15,721 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions.
[2024-10-25 00:46:15,722 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-10-25 00:46:15,723 INFO  L425   stractBuchiCegarLoop]: Abstraction has 92 states and 118 transitions.
[2024-10-25 00:46:15,725 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 3 ============
[2024-10-25 00:46:15,725 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 118 transitions.
[2024-10-25 00:46:15,726 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 46
[2024-10-25 00:46:15,726 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-10-25 00:46:15,726 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-10-25 00:46:15,729 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:15,730 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:15,730 INFO  L745   eck$LassoCheckResult]: Stem: 473#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 474#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 425#L230 assume 0 == ~r1~0; 426#L231 assume ~id1~0 >= 0; 440#L232 assume 0 == ~st1~0; 497#L233 assume ~send1~0 == ~id1~0; 418#L234 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 419#L235 assume ~id2~0 >= 0; 489#L236 assume 0 == ~st2~0; 478#L237 assume ~send2~0 == ~id2~0; 463#L238 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 464#L239 assume ~id3~0 >= 0; 461#L240 assume 0 == ~st3~0; 462#L241 assume ~send3~0 == ~id3~0; 468#L242 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 436#L243 assume ~id4~0 >= 0; 430#L244 assume 0 == ~st4~0; 431#L245 assume ~send4~0 == ~id4~0; 467#L246 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 483#L247 assume ~id5~0 >= 0; 484#L248 assume 0 == ~st5~0; 420#L249 assume ~send5~0 == ~id5~0; 421#L250 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 441#L251 assume ~id6~0 >= 0; 442#L252 assume 0 == ~st6~0; 449#L253 assume ~send6~0 == ~id6~0; 450#L254 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 451#L255 assume ~id1~0 != ~id2~0; 452#L256 assume ~id1~0 != ~id3~0; 492#L257 assume ~id1~0 != ~id4~0; 475#L258 assume ~id1~0 != ~id5~0; 409#L259 assume ~id1~0 != ~id6~0; 410#L260 assume ~id2~0 != ~id3~0; 498#L261 assume ~id2~0 != ~id4~0; 493#L262 assume ~id2~0 != ~id5~0; 494#L263 assume ~id2~0 != ~id6~0; 495#L264 assume ~id3~0 != ~id4~0; 416#L265 assume ~id3~0 != ~id5~0; 417#L266 assume ~id3~0 != ~id6~0; 437#L267 assume ~id4~0 != ~id5~0; 453#L268 assume ~id4~0 != ~id6~0; 454#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 496#L230-1 init_#res#1 := init_~tmp~0#1; 457#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 458#L22 assume !(0 == assume_abort_if_not_~cond#1); 471#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 472#L469-2 
[2024-10-25 00:46:15,730 INFO  L747   eck$LassoCheckResult]: Loop: 472#L469-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 455#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 435#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 490#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 491#L106-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 487#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 469#L131-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 470#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 479#L156-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 465#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 466#L181-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 476#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 407#L206-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 408#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 422#L400 assume ~r1~0 >= 6; 423#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 438#L399-1 check_#res#1 := check_~tmp~1#1; 447#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 448#L502 assume !(0 == assert_~arg#1 % 256); 485#L497 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 472#L469-2 
[2024-10-25 00:46:15,731 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:15,731 INFO  L85        PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times
[2024-10-25 00:46:15,731 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:15,731 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310772021]
[2024-10-25 00:46:15,731 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:15,731 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:15,769 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:15,769 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-10-25 00:46:15,796 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:15,842 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-10-25 00:46:15,843 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:15,843 INFO  L85        PathProgramCache]: Analyzing trace with hash -204006085, now seen corresponding path program 1 times
[2024-10-25 00:46:15,844 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:15,844 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798736332]
[2024-10-25 00:46:15,844 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:15,845 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:15,858 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-10-25 00:46:15,887 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-10-25 00:46:15,888 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-10-25 00:46:15,888 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1798736332]
[2024-10-25 00:46:15,888 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1798736332] provided 1 perfect and 0 imperfect interpolant sequences
[2024-10-25 00:46:15,888 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-10-25 00:46:15,889 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2024-10-25 00:46:15,889 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902669436]
[2024-10-25 00:46:15,889 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-10-25 00:46:15,889 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-10-25 00:46:15,889 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-10-25 00:46:15,890 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2024-10-25 00:46:15,890 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2024-10-25 00:46:15,890 INFO  L87              Difference]: Start difference. First operand 92 states and 118 transitions. cyclomatic complexity: 27 Second operand  has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:15,922 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-10-25 00:46:15,923 INFO  L93              Difference]: Finished difference Result 132 states and 179 transitions.
[2024-10-25 00:46:15,923 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 179 transitions.
[2024-10-25 00:46:15,924 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 86
[2024-10-25 00:46:15,927 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 132 states and 179 transitions.
[2024-10-25 00:46:15,927 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 132
[2024-10-25 00:46:15,928 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 132
[2024-10-25 00:46:15,928 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 132 states and 179 transitions.
[2024-10-25 00:46:15,929 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-10-25 00:46:15,929 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions.
[2024-10-25 00:46:15,929 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 132 states and 179 transitions.
[2024-10-25 00:46:15,937 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132.
[2024-10-25 00:46:15,938 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 132 states, 132 states have (on average 1.356060606060606) internal successors, (179), 131 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-10-25 00:46:15,939 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 179 transitions.
[2024-10-25 00:46:15,939 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions.
[2024-10-25 00:46:15,942 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2024-10-25 00:46:15,943 INFO  L425   stractBuchiCegarLoop]: Abstraction has 132 states and 179 transitions.
[2024-10-25 00:46:15,943 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 4 ============
[2024-10-25 00:46:15,943 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 179 transitions.
[2024-10-25 00:46:15,944 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 86
[2024-10-25 00:46:15,944 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-10-25 00:46:15,944 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-10-25 00:46:15,945 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:15,946 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-10-25 00:46:15,946 INFO  L745   eck$LassoCheckResult]: Stem: 702#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(35, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 703#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 657#L230 assume 0 == ~r1~0; 658#L231 assume ~id1~0 >= 0; 668#L232 assume 0 == ~st1~0; 730#L233 assume ~send1~0 == ~id1~0; 648#L234 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 649#L235 assume ~id2~0 >= 0; 720#L236 assume 0 == ~st2~0; 707#L237 assume ~send2~0 == ~id2~0; 692#L238 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 693#L239 assume ~id3~0 >= 0; 690#L240 assume 0 == ~st3~0; 691#L241 assume ~send3~0 == ~id3~0; 697#L242 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 665#L243 assume ~id4~0 >= 0; 659#L244 assume 0 == ~st4~0; 660#L245 assume ~send4~0 == ~id4~0; 696#L246 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 713#L247 assume ~id5~0 >= 0; 714#L248 assume 0 == ~st5~0; 650#L249 assume ~send5~0 == ~id5~0; 651#L250 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 669#L251 assume ~id6~0 >= 0; 670#L252 assume 0 == ~st6~0; 675#L253 assume ~send6~0 == ~id6~0; 676#L254 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 677#L255 assume ~id1~0 != ~id2~0; 678#L256 assume ~id1~0 != ~id3~0; 723#L257 assume ~id1~0 != ~id4~0; 704#L258 assume ~id1~0 != ~id5~0; 637#L259 assume ~id1~0 != ~id6~0; 638#L260 assume ~id2~0 != ~id3~0; 731#L261 assume ~id2~0 != ~id4~0; 726#L262 assume ~id2~0 != ~id5~0; 727#L263 assume ~id2~0 != ~id6~0; 728#L264 assume ~id3~0 != ~id4~0; 646#L265 assume ~id3~0 != ~id5~0; 647#L266 assume ~id3~0 != ~id6~0; 666#L267 assume ~id4~0 != ~id5~0; 681#L268 assume ~id4~0 != ~id6~0; 682#L269 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 729#L230-1 init_#res#1 := init_~tmp~0#1; 686#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 687#L22 assume !(0 == assume_abort_if_not_~cond#1); 700#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 701#L469-2 
[2024-10-25 00:46:15,948 INFO  L747   eck$LassoCheckResult]: Loop: 701#L469-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 764#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 664#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 760#L106 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 758#L106-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 753#L131 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 750#L131-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 748#L156 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 744#L156-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 742#L181 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 738#L181-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 736#L206 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 734#L206-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 733#L399 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 732#L400 assume !(~r1~0 >= 6); 724#L403 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 725#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 768#L399-1 check_#res#1 := check_~tmp~1#1; 767#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 766#L502 assume !(0 == assert_~arg#1 % 256); 765#L497 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 701#L469-2 
[2024-10-25 00:46:15,949 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:15,949 INFO  L85        PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times
[2024-10-25 00:46:15,950 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:15,950 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317229964]
[2024-10-25 00:46:15,950 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:15,950 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:15,989 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:15,990 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-10-25 00:46:16,010 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:16,023 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-10-25 00:46:16,024 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:16,024 INFO  L85        PathProgramCache]: Analyzing trace with hash -382651229, now seen corresponding path program 1 times
[2024-10-25 00:46:16,024 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:16,024 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949181744]
[2024-10-25 00:46:16,024 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:16,024 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:16,052 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:16,053 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-10-25 00:46:16,072 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:16,077 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-10-25 00:46:16,078 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-10-25 00:46:16,078 INFO  L85        PathProgramCache]: Analyzing trace with hash -706871615, now seen corresponding path program 1 times
[2024-10-25 00:46:16,078 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-10-25 00:46:16,078 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776982429]
[2024-10-25 00:46:16,078 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-10-25 00:46:16,079 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-10-25 00:46:16,133 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:16,135 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-10-25 00:46:16,173 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-10-25 00:46:16,185 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-10-25 00:46:20,795 INFO  L204          LassoAnalysis]: Preferences:
[2024-10-25 00:46:20,799 INFO  L125   ssoRankerPreferences]: Compute integeral hull: false
[2024-10-25 00:46:20,799 INFO  L126   ssoRankerPreferences]: Enable LassoPartitioneer: true
[2024-10-25 00:46:20,799 INFO  L127   ssoRankerPreferences]: Term annotations enabled: false
[2024-10-25 00:46:20,800 INFO  L128   ssoRankerPreferences]: Use exernal solver: true
[2024-10-25 00:46:20,800 INFO  L129   ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-10-25 00:46:20,800 INFO  L130   ssoRankerPreferences]: Dump SMT script to file: false
[2024-10-25 00:46:20,800 INFO  L131   ssoRankerPreferences]: Path of dumped script: 
[2024-10-25 00:46:20,800 INFO  L132   ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.1.ufo.BOUNDED-12.pals.c_Iteration4_Loop
[2024-10-25 00:46:20,800 INFO  L133   ssoRankerPreferences]: MapElimAlgo: Frank
[2024-10-25 00:46:20,800 INFO  L241          LassoAnalysis]: Starting lasso preprocessing...
[2024-10-25 00:46:20,847 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,857 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,862 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,864 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,866 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,868 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,871 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,873 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,875 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,879 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,881 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,884 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:20,890 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,554 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,560 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,565 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,571 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,578 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,580 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,584 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,586 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:22,589 INFO  L118          MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-10-25 00:46:24,438 WARN  L137   XnfTransformerHelper]: expecting exponential blowup for input size 36