./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/unreach-call.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4a390ef5 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4a390ef-m [2024-10-24 04:56:45,892 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-24 04:56:45,969 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-10-24 04:56:45,981 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-24 04:56:45,981 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-24 04:56:46,014 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-24 04:56:46,015 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-24 04:56:46,016 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-24 04:56:46,016 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-24 04:56:46,020 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-24 04:56:46,020 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-24 04:56:46,021 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-24 04:56:46,021 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-24 04:56:46,021 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-24 04:56:46,022 INFO L153 SettingsManager]: * Use SBE=true [2024-10-24 04:56:46,022 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-24 04:56:46,022 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-24 04:56:46,022 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-24 04:56:46,022 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-24 04:56:46,023 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-24 04:56:46,023 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-24 04:56:46,025 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-24 04:56:46,025 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-24 04:56:46,025 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-24 04:56:46,025 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-24 04:56:46,026 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-24 04:56:46,026 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-24 04:56:46,027 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-24 04:56:46,027 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-24 04:56:46,027 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-10-24 04:56:46,027 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-24 04:56:46,028 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-24 04:56:46,028 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-24 04:56:46,028 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-24 04:56:46,029 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-10-24 04:56:46,029 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-24 04:56:46,029 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-10-24 04:56:46,029 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-10-24 04:56:46,030 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-10-24 04:56:46,030 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 [2024-10-24 04:56:46,290 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-24 04:56:46,321 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-24 04:56:46,324 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-24 04:56:46,326 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-24 04:56:46,326 INFO L274 PluginConnector]: CDTParser initialized [2024-10-24 04:56:46,328 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2024-10-24 04:56:47,900 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-24 04:56:48,151 INFO L384 CDTParser]: Found 1 translation units. [2024-10-24 04:56:48,152 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2024-10-24 04:56:48,165 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dbebc2a44/462135eb93d84747844df1afb71a5239/FLAGaaddb770b [2024-10-24 04:56:48,179 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dbebc2a44/462135eb93d84747844df1afb71a5239 [2024-10-24 04:56:48,181 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-24 04:56:48,182 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-24 04:56:48,184 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-24 04:56:48,184 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-24 04:56:48,192 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-24 04:56:48,193 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,194 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@16cc2be4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48, skipping insertion in model container [2024-10-24 04:56:48,196 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,233 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-24 04:56:48,404 WARN L248 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2024-10-24 04:56:48,544 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 04:56:48,559 INFO L200 MainTranslator]: Completed pre-run [2024-10-24 04:56:48,571 WARN L248 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2024-10-24 04:56:48,657 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 04:56:48,687 INFO L204 MainTranslator]: Completed translation [2024-10-24 04:56:48,688 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48 WrapperNode [2024-10-24 04:56:48,689 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-24 04:56:48,691 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-24 04:56:48,691 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-24 04:56:48,691 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-24 04:56:48,699 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,723 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,817 INFO L138 Inliner]: procedures = 17, calls = 10, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 899 [2024-10-24 04:56:48,818 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-24 04:56:48,819 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-24 04:56:48,819 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-24 04:56:48,819 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-24 04:56:48,831 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,831 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,890 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,977 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-24 04:56:48,978 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:48,978 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:49,018 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:49,038 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:49,052 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:49,060 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:49,076 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-24 04:56:49,078 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-24 04:56:49,078 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-24 04:56:49,078 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-24 04:56:49,079 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (1/1) ... [2024-10-24 04:56:49,086 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-10-24 04:56:49,099 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 04:56:49,118 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-10-24 04:56:49,121 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-10-24 04:56:49,175 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-24 04:56:49,176 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-10-24 04:56:49,176 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-10-24 04:56:49,176 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-24 04:56:49,177 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-24 04:56:49,177 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-24 04:56:49,351 INFO L238 CfgBuilder]: Building ICFG [2024-10-24 04:56:49,353 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-24 04:56:50,633 INFO L? ?]: Removed 480 outVars from TransFormulas that were not future-live. [2024-10-24 04:56:50,633 INFO L287 CfgBuilder]: Performing block encoding [2024-10-24 04:56:50,670 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-24 04:56:50,671 INFO L314 CfgBuilder]: Removed 1 assume(true) statements. [2024-10-24 04:56:50,671 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:56:50 BoogieIcfgContainer [2024-10-24 04:56:50,671 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-24 04:56:50,673 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-24 04:56:50,673 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-24 04:56:50,678 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-24 04:56:50,678 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.10 04:56:48" (1/3) ... [2024-10-24 04:56:50,679 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@16db71cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:56:50, skipping insertion in model container [2024-10-24 04:56:50,679 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:56:48" (2/3) ... [2024-10-24 04:56:50,680 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@16db71cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:56:50, skipping insertion in model container [2024-10-24 04:56:50,680 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:56:50" (3/3) ... [2024-10-24 04:56:50,682 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2024-10-24 04:56:50,701 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-24 04:56:50,701 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-10-24 04:56:50,859 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-10-24 04:56:50,867 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@77751f05, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-24 04:56:50,869 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-24 04:56:50,875 INFO L276 IsEmpty]: Start isEmpty. Operand has 277 states, 272 states have (on average 1.5) internal successors, (408), 273 states have internal predecessors, (408), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:50,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-10-24 04:56:50,889 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:50,890 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:50,890 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:50,895 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:50,896 INFO L85 PathProgramCache]: Analyzing trace with hash 996427413, now seen corresponding path program 1 times [2024-10-24 04:56:50,903 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:50,904 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340647983] [2024-10-24 04:56:50,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:50,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:51,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:51,323 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:51,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:51,338 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2024-10-24 04:56:51,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:51,344 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:51,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:51,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340647983] [2024-10-24 04:56:51,348 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [340647983] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:51,348 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:51,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-24 04:56:51,350 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1562181306] [2024-10-24 04:56:51,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:51,356 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-10-24 04:56:51,356 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:51,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-10-24 04:56:51,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-10-24 04:56:51,386 INFO L87 Difference]: Start difference. First operand has 277 states, 272 states have (on average 1.5) internal successors, (408), 273 states have internal predecessors, (408), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 2 states, 2 states have (on average 57.5) internal successors, (115), 2 states have internal predecessors, (115), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:51,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:51,454 INFO L93 Difference]: Finished difference Result 532 states and 795 transitions. [2024-10-24 04:56:51,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-24 04:56:51,462 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 57.5) internal successors, (115), 2 states have internal predecessors, (115), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 122 [2024-10-24 04:56:51,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:51,475 INFO L225 Difference]: With dead ends: 532 [2024-10-24 04:56:51,476 INFO L226 Difference]: Without dead ends: 276 [2024-10-24 04:56:51,483 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-10-24 04:56:51,488 INFO L432 NwaCegarLoop]: 408 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 408 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:51,490 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 408 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:56:51,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2024-10-24 04:56:51,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 276. [2024-10-24 04:56:51,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 276 states, 272 states have (on average 1.4889705882352942) internal successors, (405), 272 states have internal predecessors, (405), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:51,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 409 transitions. [2024-10-24 04:56:51,558 INFO L78 Accepts]: Start accepts. Automaton has 276 states and 409 transitions. Word has length 122 [2024-10-24 04:56:51,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:51,558 INFO L471 AbstractCegarLoop]: Abstraction has 276 states and 409 transitions. [2024-10-24 04:56:51,559 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 57.5) internal successors, (115), 2 states have internal predecessors, (115), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:51,559 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states and 409 transitions. [2024-10-24 04:56:51,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-10-24 04:56:51,562 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:51,562 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:51,562 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-10-24 04:56:51,563 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:51,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:51,565 INFO L85 PathProgramCache]: Analyzing trace with hash 935349393, now seen corresponding path program 1 times [2024-10-24 04:56:51,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:51,566 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460010984] [2024-10-24 04:56:51,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:51,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:51,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:52,427 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:52,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:52,435 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2024-10-24 04:56:52,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:52,443 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:52,447 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:52,447 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460010984] [2024-10-24 04:56:52,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [460010984] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:52,448 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:52,448 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 04:56:52,448 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [97093669] [2024-10-24 04:56:52,448 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:52,449 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 04:56:52,449 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:52,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 04:56:52,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 04:56:52,451 INFO L87 Difference]: Start difference. First operand 276 states and 409 transitions. Second operand has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:52,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:52,499 INFO L93 Difference]: Finished difference Result 280 states and 413 transitions. [2024-10-24 04:56:52,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 04:56:52,500 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 122 [2024-10-24 04:56:52,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:52,502 INFO L225 Difference]: With dead ends: 280 [2024-10-24 04:56:52,502 INFO L226 Difference]: Without dead ends: 278 [2024-10-24 04:56:52,502 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 04:56:52,504 INFO L432 NwaCegarLoop]: 406 mSDtfsCounter, 0 mSDsluCounter, 807 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1213 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:52,504 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1213 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:56:52,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2024-10-24 04:56:52,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 278. [2024-10-24 04:56:52,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 278 states, 274 states have (on average 1.4854014598540146) internal successors, (407), 274 states have internal predecessors, (407), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:52,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 411 transitions. [2024-10-24 04:56:52,522 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 411 transitions. Word has length 122 [2024-10-24 04:56:52,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:52,524 INFO L471 AbstractCegarLoop]: Abstraction has 278 states and 411 transitions. [2024-10-24 04:56:52,524 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:52,526 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 411 transitions. [2024-10-24 04:56:52,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-10-24 04:56:52,528 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:52,528 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:52,528 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-10-24 04:56:52,528 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:52,529 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:52,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1067244033, now seen corresponding path program 1 times [2024-10-24 04:56:52,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:52,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495502913] [2024-10-24 04:56:52,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:52,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:52,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:52,949 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:52,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:52,955 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2024-10-24 04:56:52,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:52,965 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:52,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:52,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495502913] [2024-10-24 04:56:52,968 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495502913] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:52,968 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:52,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-24 04:56:52,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024594311] [2024-10-24 04:56:52,969 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:52,969 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-24 04:56:52,969 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:52,970 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-24 04:56:52,973 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-24 04:56:52,973 INFO L87 Difference]: Start difference. First operand 278 states and 411 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:53,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:53,247 INFO L93 Difference]: Finished difference Result 760 states and 1128 transitions. [2024-10-24 04:56:53,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-24 04:56:53,248 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 123 [2024-10-24 04:56:53,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:53,251 INFO L225 Difference]: With dead ends: 760 [2024-10-24 04:56:53,253 INFO L226 Difference]: Without dead ends: 278 [2024-10-24 04:56:53,254 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-10-24 04:56:53,256 INFO L432 NwaCegarLoop]: 684 mSDtfsCounter, 635 mSDsluCounter, 1025 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 636 SdHoareTripleChecker+Valid, 1709 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:53,260 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [636 Valid, 1709 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-10-24 04:56:53,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2024-10-24 04:56:53,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 278. [2024-10-24 04:56:53,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 278 states, 274 states have (on average 1.4817518248175183) internal successors, (406), 274 states have internal predecessors, (406), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:53,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 410 transitions. [2024-10-24 04:56:53,285 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 410 transitions. Word has length 123 [2024-10-24 04:56:53,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:53,286 INFO L471 AbstractCegarLoop]: Abstraction has 278 states and 410 transitions. [2024-10-24 04:56:53,286 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:53,286 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 410 transitions. [2024-10-24 04:56:53,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-10-24 04:56:53,291 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:53,291 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:53,292 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-10-24 04:56:53,292 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:53,292 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:53,293 INFO L85 PathProgramCache]: Analyzing trace with hash -1746874186, now seen corresponding path program 1 times [2024-10-24 04:56:53,293 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:53,293 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060200806] [2024-10-24 04:56:53,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:53,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:53,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:53,757 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:53,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:53,761 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2024-10-24 04:56:53,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:53,764 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:53,765 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:53,765 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060200806] [2024-10-24 04:56:53,765 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2060200806] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:53,765 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:53,766 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 04:56:53,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867685060] [2024-10-24 04:56:53,766 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:53,767 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 04:56:53,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:53,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 04:56:53,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 04:56:53,769 INFO L87 Difference]: Start difference. First operand 278 states and 410 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:53,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:53,797 INFO L93 Difference]: Finished difference Result 537 states and 792 transitions. [2024-10-24 04:56:53,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 04:56:53,798 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 124 [2024-10-24 04:56:53,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:53,801 INFO L225 Difference]: With dead ends: 537 [2024-10-24 04:56:53,801 INFO L226 Difference]: Without dead ends: 280 [2024-10-24 04:56:53,802 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 04:56:53,803 INFO L432 NwaCegarLoop]: 405 mSDtfsCounter, 0 mSDsluCounter, 802 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1207 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:53,807 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1207 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:56:53,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2024-10-24 04:56:53,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 280. [2024-10-24 04:56:53,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 280 states, 276 states have (on average 1.4782608695652173) internal successors, (408), 276 states have internal predecessors, (408), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:53,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 412 transitions. [2024-10-24 04:56:53,828 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 412 transitions. Word has length 124 [2024-10-24 04:56:53,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:53,829 INFO L471 AbstractCegarLoop]: Abstraction has 280 states and 412 transitions. [2024-10-24 04:56:53,829 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:53,829 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 412 transitions. [2024-10-24 04:56:53,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2024-10-24 04:56:53,830 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:53,831 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:53,831 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-10-24 04:56:53,831 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:53,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:53,831 INFO L85 PathProgramCache]: Analyzing trace with hash 583509843, now seen corresponding path program 1 times [2024-10-24 04:56:53,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:53,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107157455] [2024-10-24 04:56:53,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:53,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:53,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:54,329 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:54,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:54,337 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2024-10-24 04:56:54,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:54,344 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:54,344 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:54,345 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107157455] [2024-10-24 04:56:54,346 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1107157455] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:54,346 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:54,346 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 04:56:54,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782104168] [2024-10-24 04:56:54,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:54,347 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 04:56:54,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:54,348 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 04:56:54,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 04:56:54,349 INFO L87 Difference]: Start difference. First operand 280 states and 412 transitions. Second operand has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:54,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:54,424 INFO L93 Difference]: Finished difference Result 539 states and 793 transitions. [2024-10-24 04:56:54,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 04:56:54,424 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 125 [2024-10-24 04:56:54,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:54,426 INFO L225 Difference]: With dead ends: 539 [2024-10-24 04:56:54,426 INFO L226 Difference]: Without dead ends: 280 [2024-10-24 04:56:54,427 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-10-24 04:56:54,428 INFO L432 NwaCegarLoop]: 391 mSDtfsCounter, 372 mSDsluCounter, 393 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 372 SdHoareTripleChecker+Valid, 784 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:54,428 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [372 Valid, 784 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:56:54,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2024-10-24 04:56:54,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 280. [2024-10-24 04:56:54,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 280 states, 276 states have (on average 1.4746376811594204) internal successors, (407), 276 states have internal predecessors, (407), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:54,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 411 transitions. [2024-10-24 04:56:54,443 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 411 transitions. Word has length 125 [2024-10-24 04:56:54,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:54,447 INFO L471 AbstractCegarLoop]: Abstraction has 280 states and 411 transitions. [2024-10-24 04:56:54,448 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:54,448 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 411 transitions. [2024-10-24 04:56:54,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-10-24 04:56:54,449 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:54,449 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:54,449 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-10-24 04:56:54,449 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:54,450 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:54,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1276891269, now seen corresponding path program 1 times [2024-10-24 04:56:54,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:54,456 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1710590045] [2024-10-24 04:56:54,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:54,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:54,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:54,875 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:54,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:54,880 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2024-10-24 04:56:54,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:54,885 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:54,886 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:54,886 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1710590045] [2024-10-24 04:56:54,886 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1710590045] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:54,886 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:54,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 04:56:54,886 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901772397] [2024-10-24 04:56:54,886 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:54,890 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 04:56:54,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:54,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 04:56:54,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 04:56:54,891 INFO L87 Difference]: Start difference. First operand 280 states and 411 transitions. Second operand has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:54,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:54,955 INFO L93 Difference]: Finished difference Result 539 states and 791 transitions. [2024-10-24 04:56:54,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 04:56:54,956 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 126 [2024-10-24 04:56:54,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:54,958 INFO L225 Difference]: With dead ends: 539 [2024-10-24 04:56:54,958 INFO L226 Difference]: Without dead ends: 280 [2024-10-24 04:56:54,958 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-10-24 04:56:54,959 INFO L432 NwaCegarLoop]: 391 mSDtfsCounter, 370 mSDsluCounter, 393 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 784 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:54,961 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 784 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:56:54,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2024-10-24 04:56:54,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 280. [2024-10-24 04:56:54,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 280 states, 276 states have (on average 1.4710144927536233) internal successors, (406), 276 states have internal predecessors, (406), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:54,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 410 transitions. [2024-10-24 04:56:54,973 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 410 transitions. Word has length 126 [2024-10-24 04:56:54,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:54,973 INFO L471 AbstractCegarLoop]: Abstraction has 280 states and 410 transitions. [2024-10-24 04:56:54,973 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:56:54,974 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 410 transitions. [2024-10-24 04:56:54,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-10-24 04:56:54,975 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:54,975 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:54,975 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-10-24 04:56:54,975 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:54,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:54,976 INFO L85 PathProgramCache]: Analyzing trace with hash 625666224, now seen corresponding path program 1 times [2024-10-24 04:56:54,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:54,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492345998] [2024-10-24 04:56:54,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:54,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:55,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:56,417 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:56,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:56,421 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2024-10-24 04:56:56,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:56,429 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:56,430 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:56,430 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492345998] [2024-10-24 04:56:56,430 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492345998] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:56,430 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:56,430 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-10-24 04:56:56,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072141084] [2024-10-24 04:56:56,430 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:56,431 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-10-24 04:56:56,431 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:56,435 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-10-24 04:56:56,436 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2024-10-24 04:56:56,436 INFO L87 Difference]: Start difference. First operand 280 states and 410 transitions. Second operand has 12 states, 12 states have (on average 10.0) internal successors, (120), 12 states have internal predecessors, (120), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:57,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:57,113 INFO L93 Difference]: Finished difference Result 550 states and 806 transitions. [2024-10-24 04:56:57,114 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-24 04:56:57,115 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 10.0) internal successors, (120), 12 states have internal predecessors, (120), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 127 [2024-10-24 04:56:57,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:57,116 INFO L225 Difference]: With dead ends: 550 [2024-10-24 04:56:57,116 INFO L226 Difference]: Without dead ends: 291 [2024-10-24 04:56:57,117 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=56, Invalid=216, Unknown=0, NotChecked=0, Total=272 [2024-10-24 04:56:57,118 INFO L432 NwaCegarLoop]: 326 mSDtfsCounter, 633 mSDsluCounter, 2569 mSDsCounter, 0 mSdLazyCounter, 761 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 634 SdHoareTripleChecker+Valid, 2895 SdHoareTripleChecker+Invalid, 764 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 761 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:57,118 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [634 Valid, 2895 Invalid, 764 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 761 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-10-24 04:56:57,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2024-10-24 04:56:57,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 289. [2024-10-24 04:56:57,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 289 states, 285 states have (on average 1.4701754385964911) internal successors, (419), 285 states have internal predecessors, (419), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:57,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 423 transitions. [2024-10-24 04:56:57,129 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 423 transitions. Word has length 127 [2024-10-24 04:56:57,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:57,131 INFO L471 AbstractCegarLoop]: Abstraction has 289 states and 423 transitions. [2024-10-24 04:56:57,131 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 10.0) internal successors, (120), 12 states have internal predecessors, (120), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:57,131 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 423 transitions. [2024-10-24 04:56:57,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-10-24 04:56:57,133 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:57,133 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:57,133 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-10-24 04:56:57,133 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:57,134 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:57,135 INFO L85 PathProgramCache]: Analyzing trace with hash -42558388, now seen corresponding path program 1 times [2024-10-24 04:56:57,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:57,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235543458] [2024-10-24 04:56:57,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:57,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:57,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:58,052 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:58,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:58,055 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2024-10-24 04:56:58,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:58,057 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:58,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:58,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235543458] [2024-10-24 04:56:58,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235543458] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:58,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:58,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-24 04:56:58,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393008213] [2024-10-24 04:56:58,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:58,059 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-10-24 04:56:58,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:58,059 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-24 04:56:58,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-10-24 04:56:58,060 INFO L87 Difference]: Start difference. First operand 289 states and 423 transitions. Second operand has 8 states, 8 states have (on average 15.125) internal successors, (121), 8 states have internal predecessors, (121), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:58,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:58,375 INFO L93 Difference]: Finished difference Result 565 states and 827 transitions. [2024-10-24 04:56:58,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-24 04:56:58,376 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.125) internal successors, (121), 8 states have internal predecessors, (121), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 128 [2024-10-24 04:56:58,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:58,377 INFO L225 Difference]: With dead ends: 565 [2024-10-24 04:56:58,377 INFO L226 Difference]: Without dead ends: 297 [2024-10-24 04:56:58,378 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-10-24 04:56:58,379 INFO L432 NwaCegarLoop]: 329 mSDtfsCounter, 402 mSDsluCounter, 1625 mSDsCounter, 0 mSdLazyCounter, 471 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 404 SdHoareTripleChecker+Valid, 1954 SdHoareTripleChecker+Invalid, 474 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 471 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:58,379 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [404 Valid, 1954 Invalid, 474 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 471 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-10-24 04:56:58,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2024-10-24 04:56:58,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 294. [2024-10-24 04:56:58,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 294 states, 290 states have (on average 1.4689655172413794) internal successors, (426), 290 states have internal predecessors, (426), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:58,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 430 transitions. [2024-10-24 04:56:58,388 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 430 transitions. Word has length 128 [2024-10-24 04:56:58,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:58,388 INFO L471 AbstractCegarLoop]: Abstraction has 294 states and 430 transitions. [2024-10-24 04:56:58,388 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.125) internal successors, (121), 8 states have internal predecessors, (121), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:58,389 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 430 transitions. [2024-10-24 04:56:58,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-10-24 04:56:58,390 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:58,390 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:58,390 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-10-24 04:56:58,391 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:58,391 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:58,391 INFO L85 PathProgramCache]: Analyzing trace with hash 501470895, now seen corresponding path program 1 times [2024-10-24 04:56:58,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:58,392 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127271117] [2024-10-24 04:56:58,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:58,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:56:58,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:59,376 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:56:59,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:59,380 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2024-10-24 04:56:59,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:56:59,383 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:56:59,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:56:59,383 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127271117] [2024-10-24 04:56:59,383 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2127271117] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:56:59,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:56:59,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-10-24 04:56:59,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189645541] [2024-10-24 04:56:59,384 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:56:59,385 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-24 04:56:59,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:56:59,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-24 04:56:59,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-10-24 04:56:59,388 INFO L87 Difference]: Start difference. First operand 294 states and 430 transitions. Second operand has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:59,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:56:59,938 INFO L93 Difference]: Finished difference Result 820 states and 1200 transitions. [2024-10-24 04:56:59,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-24 04:56:59,938 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 129 [2024-10-24 04:56:59,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:56:59,941 INFO L225 Difference]: With dead ends: 820 [2024-10-24 04:56:59,941 INFO L226 Difference]: Without dead ends: 547 [2024-10-24 04:56:59,941 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=161, Unknown=0, NotChecked=0, Total=210 [2024-10-24 04:56:59,942 INFO L432 NwaCegarLoop]: 325 mSDtfsCounter, 1062 mSDsluCounter, 1946 mSDsCounter, 0 mSdLazyCounter, 575 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1064 SdHoareTripleChecker+Valid, 2271 SdHoareTripleChecker+Invalid, 580 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 575 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-10-24 04:56:59,942 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1064 Valid, 2271 Invalid, 580 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 575 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-10-24 04:56:59,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2024-10-24 04:56:59,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 325. [2024-10-24 04:56:59,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 325 states, 320 states have (on average 1.459375) internal successors, (467), 320 states have internal predecessors, (467), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-10-24 04:56:59,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 473 transitions. [2024-10-24 04:56:59,955 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 473 transitions. Word has length 129 [2024-10-24 04:56:59,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:56:59,955 INFO L471 AbstractCegarLoop]: Abstraction has 325 states and 473 transitions. [2024-10-24 04:56:59,956 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:56:59,956 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 473 transitions. [2024-10-24 04:56:59,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-10-24 04:56:59,957 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:56:59,957 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:56:59,957 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-10-24 04:56:59,958 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:56:59,958 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:56:59,958 INFO L85 PathProgramCache]: Analyzing trace with hash 378599375, now seen corresponding path program 1 times [2024-10-24 04:56:59,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:56:59,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034621210] [2024-10-24 04:56:59,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:56:59,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:57:00,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:01,281 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:57:01,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:01,285 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2024-10-24 04:57:01,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:01,290 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:57:01,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:57:01,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034621210] [2024-10-24 04:57:01,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034621210] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:57:01,291 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:57:01,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-10-24 04:57:01,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878732565] [2024-10-24 04:57:01,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:57:01,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-10-24 04:57:01,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:57:01,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-10-24 04:57:01,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-10-24 04:57:01,292 INFO L87 Difference]: Start difference. First operand 325 states and 473 transitions. Second operand has 10 states, 10 states have (on average 12.3) internal successors, (123), 10 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:01,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:01,844 INFO L93 Difference]: Finished difference Result 1051 states and 1535 transitions. [2024-10-24 04:57:01,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-24 04:57:01,845 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 12.3) internal successors, (123), 10 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 130 [2024-10-24 04:57:01,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:01,850 INFO L225 Difference]: With dead ends: 1051 [2024-10-24 04:57:01,850 INFO L226 Difference]: Without dead ends: 778 [2024-10-24 04:57:01,851 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=205, Unknown=0, NotChecked=0, Total=272 [2024-10-24 04:57:01,852 INFO L432 NwaCegarLoop]: 355 mSDtfsCounter, 1781 mSDsluCounter, 2296 mSDsCounter, 0 mSdLazyCounter, 538 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1783 SdHoareTripleChecker+Valid, 2651 SdHoareTripleChecker+Invalid, 542 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 538 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:01,853 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1783 Valid, 2651 Invalid, 542 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 538 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-10-24 04:57:01,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 778 states. [2024-10-24 04:57:01,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 778 to 507. [2024-10-24 04:57:01,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 507 states, 501 states have (on average 1.4630738522954092) internal successors, (733), 501 states have internal predecessors, (733), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-10-24 04:57:01,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 741 transitions. [2024-10-24 04:57:01,870 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 741 transitions. Word has length 130 [2024-10-24 04:57:01,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:01,870 INFO L471 AbstractCegarLoop]: Abstraction has 507 states and 741 transitions. [2024-10-24 04:57:01,871 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 12.3) internal successors, (123), 10 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:01,871 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 741 transitions. [2024-10-24 04:57:01,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-10-24 04:57:01,873 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:01,873 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:01,873 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-10-24 04:57:01,873 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:01,874 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:01,874 INFO L85 PathProgramCache]: Analyzing trace with hash -1656240544, now seen corresponding path program 1 times [2024-10-24 04:57:01,874 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:57:01,874 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999807194] [2024-10-24 04:57:01,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:01,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:57:02,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:02,876 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:57:02,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:02,882 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2024-10-24 04:57:02,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:02,888 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:57:02,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:57:02,888 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999807194] [2024-10-24 04:57:02,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1999807194] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:57:02,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:57:02,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-24 04:57:02,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855491220] [2024-10-24 04:57:02,889 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:57:02,890 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-10-24 04:57:02,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:57:02,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-24 04:57:02,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2024-10-24 04:57:02,891 INFO L87 Difference]: Start difference. First operand 507 states and 741 transitions. Second operand has 8 states, 8 states have (on average 15.375) internal successors, (123), 8 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:03,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:03,174 INFO L93 Difference]: Finished difference Result 1029 states and 1512 transitions. [2024-10-24 04:57:03,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-24 04:57:03,175 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.375) internal successors, (123), 8 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 130 [2024-10-24 04:57:03,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:03,178 INFO L225 Difference]: With dead ends: 1029 [2024-10-24 04:57:03,178 INFO L226 Difference]: Without dead ends: 753 [2024-10-24 04:57:03,179 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2024-10-24 04:57:03,180 INFO L432 NwaCegarLoop]: 333 mSDtfsCounter, 854 mSDsluCounter, 1162 mSDsCounter, 0 mSdLazyCounter, 310 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 855 SdHoareTripleChecker+Valid, 1495 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 310 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:03,181 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [855 Valid, 1495 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 310 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-10-24 04:57:03,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 753 states. [2024-10-24 04:57:03,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 753 to 751. [2024-10-24 04:57:03,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 751 states, 745 states have (on average 1.47248322147651) internal successors, (1097), 745 states have internal predecessors, (1097), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-10-24 04:57:03,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 751 states to 751 states and 1105 transitions. [2024-10-24 04:57:03,205 INFO L78 Accepts]: Start accepts. Automaton has 751 states and 1105 transitions. Word has length 130 [2024-10-24 04:57:03,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:03,206 INFO L471 AbstractCegarLoop]: Abstraction has 751 states and 1105 transitions. [2024-10-24 04:57:03,206 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.375) internal successors, (123), 8 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:03,206 INFO L276 IsEmpty]: Start isEmpty. Operand 751 states and 1105 transitions. [2024-10-24 04:57:03,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-10-24 04:57:03,208 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:03,209 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:03,209 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-10-24 04:57:03,209 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:03,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:03,210 INFO L85 PathProgramCache]: Analyzing trace with hash -1146536034, now seen corresponding path program 1 times [2024-10-24 04:57:03,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:57:03,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262146659] [2024-10-24 04:57:03,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:03,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:57:03,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:03,673 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2024-10-24 04:57:03,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:03,694 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2024-10-24 04:57:03,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:03,696 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 04:57:03,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:57:03,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1262146659] [2024-10-24 04:57:03,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1262146659] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:03,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [847564339] [2024-10-24 04:57:03,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:03,698 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 04:57:03,698 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 04:57:03,700 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 04:57:03,701 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-10-24 04:57:04,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:04,031 INFO L255 TraceCheckSpWp]: Trace formula consists of 651 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-10-24 04:57:04,040 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:04,089 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 04:57:04,089 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-24 04:57:04,090 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [847564339] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:57:04,090 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-24 04:57:04,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 6 [2024-10-24 04:57:04,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889795630] [2024-10-24 04:57:04,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:57:04,091 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-24 04:57:04,091 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:57:04,095 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-24 04:57:04,095 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-10-24 04:57:04,099 INFO L87 Difference]: Start difference. First operand 751 states and 1105 transitions. Second operand has 6 states, 5 states have (on average 25.4) internal successors, (127), 6 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:04,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:04,175 INFO L93 Difference]: Finished difference Result 1467 states and 2158 transitions. [2024-10-24 04:57:04,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-24 04:57:04,176 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 25.4) internal successors, (127), 6 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 131 [2024-10-24 04:57:04,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:04,183 INFO L225 Difference]: With dead ends: 1467 [2024-10-24 04:57:04,183 INFO L226 Difference]: Without dead ends: 751 [2024-10-24 04:57:04,185 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-10-24 04:57:04,185 INFO L432 NwaCegarLoop]: 401 mSDtfsCounter, 0 mSDsluCounter, 1593 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1994 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:04,186 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1994 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:57:04,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 751 states. [2024-10-24 04:57:04,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 751 to 751. [2024-10-24 04:57:04,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 751 states, 745 states have (on average 1.4697986577181208) internal successors, (1095), 745 states have internal predecessors, (1095), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-10-24 04:57:04,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 751 states to 751 states and 1103 transitions. [2024-10-24 04:57:04,205 INFO L78 Accepts]: Start accepts. Automaton has 751 states and 1103 transitions. Word has length 131 [2024-10-24 04:57:04,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:04,206 INFO L471 AbstractCegarLoop]: Abstraction has 751 states and 1103 transitions. [2024-10-24 04:57:04,206 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 25.4) internal successors, (127), 6 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:04,206 INFO L276 IsEmpty]: Start isEmpty. Operand 751 states and 1103 transitions. [2024-10-24 04:57:04,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-10-24 04:57:04,208 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:04,208 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:04,230 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:04,411 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2024-10-24 04:57:04,412 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:04,413 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:04,413 INFO L85 PathProgramCache]: Analyzing trace with hash -935488136, now seen corresponding path program 1 times [2024-10-24 04:57:04,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:57:04,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642418679] [2024-10-24 04:57:04,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:04,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:57:04,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:04,937 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 21 [2024-10-24 04:57:04,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:04,939 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2024-10-24 04:57:04,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:04,941 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:57:04,941 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:57:04,942 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642418679] [2024-10-24 04:57:04,942 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1642418679] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:57:04,942 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:57:04,942 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-24 04:57:04,942 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633828341] [2024-10-24 04:57:04,942 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:57:04,943 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-10-24 04:57:04,943 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:57:04,944 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-24 04:57:04,944 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-10-24 04:57:04,944 INFO L87 Difference]: Start difference. First operand 751 states and 1103 transitions. Second operand has 8 states, 8 states have (on average 15.625) internal successors, (125), 8 states have internal predecessors, (125), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:57:05,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:05,251 INFO L93 Difference]: Finished difference Result 1500 states and 2202 transitions. [2024-10-24 04:57:05,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-24 04:57:05,252 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.625) internal successors, (125), 8 states have internal predecessors, (125), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 132 [2024-10-24 04:57:05,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:05,255 INFO L225 Difference]: With dead ends: 1500 [2024-10-24 04:57:05,255 INFO L226 Difference]: Without dead ends: 779 [2024-10-24 04:57:05,256 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-10-24 04:57:05,257 INFO L432 NwaCegarLoop]: 335 mSDtfsCounter, 423 mSDsluCounter, 1649 mSDsCounter, 0 mSdLazyCounter, 435 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 425 SdHoareTripleChecker+Valid, 1984 SdHoareTripleChecker+Invalid, 437 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 435 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:05,258 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [425 Valid, 1984 Invalid, 437 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 435 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-10-24 04:57:05,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 779 states. [2024-10-24 04:57:05,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 779 to 779. [2024-10-24 04:57:05,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 779 states, 773 states have (on average 1.4683053040103493) internal successors, (1135), 773 states have internal predecessors, (1135), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-10-24 04:57:05,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 779 states to 779 states and 1143 transitions. [2024-10-24 04:57:05,276 INFO L78 Accepts]: Start accepts. Automaton has 779 states and 1143 transitions. Word has length 132 [2024-10-24 04:57:05,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:05,276 INFO L471 AbstractCegarLoop]: Abstraction has 779 states and 1143 transitions. [2024-10-24 04:57:05,276 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.625) internal successors, (125), 8 states have internal predecessors, (125), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:57:05,276 INFO L276 IsEmpty]: Start isEmpty. Operand 779 states and 1143 transitions. [2024-10-24 04:57:05,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-10-24 04:57:05,278 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:05,279 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:05,279 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-10-24 04:57:05,279 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:05,279 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:05,280 INFO L85 PathProgramCache]: Analyzing trace with hash 1332006565, now seen corresponding path program 1 times [2024-10-24 04:57:05,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:57:05,280 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79264029] [2024-10-24 04:57:05,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:05,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:57:05,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:05,532 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2024-10-24 04:57:05,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:05,538 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2024-10-24 04:57:05,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:05,541 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:57:05,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:57:05,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79264029] [2024-10-24 04:57:05,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [79264029] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:57:05,546 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:57:05,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-24 04:57:05,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643144289] [2024-10-24 04:57:05,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:57:05,547 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-24 04:57:05,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:57:05,548 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-24 04:57:05,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-24 04:57:05,553 INFO L87 Difference]: Start difference. First operand 779 states and 1143 transitions. Second operand has 5 states, 5 states have (on average 25.2) internal successors, (126), 5 states have internal predecessors, (126), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:57:05,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:05,595 INFO L93 Difference]: Finished difference Result 1497 states and 2197 transitions. [2024-10-24 04:57:05,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-24 04:57:05,596 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 25.2) internal successors, (126), 5 states have internal predecessors, (126), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 133 [2024-10-24 04:57:05,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:05,621 INFO L225 Difference]: With dead ends: 1497 [2024-10-24 04:57:05,621 INFO L226 Difference]: Without dead ends: 751 [2024-10-24 04:57:05,623 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-24 04:57:05,624 INFO L432 NwaCegarLoop]: 402 mSDtfsCounter, 24 mSDsluCounter, 1197 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 1599 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:05,624 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 1599 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:57:05,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 751 states. [2024-10-24 04:57:05,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 751 to 751. [2024-10-24 04:57:05,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 751 states, 745 states have (on average 1.4684563758389262) internal successors, (1094), 745 states have internal predecessors, (1094), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-10-24 04:57:05,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 751 states to 751 states and 1102 transitions. [2024-10-24 04:57:05,641 INFO L78 Accepts]: Start accepts. Automaton has 751 states and 1102 transitions. Word has length 133 [2024-10-24 04:57:05,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:05,641 INFO L471 AbstractCegarLoop]: Abstraction has 751 states and 1102 transitions. [2024-10-24 04:57:05,642 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 25.2) internal successors, (126), 5 states have internal predecessors, (126), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:57:05,642 INFO L276 IsEmpty]: Start isEmpty. Operand 751 states and 1102 transitions. [2024-10-24 04:57:05,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-10-24 04:57:05,644 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:05,644 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:05,644 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-10-24 04:57:05,645 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:05,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:05,645 INFO L85 PathProgramCache]: Analyzing trace with hash -1047605516, now seen corresponding path program 1 times [2024-10-24 04:57:05,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:57:05,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407002217] [2024-10-24 04:57:05,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:05,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:57:05,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:06,062 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2024-10-24 04:57:06,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:06,065 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2024-10-24 04:57:06,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:06,082 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-24 04:57:06,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 04:57:06,083 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1407002217] [2024-10-24 04:57:06,083 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1407002217] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:57:06,083 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:57:06,083 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-10-24 04:57:06,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [15541764] [2024-10-24 04:57:06,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:57:06,084 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-24 04:57:06,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 04:57:06,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-24 04:57:06,084 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-10-24 04:57:06,085 INFO L87 Difference]: Start difference. First operand 751 states and 1102 transitions. Second operand has 6 states, 5 states have (on average 25.8) internal successors, (129), 6 states have internal predecessors, (129), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:06,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:06,129 INFO L93 Difference]: Finished difference Result 1428 states and 2102 transitions. [2024-10-24 04:57:06,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-24 04:57:06,130 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 25.8) internal successors, (129), 6 states have internal predecessors, (129), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 133 [2024-10-24 04:57:06,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:06,133 INFO L225 Difference]: With dead ends: 1428 [2024-10-24 04:57:06,133 INFO L226 Difference]: Without dead ends: 751 [2024-10-24 04:57:06,135 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-10-24 04:57:06,135 INFO L432 NwaCegarLoop]: 399 mSDtfsCounter, 0 mSDsluCounter, 1585 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1984 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:06,136 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1984 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 04:57:06,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 751 states. [2024-10-24 04:57:06,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 751 to 741. [2024-10-24 04:57:06,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 741 states, 735 states have (on average 1.4666666666666666) internal successors, (1078), 735 states have internal predecessors, (1078), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-10-24 04:57:06,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 1086 transitions. [2024-10-24 04:57:06,152 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 1086 transitions. Word has length 133 [2024-10-24 04:57:06,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:06,152 INFO L471 AbstractCegarLoop]: Abstraction has 741 states and 1086 transitions. [2024-10-24 04:57:06,153 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 25.8) internal successors, (129), 6 states have internal predecessors, (129), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:06,153 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 1086 transitions. [2024-10-24 04:57:06,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-10-24 04:57:06,155 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:06,155 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:06,155 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-10-24 04:57:06,155 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:06,156 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:06,156 INFO L85 PathProgramCache]: Analyzing trace with hash 2445652, now seen corresponding path program 1 times [2024-10-24 04:57:06,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:57:06,156 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846621867] [2024-10-24 04:57:06,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:06,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 04:57:06,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 04:57:06,325 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 04:57:06,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 04:57:06,630 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 04:57:06,630 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-10-24 04:57:06,632 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-10-24 04:57:06,633 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-10-24 04:57:06,636 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:06,766 INFO L165 ceAbstractionStarter]: Computing trace abstraction results [2024-10-24 04:57:06,769 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.10 04:57:06 BoogieIcfgContainer [2024-10-24 04:57:06,769 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-10-24 04:57:06,769 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-10-24 04:57:06,770 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-10-24 04:57:06,770 INFO L274 PluginConnector]: Witness Printer initialized [2024-10-24 04:57:06,771 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:56:50" (3/4) ... [2024-10-24 04:57:06,773 INFO L142 WitnessPrinter]: No result that supports witness generation found [2024-10-24 04:57:06,774 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-10-24 04:57:06,774 INFO L158 Benchmark]: Toolchain (without parser) took 18592.00ms. Allocated memory was 167.8MB in the beginning and 576.7MB in the end (delta: 408.9MB). Free memory was 109.8MB in the beginning and 497.6MB in the end (delta: -387.7MB). Peak memory consumption was 23.2MB. Max. memory is 16.1GB. [2024-10-24 04:57:06,775 INFO L158 Benchmark]: CDTParser took 0.24ms. Allocated memory is still 167.8MB. Free memory was 131.0MB in the beginning and 130.9MB in the end (delta: 179.8kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2024-10-24 04:57:06,775 INFO L158 Benchmark]: CACSL2BoogieTranslator took 506.08ms. Allocated memory is still 167.8MB. Free memory was 109.3MB in the beginning and 84.7MB in the end (delta: 24.7MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-10-24 04:57:06,776 INFO L158 Benchmark]: Boogie Procedure Inliner took 127.23ms. Allocated memory is still 167.8MB. Free memory was 84.7MB in the beginning and 69.5MB in the end (delta: 15.2MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2024-10-24 04:57:06,776 INFO L158 Benchmark]: Boogie Preprocessor took 258.14ms. Allocated memory was 167.8MB in the beginning and 239.1MB in the end (delta: 71.3MB). Free memory was 69.5MB in the beginning and 195.1MB in the end (delta: -125.6MB). Peak memory consumption was 21.6MB. Max. memory is 16.1GB. [2024-10-24 04:57:06,777 INFO L158 Benchmark]: RCFGBuilder took 1593.75ms. Allocated memory is still 239.1MB. Free memory was 195.1MB in the beginning and 65.1MB in the end (delta: 130.0MB). Peak memory consumption was 130.0MB. Max. memory is 16.1GB. [2024-10-24 04:57:06,777 INFO L158 Benchmark]: TraceAbstraction took 16095.84ms. Allocated memory was 239.1MB in the beginning and 576.7MB in the end (delta: 337.6MB). Free memory was 65.1MB in the beginning and 497.6MB in the end (delta: -432.5MB). Peak memory consumption was 215.6MB. Max. memory is 16.1GB. [2024-10-24 04:57:06,777 INFO L158 Benchmark]: Witness Printer took 4.40ms. Allocated memory is still 576.7MB. Free memory is still 497.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-10-24 04:57:06,781 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24ms. Allocated memory is still 167.8MB. Free memory was 131.0MB in the beginning and 130.9MB in the end (delta: 179.8kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 506.08ms. Allocated memory is still 167.8MB. Free memory was 109.3MB in the beginning and 84.7MB in the end (delta: 24.7MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 127.23ms. Allocated memory is still 167.8MB. Free memory was 84.7MB in the beginning and 69.5MB in the end (delta: 15.2MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * Boogie Preprocessor took 258.14ms. Allocated memory was 167.8MB in the beginning and 239.1MB in the end (delta: 71.3MB). Free memory was 69.5MB in the beginning and 195.1MB in the end (delta: -125.6MB). Peak memory consumption was 21.6MB. Max. memory is 16.1GB. * RCFGBuilder took 1593.75ms. Allocated memory is still 239.1MB. Free memory was 195.1MB in the beginning and 65.1MB in the end (delta: 130.0MB). Peak memory consumption was 130.0MB. Max. memory is 16.1GB. * TraceAbstraction took 16095.84ms. Allocated memory was 239.1MB in the beginning and 576.7MB in the end (delta: 337.6MB). Free memory was 65.1MB in the beginning and 497.6MB in the end (delta: -432.5MB). Peak memory consumption was 215.6MB. Max. memory is 16.1GB. * Witness Printer took 4.40ms. Allocated memory is still 576.7MB. Free memory is still 497.6MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseAnd at line 296. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L30] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L35] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L36] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L38] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L39] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L41] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L42] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L44] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L45] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L47] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L48] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L50] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L51] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L53] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L54] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L56] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L57] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L59] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L60] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L62] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L63] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L65] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L66] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L68] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L69] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L71] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L72] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L74] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L75] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L77] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L78] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L80] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L81] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L83] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L84] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L86] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L87] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L89] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 6); [L90] const SORT_101 msb_SORT_101 = (SORT_101)1 << (6 - 1); [L92] const SORT_1 var_7 = 0; [L93] const SORT_1 var_8 = 1; [L94] const SORT_9 var_10 = 0; [L95] const SORT_12 var_13 = 0; [L96] const SORT_12 var_14 = 200; [L97] const SORT_72 var_73 = 5; [L98] const SORT_11 var_75 = 0; [L99] const SORT_11 var_108 = 200; [L100] const SORT_72 var_113 = 4; [L101] const SORT_72 var_116 = 6; [L102] const SORT_96 var_120 = 9; [L103] const SORT_72 var_137 = 0; [L104] const SORT_96 var_140 = 0; [L106] SORT_1 input_2; [L107] SORT_1 input_3; [L108] SORT_1 input_4; [L110] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L110] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L111] EXPR __VERIFIER_nondet_ushort() & mask_SORT_11 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_5=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L111] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L112] EXPR __VERIFIER_nondet_ushort() & mask_SORT_11 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_17=0, state_5=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L112] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L113] EXPR __VERIFIER_nondet_uchar() & mask_SORT_96 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_17=0, state_5=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L113] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L114] EXPR __VERIFIER_nondet_uchar() & mask_SORT_96 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_17=0, state_5=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L114] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L116] SORT_11 init_77_arg_1 = var_75; [L117] state_76 = init_77_arg_1 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_5=1, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] EXPR input_3 & mask_SORT_1 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_5=1, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] EXPR input_4 & mask_SORT_1 VAL [input_3=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_5=1, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; VAL [input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_86_arg_0=1, var_86_arg_1=-255, var_8=1] [L132] EXPR var_86_arg_0 | var_86_arg_1 VAL [input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] EXPR var_86 & mask_SORT_1 VAL [input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_88_arg_0=1, var_8=1] [L137] EXPR var_88_arg_0 & mask_SORT_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1, var_90_arg_0=0, var_90_arg_1=1] [L144] EXPR var_90_arg_0 ^ var_90_arg_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1, var_93_arg_0=-2, var_93_arg_1=-2] [L151] EXPR var_93_arg_0 | var_93_arg_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] EXPR var_93 & mask_SORT_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_74_arg_0=5, var_75=0, var_7=0, var_8=1] [L157] EXPR var_74_arg_0 & mask_SORT_72 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_15=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L166] EXPR var_15 & mask_SORT_12 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_16_arg_0=0, var_16_arg_1=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L169] EXPR ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L173] EXPR var_18 & mask_SORT_11 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_21_arg_0=0, var_21_arg_1=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L178] EXPR ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] EXPR var_21 & mask_SORT_20 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_24_arg_0=0, var_24_arg_1=0, var_25=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L212] EXPR ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_25=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] EXPR var_24 & mask_SORT_23 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_25=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_27_arg_0=0, var_27_arg_1=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L216] EXPR ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] EXPR var_27 & mask_SORT_26 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_30_arg_0=0, var_30_arg_1=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L220] EXPR ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] EXPR var_30 & mask_SORT_29 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_33_arg_0=0, var_33_arg_1=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L224] EXPR ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] EXPR var_33 & mask_SORT_32 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_36_arg_0=0, var_36_arg_1=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L228] EXPR ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] EXPR var_36 & mask_SORT_35 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_39_arg_0=0, var_39_arg_1=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L232] EXPR ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] EXPR var_39 & mask_SORT_38 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L236] EXPR ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] EXPR var_42 & mask_SORT_41 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L240] EXPR ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] EXPR var_45 & mask_SORT_44 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L244] EXPR ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] EXPR var_48 & mask_SORT_47 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L248] EXPR ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] EXPR var_51 & mask_SORT_50 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_54_arg_0=0, var_54_arg_1=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L252] EXPR ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] EXPR var_54 & mask_SORT_53 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_57_arg_0=0, var_57_arg_1=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L256] EXPR ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] EXPR var_57 & mask_SORT_56 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_60_arg_0=0, var_60_arg_1=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L260] EXPR ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] EXPR var_60 & mask_SORT_59 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_63_arg_0=0, var_63_arg_1=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L264] EXPR ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] EXPR var_63 & mask_SORT_62 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_65_arg_0=0, var_65_arg_1=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L268] EXPR ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_66_arg_0=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L270] EXPR var_66_arg_0 & mask_SORT_9 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L279] EXPR var_68 & mask_SORT_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_69_arg_0=0, var_69_arg_1=1, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L282] EXPR var_69_arg_0 ^ var_69_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_7=0, var_82_arg_0=-2, var_82_arg_1=-2, var_8=1] [L295] EXPR var_82_arg_0 & var_82_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_7=0, var_8=1] [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] EXPR var_82 & mask_SORT_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_7=0, var_8=1] [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 277 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 15.9s, OverallIterations: 16, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.1s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 6567 SdHoareTripleChecker+Valid, 2.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 6556 mSDsluCounter, 24932 SdHoareTripleChecker+Invalid, 2.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 19042 mSDsCounter, 32 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3400 IncrementalHoareTripleChecker+Invalid, 3432 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 32 mSolverCounterUnsat, 5890 mSDtfsCounter, 3400 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 309 GetRequests, 220 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=779occurred in iteration=13, InterpolantAutomatonStates: 94, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 15 MinimizatonAttempts, 510 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 2.0s SatisfiabilityAnalysisTime, 8.3s InterpolantComputationTime, 2179 NumberOfCodeBlocks, 2179 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 2030 ConstructedInterpolants, 0 QuantifiedInterpolants, 6496 SizeOfPredicates, 0 NumberOfNonLiveVariables, 651 ConjunctsInSsa, 11 ConjunctsInUnsatCore, 16 InterpolantComputations, 15 PerfectInterpolantSequences, 61/64 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-10-24 04:57:06,822 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4a390ef-m [2024-10-24 04:57:09,360 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-24 04:57:09,446 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-10-24 04:57:09,454 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-24 04:57:09,454 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-24 04:57:09,492 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-24 04:57:09,492 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-24 04:57:09,494 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-24 04:57:09,495 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-24 04:57:09,495 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-24 04:57:09,495 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-24 04:57:09,495 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-24 04:57:09,496 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-24 04:57:09,499 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-24 04:57:09,499 INFO L153 SettingsManager]: * Use SBE=true [2024-10-24 04:57:09,500 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-24 04:57:09,500 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-24 04:57:09,500 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-24 04:57:09,500 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-24 04:57:09,501 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-24 04:57:09,501 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-24 04:57:09,504 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-10-24 04:57:09,505 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-10-24 04:57:09,505 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-24 04:57:09,505 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-10-24 04:57:09,506 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-24 04:57:09,506 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-24 04:57:09,506 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-24 04:57:09,506 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-24 04:57:09,507 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-24 04:57:09,507 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-24 04:57:09,507 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-10-24 04:57:09,507 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-24 04:57:09,508 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-24 04:57:09,508 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-24 04:57:09,508 INFO L153 SettingsManager]: * Trace refinement strategy=WOLF [2024-10-24 04:57:09,509 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:09,513 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-24 04:57:09,514 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-10-24 04:57:09,514 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-10-24 04:57:09,514 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-10-24 04:57:09,515 INFO L153 SettingsManager]: * Logic for external solver=AUFBV [2024-10-24 04:57:09,515 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 [2024-10-24 04:57:09,846 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-24 04:57:09,873 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-24 04:57:09,876 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-24 04:57:09,878 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-24 04:57:09,878 INFO L274 PluginConnector]: CDTParser initialized [2024-10-24 04:57:09,880 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2024-10-24 04:57:11,471 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-24 04:57:11,731 INFO L384 CDTParser]: Found 1 translation units. [2024-10-24 04:57:11,732 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2024-10-24 04:57:11,742 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/36557c670/11c1316c7f66411996f30e25cebb5cf9/FLAGb19bcb477 [2024-10-24 04:57:12,051 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/36557c670/11c1316c7f66411996f30e25cebb5cf9 [2024-10-24 04:57:12,053 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-24 04:57:12,054 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-24 04:57:12,055 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-24 04:57:12,055 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-24 04:57:12,061 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-24 04:57:12,062 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,063 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@e56a5a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12, skipping insertion in model container [2024-10-24 04:57:12,063 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,104 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-24 04:57:12,322 WARN L248 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2024-10-24 04:57:12,478 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 04:57:12,493 INFO L200 MainTranslator]: Completed pre-run [2024-10-24 04:57:12,504 WARN L248 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2024-10-24 04:57:12,603 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 04:57:12,646 INFO L204 MainTranslator]: Completed translation [2024-10-24 04:57:12,647 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12 WrapperNode [2024-10-24 04:57:12,647 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-24 04:57:12,648 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-24 04:57:12,648 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-24 04:57:12,648 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-24 04:57:12,656 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,679 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,734 INFO L138 Inliner]: procedures = 17, calls = 10, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 375 [2024-10-24 04:57:12,735 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-24 04:57:12,735 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-24 04:57:12,735 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-24 04:57:12,735 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-24 04:57:12,749 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,750 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,755 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,778 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-24 04:57:12,781 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,782 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,797 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,803 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,813 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,816 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,824 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-24 04:57:12,825 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-24 04:57:12,825 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-24 04:57:12,825 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-24 04:57:12,826 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (1/1) ... [2024-10-24 04:57:12,835 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-10-24 04:57:12,850 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 04:57:12,867 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-10-24 04:57:12,870 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-10-24 04:57:12,922 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-24 04:57:12,922 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-10-24 04:57:12,923 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-10-24 04:57:12,924 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-10-24 04:57:12,924 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-24 04:57:12,924 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-24 04:57:13,112 INFO L238 CfgBuilder]: Building ICFG [2024-10-24 04:57:13,114 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-24 04:57:13,637 INFO L? ?]: Removed 176 outVars from TransFormulas that were not future-live. [2024-10-24 04:57:13,637 INFO L287 CfgBuilder]: Performing block encoding [2024-10-24 04:57:13,709 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-24 04:57:13,710 INFO L314 CfgBuilder]: Removed 1 assume(true) statements. [2024-10-24 04:57:13,710 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:57:13 BoogieIcfgContainer [2024-10-24 04:57:13,711 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-24 04:57:13,714 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-24 04:57:13,714 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-24 04:57:13,718 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-24 04:57:13,718 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.10 04:57:12" (1/3) ... [2024-10-24 04:57:13,720 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54f133bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:57:13, skipping insertion in model container [2024-10-24 04:57:13,720 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:57:12" (2/3) ... [2024-10-24 04:57:13,720 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54f133bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:57:13, skipping insertion in model container [2024-10-24 04:57:13,720 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:57:13" (3/3) ... [2024-10-24 04:57:13,723 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2024-10-24 04:57:13,741 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-24 04:57:13,742 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-10-24 04:57:13,803 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-10-24 04:57:13,808 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@701fd8c9, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-24 04:57:13,809 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-24 04:57:13,812 INFO L276 IsEmpty]: Start isEmpty. Operand has 15 states, 10 states have (on average 1.4) internal successors, (14), 11 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2024-10-24 04:57:13,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2024-10-24 04:57:13,818 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:13,818 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:57:13,819 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:13,824 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:13,824 INFO L85 PathProgramCache]: Analyzing trace with hash 1026059515, now seen corresponding path program 1 times [2024-10-24 04:57:13,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-10-24 04:57:13,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1976797368] [2024-10-24 04:57:13,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:13,839 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:13,839 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-10-24 04:57:13,842 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-10-24 04:57:13,844 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2024-10-24 04:57:14,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:14,157 INFO L255 TraceCheckSpWp]: Trace formula consists of 215 conjuncts, 17 conjuncts are in the unsatisfiable core [2024-10-24 04:57:14,167 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:14,480 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-24 04:57:14,481 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-24 04:57:14,482 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2024-10-24 04:57:14,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1976797368] [2024-10-24 04:57:14,483 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1976797368] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 04:57:14,483 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 04:57:14,483 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 04:57:14,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000635913] [2024-10-24 04:57:14,486 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 04:57:14,490 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 04:57:14,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2024-10-24 04:57:14,518 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 04:57:14,519 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 04:57:14,521 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.4) internal successors, (14), 11 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:57:14,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:14,655 INFO L93 Difference]: Finished difference Result 35 states and 50 transitions. [2024-10-24 04:57:14,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 04:57:14,658 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 16 [2024-10-24 04:57:14,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:14,665 INFO L225 Difference]: With dead ends: 35 [2024-10-24 04:57:14,665 INFO L226 Difference]: Without dead ends: 21 [2024-10-24 04:57:14,668 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-10-24 04:57:14,672 INFO L432 NwaCegarLoop]: 9 mSDtfsCounter, 2 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:14,673 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 27 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-10-24 04:57:14,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2024-10-24 04:57:14,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2024-10-24 04:57:14,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 14 states have internal predecessors, (15), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-10-24 04:57:14,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 23 transitions. [2024-10-24 04:57:14,715 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 23 transitions. Word has length 16 [2024-10-24 04:57:14,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:14,718 INFO L471 AbstractCegarLoop]: Abstraction has 20 states and 23 transitions. [2024-10-24 04:57:14,718 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-10-24 04:57:14,718 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 23 transitions. [2024-10-24 04:57:14,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2024-10-24 04:57:14,720 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:14,720 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2024-10-24 04:57:14,725 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:14,921 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:14,921 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:14,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:14,922 INFO L85 PathProgramCache]: Analyzing trace with hash 710225191, now seen corresponding path program 1 times [2024-10-24 04:57:14,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-10-24 04:57:14,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [685212649] [2024-10-24 04:57:14,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:14,923 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:14,924 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-10-24 04:57:14,925 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-10-24 04:57:14,926 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2024-10-24 04:57:15,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:15,344 INFO L255 TraceCheckSpWp]: Trace formula consists of 384 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-10-24 04:57:15,354 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:15,802 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-24 04:57:15,803 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:16,011 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2024-10-24 04:57:16,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [685212649] [2024-10-24 04:57:16,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [685212649] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:16,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1499303726] [2024-10-24 04:57:16,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:57:16,012 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:16,012 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2024-10-24 04:57:16,015 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-10-24 04:57:16,017 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process [2024-10-24 04:57:16,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 04:57:16,497 INFO L255 TraceCheckSpWp]: Trace formula consists of 384 conjuncts, 28 conjuncts are in the unsatisfiable core [2024-10-24 04:57:16,505 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:16,814 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-24 04:57:16,815 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:16,948 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1499303726] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:16,949 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-10-24 04:57:16,949 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2024-10-24 04:57:16,950 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394939805] [2024-10-24 04:57:16,950 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-10-24 04:57:16,951 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-24 04:57:16,952 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2024-10-24 04:57:16,953 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-24 04:57:16,953 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-10-24 04:57:16,954 INFO L87 Difference]: Start difference. First operand 20 states and 23 transitions. Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-10-24 04:57:17,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:17,120 INFO L93 Difference]: Finished difference Result 30 states and 35 transitions. [2024-10-24 04:57:17,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-24 04:57:17,121 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 31 [2024-10-24 04:57:17,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:17,122 INFO L225 Difference]: With dead ends: 30 [2024-10-24 04:57:17,122 INFO L226 Difference]: Without dead ends: 28 [2024-10-24 04:57:17,122 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2024-10-24 04:57:17,123 INFO L432 NwaCegarLoop]: 9 mSDtfsCounter, 2 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:17,124 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 27 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-10-24 04:57:17,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2024-10-24 04:57:17,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2024-10-24 04:57:17,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 19 states have internal predecessors, (20), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-10-24 04:57:17,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 32 transitions. [2024-10-24 04:57:17,132 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 32 transitions. Word has length 31 [2024-10-24 04:57:17,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:17,133 INFO L471 AbstractCegarLoop]: Abstraction has 27 states and 32 transitions. [2024-10-24 04:57:17,133 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-10-24 04:57:17,135 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2024-10-24 04:57:17,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2024-10-24 04:57:17,137 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:17,137 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1] [2024-10-24 04:57:17,145 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (4)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:17,344 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Ended with exit code 0 [2024-10-24 04:57:17,538 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:17,539 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:17,539 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:17,540 INFO L85 PathProgramCache]: Analyzing trace with hash -350056581, now seen corresponding path program 2 times [2024-10-24 04:57:17,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-10-24 04:57:17,541 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [211214581] [2024-10-24 04:57:17,541 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-24 04:57:17,541 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:17,541 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-10-24 04:57:17,544 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-10-24 04:57:17,547 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2024-10-24 04:57:18,140 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-24 04:57:18,140 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:18,160 INFO L255 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-10-24 04:57:18,167 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:18,633 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-10-24 04:57:18,634 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:18,792 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2024-10-24 04:57:18,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [211214581] [2024-10-24 04:57:18,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [211214581] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:18,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2109022916] [2024-10-24 04:57:18,793 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-24 04:57:18,794 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:18,794 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2024-10-24 04:57:18,797 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-10-24 04:57:18,798 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (6)] Waiting until timeout for monitored process [2024-10-24 04:57:19,531 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-24 04:57:19,532 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:19,557 INFO L255 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-10-24 04:57:19,564 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:19,978 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-10-24 04:57:19,978 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:20,095 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2109022916] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:20,095 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-10-24 04:57:20,095 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2024-10-24 04:57:20,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794993982] [2024-10-24 04:57:20,096 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-10-24 04:57:20,096 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-24 04:57:20,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2024-10-24 04:57:20,097 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-24 04:57:20,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-10-24 04:57:20,098 INFO L87 Difference]: Start difference. First operand 27 states and 32 transitions. Second operand has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-10-24 04:57:20,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:20,333 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2024-10-24 04:57:20,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-24 04:57:20,334 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 46 [2024-10-24 04:57:20,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:20,335 INFO L225 Difference]: With dead ends: 37 [2024-10-24 04:57:20,335 INFO L226 Difference]: Without dead ends: 35 [2024-10-24 04:57:20,335 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 91 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2024-10-24 04:57:20,336 INFO L432 NwaCegarLoop]: 13 mSDtfsCounter, 2 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 43 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:20,337 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 43 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 45 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-10-24 04:57:20,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2024-10-24 04:57:20,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2024-10-24 04:57:20,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 24 states have (on average 1.0416666666666667) internal successors, (25), 24 states have internal predecessors, (25), 8 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2024-10-24 04:57:20,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 41 transitions. [2024-10-24 04:57:20,346 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 41 transitions. Word has length 46 [2024-10-24 04:57:20,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:20,348 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 41 transitions. [2024-10-24 04:57:20,348 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-10-24 04:57:20,348 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2024-10-24 04:57:20,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2024-10-24 04:57:20,350 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:20,350 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1] [2024-10-24 04:57:20,358 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Ended with exit code 0 [2024-10-24 04:57:20,558 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (6)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:20,750 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:20,751 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:20,751 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:20,751 INFO L85 PathProgramCache]: Analyzing trace with hash -1316898137, now seen corresponding path program 3 times [2024-10-24 04:57:20,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-10-24 04:57:20,752 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2052902290] [2024-10-24 04:57:20,752 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-24 04:57:20,753 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:20,753 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-10-24 04:57:20,757 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-10-24 04:57:20,758 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2024-10-24 04:57:21,684 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-10-24 04:57:21,684 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:21,698 INFO L255 TraceCheckSpWp]: Trace formula consists of 699 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-10-24 04:57:21,706 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:22,290 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2024-10-24 04:57:22,290 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:22,434 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2024-10-24 04:57:22,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2052902290] [2024-10-24 04:57:22,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2052902290] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:22,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1214652560] [2024-10-24 04:57:22,437 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-24 04:57:22,437 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:22,437 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2024-10-24 04:57:22,439 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-10-24 04:57:22,442 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2024-10-24 04:57:23,363 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-10-24 04:57:23,363 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:23,390 INFO L255 TraceCheckSpWp]: Trace formula consists of 699 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-10-24 04:57:23,395 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:23,875 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2024-10-24 04:57:23,877 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:24,001 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1214652560] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:24,002 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-10-24 04:57:24,002 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2024-10-24 04:57:24,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [77008322] [2024-10-24 04:57:24,002 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-10-24 04:57:24,002 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-24 04:57:24,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2024-10-24 04:57:24,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-24 04:57:24,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-10-24 04:57:24,004 INFO L87 Difference]: Start difference. First operand 34 states and 41 transitions. Second operand has 7 states, 7 states have (on average 3.4285714285714284) internal successors, (24), 7 states have internal predecessors, (24), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-10-24 04:57:24,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:24,289 INFO L93 Difference]: Finished difference Result 44 states and 53 transitions. [2024-10-24 04:57:24,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-24 04:57:24,289 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.4285714285714284) internal successors, (24), 7 states have internal predecessors, (24), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 61 [2024-10-24 04:57:24,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:24,291 INFO L225 Difference]: With dead ends: 44 [2024-10-24 04:57:24,291 INFO L226 Difference]: Without dead ends: 42 [2024-10-24 04:57:24,291 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2024-10-24 04:57:24,292 INFO L432 NwaCegarLoop]: 21 mSDtfsCounter, 2 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:24,292 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 93 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-10-24 04:57:24,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2024-10-24 04:57:24,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2024-10-24 04:57:24,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-10-24 04:57:24,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 50 transitions. [2024-10-24 04:57:24,301 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 50 transitions. Word has length 61 [2024-10-24 04:57:24,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:24,302 INFO L471 AbstractCegarLoop]: Abstraction has 41 states and 50 transitions. [2024-10-24 04:57:24,302 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.4285714285714284) internal successors, (24), 7 states have internal predecessors, (24), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-10-24 04:57:24,302 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 50 transitions. [2024-10-24 04:57:24,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2024-10-24 04:57:24,304 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:24,304 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 5, 4, 4, 1, 1, 1] [2024-10-24 04:57:24,313 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Ended with exit code 0 [2024-10-24 04:57:24,516 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (8)] Ended with exit code 0 [2024-10-24 04:57:24,706 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:24,707 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:24,708 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:24,708 INFO L85 PathProgramCache]: Analyzing trace with hash -963030533, now seen corresponding path program 4 times [2024-10-24 04:57:24,709 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-10-24 04:57:24,709 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [241906400] [2024-10-24 04:57:24,709 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-24 04:57:24,709 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:24,710 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-10-24 04:57:24,717 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-10-24 04:57:24,719 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2024-10-24 04:57:25,347 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-24 04:57:25,347 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:25,364 INFO L255 TraceCheckSpWp]: Trace formula consists of 891 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-10-24 04:57:25,371 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:25,916 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-24 04:57:25,916 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:26,044 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2024-10-24 04:57:26,044 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [241906400] [2024-10-24 04:57:26,044 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [241906400] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:26,045 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1177064670] [2024-10-24 04:57:26,045 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-24 04:57:26,045 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:26,045 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2024-10-24 04:57:26,047 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-10-24 04:57:26,048 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (10)] Waiting until timeout for monitored process [2024-10-24 04:57:27,004 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-24 04:57:27,005 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:27,060 INFO L255 TraceCheckSpWp]: Trace formula consists of 891 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-10-24 04:57:27,068 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:27,557 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-24 04:57:27,558 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:27,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1177064670] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:27,692 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-10-24 04:57:27,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2024-10-24 04:57:27,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899183638] [2024-10-24 04:57:27,693 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-10-24 04:57:27,693 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-10-24 04:57:27,694 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2024-10-24 04:57:27,694 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-24 04:57:27,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-10-24 04:57:27,695 INFO L87 Difference]: Start difference. First operand 41 states and 50 transitions. Second operand has 8 states, 8 states have (on average 3.625) internal successors, (29), 8 states have internal predecessors, (29), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2024-10-24 04:57:28,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:28,078 INFO L93 Difference]: Finished difference Result 51 states and 62 transitions. [2024-10-24 04:57:28,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-24 04:57:28,078 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.625) internal successors, (29), 8 states have internal predecessors, (29), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) Word has length 76 [2024-10-24 04:57:28,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:28,080 INFO L225 Difference]: With dead ends: 51 [2024-10-24 04:57:28,080 INFO L226 Difference]: Without dead ends: 49 [2024-10-24 04:57:28,080 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 149 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2024-10-24 04:57:28,081 INFO L432 NwaCegarLoop]: 25 mSDtfsCounter, 2 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 194 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 198 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:28,081 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 124 Invalid, 198 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 194 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-10-24 04:57:28,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2024-10-24 04:57:28,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2024-10-24 04:57:28,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 34 states have (on average 1.0294117647058822) internal successors, (35), 34 states have internal predecessors, (35), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-10-24 04:57:28,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 59 transitions. [2024-10-24 04:57:28,092 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 59 transitions. Word has length 76 [2024-10-24 04:57:28,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:28,093 INFO L471 AbstractCegarLoop]: Abstraction has 48 states and 59 transitions. [2024-10-24 04:57:28,093 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.625) internal successors, (29), 8 states have internal predecessors, (29), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2024-10-24 04:57:28,093 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 59 transitions. [2024-10-24 04:57:28,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-10-24 04:57:28,095 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:28,095 INFO L215 NwaCegarLoop]: trace histogram [12, 12, 12, 6, 6, 6, 6, 6, 6, 6, 5, 5, 1, 1, 1] [2024-10-24 04:57:28,106 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:28,307 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (10)] Ended with exit code 0 [2024-10-24 04:57:28,496 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:28,496 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:28,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:28,497 INFO L85 PathProgramCache]: Analyzing trace with hash 241018919, now seen corresponding path program 5 times [2024-10-24 04:57:28,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-10-24 04:57:28,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1609720295] [2024-10-24 04:57:28,498 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-24 04:57:28,498 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:28,498 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-10-24 04:57:28,499 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-10-24 04:57:28,501 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2024-10-24 04:57:29,960 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2024-10-24 04:57:29,960 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:29,982 INFO L255 TraceCheckSpWp]: Trace formula consists of 1060 conjuncts, 28 conjuncts are in the unsatisfiable core [2024-10-24 04:57:29,989 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:30,672 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2024-10-24 04:57:30,673 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:30,772 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2024-10-24 04:57:30,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1609720295] [2024-10-24 04:57:30,772 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1609720295] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:30,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [817269500] [2024-10-24 04:57:30,772 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-24 04:57:30,773 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:30,773 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2024-10-24 04:57:30,774 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-10-24 04:57:30,775 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (12)] Waiting until timeout for monitored process [2024-10-24 04:57:32,074 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2024-10-24 04:57:32,075 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-24 04:57:32,110 INFO L255 TraceCheckSpWp]: Trace formula consists of 1060 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-10-24 04:57:32,116 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 04:57:32,789 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2024-10-24 04:57:32,789 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 04:57:32,879 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [817269500] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 04:57:32,879 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-10-24 04:57:32,879 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2024-10-24 04:57:32,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494977313] [2024-10-24 04:57:32,880 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-10-24 04:57:32,880 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-24 04:57:32,880 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2024-10-24 04:57:32,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-24 04:57:32,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2024-10-24 04:57:32,882 INFO L87 Difference]: Start difference. First operand 48 states and 59 transitions. Second operand has 9 states, 9 states have (on average 3.7777777777777777) internal successors, (34), 9 states have internal predecessors, (34), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2024-10-24 04:57:33,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 04:57:33,333 INFO L93 Difference]: Finished difference Result 58 states and 71 transitions. [2024-10-24 04:57:33,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-10-24 04:57:33,334 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.7777777777777777) internal successors, (34), 9 states have internal predecessors, (34), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) Word has length 91 [2024-10-24 04:57:33,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 04:57:33,335 INFO L225 Difference]: With dead ends: 58 [2024-10-24 04:57:33,335 INFO L226 Difference]: Without dead ends: 56 [2024-10-24 04:57:33,336 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 178 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2024-10-24 04:57:33,336 INFO L432 NwaCegarLoop]: 29 mSDtfsCounter, 2 mSDsluCounter, 130 mSDsCounter, 0 mSdLazyCounter, 274 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 159 SdHoareTripleChecker+Invalid, 279 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 274 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-10-24 04:57:33,337 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 159 Invalid, 279 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 274 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-10-24 04:57:33,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2024-10-24 04:57:33,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 55. [2024-10-24 04:57:33,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 39 states have (on average 1.0256410256410255) internal successors, (40), 39 states have internal predecessors, (40), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-10-24 04:57:33,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 68 transitions. [2024-10-24 04:57:33,347 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 68 transitions. Word has length 91 [2024-10-24 04:57:33,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 04:57:33,356 INFO L471 AbstractCegarLoop]: Abstraction has 55 states and 68 transitions. [2024-10-24 04:57:33,356 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.7777777777777777) internal successors, (34), 9 states have internal predecessors, (34), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2024-10-24 04:57:33,356 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 68 transitions. [2024-10-24 04:57:33,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2024-10-24 04:57:33,357 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:57:33,358 INFO L215 NwaCegarLoop]: trace histogram [14, 14, 14, 7, 7, 7, 7, 7, 7, 7, 6, 6, 1, 1, 1] [2024-10-24 04:57:33,371 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:33,573 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (12)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:33,758 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt [2024-10-24 04:57:33,758 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:57:33,759 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:57:33,760 INFO L85 PathProgramCache]: Analyzing trace with hash -1951091589, now seen corresponding path program 6 times [2024-10-24 04:57:33,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-10-24 04:57:33,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [806169705] [2024-10-24 04:57:33,761 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-24 04:57:33,761 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:33,761 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-10-24 04:57:33,764 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-10-24 04:57:33,765 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2024-10-24 04:57:37,031 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2024-10-24 04:57:37,032 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-10-24 04:57:37,032 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 04:57:37,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 04:57:38,308 INFO L130 FreeRefinementEngine]: Strategy WOLF found a feasible trace [2024-10-24 04:57:38,309 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-10-24 04:57:38,310 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-10-24 04:57:38,351 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2024-10-24 04:57:38,513 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-10-24 04:57:38,517 INFO L407 BasicCegarLoop]: Path program histogram: [6, 1] [2024-10-24 04:57:38,678 INFO L165 ceAbstractionStarter]: Computing trace abstraction results [2024-10-24 04:57:38,683 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.10 04:57:38 BoogieIcfgContainer [2024-10-24 04:57:38,683 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-10-24 04:57:38,684 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-10-24 04:57:38,684 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-10-24 04:57:38,684 INFO L274 PluginConnector]: Witness Printer initialized [2024-10-24 04:57:38,685 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:57:13" (3/4) ... [2024-10-24 04:57:38,685 INFO L133 WitnessPrinter]: Generating witness for reachability counterexample [2024-10-24 04:57:38,903 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2024-10-24 04:57:38,904 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-10-24 04:57:38,904 INFO L158 Benchmark]: Toolchain (without parser) took 26850.24ms. Allocated memory was 50.3MB in the beginning and 400.6MB in the end (delta: 350.2MB). Free memory was 26.8MB in the beginning and 173.7MB in the end (delta: -146.9MB). Peak memory consumption was 202.1MB. Max. memory is 16.1GB. [2024-10-24 04:57:38,905 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 39.8MB. Free memory was 23.7MB in the beginning and 23.7MB in the end (delta: 50.2kB). There was no memory consumed. Max. memory is 16.1GB. [2024-10-24 04:57:38,905 INFO L158 Benchmark]: CACSL2BoogieTranslator took 592.29ms. Allocated memory was 50.3MB in the beginning and 60.8MB in the end (delta: 10.5MB). Free memory was 26.6MB in the beginning and 39.5MB in the end (delta: -12.9MB). Peak memory consumption was 15.9MB. Max. memory is 16.1GB. [2024-10-24 04:57:38,905 INFO L158 Benchmark]: Boogie Procedure Inliner took 86.43ms. Allocated memory is still 60.8MB. Free memory was 39.5MB in the beginning and 35.8MB in the end (delta: 3.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2024-10-24 04:57:38,905 INFO L158 Benchmark]: Boogie Preprocessor took 89.00ms. Allocated memory is still 60.8MB. Free memory was 35.8MB in the beginning and 31.4MB in the end (delta: 4.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-10-24 04:57:38,906 INFO L158 Benchmark]: RCFGBuilder took 885.86ms. Allocated memory was 60.8MB in the beginning and 81.8MB in the end (delta: 21.0MB). Free memory was 31.4MB in the beginning and 52.6MB in the end (delta: -21.2MB). Peak memory consumption was 15.5MB. Max. memory is 16.1GB. [2024-10-24 04:57:38,906 INFO L158 Benchmark]: TraceAbstraction took 24969.73ms. Allocated memory was 81.8MB in the beginning and 400.6MB in the end (delta: 318.8MB). Free memory was 51.6MB in the beginning and 211.1MB in the end (delta: -159.5MB). Peak memory consumption was 160.2MB. Max. memory is 16.1GB. [2024-10-24 04:57:38,906 INFO L158 Benchmark]: Witness Printer took 219.92ms. Allocated memory is still 400.6MB. Free memory was 211.1MB in the beginning and 173.7MB in the end (delta: 37.5MB). Peak memory consumption was 35.7MB. Max. memory is 16.1GB. [2024-10-24 04:57:38,908 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 39.8MB. Free memory was 23.7MB in the beginning and 23.7MB in the end (delta: 50.2kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 592.29ms. Allocated memory was 50.3MB in the beginning and 60.8MB in the end (delta: 10.5MB). Free memory was 26.6MB in the beginning and 39.5MB in the end (delta: -12.9MB). Peak memory consumption was 15.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 86.43ms. Allocated memory is still 60.8MB. Free memory was 39.5MB in the beginning and 35.8MB in the end (delta: 3.7MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 89.00ms. Allocated memory is still 60.8MB. Free memory was 35.8MB in the beginning and 31.4MB in the end (delta: 4.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 885.86ms. Allocated memory was 60.8MB in the beginning and 81.8MB in the end (delta: 21.0MB). Free memory was 31.4MB in the beginning and 52.6MB in the end (delta: -21.2MB). Peak memory consumption was 15.5MB. Max. memory is 16.1GB. * TraceAbstraction took 24969.73ms. Allocated memory was 81.8MB in the beginning and 400.6MB in the end (delta: 318.8MB). Free memory was 51.6MB in the beginning and 211.1MB in the end (delta: -159.5MB). Peak memory consumption was 160.2MB. Max. memory is 16.1GB. * Witness Printer took 219.92ms. Allocated memory is still 400.6MB. Free memory was 211.1MB in the beginning and 173.7MB in the end (delta: 37.5MB). Peak memory consumption was 35.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 21]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L30] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L35] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L36] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L38] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L39] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L41] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L42] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L44] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L45] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L47] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L48] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L50] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L51] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L53] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L54] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L56] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L57] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L59] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L60] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L62] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L63] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L65] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L66] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L68] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L69] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L71] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L72] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L74] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L75] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L77] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L78] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L80] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L81] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L83] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L84] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L86] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L87] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L89] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 6); [L90] const SORT_101 msb_SORT_101 = (SORT_101)1 << (6 - 1); [L92] const SORT_1 var_7 = 0; [L93] const SORT_1 var_8 = 1; [L94] const SORT_9 var_10 = 0; [L95] const SORT_12 var_13 = 0; [L96] const SORT_12 var_14 = 200; [L97] const SORT_72 var_73 = 5; [L98] const SORT_11 var_75 = 0; [L99] const SORT_11 var_108 = 200; [L100] const SORT_72 var_113 = 4; [L101] const SORT_72 var_116 = 6; [L102] const SORT_96 var_120 = 9; [L103] const SORT_72 var_137 = 0; [L104] const SORT_96 var_140 = 0; [L106] SORT_1 input_2; [L107] SORT_1 input_3; [L108] SORT_1 input_4; [L110] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L111] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L112] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L113] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L114] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L116] SORT_11 init_77_arg_1 = var_75; [L117] state_76 = init_77_arg_1 VAL [mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_5=1, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 15 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 24.7s, OverallIterations: 7, TraceHistogramMax: 14, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 1.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 12 SdHoareTripleChecker+Valid, 1.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 12 mSDsluCounter, 473 SdHoareTripleChecker+Invalid, 1.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 367 mSDsCounter, 13 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 682 IncrementalHoareTripleChecker+Invalid, 695 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 13 mSolverCounterUnsat, 106 mSDtfsCounter, 682 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 676 GetRequests, 613 SyntacticMatches, 5 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=55occurred in iteration=6, InterpolantAutomatonStates: 54, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 6 MinimizatonAttempts, 6 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.5s SsaConstructionTime, 7.5s SatisfiabilityAnalysisTime, 7.1s InterpolantComputationTime, 732 NumberOfCodeBlocks, 720 NumberOfCodeBlocksAsserted, 49 NumberOfCheckSat, 615 ConstructedInterpolants, 20 QuantifiedInterpolants, 5668 SizeOfPredicates, 76 NumberOfNonLiveVariables, 7389 ConjunctsInSsa, 294 ConjunctsInUnsatCore, 11 InterpolantComputations, 1 PerfectInterpolantSequences, 1284/1744 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-10-24 04:57:38,972 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE