./Ultimate.py --spec /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/properties/unreach-call.prp --file /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 4a390ef5 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8f31ff9fd5db46adb25147e0fbf291c418028d385863b43400756ebcfdf80a2d --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4a390ef-m [2024-10-24 04:59:55,044 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-24 04:59:55,112 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-10-24 04:59:55,118 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-24 04:59:55,120 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-24 04:59:55,151 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-24 04:59:55,153 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-24 04:59:55,153 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-24 04:59:55,154 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-24 04:59:55,155 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-24 04:59:55,156 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-24 04:59:55,156 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-24 04:59:55,157 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-24 04:59:55,157 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-24 04:59:55,159 INFO L153 SettingsManager]: * Use SBE=true [2024-10-24 04:59:55,159 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-24 04:59:55,160 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-24 04:59:55,160 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-24 04:59:55,160 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-24 04:59:55,160 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-24 04:59:55,161 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-24 04:59:55,164 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-24 04:59:55,165 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-24 04:59:55,165 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-24 04:59:55,165 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-24 04:59:55,166 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-24 04:59:55,166 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-24 04:59:55,166 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-24 04:59:55,166 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-24 04:59:55,166 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-10-24 04:59:55,167 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-24 04:59:55,167 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-24 04:59:55,167 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-24 04:59:55,167 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-24 04:59:55,168 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-10-24 04:59:55,168 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-24 04:59:55,168 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-10-24 04:59:55,169 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-10-24 04:59:55,169 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-10-24 04:59:55,170 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8f31ff9fd5db46adb25147e0fbf291c418028d385863b43400756ebcfdf80a2d [2024-10-24 04:59:55,453 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-24 04:59:55,476 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-24 04:59:55,479 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-24 04:59:55,480 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-24 04:59:55,481 INFO L274 PluginConnector]: CDTParser initialized [2024-10-24 04:59:55,482 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2024-10-24 04:59:56,898 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-24 04:59:57,143 INFO L384 CDTParser]: Found 1 translation units. [2024-10-24 04:59:57,144 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2024-10-24 04:59:57,160 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fcfacb89d/1955a05d90974ceeb2fea8a2fb27ee6e/FLAG510031cac [2024-10-24 04:59:57,174 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fcfacb89d/1955a05d90974ceeb2fea8a2fb27ee6e [2024-10-24 04:59:57,177 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-24 04:59:57,178 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-24 04:59:57,179 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-24 04:59:57,179 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-24 04:59:57,185 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-24 04:59:57,185 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,186 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2d5646e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57, skipping insertion in model container [2024-10-24 04:59:57,186 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,222 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-24 04:59:57,425 WARN L248 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1258,1271] [2024-10-24 04:59:57,549 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 04:59:57,559 INFO L200 MainTranslator]: Completed pre-run [2024-10-24 04:59:57,570 WARN L248 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_QF_BV_fru32_p2.c[1258,1271] [2024-10-24 04:59:57,645 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-24 04:59:57,664 INFO L204 MainTranslator]: Completed translation [2024-10-24 04:59:57,665 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57 WrapperNode [2024-10-24 04:59:57,665 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-24 04:59:57,666 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-24 04:59:57,666 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-24 04:59:57,667 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-24 04:59:57,673 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,693 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,798 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 941 [2024-10-24 04:59:57,799 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-24 04:59:57,800 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-24 04:59:57,800 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-24 04:59:57,801 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-24 04:59:57,812 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,812 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,835 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,892 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-24 04:59:57,892 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,893 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,917 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,932 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,948 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,957 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,972 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-24 04:59:57,973 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-24 04:59:57,973 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-24 04:59:57,974 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-24 04:59:57,974 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (1/1) ... [2024-10-24 04:59:57,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-10-24 04:59:57,994 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 04:59:58,013 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-10-24 04:59:58,019 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-10-24 04:59:58,136 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-24 04:59:58,137 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-24 04:59:58,137 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-24 04:59:58,137 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-24 04:59:58,339 INFO L238 CfgBuilder]: Building ICFG [2024-10-24 04:59:58,340 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-24 04:59:59,482 INFO L? ?]: Removed 456 outVars from TransFormulas that were not future-live. [2024-10-24 04:59:59,483 INFO L287 CfgBuilder]: Performing block encoding [2024-10-24 04:59:59,525 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-24 04:59:59,526 INFO L314 CfgBuilder]: Removed 1 assume(true) statements. [2024-10-24 04:59:59,526 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:59:59 BoogieIcfgContainer [2024-10-24 04:59:59,526 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-24 04:59:59,529 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-24 04:59:59,529 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-24 04:59:59,534 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-24 04:59:59,535 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.10 04:59:57" (1/3) ... [2024-10-24 04:59:59,553 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64f47a12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:59:59, skipping insertion in model container [2024-10-24 04:59:59,555 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.10 04:59:57" (2/3) ... [2024-10-24 04:59:59,555 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@64f47a12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.10 04:59:59, skipping insertion in model container [2024-10-24 04:59:59,556 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:59:59" (3/3) ... [2024-10-24 04:59:59,557 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_QF_BV_fru32_p2.c [2024-10-24 04:59:59,591 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-24 04:59:59,592 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-10-24 04:59:59,724 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-10-24 04:59:59,730 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@4b383cbf, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-24 04:59:59,730 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-24 04:59:59,735 INFO L276 IsEmpty]: Start isEmpty. Operand has 243 states, 241 states have (on average 1.5020746887966805) internal successors, (362), 242 states have internal predecessors, (362), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 04:59:59,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2024-10-24 04:59:59,752 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 04:59:59,753 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 04:59:59,754 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 04:59:59,758 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 04:59:59,760 INFO L85 PathProgramCache]: Analyzing trace with hash 1676436687, now seen corresponding path program 1 times [2024-10-24 04:59:59,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 04:59:59,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920650639] [2024-10-24 04:59:59,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 04:59:59,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 05:00:00,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 05:00:01,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 05:00:01,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 05:00:01,027 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920650639] [2024-10-24 05:00:01,029 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1920650639] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 05:00:01,029 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 05:00:01,029 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 05:00:01,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [312251577] [2024-10-24 05:00:01,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 05:00:01,037 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 05:00:01,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 05:00:01,065 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 05:00:01,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 05:00:01,069 INFO L87 Difference]: Start difference. First operand has 243 states, 241 states have (on average 1.5020746887966805) internal successors, (362), 242 states have internal predecessors, (362), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:01,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 05:00:01,167 INFO L93 Difference]: Finished difference Result 414 states and 618 transitions. [2024-10-24 05:00:01,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 05:00:01,170 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 112 [2024-10-24 05:00:01,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 05:00:01,181 INFO L225 Difference]: With dead ends: 414 [2024-10-24 05:00:01,181 INFO L226 Difference]: Without dead ends: 244 [2024-10-24 05:00:01,186 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 05:00:01,189 INFO L432 NwaCegarLoop]: 357 mSDtfsCounter, 0 mSDsluCounter, 709 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1066 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 05:00:01,190 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1066 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 05:00:01,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2024-10-24 05:00:01,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244. [2024-10-24 05:00:01,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 243 states have (on average 1.4897119341563787) internal successors, (362), 243 states have internal predecessors, (362), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:01,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 362 transitions. [2024-10-24 05:00:01,237 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 362 transitions. Word has length 112 [2024-10-24 05:00:01,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 05:00:01,238 INFO L471 AbstractCegarLoop]: Abstraction has 244 states and 362 transitions. [2024-10-24 05:00:01,240 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:01,240 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 362 transitions. [2024-10-24 05:00:01,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2024-10-24 05:00:01,245 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 05:00:01,245 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 05:00:01,246 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-10-24 05:00:01,246 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 05:00:01,247 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 05:00:01,247 INFO L85 PathProgramCache]: Analyzing trace with hash 431625600, now seen corresponding path program 1 times [2024-10-24 05:00:01,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 05:00:01,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545370881] [2024-10-24 05:00:01,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 05:00:01,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 05:00:01,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 05:00:01,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 05:00:01,706 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 05:00:01,706 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545370881] [2024-10-24 05:00:01,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1545370881] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 05:00:01,707 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 05:00:01,707 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 05:00:01,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806653386] [2024-10-24 05:00:01,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 05:00:01,710 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 05:00:01,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 05:00:01,712 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 05:00:01,712 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 05:00:01,712 INFO L87 Difference]: Start difference. First operand 244 states and 362 transitions. Second operand has 4 states, 4 states have (on average 28.25) internal successors, (113), 4 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:01,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 05:00:01,757 INFO L93 Difference]: Finished difference Result 417 states and 618 transitions. [2024-10-24 05:00:01,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 05:00:01,757 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.25) internal successors, (113), 4 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 113 [2024-10-24 05:00:01,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 05:00:01,759 INFO L225 Difference]: With dead ends: 417 [2024-10-24 05:00:01,759 INFO L226 Difference]: Without dead ends: 246 [2024-10-24 05:00:01,760 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 05:00:01,765 INFO L432 NwaCegarLoop]: 357 mSDtfsCounter, 0 mSDsluCounter, 706 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1063 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 05:00:01,766 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1063 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 05:00:01,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2024-10-24 05:00:01,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 246. [2024-10-24 05:00:01,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 246 states, 245 states have (on average 1.4857142857142858) internal successors, (364), 245 states have internal predecessors, (364), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:01,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 364 transitions. [2024-10-24 05:00:01,778 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 364 transitions. Word has length 113 [2024-10-24 05:00:01,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 05:00:01,779 INFO L471 AbstractCegarLoop]: Abstraction has 246 states and 364 transitions. [2024-10-24 05:00:01,779 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.25) internal successors, (113), 4 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:01,779 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 364 transitions. [2024-10-24 05:00:01,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2024-10-24 05:00:01,781 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 05:00:01,781 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 05:00:01,782 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-10-24 05:00:01,782 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 05:00:01,782 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 05:00:01,783 INFO L85 PathProgramCache]: Analyzing trace with hash -602473528, now seen corresponding path program 1 times [2024-10-24 05:00:01,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 05:00:01,783 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104406458] [2024-10-24 05:00:01,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 05:00:01,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 05:00:02,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 05:00:02,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 05:00:02,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 05:00:02,476 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104406458] [2024-10-24 05:00:02,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2104406458] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 05:00:02,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 05:00:02,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 05:00:02,478 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318846302] [2024-10-24 05:00:02,478 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 05:00:02,479 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-24 05:00:02,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 05:00:02,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-24 05:00:02,480 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 05:00:02,481 INFO L87 Difference]: Start difference. First operand 246 states and 364 transitions. Second operand has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:02,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 05:00:02,512 INFO L93 Difference]: Finished difference Result 421 states and 622 transitions. [2024-10-24 05:00:02,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-24 05:00:02,512 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 114 [2024-10-24 05:00:02,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 05:00:02,514 INFO L225 Difference]: With dead ends: 421 [2024-10-24 05:00:02,514 INFO L226 Difference]: Without dead ends: 248 [2024-10-24 05:00:02,515 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-24 05:00:02,519 INFO L432 NwaCegarLoop]: 357 mSDtfsCounter, 0 mSDsluCounter, 706 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1063 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 05:00:02,520 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1063 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 05:00:02,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2024-10-24 05:00:02,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2024-10-24 05:00:02,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 248 states, 247 states have (on average 1.4817813765182186) internal successors, (366), 247 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:02,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 366 transitions. [2024-10-24 05:00:02,533 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 366 transitions. Word has length 114 [2024-10-24 05:00:02,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 05:00:02,533 INFO L471 AbstractCegarLoop]: Abstraction has 248 states and 366 transitions. [2024-10-24 05:00:02,534 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:02,534 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 366 transitions. [2024-10-24 05:00:02,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2024-10-24 05:00:02,535 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 05:00:02,536 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 05:00:02,536 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-10-24 05:00:02,536 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 05:00:02,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 05:00:02,537 INFO L85 PathProgramCache]: Analyzing trace with hash -587922681, now seen corresponding path program 1 times [2024-10-24 05:00:02,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 05:00:02,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622907806] [2024-10-24 05:00:02,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 05:00:02,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 05:00:02,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 05:00:03,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 05:00:03,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 05:00:03,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622907806] [2024-10-24 05:00:03,337 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [622907806] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 05:00:03,337 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 05:00:03,337 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-24 05:00:03,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994389660] [2024-10-24 05:00:03,338 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 05:00:03,338 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-24 05:00:03,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 05:00:03,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-24 05:00:03,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-10-24 05:00:03,339 INFO L87 Difference]: Start difference. First operand 248 states and 366 transitions. Second operand has 6 states, 6 states have (on average 19.166666666666668) internal successors, (115), 5 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:03,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 05:00:03,438 INFO L93 Difference]: Finished difference Result 513 states and 758 transitions. [2024-10-24 05:00:03,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-24 05:00:03,439 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.166666666666668) internal successors, (115), 5 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 115 [2024-10-24 05:00:03,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 05:00:03,440 INFO L225 Difference]: With dead ends: 513 [2024-10-24 05:00:03,442 INFO L226 Difference]: Without dead ends: 338 [2024-10-24 05:00:03,443 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-10-24 05:00:03,446 INFO L432 NwaCegarLoop]: 352 mSDtfsCounter, 523 mSDsluCounter, 1047 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 523 SdHoareTripleChecker+Valid, 1399 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-10-24 05:00:03,447 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [523 Valid, 1399 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-10-24 05:00:03,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 338 states. [2024-10-24 05:00:03,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 338 to 338. [2024-10-24 05:00:03,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 338 states, 337 states have (on average 1.4836795252225519) internal successors, (500), 337 states have internal predecessors, (500), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:03,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 500 transitions. [2024-10-24 05:00:03,470 INFO L78 Accepts]: Start accepts. Automaton has 338 states and 500 transitions. Word has length 115 [2024-10-24 05:00:03,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 05:00:03,471 INFO L471 AbstractCegarLoop]: Abstraction has 338 states and 500 transitions. [2024-10-24 05:00:03,471 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.166666666666668) internal successors, (115), 5 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:03,472 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 500 transitions. [2024-10-24 05:00:03,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-10-24 05:00:03,474 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 05:00:03,474 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 05:00:03,474 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-10-24 05:00:03,475 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 05:00:03,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 05:00:03,476 INFO L85 PathProgramCache]: Analyzing trace with hash 960098983, now seen corresponding path program 1 times [2024-10-24 05:00:03,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 05:00:03,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600627125] [2024-10-24 05:00:03,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 05:00:03,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 05:00:03,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 05:00:04,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-24 05:00:04,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 05:00:04,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600627125] [2024-10-24 05:00:04,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1600627125] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-24 05:00:04,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-24 05:00:04,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-24 05:00:04,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67926635] [2024-10-24 05:00:04,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-24 05:00:04,012 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-24 05:00:04,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 05:00:04,012 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-24 05:00:04,012 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-24 05:00:04,013 INFO L87 Difference]: Start difference. First operand 338 states and 500 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:04,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 05:00:04,085 INFO L93 Difference]: Finished difference Result 645 states and 954 transitions. [2024-10-24 05:00:04,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-24 05:00:04,086 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 116 [2024-10-24 05:00:04,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 05:00:04,087 INFO L225 Difference]: With dead ends: 645 [2024-10-24 05:00:04,088 INFO L226 Difference]: Without dead ends: 380 [2024-10-24 05:00:04,088 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-10-24 05:00:04,089 INFO L432 NwaCegarLoop]: 346 mSDtfsCounter, 426 mSDsluCounter, 690 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 426 SdHoareTripleChecker+Valid, 1036 SdHoareTripleChecker+Invalid, 44 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-10-24 05:00:04,090 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [426 Valid, 1036 Invalid, 44 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-10-24 05:00:04,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2024-10-24 05:00:04,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 380. [2024-10-24 05:00:04,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 379 states have (on average 1.482849604221636) internal successors, (562), 379 states have internal predecessors, (562), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:04,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 562 transitions. [2024-10-24 05:00:04,101 INFO L78 Accepts]: Start accepts. Automaton has 380 states and 562 transitions. Word has length 116 [2024-10-24 05:00:04,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 05:00:04,101 INFO L471 AbstractCegarLoop]: Abstraction has 380 states and 562 transitions. [2024-10-24 05:00:04,101 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:04,101 INFO L276 IsEmpty]: Start isEmpty. Operand 380 states and 562 transitions. [2024-10-24 05:00:04,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2024-10-24 05:00:04,103 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 05:00:04,103 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 05:00:04,104 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-10-24 05:00:04,104 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 05:00:04,104 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 05:00:04,105 INFO L85 PathProgramCache]: Analyzing trace with hash 854900977, now seen corresponding path program 1 times [2024-10-24 05:00:04,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 05:00:04,105 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491653032] [2024-10-24 05:00:04,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 05:00:04,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 05:00:04,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 05:00:06,368 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 2 proven. 64 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-24 05:00:06,370 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-24 05:00:06,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491653032] [2024-10-24 05:00:06,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1491653032] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-24 05:00:06,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1795114071] [2024-10-24 05:00:06,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 05:00:06,372 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-24 05:00:06,372 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-10-24 05:00:06,374 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-24 05:00:06,375 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-10-24 05:00:07,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-24 05:00:07,049 INFO L255 TraceCheckSpWp]: Trace formula consists of 1280 conjuncts, 56 conjuncts are in the unsatisfiable core [2024-10-24 05:00:07,064 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-24 05:00:08,622 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-24 05:00:08,623 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-24 05:00:10,887 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-10-24 05:00:10,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1795114071] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-24 05:00:10,888 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-24 05:00:10,888 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 11] total 24 [2024-10-24 05:00:10,888 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615602319] [2024-10-24 05:00:10,888 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-24 05:00:10,889 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-10-24 05:00:10,889 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-24 05:00:10,890 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-24 05:00:10,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=512, Unknown=0, NotChecked=0, Total=600 [2024-10-24 05:00:10,891 INFO L87 Difference]: Start difference. First operand 380 states and 562 transitions. Second operand has 25 states, 25 states have (on average 20.52) internal successors, (513), 24 states have internal predecessors, (513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:12,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-24 05:00:12,328 INFO L93 Difference]: Finished difference Result 712 states and 1054 transitions. [2024-10-24 05:00:12,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-24 05:00:12,329 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 20.52) internal successors, (513), 24 states have internal predecessors, (513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 201 [2024-10-24 05:00:12,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-10-24 05:00:12,336 INFO L225 Difference]: With dead ends: 712 [2024-10-24 05:00:12,337 INFO L226 Difference]: Without dead ends: 447 [2024-10-24 05:00:12,337 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 416 GetRequests, 384 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 208 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=163, Invalid=959, Unknown=0, NotChecked=0, Total=1122 [2024-10-24 05:00:12,338 INFO L432 NwaCegarLoop]: 216 mSDtfsCounter, 585 mSDsluCounter, 2564 mSDsCounter, 0 mSdLazyCounter, 1892 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 585 SdHoareTripleChecker+Valid, 2780 SdHoareTripleChecker+Invalid, 1900 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 1892 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-10-24 05:00:12,338 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [585 Valid, 2780 Invalid, 1900 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 1892 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-10-24 05:00:12,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 447 states. [2024-10-24 05:00:12,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 447 to 392. [2024-10-24 05:00:12,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 391 states have (on average 1.473145780051151) internal successors, (576), 391 states have internal predecessors, (576), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:12,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 576 transitions. [2024-10-24 05:00:12,352 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 576 transitions. Word has length 201 [2024-10-24 05:00:12,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-10-24 05:00:12,352 INFO L471 AbstractCegarLoop]: Abstraction has 392 states and 576 transitions. [2024-10-24 05:00:12,353 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 20.52) internal successors, (513), 24 states have internal predecessors, (513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-24 05:00:12,353 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 576 transitions. [2024-10-24 05:00:12,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2024-10-24 05:00:12,355 INFO L207 NwaCegarLoop]: Found error trace [2024-10-24 05:00:12,356 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-24 05:00:12,378 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-10-24 05:00:12,556 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2024-10-24 05:00:12,557 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-24 05:00:12,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-24 05:00:12,558 INFO L85 PathProgramCache]: Analyzing trace with hash -1561139971, now seen corresponding path program 1 times [2024-10-24 05:00:12,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-24 05:00:12,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598892697] [2024-10-24 05:00:12,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-24 05:00:12,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-24 05:00:13,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 05:00:13,494 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-24 05:00:14,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-24 05:00:14,380 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-24 05:00:14,381 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-10-24 05:00:14,382 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-10-24 05:00:14,384 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-10-24 05:00:14,387 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1] [2024-10-24 05:00:14,543 INFO L165 ceAbstractionStarter]: Computing trace abstraction results [2024-10-24 05:00:14,550 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.10 05:00:14 BoogieIcfgContainer [2024-10-24 05:00:14,550 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-10-24 05:00:14,551 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-10-24 05:00:14,552 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-10-24 05:00:14,552 INFO L274 PluginConnector]: Witness Printer initialized [2024-10-24 05:00:14,553 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.10 04:59:59" (3/4) ... [2024-10-24 05:00:14,553 INFO L133 WitnessPrinter]: Generating witness for reachability counterexample [2024-10-24 05:00:14,762 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2024-10-24 05:00:14,762 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-10-24 05:00:14,763 INFO L158 Benchmark]: Toolchain (without parser) took 17584.71ms. Allocated memory was 142.6MB in the beginning and 587.2MB in the end (delta: 444.6MB). Free memory was 95.4MB in the beginning and 201.8MB in the end (delta: -106.4MB). Peak memory consumption was 337.3MB. Max. memory is 16.1GB. [2024-10-24 05:00:14,763 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 100.7MB. Free memory is still 68.5MB. There was no memory consumed. Max. memory is 16.1GB. [2024-10-24 05:00:14,763 INFO L158 Benchmark]: CACSL2BoogieTranslator took 486.13ms. Allocated memory is still 142.6MB. Free memory was 95.4MB in the beginning and 71.7MB in the end (delta: 23.7MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. [2024-10-24 05:00:14,764 INFO L158 Benchmark]: Boogie Procedure Inliner took 132.85ms. Allocated memory is still 142.6MB. Free memory was 71.7MB in the beginning and 51.4MB in the end (delta: 20.4MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2024-10-24 05:00:14,764 INFO L158 Benchmark]: Boogie Preprocessor took 172.95ms. Allocated memory is still 142.6MB. Free memory was 51.4MB in the beginning and 40.3MB in the end (delta: 11.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2024-10-24 05:00:14,764 INFO L158 Benchmark]: RCFGBuilder took 1553.28ms. Allocated memory was 142.6MB in the beginning and 220.2MB in the end (delta: 77.6MB). Free memory was 39.8MB in the beginning and 105.3MB in the end (delta: -65.5MB). Peak memory consumption was 28.4MB. Max. memory is 16.1GB. [2024-10-24 05:00:14,764 INFO L158 Benchmark]: TraceAbstraction took 15021.77ms. Allocated memory was 220.2MB in the beginning and 587.2MB in the end (delta: 367.0MB). Free memory was 105.3MB in the beginning and 234.7MB in the end (delta: -129.3MB). Peak memory consumption was 237.7MB. Max. memory is 16.1GB. [2024-10-24 05:00:14,765 INFO L158 Benchmark]: Witness Printer took 210.84ms. Allocated memory is still 587.2MB. Free memory was 234.7MB in the beginning and 201.8MB in the end (delta: 32.8MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-10-24 05:00:14,766 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 100.7MB. Free memory is still 68.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 486.13ms. Allocated memory is still 142.6MB. Free memory was 95.4MB in the beginning and 71.7MB in the end (delta: 23.7MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 132.85ms. Allocated memory is still 142.6MB. Free memory was 71.7MB in the beginning and 51.4MB in the end (delta: 20.4MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Preprocessor took 172.95ms. Allocated memory is still 142.6MB. Free memory was 51.4MB in the beginning and 40.3MB in the end (delta: 11.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * RCFGBuilder took 1553.28ms. Allocated memory was 142.6MB in the beginning and 220.2MB in the end (delta: 77.6MB). Free memory was 39.8MB in the beginning and 105.3MB in the end (delta: -65.5MB). Peak memory consumption was 28.4MB. Max. memory is 16.1GB. * TraceAbstraction took 15021.77ms. Allocated memory was 220.2MB in the beginning and 587.2MB in the end (delta: 367.0MB). Free memory was 105.3MB in the beginning and 234.7MB in the end (delta: -129.3MB). Peak memory consumption was 237.7MB. Max. memory is 16.1GB. * Witness Printer took 210.84ms. Allocated memory is still 587.2MB. Free memory was 234.7MB in the beginning and 201.8MB in the end (delta: 32.8MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 21]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 6); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (6 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 1); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (1 - 1); [L32] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 32); [L33] const SORT_6 msb_SORT_6 = (SORT_6)1 << (32 - 1); [L35] const SORT_24 mask_SORT_24 = (SORT_24)-1 >> (sizeof(SORT_24) * 8 - 5); [L36] const SORT_24 msb_SORT_24 = (SORT_24)1 << (5 - 1); [L38] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L39] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L41] const SORT_1 var_21 = 0; [L42] const SORT_24 var_26 = 31; [L43] const SORT_6 var_28 = 0; [L44] const SORT_33 var_34 = 0; [L45] const SORT_33 var_35 = 1; [L46] const SORT_3 var_39 = 1; [L47] const SORT_3 var_45 = 0; [L48] const SORT_33 var_58 = 2; [L49] const SORT_33 var_75 = 3; [L51] SORT_1 input_2; [L52] SORT_3 input_4; [L53] SORT_1 input_5; [L54] SORT_6 input_7; [L55] SORT_3 input_8; [L56] SORT_6 input_9; [L57] SORT_1 input_10; [L58] SORT_1 input_11; [L59] SORT_1 input_12; [L60] SORT_3 input_13; [L61] SORT_3 input_14; [L62] SORT_3 input_15; [L63] SORT_3 input_16; [L64] SORT_3 input_17; [L65] SORT_3 input_18; [L66] SORT_3 input_19; [L67] SORT_3 input_20; [L68] SORT_3 input_120; [L69] SORT_3 input_124; [L70] SORT_3 input_126; [L71] SORT_33 input_129; [L72] SORT_3 input_131; [L73] SORT_6 input_134; [L74] SORT_3 input_136; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L76] SORT_1 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L77] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L77] SORT_6 state_29 = __VERIFIER_nondet_uint() & mask_SORT_6; [L78] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L78] SORT_6 state_31 = __VERIFIER_nondet_uint() & mask_SORT_6; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L79] SORT_1 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L80] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L81] SORT_3 state_46 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L82] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L83] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L84] SORT_3 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L85] SORT_3 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L86] SORT_1 state_77 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L87] SORT_3 state_81 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L88] SORT_3 state_85 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, mask_SORT_6=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L89] SORT_3 state_89 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L90] EXPR __VERIFIER_nondet_uint() & mask_SORT_6 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L90] SORT_6 state_98 = __VERIFIER_nondet_uint() & mask_SORT_6; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L91] SORT_1 state_116 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L92] SORT_3 state_118 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_45=0, var_58=2, var_75=3] [L93] SORT_3 state_122 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L95] SORT_1 init_23_arg_1 = var_21; [L96] state_22 = init_23_arg_1 [L97] SORT_6 init_30_arg_1 = var_28; [L98] state_29 = init_30_arg_1 [L99] SORT_6 init_32_arg_1 = var_28; [L100] state_31 = init_32_arg_1 [L101] SORT_1 init_37_arg_1 = var_21; [L102] state_36 = init_37_arg_1 [L103] SORT_1 init_42_arg_1 = var_21; [L104] state_41 = init_42_arg_1 [L105] SORT_3 init_47_arg_1 = var_45; [L106] state_46 = init_47_arg_1 [L107] SORT_3 init_51_arg_1 = var_45; [L108] state_50 = init_51_arg_1 [L109] SORT_1 init_61_arg_1 = var_21; [L110] state_60 = init_61_arg_1 [L111] SORT_3 init_65_arg_1 = var_45; [L112] state_64 = init_65_arg_1 [L113] SORT_3 init_69_arg_1 = var_45; [L114] state_68 = init_69_arg_1 [L115] SORT_1 init_78_arg_1 = var_21; [L116] state_77 = init_78_arg_1 [L117] SORT_3 init_82_arg_1 = var_45; [L118] state_81 = init_82_arg_1 [L119] SORT_3 init_86_arg_1 = var_45; [L120] state_85 = init_86_arg_1 [L121] SORT_3 init_90_arg_1 = var_45; [L122] state_89 = init_90_arg_1 [L123] SORT_6 init_99_arg_1 = var_28; [L124] state_98 = init_99_arg_1 [L125] SORT_1 init_117_arg_1 = var_21; [L126] state_116 = init_117_arg_1 [L127] SORT_3 init_119_arg_1 = var_45; [L128] state_118 = init_119_arg_1 [L129] SORT_3 init_123_arg_1 = var_45; [L130] state_122 = init_123_arg_1 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L133] input_2 = __VERIFIER_nondet_uchar() [L134] input_4 = __VERIFIER_nondet_uchar() [L135] EXPR input_4 & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L135] input_4 = input_4 & mask_SORT_3 [L136] input_5 = __VERIFIER_nondet_uchar() [L137] EXPR input_5 & mask_SORT_1 VAL [input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L137] input_5 = input_5 & mask_SORT_1 [L138] input_7 = __VERIFIER_nondet_uint() [L139] input_8 = __VERIFIER_nondet_uchar() [L140] EXPR input_8 & mask_SORT_3 VAL [input_4=0, input_5=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L140] input_8 = input_8 & mask_SORT_3 [L141] input_9 = __VERIFIER_nondet_uint() [L142] input_10 = __VERIFIER_nondet_uchar() [L143] EXPR input_10 & mask_SORT_1 VAL [input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L143] input_10 = input_10 & mask_SORT_1 [L144] input_11 = __VERIFIER_nondet_uchar() [L145] EXPR input_11 & mask_SORT_1 VAL [input_10=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L145] input_11 = input_11 & mask_SORT_1 [L146] input_12 = __VERIFIER_nondet_uchar() [L147] input_13 = __VERIFIER_nondet_uchar() [L148] input_14 = __VERIFIER_nondet_uchar() [L149] EXPR input_14 & mask_SORT_3 VAL [input_10=0, input_11=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L149] input_14 = input_14 & mask_SORT_3 [L150] input_15 = __VERIFIER_nondet_uchar() [L151] input_16 = __VERIFIER_nondet_uchar() [L152] EXPR input_16 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L152] input_16 = input_16 & mask_SORT_3 [L153] input_17 = __VERIFIER_nondet_uchar() [L154] EXPR input_17 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L154] input_17 = input_17 & mask_SORT_3 [L155] input_18 = __VERIFIER_nondet_uchar() [L156] EXPR input_18 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L156] input_18 = input_18 & mask_SORT_3 [L157] input_19 = __VERIFIER_nondet_uchar() [L158] EXPR input_19 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_22=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L158] input_19 = input_19 & mask_SORT_3 [L159] input_20 = __VERIFIER_nondet_uchar() [L160] input_120 = __VERIFIER_nondet_uchar() [L161] input_124 = __VERIFIER_nondet_uchar() [L162] input_126 = __VERIFIER_nondet_uchar() [L163] input_129 = __VERIFIER_nondet_uchar() [L164] input_131 = __VERIFIER_nondet_uchar() [L165] input_134 = __VERIFIER_nondet_uint() [L166] input_136 = __VERIFIER_nondet_uchar() [L169] SORT_1 var_25_arg_0 = state_22; [L170] SORT_24 var_25 = var_25_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_25=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] EXPR var_25 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] var_25 = var_25 & mask_SORT_24 [L172] SORT_24 var_27_arg_0 = var_25; [L173] SORT_24 var_27_arg_1 = var_26; [L174] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L175] SORT_1 var_54_arg_0 = state_36; [L176] SORT_24 var_54 = var_54_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L177] EXPR var_54 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L177] var_54 = var_54 & mask_SORT_24 [L178] SORT_24 var_105_arg_0 = var_54; [L179] SORT_24 var_105_arg_1 = var_26; [L180] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L181] SORT_1 var_38_arg_0 = state_36; [L182] SORT_3 var_38 = var_38_arg_0 >> 5; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L183] EXPR var_38 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L183] var_38 = var_38 & mask_SORT_3 [L184] SORT_3 var_76_arg_0 = var_38; [L185] SORT_3 var_76_arg_1 = var_39; [L186] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L187] SORT_1 var_79_arg_0 = state_36; [L188] SORT_1 var_79_arg_1 = state_77; [L189] SORT_3 var_79 = var_79_arg_0 == var_79_arg_1; [L190] SORT_3 var_80_arg_0 = var_76; [L191] SORT_3 var_80_arg_1 = var_79; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_80_arg_0=0, var_80_arg_1=1] [L192] EXPR var_80_arg_0 & var_80_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L192] SORT_3 var_80 = var_80_arg_0 & var_80_arg_1; [L193] SORT_3 var_83_arg_0 = state_81; [L194] SORT_3 var_83_arg_1 = var_39; [L195] SORT_3 var_83 = var_83_arg_0 != var_83_arg_1; [L196] SORT_3 var_84_arg_0 = var_80; [L197] SORT_3 var_84_arg_1 = var_83; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_84_arg_0=0, var_84_arg_1=1] [L198] EXPR var_84_arg_0 & var_84_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L198] SORT_3 var_84 = var_84_arg_0 & var_84_arg_1; [L199] SORT_3 var_87_arg_0 = state_85; [L200] SORT_3 var_87_arg_1 = var_39; [L201] SORT_3 var_87 = var_87_arg_0 == var_87_arg_1; [L202] SORT_3 var_88_arg_0 = var_84; [L203] SORT_3 var_88_arg_1 = var_87; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_88_arg_0=0, var_88_arg_1=0] [L204] EXPR var_88_arg_0 & var_88_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L204] SORT_3 var_88 = var_88_arg_0 & var_88_arg_1; [L205] SORT_3 var_91_arg_0 = state_89; [L206] SORT_3 var_91_arg_1 = var_39; [L207] SORT_3 var_91 = var_91_arg_0 == var_91_arg_1; [L208] SORT_3 var_92_arg_0 = var_88; [L209] SORT_3 var_92_arg_1 = var_91; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_92_arg_0=0, var_92_arg_1=0] [L210] EXPR var_92_arg_0 & var_92_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L210] SORT_3 var_92 = var_92_arg_0 & var_92_arg_1; [L211] SORT_24 var_93_arg_0 = var_54; [L212] SORT_24 var_93_arg_1 = var_26; [L213] SORT_3 var_93 = var_93_arg_0 != var_93_arg_1; [L214] SORT_3 var_94_arg_0 = var_92; [L215] SORT_3 var_94_arg_1 = var_93; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94_arg_0=0, var_94_arg_1=1] [L216] EXPR var_94_arg_0 & var_94_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L216] SORT_3 var_94 = var_94_arg_0 & var_94_arg_1; [L217] EXPR var_94 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L217] var_94 = var_94 & mask_SORT_3 [L218] SORT_3 var_59_arg_0 = var_38; [L219] SORT_3 var_59_arg_1 = var_39; [L220] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L221] SORT_1 var_62_arg_0 = state_36; [L222] SORT_1 var_62_arg_1 = state_60; [L223] SORT_3 var_62 = var_62_arg_0 == var_62_arg_1; [L224] SORT_3 var_63_arg_0 = var_59; [L225] SORT_3 var_63_arg_1 = var_62; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_63_arg_0=0, var_63_arg_1=1, var_75=3, var_94=0] [L226] EXPR var_63_arg_0 & var_63_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L226] SORT_3 var_63 = var_63_arg_0 & var_63_arg_1; [L227] SORT_3 var_66_arg_0 = state_64; [L228] SORT_3 var_66_arg_1 = var_39; [L229] SORT_3 var_66 = var_66_arg_0 == var_66_arg_1; [L230] SORT_3 var_67_arg_0 = var_63; [L231] SORT_3 var_67_arg_1 = var_66; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_67_arg_0=0, var_67_arg_1=0, var_75=3, var_94=0] [L232] EXPR var_67_arg_0 & var_67_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L232] SORT_3 var_67 = var_67_arg_0 & var_67_arg_1; [L233] SORT_3 var_70_arg_0 = state_68; [L234] SORT_3 var_70_arg_1 = var_39; [L235] SORT_3 var_70 = var_70_arg_0 == var_70_arg_1; [L236] SORT_3 var_71_arg_0 = var_67; [L237] SORT_3 var_71_arg_1 = var_70; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_71_arg_0=0, var_71_arg_1=0, var_75=3, var_94=0] [L238] EXPR var_71_arg_0 & var_71_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L238] SORT_3 var_71 = var_71_arg_0 & var_71_arg_1; [L239] SORT_24 var_72_arg_0 = var_54; [L240] SORT_24 var_72_arg_1 = var_26; [L241] SORT_3 var_72 = var_72_arg_0 != var_72_arg_1; [L242] SORT_3 var_73_arg_0 = var_71; [L243] SORT_3 var_73_arg_1 = var_72; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_73_arg_0=0, var_73_arg_1=1, var_75=3, var_94=0] [L244] EXPR var_73_arg_0 & var_73_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L244] SORT_3 var_73 = var_73_arg_0 & var_73_arg_1; [L245] EXPR var_73 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L245] var_73 = var_73 & mask_SORT_3 [L246] SORT_3 var_40_arg_0 = var_38; [L247] SORT_3 var_40_arg_1 = var_39; [L248] SORT_3 var_40 = var_40_arg_0 == var_40_arg_1; [L249] SORT_1 var_43_arg_0 = state_36; [L250] SORT_1 var_43_arg_1 = state_41; [L251] SORT_3 var_43 = var_43_arg_0 == var_43_arg_1; [L252] SORT_3 var_44_arg_0 = var_40; [L253] SORT_3 var_44_arg_1 = var_43; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_44_arg_0=0, var_44_arg_1=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] EXPR var_44_arg_0 & var_44_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] SORT_3 var_44 = var_44_arg_0 & var_44_arg_1; [L255] SORT_3 var_48_arg_0 = state_46; [L256] SORT_3 var_48_arg_1 = var_39; [L257] SORT_3 var_48 = var_48_arg_0 == var_48_arg_1; [L258] SORT_3 var_49_arg_0 = var_44; [L259] SORT_3 var_49_arg_1 = var_48; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_49_arg_0=0, var_49_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] EXPR var_49_arg_0 & var_49_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] SORT_3 var_49 = var_49_arg_0 & var_49_arg_1; [L261] SORT_3 var_52_arg_0 = state_50; [L262] SORT_3 var_52_arg_1 = var_39; [L263] SORT_3 var_52 = var_52_arg_0 == var_52_arg_1; [L264] SORT_3 var_53_arg_0 = var_49; [L265] SORT_3 var_53_arg_1 = var_52; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] EXPR var_53_arg_0 & var_53_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L267] SORT_24 var_55_arg_0 = var_54; [L268] SORT_24 var_55_arg_1 = var_26; [L269] SORT_3 var_55 = var_55_arg_0 != var_55_arg_1; [L270] SORT_3 var_56_arg_0 = var_53; [L271] SORT_3 var_56_arg_1 = var_55; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_56_arg_0=0, var_56_arg_1=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] EXPR var_56_arg_0 & var_56_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] SORT_3 var_56 = var_56_arg_0 & var_56_arg_1; [L273] EXPR var_56 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L273] var_56 = var_56 & mask_SORT_3 [L274] SORT_3 var_57_arg_0 = var_56; [L275] SORT_33 var_57_arg_1 = var_35; [L276] SORT_33 var_57_arg_2 = var_34; [L277] SORT_33 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L278] SORT_3 var_74_arg_0 = var_73; [L279] SORT_33 var_74_arg_1 = var_58; [L280] SORT_33 var_74_arg_2 = var_57; [L281] SORT_33 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L282] SORT_3 var_95_arg_0 = var_94; [L283] SORT_33 var_95_arg_1 = var_75; [L284] SORT_33 var_95_arg_2 = var_74; [L285] SORT_33 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L286] EXPR var_95 & mask_SORT_33 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L286] var_95 = var_95 & mask_SORT_33 [L287] SORT_33 var_102_arg_0 = var_95; [L288] SORT_33 var_102_arg_1 = var_35; [L289] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L290] SORT_33 var_100_arg_0 = var_95; [L291] SORT_33 var_100_arg_1 = var_34; [L292] SORT_3 var_100 = var_100_arg_0 == var_100_arg_1; [L293] SORT_3 var_103_arg_0 = var_102; [L294] SORT_3 var_103_arg_1 = var_100; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] EXPR var_103_arg_0 | var_103_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] SORT_3 var_103 = var_103_arg_0 | var_103_arg_1; [L296] EXPR var_103 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L296] var_103 = var_103 & mask_SORT_3 [L297] SORT_3 var_101_arg_0 = var_100; [L298] SORT_6 var_101_arg_1 = var_28; [L299] SORT_6 var_101_arg_2 = state_98; [L300] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L301] SORT_33 var_96_arg_0 = var_95; [L302] SORT_33 var_96_arg_1 = var_58; [L303] SORT_3 var_96 = var_96_arg_0 == var_96_arg_1; [L304] SORT_3 var_97_arg_0 = var_96; [L305] SORT_6 var_97_arg_1 = state_31; [L306] SORT_6 var_97_arg_2 = state_29; [L307] SORT_6 var_97 = var_97_arg_0 ? var_97_arg_1 : var_97_arg_2; [L308] SORT_3 var_104_arg_0 = var_103; [L309] SORT_6 var_104_arg_1 = var_101; [L310] SORT_6 var_104_arg_2 = var_97; [L311] SORT_6 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L312] SORT_3 var_106_arg_0 = var_105; [L313] SORT_6 var_106_arg_1 = var_28; [L314] SORT_6 var_106_arg_2 = var_104; [L315] SORT_6 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L316] SORT_6 var_107_arg_0 = var_106; [L317] SORT_1 var_107 = var_107_arg_0 >> 26; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_107=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] EXPR var_107 & mask_SORT_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_27=0, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] var_107 = var_107 & mask_SORT_1 [L319] SORT_1 var_108_arg_0 = var_107; [L320] SORT_1 var_108_arg_1 = var_21; [L321] SORT_3 var_108 = var_108_arg_0 == var_108_arg_1; [L322] SORT_3 var_109_arg_0 = var_27; [L323] SORT_3 var_109_arg_1 = var_108; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_109_arg_0=0, var_109_arg_1=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] EXPR var_109_arg_0 & var_109_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] SORT_3 var_109 = var_109_arg_0 & var_109_arg_1; [L325] SORT_3 var_110_arg_0 = var_109; [L326] SORT_3 var_110 = ~var_110_arg_0; [L327] SORT_3 var_113_arg_0 = var_110; [L328] SORT_3 var_113 = ~var_113_arg_0; [L329] SORT_3 var_114_arg_0 = var_39; [L330] SORT_3 var_114_arg_1 = var_113; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_114_arg_0=1, var_114_arg_1=-256, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] EXPR var_114_arg_0 & var_114_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] SORT_3 var_114 = var_114_arg_0 & var_114_arg_1; [L332] EXPR var_114 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=0, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L332] var_114 = var_114 & mask_SORT_3 [L333] SORT_3 bad_115_arg_0 = var_114; [L334] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND FALSE !(!(cond)) [L334] RET __VERIFIER_assert(!(bad_115_arg_0)) [L336] SORT_1 next_139_arg_1 = input_12; [L337] SORT_6 next_140_arg_1 = input_7; [L338] SORT_6 next_141_arg_1 = input_9; [L339] SORT_1 next_142_arg_1 = input_11; [L340] SORT_3 var_143_arg_0 = state_122; [L341] SORT_1 var_143_arg_1 = state_60; [L342] SORT_1 var_143_arg_2 = state_41; [L343] SORT_1 var_143 = var_143_arg_0 ? var_143_arg_1 : var_143_arg_2; VAL [input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_50=0, state_64=0, state_81=0, state_98=0, var_143=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L344] EXPR var_143 & mask_SORT_1 VAL [input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_50=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L344] var_143 = var_143 & mask_SORT_1 [L345] SORT_1 next_144_arg_1 = var_143; [L346] SORT_3 next_145_arg_1 = input_19; [L347] SORT_3 var_146_arg_0 = state_122; [L348] SORT_3 var_146_arg_1 = state_64; [L349] SORT_3 var_146_arg_2 = state_50; [L350] SORT_3 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; VAL [input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_146=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L351] EXPR var_146 & mask_SORT_3 VAL [input_10=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L351] var_146 = var_146 & mask_SORT_3 [L352] SORT_3 next_147_arg_1 = var_146; [L353] SORT_1 next_148_arg_1 = input_10; [L354] SORT_3 next_149_arg_1 = input_8; [L355] SORT_3 next_150_arg_1 = input_18; [L356] SORT_1 next_151_arg_1 = input_5; [L357] SORT_1 var_152_arg_0 = state_116; [L358] SORT_3 var_152 = var_152_arg_0 >> 5; [L359] SORT_1 var_153_arg_0 = state_116; [L360] SORT_3 var_153 = var_153_arg_0 >> 2; [L361] SORT_3 var_154_arg_0 = var_152; [L362] SORT_3 var_154_arg_1 = var_153; VAL [input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_154_arg_0=0, var_154_arg_1=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L363] EXPR var_154_arg_0 & var_154_arg_1 VAL [input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_116=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L363] SORT_3 var_154 = var_154_arg_0 & var_154_arg_1; [L364] SORT_1 var_155_arg_0 = state_116; [L365] SORT_3 var_155 = var_155_arg_0 >> 0; [L366] SORT_3 var_156_arg_0 = var_155; [L367] SORT_3 var_156 = ~var_156_arg_0; [L368] SORT_3 var_157_arg_0 = var_154; [L369] SORT_3 var_157_arg_1 = var_156; VAL [input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_157_arg_0=0, var_157_arg_1=-1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L370] EXPR var_157_arg_0 & var_157_arg_1 VAL [input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_118=0, state_122=0, state_31=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L370] SORT_3 var_157 = var_157_arg_0 & var_157_arg_1; [L371] SORT_3 var_158_arg_0 = state_118; [L372] SORT_3 var_158_arg_1 = var_157; [L373] SORT_3 var_158_arg_2 = state_81; [L374] SORT_3 var_158 = var_158_arg_0 ? var_158_arg_1 : var_158_arg_2; VAL [input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_122=0, state_31=0, state_98=0, var_158=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L375] EXPR var_158 & mask_SORT_3 VAL [input_14=0, input_16=0, input_17=0, input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, next_139_arg_1=287, next_140_arg_1=0, next_141_arg_1=0, next_142_arg_1=0, next_144_arg_1=0, next_145_arg_1=0, next_147_arg_1=0, next_148_arg_1=0, next_149_arg_1=0, next_150_arg_1=0, next_151_arg_1=0, state_122=0, state_31=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L375] var_158 = var_158 & mask_SORT_3 [L376] SORT_3 next_159_arg_1 = var_158; [L377] SORT_3 next_160_arg_1 = input_4; [L378] SORT_3 next_161_arg_1 = input_17; [L379] SORT_3 var_162_arg_0 = state_122; [L380] SORT_6 var_162_arg_1 = state_31; [L381] SORT_6 var_162_arg_2 = state_98; [L382] SORT_6 var_162 = var_162_arg_0 ? var_162_arg_1 : var_162_arg_2; [L383] SORT_6 next_163_arg_1 = var_162; [L384] SORT_1 next_164_arg_1 = input_2; [L385] SORT_3 next_165_arg_1 = input_14; [L386] SORT_3 next_166_arg_1 = input_16; [L388] state_22 = next_139_arg_1 [L389] state_29 = next_140_arg_1 [L390] state_31 = next_141_arg_1 [L391] state_36 = next_142_arg_1 [L392] state_41 = next_144_arg_1 [L393] state_46 = next_145_arg_1 [L394] state_50 = next_147_arg_1 [L395] state_60 = next_148_arg_1 [L396] state_64 = next_149_arg_1 [L397] state_68 = next_150_arg_1 [L398] state_77 = next_151_arg_1 [L399] state_81 = next_159_arg_1 [L400] state_85 = next_160_arg_1 [L401] state_89 = next_161_arg_1 [L402] state_98 = next_163_arg_1 [L403] state_116 = next_164_arg_1 [L404] state_118 = next_165_arg_1 [L405] state_122 = next_166_arg_1 [L133] input_2 = __VERIFIER_nondet_uchar() [L134] input_4 = __VERIFIER_nondet_uchar() [L135] EXPR input_4 & mask_SORT_3 VAL [mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L135] input_4 = input_4 & mask_SORT_3 [L136] input_5 = __VERIFIER_nondet_uchar() [L137] EXPR input_5 & mask_SORT_1 VAL [input_4=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L137] input_5 = input_5 & mask_SORT_1 [L138] input_7 = __VERIFIER_nondet_uint() [L139] input_8 = __VERIFIER_nondet_uchar() [L140] EXPR input_8 & mask_SORT_3 VAL [input_4=0, input_5=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L140] input_8 = input_8 & mask_SORT_3 [L141] input_9 = __VERIFIER_nondet_uint() [L142] input_10 = __VERIFIER_nondet_uchar() [L143] EXPR input_10 & mask_SORT_1 VAL [input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L143] input_10 = input_10 & mask_SORT_1 [L144] input_11 = __VERIFIER_nondet_uchar() [L145] EXPR input_11 & mask_SORT_1 VAL [input_10=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L145] input_11 = input_11 & mask_SORT_1 [L146] input_12 = __VERIFIER_nondet_uchar() [L147] input_13 = __VERIFIER_nondet_uchar() [L148] input_14 = __VERIFIER_nondet_uchar() [L149] EXPR input_14 & mask_SORT_3 VAL [input_10=0, input_11=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L149] input_14 = input_14 & mask_SORT_3 [L150] input_15 = __VERIFIER_nondet_uchar() [L151] input_16 = __VERIFIER_nondet_uchar() [L152] EXPR input_16 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L152] input_16 = input_16 & mask_SORT_3 [L153] input_17 = __VERIFIER_nondet_uchar() [L154] EXPR input_17 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L154] input_17 = input_17 & mask_SORT_3 [L155] input_18 = __VERIFIER_nondet_uchar() [L156] EXPR input_18 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L156] input_18 = input_18 & mask_SORT_3 [L157] input_19 = __VERIFIER_nondet_uchar() [L158] EXPR input_19 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_22=287, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L158] input_19 = input_19 & mask_SORT_3 [L159] input_20 = __VERIFIER_nondet_uchar() [L160] input_120 = __VERIFIER_nondet_uchar() [L161] input_124 = __VERIFIER_nondet_uchar() [L162] input_126 = __VERIFIER_nondet_uchar() [L163] input_129 = __VERIFIER_nondet_uchar() [L164] input_131 = __VERIFIER_nondet_uchar() [L165] input_134 = __VERIFIER_nondet_uint() [L166] input_136 = __VERIFIER_nondet_uchar() [L169] SORT_1 var_25_arg_0 = state_22; [L170] SORT_24 var_25 = var_25_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_25=31, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] EXPR var_25 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L171] var_25 = var_25 & mask_SORT_24 [L172] SORT_24 var_27_arg_0 = var_25; [L173] SORT_24 var_27_arg_1 = var_26; [L174] SORT_3 var_27 = var_27_arg_0 == var_27_arg_1; [L175] SORT_1 var_54_arg_0 = state_36; [L176] SORT_24 var_54 = var_54_arg_0 >> 0; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L177] EXPR var_54 & mask_SORT_24 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L177] var_54 = var_54 & mask_SORT_24 [L178] SORT_24 var_105_arg_0 = var_54; [L179] SORT_24 var_105_arg_1 = var_26; [L180] SORT_3 var_105 = var_105_arg_0 == var_105_arg_1; [L181] SORT_1 var_38_arg_0 = state_36; [L182] SORT_3 var_38 = var_38_arg_0 >> 5; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L183] EXPR var_38 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_77=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_75=3] [L183] var_38 = var_38 & mask_SORT_3 [L184] SORT_3 var_76_arg_0 = var_38; [L185] SORT_3 var_76_arg_1 = var_39; [L186] SORT_3 var_76 = var_76_arg_0 == var_76_arg_1; [L187] SORT_1 var_79_arg_0 = state_36; [L188] SORT_1 var_79_arg_1 = state_77; [L189] SORT_3 var_79 = var_79_arg_0 == var_79_arg_1; [L190] SORT_3 var_80_arg_0 = var_76; [L191] SORT_3 var_80_arg_1 = var_79; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_80_arg_0=0, var_80_arg_1=1] [L192] EXPR var_80_arg_0 & var_80_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L192] SORT_3 var_80 = var_80_arg_0 & var_80_arg_1; [L193] SORT_3 var_83_arg_0 = state_81; [L194] SORT_3 var_83_arg_1 = var_39; [L195] SORT_3 var_83 = var_83_arg_0 != var_83_arg_1; [L196] SORT_3 var_84_arg_0 = var_80; [L197] SORT_3 var_84_arg_1 = var_83; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_84_arg_0=0, var_84_arg_1=1] [L198] EXPR var_84_arg_0 & var_84_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_85=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L198] SORT_3 var_84 = var_84_arg_0 & var_84_arg_1; [L199] SORT_3 var_87_arg_0 = state_85; [L200] SORT_3 var_87_arg_1 = var_39; [L201] SORT_3 var_87 = var_87_arg_0 == var_87_arg_1; [L202] SORT_3 var_88_arg_0 = var_84; [L203] SORT_3 var_88_arg_1 = var_87; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_88_arg_0=0, var_88_arg_1=0] [L204] EXPR var_88_arg_0 & var_88_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_89=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L204] SORT_3 var_88 = var_88_arg_0 & var_88_arg_1; [L205] SORT_3 var_91_arg_0 = state_89; [L206] SORT_3 var_91_arg_1 = var_39; [L207] SORT_3 var_91 = var_91_arg_0 == var_91_arg_1; [L208] SORT_3 var_92_arg_0 = var_88; [L209] SORT_3 var_92_arg_1 = var_91; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_92_arg_0=0, var_92_arg_1=0] [L210] EXPR var_92_arg_0 & var_92_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L210] SORT_3 var_92 = var_92_arg_0 & var_92_arg_1; [L211] SORT_24 var_93_arg_0 = var_54; [L212] SORT_24 var_93_arg_1 = var_26; [L213] SORT_3 var_93 = var_93_arg_0 != var_93_arg_1; [L214] SORT_3 var_94_arg_0 = var_92; [L215] SORT_3 var_94_arg_1 = var_93; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94_arg_0=0, var_94_arg_1=1] [L216] EXPR var_94_arg_0 & var_94_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L216] SORT_3 var_94 = var_94_arg_0 & var_94_arg_1; [L217] EXPR var_94 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3] [L217] var_94 = var_94 & mask_SORT_3 [L218] SORT_3 var_59_arg_0 = var_38; [L219] SORT_3 var_59_arg_1 = var_39; [L220] SORT_3 var_59 = var_59_arg_0 == var_59_arg_1; [L221] SORT_1 var_62_arg_0 = state_36; [L222] SORT_1 var_62_arg_1 = state_60; [L223] SORT_3 var_62 = var_62_arg_0 == var_62_arg_1; [L224] SORT_3 var_63_arg_0 = var_59; [L225] SORT_3 var_63_arg_1 = var_62; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_63_arg_0=0, var_63_arg_1=1, var_75=3, var_94=0] [L226] EXPR var_63_arg_0 & var_63_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L226] SORT_3 var_63 = var_63_arg_0 & var_63_arg_1; [L227] SORT_3 var_66_arg_0 = state_64; [L228] SORT_3 var_66_arg_1 = var_39; [L229] SORT_3 var_66 = var_66_arg_0 == var_66_arg_1; [L230] SORT_3 var_67_arg_0 = var_63; [L231] SORT_3 var_67_arg_1 = var_66; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_67_arg_0=0, var_67_arg_1=0, var_75=3, var_94=0] [L232] EXPR var_67_arg_0 & var_67_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_68=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L232] SORT_3 var_67 = var_67_arg_0 & var_67_arg_1; [L233] SORT_3 var_70_arg_0 = state_68; [L234] SORT_3 var_70_arg_1 = var_39; [L235] SORT_3 var_70 = var_70_arg_0 == var_70_arg_1; [L236] SORT_3 var_71_arg_0 = var_67; [L237] SORT_3 var_71_arg_1 = var_70; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_71_arg_0=0, var_71_arg_1=0, var_75=3, var_94=0] [L238] EXPR var_71_arg_0 & var_71_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L238] SORT_3 var_71 = var_71_arg_0 & var_71_arg_1; [L239] SORT_24 var_72_arg_0 = var_54; [L240] SORT_24 var_72_arg_1 = var_26; [L241] SORT_3 var_72 = var_72_arg_0 != var_72_arg_1; [L242] SORT_3 var_73_arg_0 = var_71; [L243] SORT_3 var_73_arg_1 = var_72; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_73_arg_0=0, var_73_arg_1=1, var_75=3, var_94=0] [L244] EXPR var_73_arg_0 & var_73_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L244] SORT_3 var_73 = var_73_arg_0 & var_73_arg_1; [L245] EXPR var_73 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_36=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_38=0, var_39=1, var_54=0, var_58=2, var_75=3, var_94=0] [L245] var_73 = var_73 & mask_SORT_3 [L246] SORT_3 var_40_arg_0 = var_38; [L247] SORT_3 var_40_arg_1 = var_39; [L248] SORT_3 var_40 = var_40_arg_0 == var_40_arg_1; [L249] SORT_1 var_43_arg_0 = state_36; [L250] SORT_1 var_43_arg_1 = state_41; [L251] SORT_3 var_43 = var_43_arg_0 == var_43_arg_1; [L252] SORT_3 var_44_arg_0 = var_40; [L253] SORT_3 var_44_arg_1 = var_43; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_44_arg_0=0, var_44_arg_1=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] EXPR var_44_arg_0 & var_44_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_46=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L254] SORT_3 var_44 = var_44_arg_0 & var_44_arg_1; [L255] SORT_3 var_48_arg_0 = state_46; [L256] SORT_3 var_48_arg_1 = var_39; [L257] SORT_3 var_48 = var_48_arg_0 == var_48_arg_1; [L258] SORT_3 var_49_arg_0 = var_44; [L259] SORT_3 var_49_arg_1 = var_48; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_49_arg_0=0, var_49_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] EXPR var_49_arg_0 & var_49_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L260] SORT_3 var_49 = var_49_arg_0 & var_49_arg_1; [L261] SORT_3 var_52_arg_0 = state_50; [L262] SORT_3 var_52_arg_1 = var_39; [L263] SORT_3 var_52 = var_52_arg_0 == var_52_arg_1; [L264] SORT_3 var_53_arg_0 = var_49; [L265] SORT_3 var_53_arg_1 = var_52; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] EXPR var_53_arg_0 & var_53_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_54=0, var_58=2, var_73=0, var_75=3, var_94=0] [L266] SORT_3 var_53 = var_53_arg_0 & var_53_arg_1; [L267] SORT_24 var_55_arg_0 = var_54; [L268] SORT_24 var_55_arg_1 = var_26; [L269] SORT_3 var_55 = var_55_arg_0 != var_55_arg_1; [L270] SORT_3 var_56_arg_0 = var_53; [L271] SORT_3 var_56_arg_1 = var_55; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_56_arg_0=0, var_56_arg_1=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] EXPR var_56_arg_0 & var_56_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L272] SORT_3 var_56 = var_56_arg_0 & var_56_arg_1; [L273] EXPR var_56 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_73=0, var_75=3, var_94=0] [L273] var_56 = var_56 & mask_SORT_3 [L274] SORT_3 var_57_arg_0 = var_56; [L275] SORT_33 var_57_arg_1 = var_35; [L276] SORT_33 var_57_arg_2 = var_34; [L277] SORT_33 var_57 = var_57_arg_0 ? var_57_arg_1 : var_57_arg_2; [L278] SORT_3 var_74_arg_0 = var_73; [L279] SORT_33 var_74_arg_1 = var_58; [L280] SORT_33 var_74_arg_2 = var_57; [L281] SORT_33 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L282] SORT_3 var_95_arg_0 = var_94; [L283] SORT_33 var_95_arg_1 = var_75; [L284] SORT_33 var_95_arg_2 = var_74; [L285] SORT_33 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L286] EXPR var_95 & mask_SORT_33 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L286] var_95 = var_95 & mask_SORT_33 [L287] SORT_33 var_102_arg_0 = var_95; [L288] SORT_33 var_102_arg_1 = var_35; [L289] SORT_3 var_102 = var_102_arg_0 == var_102_arg_1; [L290] SORT_33 var_100_arg_0 = var_95; [L291] SORT_33 var_100_arg_1 = var_34; [L292] SORT_3 var_100 = var_100_arg_0 == var_100_arg_1; [L293] SORT_3 var_103_arg_0 = var_102; [L294] SORT_3 var_103_arg_1 = var_100; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_103_arg_0=0, var_103_arg_1=1, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] EXPR var_103_arg_0 | var_103_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L295] SORT_3 var_103 = var_103_arg_0 | var_103_arg_1; [L296] EXPR var_103 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_29=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_100=1, var_105=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3, var_95=0] [L296] var_103 = var_103 & mask_SORT_3 [L297] SORT_3 var_101_arg_0 = var_100; [L298] SORT_6 var_101_arg_1 = var_28; [L299] SORT_6 var_101_arg_2 = state_98; [L300] SORT_6 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L301] SORT_33 var_96_arg_0 = var_95; [L302] SORT_33 var_96_arg_1 = var_58; [L303] SORT_3 var_96 = var_96_arg_0 == var_96_arg_1; [L304] SORT_3 var_97_arg_0 = var_96; [L305] SORT_6 var_97_arg_1 = state_31; [L306] SORT_6 var_97_arg_2 = state_29; [L307] SORT_6 var_97 = var_97_arg_0 ? var_97_arg_1 : var_97_arg_2; [L308] SORT_3 var_104_arg_0 = var_103; [L309] SORT_6 var_104_arg_1 = var_101; [L310] SORT_6 var_104_arg_2 = var_97; [L311] SORT_6 var_104 = var_104_arg_0 ? var_104_arg_1 : var_104_arg_2; [L312] SORT_3 var_106_arg_0 = var_105; [L313] SORT_6 var_106_arg_1 = var_28; [L314] SORT_6 var_106_arg_2 = var_104; [L315] SORT_6 var_106 = var_106_arg_0 ? var_106_arg_1 : var_106_arg_2; [L316] SORT_6 var_107_arg_0 = var_106; [L317] SORT_1 var_107 = var_107_arg_0 >> 26; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_107=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] EXPR var_107 & mask_SORT_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_27=1, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L318] var_107 = var_107 & mask_SORT_1 [L319] SORT_1 var_108_arg_0 = var_107; [L320] SORT_1 var_108_arg_1 = var_21; [L321] SORT_3 var_108 = var_108_arg_0 == var_108_arg_1; [L322] SORT_3 var_109_arg_0 = var_27; [L323] SORT_3 var_109_arg_1 = var_108; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_109_arg_0=1, var_109_arg_1=1, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] EXPR var_109_arg_0 & var_109_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L324] SORT_3 var_109 = var_109_arg_0 & var_109_arg_1; [L325] SORT_3 var_110_arg_0 = var_109; [L326] SORT_3 var_110 = ~var_110_arg_0; [L327] SORT_3 var_113_arg_0 = var_110; [L328] SORT_3 var_113 = ~var_113_arg_0; [L329] SORT_3 var_114_arg_0 = var_39; [L330] SORT_3 var_114_arg_1 = var_113; VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_114_arg_0=1, var_114_arg_1=-255, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] EXPR var_114_arg_0 & var_114_arg_1 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L331] SORT_3 var_114 = var_114_arg_0 & var_114_arg_1; [L332] EXPR var_114 & mask_SORT_3 VAL [input_10=0, input_11=0, input_14=0, input_16=0, input_17=0, input_18=0, input_19=0, input_4=0, input_5=0, input_8=0, mask_SORT_1=63, mask_SORT_24=31, mask_SORT_33=3, mask_SORT_3=1, state_116=288, state_118=0, state_122=0, state_31=0, state_41=0, state_50=0, state_60=0, state_64=0, state_81=0, state_98=0, var_21=0, var_26=31, var_28=0, var_34=0, var_35=1, var_39=1, var_58=2, var_75=3] [L332] var_114 = var_114 & mask_SORT_3 [L333] SORT_3 bad_115_arg_0 = var_114; [L334] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 243 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 14.7s, OverallIterations: 7, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 1.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1534 SdHoareTripleChecker+Valid, 1.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1534 mSDsluCounter, 8407 SdHoareTripleChecker+Invalid, 1.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 6422 mSDsCounter, 9 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2020 IncrementalHoareTripleChecker+Invalid, 2029 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 9 mSolverCounterUnsat, 1985 mSDtfsCounter, 2020 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 444 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=392occurred in iteration=6, InterpolantAutomatonStates: 35, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 6 MinimizatonAttempts, 55 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 2.8s SatisfiabilityAnalysisTime, 7.9s InterpolantComputationTime, 1175 NumberOfCodeBlocks, 1175 NumberOfCodeBlocksAsserted, 8 NumberOfCheckSat, 1165 ConstructedInterpolants, 0 QuantifiedInterpolants, 7883 SizeOfPredicates, 7 NumberOfNonLiveVariables, 1280 ConjunctsInSsa, 56 ConjunctsInUnsatCore, 8 InterpolantComputations, 5 PerfectInterpolantSequences, 109/222 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-10-24 05:00:14,814 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE