./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f3d22aeda2fb15b9dd79854281ee0f5e475c0f7ee1551b76594f45703ddc81df --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:18:17,033 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:18:17,124 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 22:18:17,128 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:18:17,129 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:18:17,159 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:18:17,159 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:18:17,160 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:18:17,160 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:18:17,161 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:18:17,161 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:18:17,162 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:18:17,162 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:18:17,163 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:18:17,163 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:18:17,164 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:18:17,164 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:18:17,164 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:18:17,165 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:18:17,165 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:18:17,166 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:18:17,166 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 22:18:17,167 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:18:17,167 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 22:18:17,168 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:18:17,168 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:18:17,168 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:18:17,169 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:18:17,169 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:18:17,169 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:18:17,170 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 22:18:17,170 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:18:17,170 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:18:17,171 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:18:17,171 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:18:17,172 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:18:17,172 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:18:17,172 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:18:17,173 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:18:17,173 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f3d22aeda2fb15b9dd79854281ee0f5e475c0f7ee1551b76594f45703ddc81df [2024-10-31 22:18:17,517 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:18:17,548 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:18:17,551 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:18:17,552 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:18:17,553 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:18:17,555 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c Unable to find full path for "g++" [2024-10-31 22:18:19,903 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:18:20,098 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:18:20,099 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c [2024-10-31 22:18:20,105 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/data/7de3ab714/ba151b426c3e43e5bb3b87959c4ce4a0/FLAG99b1d0f73 [2024-10-31 22:18:20,486 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/data/7de3ab714/ba151b426c3e43e5bb3b87959c4ce4a0 [2024-10-31 22:18:20,488 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:18:20,490 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:18:20,491 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:18:20,491 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:18:20,498 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:18:20,499 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,500 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60da7009 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20, skipping insertion in model container [2024-10-31 22:18:20,503 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,531 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:18:20,767 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:18:20,784 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:18:20,799 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:18:20,816 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:18:20,816 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20 WrapperNode [2024-10-31 22:18:20,817 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:18:20,818 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:18:20,818 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:18:20,818 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:18:20,825 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,831 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,847 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 66 [2024-10-31 22:18:20,847 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:18:20,848 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:18:20,848 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:18:20,848 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:18:20,858 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,859 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,861 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,874 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [2, 1]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [1, 0]. [2024-10-31 22:18:20,874 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,874 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,879 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,887 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,888 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,889 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,891 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:18:20,892 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:18:20,892 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:18:20,892 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:18:20,893 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (1/1) ... [2024-10-31 22:18:20,899 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:18:20,912 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:18:20,938 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:18:20,952 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:18:20,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-31 22:18:20,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-10-31 22:18:20,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:18:20,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:18:20,994 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-31 22:18:20,994 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-10-31 22:18:20,994 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-31 22:18:20,995 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-31 22:18:21,058 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:18:21,060 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:18:21,203 INFO L? ?]: Removed 10 outVars from TransFormulas that were not future-live. [2024-10-31 22:18:21,203 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:18:21,214 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:18:21,215 INFO L316 CfgBuilder]: Removed 3 assume(true) statements. [2024-10-31 22:18:21,216 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:18:21 BoogieIcfgContainer [2024-10-31 22:18:21,217 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:18:21,218 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:18:21,218 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:18:21,222 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:18:21,223 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:18:21,223 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:18:20" (1/3) ... [2024-10-31 22:18:21,224 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4d476641 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:18:21, skipping insertion in model container [2024-10-31 22:18:21,224 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:18:21,224 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:18:20" (2/3) ... [2024-10-31 22:18:21,225 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4d476641 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:18:21, skipping insertion in model container [2024-10-31 22:18:21,226 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:18:21,226 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:18:21" (3/3) ... [2024-10-31 22:18:21,227 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysOfVariableLength4.c [2024-10-31 22:18:21,286 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:18:21,286 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:18:21,286 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:18:21,287 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:18:21,287 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:18:21,287 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:18:21,287 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:18:21,287 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:18:21,291 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:21,304 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 22:18:21,304 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:18:21,304 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:18:21,310 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:18:21,310 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-10-31 22:18:21,310 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:18:21,310 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:21,311 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 22:18:21,312 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:18:21,312 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:18:21,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:18:21,312 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-10-31 22:18:21,318 INFO L745 eck$LassoCheckResult]: Stem: 15#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 6#L25-3true [2024-10-31 22:18:21,319 INFO L747 eck$LassoCheckResult]: Loop: 6#L25-3true assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5#L15-3true assume !(foo_~i~0#1 < foo_~size#1); 11#L15-4true foo_#res#1 := foo_~i~0#1; 3#foo_returnLabel#1true main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12#L25-2true main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6#L25-3true [2024-10-31 22:18:21,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:21,324 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-31 22:18:21,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:21,333 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161669905] [2024-10-31 22:18:21,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:21,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:21,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:21,426 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:21,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:21,450 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:18:21,453 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:21,453 INFO L85 PathProgramCache]: Analyzing trace with hash 38364915, now seen corresponding path program 1 times [2024-10-31 22:18:21,453 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:21,454 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198248552] [2024-10-31 22:18:21,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:21,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:21,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:18:21,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:21,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:18:21,594 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198248552] [2024-10-31 22:18:21,595 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198248552] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:18:21,595 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:18:21,595 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-31 22:18:21,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116178310] [2024-10-31 22:18:21,596 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:18:21,600 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:18:21,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:18:21,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:18:21,634 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:18:21,635 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:21,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:18:21,672 INFO L93 Difference]: Finished difference Result 19 states and 22 transitions. [2024-10-31 22:18:21,674 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 22 transitions. [2024-10-31 22:18:21,675 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2024-10-31 22:18:21,681 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 14 states and 16 transitions. [2024-10-31 22:18:21,682 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2024-10-31 22:18:21,683 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2024-10-31 22:18:21,684 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 16 transitions. [2024-10-31 22:18:21,685 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:18:21,685 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-10-31 22:18:21,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 16 transitions. [2024-10-31 22:18:21,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 13. [2024-10-31 22:18:21,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 12 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:21,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 15 transitions. [2024-10-31 22:18:21,705 INFO L240 hiAutomatonCegarLoop]: Abstraction has 13 states and 15 transitions. [2024-10-31 22:18:21,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:18:21,710 INFO L425 stractBuchiCegarLoop]: Abstraction has 13 states and 15 transitions. [2024-10-31 22:18:21,710 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:18:21,711 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 15 transitions. [2024-10-31 22:18:21,711 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2024-10-31 22:18:21,711 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:18:21,712 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:18:21,712 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:18:21,712 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:18:21,712 INFO L745 eck$LassoCheckResult]: Stem: 55#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 56#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 48#L25-3 [2024-10-31 22:18:21,713 INFO L747 eck$LassoCheckResult]: Loop: 48#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 49#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 50#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 57#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 45#L15-4 foo_#res#1 := foo_~i~0#1; 46#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 47#L25-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 48#L25-3 [2024-10-31 22:18:21,713 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:21,714 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2024-10-31 22:18:21,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:21,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857733014] [2024-10-31 22:18:21,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:21,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:21,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:21,727 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:21,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:21,736 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:18:21,737 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:21,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1732759051, now seen corresponding path program 1 times [2024-10-31 22:18:21,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:21,737 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235770340] [2024-10-31 22:18:21,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:21,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:21,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:18:21,911 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:21,912 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:18:21,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1235770340] [2024-10-31 22:18:21,912 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1235770340] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:18:21,913 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1195054242] [2024-10-31 22:18:21,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:21,913 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:18:21,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:18:21,916 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:18:21,918 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-10-31 22:18:22,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:18:22,006 INFO L255 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:18:22,010 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:18:22,135 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:22,135 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:18:22,179 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:22,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1195054242] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:18:22,180 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:18:22,180 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 7 [2024-10-31 22:18:22,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1150958296] [2024-10-31 22:18:22,181 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:18:22,181 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:18:22,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:18:22,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-31 22:18:22,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=29, Unknown=0, NotChecked=0, Total=56 [2024-10-31 22:18:22,185 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. cyclomatic complexity: 4 Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:22,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:18:22,235 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2024-10-31 22:18:22,236 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 21 transitions. [2024-10-31 22:18:22,237 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2024-10-31 22:18:22,238 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 21 transitions. [2024-10-31 22:18:22,238 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2024-10-31 22:18:22,239 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2024-10-31 22:18:22,239 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 21 transitions. [2024-10-31 22:18:22,239 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:18:22,239 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2024-10-31 22:18:22,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 21 transitions. [2024-10-31 22:18:22,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2024-10-31 22:18:22,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.105263157894737) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:22,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2024-10-31 22:18:22,244 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2024-10-31 22:18:22,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:18:22,245 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2024-10-31 22:18:22,246 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:18:22,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2024-10-31 22:18:22,247 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2024-10-31 22:18:22,247 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:18:22,247 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:18:22,248 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:18:22,248 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1] [2024-10-31 22:18:22,248 INFO L745 eck$LassoCheckResult]: Stem: 132#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 133#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 127#L25-3 [2024-10-31 22:18:22,248 INFO L747 eck$LassoCheckResult]: Loop: 127#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 128#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 129#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 136#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 142#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 141#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 140#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 139#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 138#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 137#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 124#L15-4 foo_#res#1 := foo_~i~0#1; 125#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 126#L25-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 127#L25-3 [2024-10-31 22:18:22,250 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:22,250 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2024-10-31 22:18:22,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:22,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337801766] [2024-10-31 22:18:22,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:22,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:22,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:22,270 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:22,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:22,287 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:18:22,288 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:22,288 INFO L85 PathProgramCache]: Analyzing trace with hash -1316700165, now seen corresponding path program 2 times [2024-10-31 22:18:22,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:22,293 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627715567] [2024-10-31 22:18:22,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:22,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:22,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:18:22,676 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:22,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:18:22,676 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627715567] [2024-10-31 22:18:22,677 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627715567] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:18:22,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1430123292] [2024-10-31 22:18:22,677 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:18:22,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:18:22,677 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:18:22,682 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:18:22,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-10-31 22:18:22,766 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-31 22:18:22,766 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:18:22,767 INFO L255 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:18:22,770 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:18:23,014 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:23,016 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:18:23,208 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:23,208 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1430123292] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:18:23,208 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:18:23,208 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 16 [2024-10-31 22:18:23,209 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [544614646] [2024-10-31 22:18:23,209 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:18:23,209 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:18:23,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:18:23,210 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-10-31 22:18:23,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=146, Unknown=0, NotChecked=0, Total=272 [2024-10-31 22:18:23,211 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. cyclomatic complexity: 4 Second operand has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:23,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:18:23,291 INFO L93 Difference]: Finished difference Result 31 states and 33 transitions. [2024-10-31 22:18:23,291 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 33 transitions. [2024-10-31 22:18:23,292 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2024-10-31 22:18:23,292 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 31 states and 33 transitions. [2024-10-31 22:18:23,293 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2024-10-31 22:18:23,293 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2024-10-31 22:18:23,293 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 33 transitions. [2024-10-31 22:18:23,293 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:18:23,293 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 33 transitions. [2024-10-31 22:18:23,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 33 transitions. [2024-10-31 22:18:23,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2024-10-31 22:18:23,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.064516129032258) internal successors, (33), 30 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:23,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2024-10-31 22:18:23,298 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 33 transitions. [2024-10-31 22:18:23,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-31 22:18:23,301 INFO L425 stractBuchiCegarLoop]: Abstraction has 31 states and 33 transitions. [2024-10-31 22:18:23,301 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:18:23,301 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 33 transitions. [2024-10-31 22:18:23,302 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2024-10-31 22:18:23,302 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:18:23,302 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:18:23,302 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:18:23,303 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 1, 1, 1, 1, 1] [2024-10-31 22:18:23,303 INFO L745 eck$LassoCheckResult]: Stem: 275#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 276#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 269#L25-3 [2024-10-31 22:18:23,303 INFO L747 eck$LassoCheckResult]: Loop: 269#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 273#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 279#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 270#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 271#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 296#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 295#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 294#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 293#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 292#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 291#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 290#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 289#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 288#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 287#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 286#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 285#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 284#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 283#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 282#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 281#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 280#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 266#L15-4 foo_#res#1 := foo_~i~0#1; 267#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 268#L25-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 269#L25-3 [2024-10-31 22:18:23,306 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:23,306 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2024-10-31 22:18:23,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:23,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [44524701] [2024-10-31 22:18:23,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:23,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:23,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:23,314 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:23,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:23,319 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:18:23,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:23,319 INFO L85 PathProgramCache]: Analyzing trace with hash 2131617415, now seen corresponding path program 3 times [2024-10-31 22:18:23,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:23,320 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492541315] [2024-10-31 22:18:23,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:23,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:23,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:18:23,780 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:23,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:18:23,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [492541315] [2024-10-31 22:18:23,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [492541315] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:18:23,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019958062] [2024-10-31 22:18:23,781 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 22:18:23,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:18:23,782 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:18:23,786 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:18:23,788 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-10-31 22:18:23,901 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-10-31 22:18:23,901 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:18:23,903 INFO L255 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-10-31 22:18:23,905 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:18:24,240 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:24,240 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:18:24,658 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:24,659 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2019958062] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:18:24,659 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:18:24,659 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 34 [2024-10-31 22:18:24,659 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [323306172] [2024-10-31 22:18:24,660 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:18:24,660 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:18:24,660 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:18:24,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-10-31 22:18:24,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=540, Invalid=650, Unknown=0, NotChecked=0, Total=1190 [2024-10-31 22:18:24,667 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. cyclomatic complexity: 4 Second operand has 35 states, 35 states have (on average 1.9714285714285715) internal successors, (69), 34 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:24,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:18:24,808 INFO L93 Difference]: Finished difference Result 55 states and 57 transitions. [2024-10-31 22:18:24,808 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 57 transitions. [2024-10-31 22:18:24,809 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 52 [2024-10-31 22:18:24,810 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 55 states and 57 transitions. [2024-10-31 22:18:24,810 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 55 [2024-10-31 22:18:24,811 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 55 [2024-10-31 22:18:24,811 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 57 transitions. [2024-10-31 22:18:24,811 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:18:24,811 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 57 transitions. [2024-10-31 22:18:24,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 57 transitions. [2024-10-31 22:18:24,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2024-10-31 22:18:24,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 54 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:24,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2024-10-31 22:18:24,815 INFO L240 hiAutomatonCegarLoop]: Abstraction has 55 states and 57 transitions. [2024-10-31 22:18:24,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-31 22:18:24,816 INFO L425 stractBuchiCegarLoop]: Abstraction has 55 states and 57 transitions. [2024-10-31 22:18:24,817 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-31 22:18:24,817 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 57 transitions. [2024-10-31 22:18:24,818 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 52 [2024-10-31 22:18:24,818 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:18:24,818 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:18:24,818 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:18:24,819 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [22, 22, 1, 1, 1, 1, 1] [2024-10-31 22:18:24,819 INFO L745 eck$LassoCheckResult]: Stem: 543#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 544#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 537#L25-3 [2024-10-31 22:18:24,819 INFO L747 eck$LassoCheckResult]: Loop: 537#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 541#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 547#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 538#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 539#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 588#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 587#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 586#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 585#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 584#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 583#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 582#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 581#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 580#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 579#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 578#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 577#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 576#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 575#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 574#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 573#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 572#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 571#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 570#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 569#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 568#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 567#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 566#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 565#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 564#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 563#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 562#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 561#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 560#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 559#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 558#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 557#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 556#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 555#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 554#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 553#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 552#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 551#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 550#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 549#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 548#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 534#L15-4 foo_#res#1 := foo_~i~0#1; 535#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 536#L25-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 537#L25-3 [2024-10-31 22:18:24,819 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:24,820 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2024-10-31 22:18:24,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:24,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545023675] [2024-10-31 22:18:24,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:24,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:24,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:24,827 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:24,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:24,832 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:18:24,835 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:24,836 INFO L85 PathProgramCache]: Analyzing trace with hash -1575559777, now seen corresponding path program 4 times [2024-10-31 22:18:24,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:24,836 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293140781] [2024-10-31 22:18:24,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:24,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:24,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:18:26,002 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:26,003 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:18:26,003 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293140781] [2024-10-31 22:18:26,003 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1293140781] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:18:26,004 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1770520847] [2024-10-31 22:18:26,004 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-31 22:18:26,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:18:26,004 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:18:26,007 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:18:26,009 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_73aba0a6-cfc5-4dbd-bb9c-2b135e956d5a/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-31 22:18:26,161 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-31 22:18:26,161 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:18:26,164 INFO L255 TraceCheckSpWp]: Trace formula consists of 272 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-10-31 22:18:26,169 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:18:27,376 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:27,377 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:18:29,443 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:18:29,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1770520847] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:18:29,443 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:18:29,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 70 [2024-10-31 22:18:29,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63820392] [2024-10-31 22:18:29,444 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:18:29,444 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:18:29,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:18:29,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2024-10-31 22:18:29,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2050, Invalid=2920, Unknown=0, NotChecked=0, Total=4970 [2024-10-31 22:18:29,451 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. cyclomatic complexity: 4 Second operand has 71 states, 71 states have (on average 1.9859154929577465) internal successors, (141), 70 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:29,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:18:29,676 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2024-10-31 22:18:29,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 77 transitions. [2024-10-31 22:18:29,677 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 72 [2024-10-31 22:18:29,678 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 75 states and 77 transitions. [2024-10-31 22:18:29,678 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 75 [2024-10-31 22:18:29,679 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 75 [2024-10-31 22:18:29,679 INFO L73 IsDeterministic]: Start isDeterministic. Operand 75 states and 77 transitions. [2024-10-31 22:18:29,679 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:18:29,680 INFO L218 hiAutomatonCegarLoop]: Abstraction has 75 states and 77 transitions. [2024-10-31 22:18:29,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states and 77 transitions. [2024-10-31 22:18:29,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2024-10-31 22:18:29,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 74 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:18:29,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 77 transitions. [2024-10-31 22:18:29,685 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 77 transitions. [2024-10-31 22:18:29,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-10-31 22:18:29,686 INFO L425 stractBuchiCegarLoop]: Abstraction has 75 states and 77 transitions. [2024-10-31 22:18:29,686 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-31 22:18:29,687 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 77 transitions. [2024-10-31 22:18:29,687 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 72 [2024-10-31 22:18:29,688 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:18:29,688 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:18:29,689 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:18:29,689 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [32, 32, 1, 1, 1, 1, 1] [2024-10-31 22:18:29,689 INFO L745 eck$LassoCheckResult]: Stem: 1035#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1036#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1028#L25-3 [2024-10-31 22:18:29,689 INFO L747 eck$LassoCheckResult]: Loop: 1028#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1033#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1039#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1030#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1031#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1100#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1099#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1098#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1097#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1096#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1095#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1094#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1093#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1092#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1091#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1090#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1089#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1088#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1087#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1086#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1085#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1084#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1083#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1082#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1081#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1080#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1079#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1078#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1077#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1076#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1075#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1074#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1073#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1072#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1071#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1070#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1069#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1068#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1067#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1066#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1065#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1064#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1063#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1062#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1061#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1060#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1059#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1058#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1057#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1056#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1055#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1054#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1053#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1052#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1051#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1050#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1049#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1048#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1047#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1046#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1045#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1044#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1043#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1042#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1041#L15-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1040#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 1029#L15-4 foo_#res#1 := foo_~i~0#1; 1026#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1027#L25-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1028#L25-3 [2024-10-31 22:18:29,690 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:29,690 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2024-10-31 22:18:29,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:29,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331185965] [2024-10-31 22:18:29,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:29,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:29,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:29,697 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:29,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:29,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:18:29,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:29,702 INFO L85 PathProgramCache]: Analyzing trace with hash 776556339, now seen corresponding path program 5 times [2024-10-31 22:18:29,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:29,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [256262729] [2024-10-31 22:18:29,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:29,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:29,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:29,770 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:29,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:29,837 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:18:29,837 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:18:29,838 INFO L85 PathProgramCache]: Analyzing trace with hash -378248015, now seen corresponding path program 1 times [2024-10-31 22:18:29,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:18:29,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1127042565] [2024-10-31 22:18:29,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:18:29,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:18:29,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:29,932 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:18:29,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:18:29,995 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace