./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-15/array16_alloca_fixed.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-15/array16_alloca_fixed.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:00:44,766 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:00:44,872 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-10-31 22:00:44,877 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:00:44,877 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:00:44,908 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:00:44,909 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:00:44,909 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:00:44,910 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:00:44,912 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:00:44,913 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:00:44,913 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:00:44,913 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:00:44,914 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:00:44,914 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:00:44,917 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:00:44,917 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:00:44,918 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:00:44,918 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:00:44,918 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:00:44,919 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:00:44,919 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:00:44,923 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:00:44,923 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:00:44,923 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:00:44,924 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:00:44,924 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:00:44,924 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:00:44,924 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:00:44,925 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:00:44,925 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:00:44,925 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:00:44,926 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:00:44,930 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:00:44,930 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:00:44,931 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:00:44,931 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef [2024-10-31 22:00:45,188 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:00:45,212 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:00:45,215 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:00:45,217 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:00:45,218 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:00:45,219 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/termination-15/array16_alloca_fixed.i Unable to find full path for "g++" [2024-10-31 22:00:47,298 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:00:47,606 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:00:47,607 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2024-10-31 22:00:47,616 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/data/f451ab776/a18136ab34e94ffe9fbc6e25f63a5088/FLAG8902d1f62 [2024-10-31 22:00:47,876 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/data/f451ab776/a18136ab34e94ffe9fbc6e25f63a5088 [2024-10-31 22:00:47,879 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:00:47,881 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:00:47,883 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:00:47,883 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:00:47,889 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:00:47,890 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:00:47" (1/1) ... [2024-10-31 22:00:47,891 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c7a0ccb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:47, skipping insertion in model container [2024-10-31 22:00:47,892 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:00:47" (1/1) ... [2024-10-31 22:00:47,928 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:00:48,349 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:00:48,363 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:00:48,436 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:00:48,482 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:00:48,483 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48 WrapperNode [2024-10-31 22:00:48,483 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:00:48,484 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:00:48,485 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:00:48,485 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:00:48,495 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,514 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,546 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 55 [2024-10-31 22:00:48,548 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:00:48,549 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:00:48,549 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:00:48,549 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:00:48,562 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,563 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,565 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,583 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2024-10-31 22:00:48,583 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,584 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,592 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,599 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,604 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,605 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,607 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:00:48,610 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:00:48,610 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:00:48,610 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:00:48,611 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (1/1) ... [2024-10-31 22:00:48,619 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:48,632 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:48,651 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:48,654 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:00:48,689 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-31 22:00:48,690 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-31 22:00:48,691 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-31 22:00:48,691 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-31 22:00:48,691 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:00:48,692 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:00:48,780 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:00:48,783 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:00:48,966 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2024-10-31 22:00:48,967 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:00:48,986 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:00:48,987 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-31 22:00:48,989 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:00:48 BoogieIcfgContainer [2024-10-31 22:00:48,989 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:00:48,991 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:00:48,994 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:00:48,999 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:00:49,002 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:00:49,002 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:00:47" (1/3) ... [2024-10-31 22:00:49,003 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2103a372 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:00:49, skipping insertion in model container [2024-10-31 22:00:49,005 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:00:49,006 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:48" (2/3) ... [2024-10-31 22:00:49,006 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2103a372 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:00:49, skipping insertion in model container [2024-10-31 22:00:49,006 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:00:49,007 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:00:48" (3/3) ... [2024-10-31 22:00:49,010 INFO L332 chiAutomizerObserver]: Analyzing ICFG array16_alloca_fixed.i [2024-10-31 22:00:49,062 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:00:49,062 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:00:49,062 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:00:49,063 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:00:49,063 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:00:49,063 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:00:49,063 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:00:49,063 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:00:49,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:49,086 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-31 22:00:49,087 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:49,087 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:49,093 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2024-10-31 22:00:49,093 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:00:49,094 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:00:49,094 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:49,095 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-31 22:00:49,096 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:49,096 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:49,096 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2024-10-31 22:00:49,096 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:00:49,105 INFO L745 eck$LassoCheckResult]: Stem: 10#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 11#L367true assume !(main_~length~0#1 < 1); 6#L367-2true call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3#L369true assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4#L370-3true [2024-10-31 22:00:49,105 INFO L747 eck$LassoCheckResult]: Loop: 4#L370-3true assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12#L372true assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15#L370-2true main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 4#L370-3true [2024-10-31 22:00:49,112 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:49,112 INFO L85 PathProgramCache]: Analyzing trace with hash 28695753, now seen corresponding path program 1 times [2024-10-31 22:00:49,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:49,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100472251] [2024-10-31 22:00:49,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:49,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:49,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:49,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,287 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:49,290 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:49,291 INFO L85 PathProgramCache]: Analyzing trace with hash 51737, now seen corresponding path program 1 times [2024-10-31 22:00:49,291 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:49,291 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406630540] [2024-10-31 22:00:49,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:49,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:49,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,319 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:49,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:49,346 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:49,346 INFO L85 PathProgramCache]: Analyzing trace with hash 176707665, now seen corresponding path program 1 times [2024-10-31 22:00:49,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:49,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508687908] [2024-10-31 22:00:49,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:49,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:49,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,409 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:49,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,466 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:49,961 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:00:49,961 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:00:49,961 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:00:49,962 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:00:49,962 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-31 22:00:49,962 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:49,962 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:00:49,963 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:00:49,963 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration1_Lasso [2024-10-31 22:00:49,963 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:00:49,963 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:00:49,983 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:49,997 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,002 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,232 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,236 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,239 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,243 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,246 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,251 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,255 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,258 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:50,673 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:00:50,682 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-31 22:00:50,688 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:50,688 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:50,693 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:50,704 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:50,705 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-31 22:00:50,724 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:50,724 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:50,725 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:50,725 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:50,725 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:50,728 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:50,728 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:50,731 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:50,759 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-31 22:00:50,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:50,760 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:50,763 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:50,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-31 22:00:50,769 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:50,787 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:50,787 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:50,788 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:50,788 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:50,788 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:50,791 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:50,791 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:50,795 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:50,816 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-10-31 22:00:50,817 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:50,817 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:50,818 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:50,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-31 22:00:50,820 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:50,833 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:50,833 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:50,834 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:50,834 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:50,840 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:00:50,840 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:00:50,849 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:50,871 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2024-10-31 22:00:50,871 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:50,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:50,874 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:50,876 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-10-31 22:00:50,879 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:50,894 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:50,894 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:50,895 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:50,895 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:50,900 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:00:50,900 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:00:50,913 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:50,936 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-10-31 22:00:50,936 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:50,936 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:50,938 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:50,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-10-31 22:00:50,942 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:50,959 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:50,960 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:50,961 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:50,961 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:50,979 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:00:50,979 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:00:51,008 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-31 22:00:51,067 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2024-10-31 22:00:51,068 INFO L444 ModelExtractionUtils]: 1 out of 19 variables were initially zero. Simplification set additionally 14 variables to zero. [2024-10-31 22:00:51,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:51,070 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:51,084 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:51,088 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-10-31 22:00:51,092 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-31 22:00:51,117 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-31 22:00:51,117 INFO L474 LassoAnalysis]: Proved termination. [2024-10-31 22:00:51,118 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 2*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-10-31 22:00:51,158 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-10-31 22:00:51,195 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2024-10-31 22:00:51,217 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-31 22:00:51,218 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-31 22:00:51,225 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2024-10-31 22:00:51,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:51,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:51,277 INFO L255 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-31 22:00:51,279 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:51,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:51,333 INFO L255 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:00:51,334 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:51,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:51,440 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-31 22:00:51,442 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:51,525 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 28 states and 40 transitions. Complement of second has 6 states. [2024-10-31 22:00:51,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-31 22:00:51,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:51,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 23 transitions. [2024-10-31 22:00:51,539 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 5 letters. Loop has 3 letters. [2024-10-31 22:00:51,541 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:00:51,541 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 8 letters. Loop has 3 letters. [2024-10-31 22:00:51,541 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:00:51,542 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 5 letters. Loop has 6 letters. [2024-10-31 22:00:51,542 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:00:51,544 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 40 transitions. [2024-10-31 22:00:51,547 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:51,553 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 12 states and 17 transitions. [2024-10-31 22:00:51,555 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-10-31 22:00:51,555 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-10-31 22:00:51,556 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2024-10-31 22:00:51,557 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:00:51,557 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-31 22:00:51,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2024-10-31 22:00:51,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2024-10-31 22:00:51,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:51,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 17 transitions. [2024-10-31 22:00:51,601 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-31 22:00:51,601 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2024-10-31 22:00:51,601 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:00:51,606 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 17 transitions. [2024-10-31 22:00:51,607 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:51,607 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:51,607 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:51,607 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:51,608 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:00:51,608 INFO L745 eck$LassoCheckResult]: Stem: 109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 110#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 111#L367 assume !(main_~length~0#1 < 1); 103#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 104#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 105#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 108#L370-4 main_~j~0#1 := 0; 107#L378-2 [2024-10-31 22:00:51,608 INFO L747 eck$LassoCheckResult]: Loop: 107#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 106#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 107#L378-2 [2024-10-31 22:00:51,609 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:51,609 INFO L85 PathProgramCache]: Analyzing trace with hash 1806815510, now seen corresponding path program 1 times [2024-10-31 22:00:51,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:51,609 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1188982094] [2024-10-31 22:00:51,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:51,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:51,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:51,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:51,876 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:51,877 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1188982094] [2024-10-31 22:00:51,877 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1188982094] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:00:51,878 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:00:51,878 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:00:51,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994087294] [2024-10-31 22:00:51,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:00:51,882 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:00:51,882 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:51,884 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 1 times [2024-10-31 22:00:51,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:51,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130800315] [2024-10-31 22:00:51,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:51,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:51,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:51,906 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:51,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:51,927 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:52,037 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-10-31 22:00:52,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:52,091 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:00:52,092 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:00:52,094 INFO L87 Difference]: Start difference. First operand 12 states and 17 transitions. cyclomatic complexity: 7 Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:52,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:00:52,144 INFO L93 Difference]: Finished difference Result 14 states and 19 transitions. [2024-10-31 22:00:52,144 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 19 transitions. [2024-10-31 22:00:52,145 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:52,146 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 19 transitions. [2024-10-31 22:00:52,146 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-10-31 22:00:52,147 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-10-31 22:00:52,147 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 19 transitions. [2024-10-31 22:00:52,147 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:00:52,147 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 19 transitions. [2024-10-31 22:00:52,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 19 transitions. [2024-10-31 22:00:52,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2024-10-31 22:00:52,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:52,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 16 transitions. [2024-10-31 22:00:52,154 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 16 transitions. [2024-10-31 22:00:52,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:00:52,155 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2024-10-31 22:00:52,156 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:00:52,156 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 16 transitions. [2024-10-31 22:00:52,157 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:52,157 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:52,157 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:52,158 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:52,158 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:00:52,159 INFO L745 eck$LassoCheckResult]: Stem: 142#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 143#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 144#L367 assume !(main_~length~0#1 < 1); 136#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 137#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 138#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 145#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 147#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 146#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 139#L370-4 main_~j~0#1 := 0; 140#L378-2 [2024-10-31 22:00:52,159 INFO L747 eck$LassoCheckResult]: Loop: 140#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 141#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 140#L378-2 [2024-10-31 22:00:52,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:52,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1982565540, now seen corresponding path program 1 times [2024-10-31 22:00:52,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:52,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383845024] [2024-10-31 22:00:52,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:52,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:52,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:52,185 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:52,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:52,215 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:52,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:52,218 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 2 times [2024-10-31 22:00:52,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:52,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881463725] [2024-10-31 22:00:52,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:52,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:52,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:52,233 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:52,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:52,247 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:52,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:52,251 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996831, now seen corresponding path program 1 times [2024-10-31 22:00:52,252 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:52,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380782301] [2024-10-31 22:00:52,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:52,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:52,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:52,301 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:52,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:52,344 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:52,768 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:00:52,768 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:00:52,768 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:00:52,768 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:00:52,768 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-31 22:00:52,768 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:52,769 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:00:52,769 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:00:52,769 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration3_Lasso [2024-10-31 22:00:52,769 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:00:52,769 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:00:52,771 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:52,776 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:52,779 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:52,782 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:52,785 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:52,788 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:52,792 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:52,796 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:53,024 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:53,027 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:53,030 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:53,376 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:00:53,378 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-31 22:00:53,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,379 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,381 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,382 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-10-31 22:00:53,384 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,399 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,399 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:53,399 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,399 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,399 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,400 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:53,400 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:53,402 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:53,422 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-10-31 22:00:53,422 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,423 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,425 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,427 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-10-31 22:00:53,428 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,445 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,445 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:53,446 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,446 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,446 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,446 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:53,446 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:53,448 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:53,487 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2024-10-31 22:00:53,487 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,487 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,488 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,490 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-10-31 22:00:53,491 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,502 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,502 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:53,503 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,503 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,503 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,503 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:53,503 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:53,505 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:53,518 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2024-10-31 22:00:53,519 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,519 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,520 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,521 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-10-31 22:00:53,522 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,534 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,535 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:53,535 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,535 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,535 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,535 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:53,536 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:53,540 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:53,554 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2024-10-31 22:00:53,555 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,555 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,557 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,558 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-10-31 22:00:53,559 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,571 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,571 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:53,571 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,571 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,571 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,572 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:53,572 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:53,573 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:53,587 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-10-31 22:00:53,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,588 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,590 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,591 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-10-31 22:00:53,592 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,605 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,605 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:53,605 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,605 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,605 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,606 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:53,606 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:53,608 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:53,621 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2024-10-31 22:00:53,621 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,622 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,623 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,624 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-10-31 22:00:53,625 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,636 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,636 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:00:53,636 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,636 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,636 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,637 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:00:53,637 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:00:53,638 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:00:53,650 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2024-10-31 22:00:53,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,651 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,652 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,653 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-10-31 22:00:53,654 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:00:53,666 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:00:53,666 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:00:53,666 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:00:53,666 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:00:53,674 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:00:53,674 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:00:53,687 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-31 22:00:53,731 INFO L443 ModelExtractionUtils]: Simplification made 18 calls to the SMT solver. [2024-10-31 22:00:53,731 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 14 variables to zero. [2024-10-31 22:00:53,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,731 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:53,733 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:53,736 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-10-31 22:00:53,737 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-31 22:00:53,754 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-10-31 22:00:53,754 INFO L474 LassoAnalysis]: Proved termination. [2024-10-31 22:00:53,755 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~j~0#1, v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2) = -2*ULTIMATE.start_main_~j~0#1 + 1*v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2 Supporting invariants [-2*ULTIMATE.start_main_~length~0#1 + 1*v_rep(select #length ULTIMATE.start_main_#t~malloc206#1.base)_2 >= 0] [2024-10-31 22:00:53,774 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-10-31 22:00:53,792 INFO L156 tatePredicateManager]: 3 out of 4 supporting invariants were superfluous and have been removed [2024-10-31 22:00:53,796 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-31 22:00:53,796 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-31 22:00:53,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:53,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:53,850 INFO L255 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-10-31 22:00:53,851 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:54,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:54,103 INFO L255 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:00:54,103 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:54,107 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-10-31 22:00:54,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:54,149 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.6 stem predicates 2 loop predicates [2024-10-31 22:00:54,150 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6 Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:54,387 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6. Second operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 16 states and 22 transitions. Complement of second has 10 states. [2024-10-31 22:00:54,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 8 states 6 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-31 22:00:54,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:54,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 15 transitions. [2024-10-31 22:00:54,389 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 10 letters. Loop has 2 letters. [2024-10-31 22:00:54,389 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:00:54,389 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 12 letters. Loop has 2 letters. [2024-10-31 22:00:54,389 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:00:54,389 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 15 transitions. Stem has 10 letters. Loop has 4 letters. [2024-10-31 22:00:54,390 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:00:54,392 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 22 transitions. [2024-10-31 22:00:54,395 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:54,397 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 22 transitions. [2024-10-31 22:00:54,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2024-10-31 22:00:54,397 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2024-10-31 22:00:54,398 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 22 transitions. [2024-10-31 22:00:54,398 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:00:54,398 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-31 22:00:54,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 22 transitions. [2024-10-31 22:00:54,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2024-10-31 22:00:54,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:54,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2024-10-31 22:00:54,400 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-31 22:00:54,400 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-10-31 22:00:54,400 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:00:54,400 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2024-10-31 22:00:54,401 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:54,401 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:54,401 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:54,401 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:54,401 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:00:54,402 INFO L745 eck$LassoCheckResult]: Stem: 269#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 270#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 268#L367 assume !(main_~length~0#1 < 1); 259#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 260#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 261#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 271#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 274#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 272#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 266#L370-4 main_~j~0#1 := 0; 267#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 262#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 263#L378-2 [2024-10-31 22:00:54,402 INFO L747 eck$LassoCheckResult]: Loop: 263#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 273#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 263#L378-2 [2024-10-31 22:00:54,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:54,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996833, now seen corresponding path program 1 times [2024-10-31 22:00:54,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:54,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828049962] [2024-10-31 22:00:54,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:54,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:54,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:55,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:55,021 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:55,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828049962] [2024-10-31 22:00:55,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [828049962] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:00:55,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1824393087] [2024-10-31 22:00:55,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:55,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:00:55,022 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:55,025 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:00:55,026 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-10-31 22:00:55,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:55,084 INFO L255 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-10-31 22:00:55,085 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:55,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-31 22:00:55,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-31 22:00:55,214 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:55,214 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:00:55,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-31 22:00:55,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-31 22:00:55,316 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:55,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1824393087] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:00:55,317 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:00:55,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2024-10-31 22:00:55,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015149642] [2024-10-31 22:00:55,317 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:00:55,318 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:00:55,318 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:55,318 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 3 times [2024-10-31 22:00:55,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:55,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818602500] [2024-10-31 22:00:55,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:55,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:55,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:55,328 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:55,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:55,336 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:55,399 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:55,399 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-10-31 22:00:55,400 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2024-10-31 22:00:55,400 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 9 Second operand has 16 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:55,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:00:55,575 INFO L93 Difference]: Finished difference Result 30 states and 41 transitions. [2024-10-31 22:00:55,576 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 41 transitions. [2024-10-31 22:00:55,576 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:00:55,579 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 29 states and 40 transitions. [2024-10-31 22:00:55,579 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-31 22:00:55,579 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-31 22:00:55,580 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 40 transitions. [2024-10-31 22:00:55,580 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:00:55,580 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 40 transitions. [2024-10-31 22:00:55,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 40 transitions. [2024-10-31 22:00:55,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2024-10-31 22:00:55,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:55,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2024-10-31 22:00:55,585 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2024-10-31 22:00:55,586 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-31 22:00:55,587 INFO L425 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2024-10-31 22:00:55,587 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-31 22:00:55,589 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2024-10-31 22:00:55,590 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:55,590 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:55,590 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:55,590 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:55,590 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:00:55,591 INFO L745 eck$LassoCheckResult]: Stem: 405#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 406#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 407#L367 assume !(main_~length~0#1 < 1); 396#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 397#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 398#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 408#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 411#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 416#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 415#L370-4 main_~j~0#1 := 0; 414#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 403#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 404#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 401#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 402#L378-2 [2024-10-31 22:00:55,591 INFO L747 eck$LassoCheckResult]: Loop: 402#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 412#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 402#L378-2 [2024-10-31 22:00:55,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:55,591 INFO L85 PathProgramCache]: Analyzing trace with hash -645453020, now seen corresponding path program 1 times [2024-10-31 22:00:55,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:55,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1483991505] [2024-10-31 22:00:55,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:55,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:55,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:55,727 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:55,727 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:55,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1483991505] [2024-10-31 22:00:55,727 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1483991505] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:00:55,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2064452529] [2024-10-31 22:00:55,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:55,728 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:00:55,731 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:55,733 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:00:55,734 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-10-31 22:00:55,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:55,794 INFO L255 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:00:55,795 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:55,864 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:55,865 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:00:55,918 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:55,918 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2064452529] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:00:55,919 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:00:55,919 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2024-10-31 22:00:55,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450979486] [2024-10-31 22:00:55,919 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:00:55,919 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:00:55,920 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:55,920 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 4 times [2024-10-31 22:00:55,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:55,920 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911104206] [2024-10-31 22:00:55,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:55,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:55,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:55,926 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:55,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:55,931 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:56,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:56,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-10-31 22:00:56,008 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-10-31 22:00:56,008 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 13 Second operand has 11 states, 11 states have (on average 2.272727272727273) internal successors, (25), 11 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:56,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:00:56,129 INFO L93 Difference]: Finished difference Result 48 states and 64 transitions. [2024-10-31 22:00:56,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 64 transitions. [2024-10-31 22:00:56,133 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:00:56,134 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 43 states and 57 transitions. [2024-10-31 22:00:56,135 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2024-10-31 22:00:56,135 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2024-10-31 22:00:56,135 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 57 transitions. [2024-10-31 22:00:56,136 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:00:56,136 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 57 transitions. [2024-10-31 22:00:56,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 57 transitions. [2024-10-31 22:00:56,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 37. [2024-10-31 22:00:56,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3513513513513513) internal successors, (50), 36 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:56,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 50 transitions. [2024-10-31 22:00:56,142 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 50 transitions. [2024-10-31 22:00:56,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-31 22:00:56,143 INFO L425 stractBuchiCegarLoop]: Abstraction has 37 states and 50 transitions. [2024-10-31 22:00:56,144 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-31 22:00:56,144 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 50 transitions. [2024-10-31 22:00:56,144 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:00:56,144 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:56,145 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:56,145 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:56,145 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:00:56,145 INFO L745 eck$LassoCheckResult]: Stem: 575#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 576#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 573#L367 assume main_~length~0#1 < 1;main_~length~0#1 := 1; 564#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 565#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 597#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 595#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 591#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 592#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 590#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 589#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 587#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 568#L370-4 main_~j~0#1 := 0; 569#L378-2 [2024-10-31 22:00:56,145 INFO L747 eck$LassoCheckResult]: Loop: 569#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 570#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 569#L378-2 [2024-10-31 22:00:56,146 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:56,146 INFO L85 PathProgramCache]: Analyzing trace with hash 1080825110, now seen corresponding path program 1 times [2024-10-31 22:00:56,146 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:56,146 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89658858] [2024-10-31 22:00:56,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:56,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:56,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:56,225 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:56,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:56,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89658858] [2024-10-31 22:00:56,226 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [89658858] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:00:56,226 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [654565727] [2024-10-31 22:00:56,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:56,226 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:00:56,229 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:56,231 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:00:56,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-10-31 22:00:56,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:56,295 INFO L255 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-31 22:00:56,295 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:56,338 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:56,339 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:00:56,339 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [654565727] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:00:56,339 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:00:56,339 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2024-10-31 22:00:56,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54667695] [2024-10-31 22:00:56,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:00:56,340 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:00:56,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:56,341 INFO L85 PathProgramCache]: Analyzing trace with hash 2310, now seen corresponding path program 1 times [2024-10-31 22:00:56,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:56,341 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161271083] [2024-10-31 22:00:56,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:56,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:56,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:56,346 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:56,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:56,350 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:56,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:56,420 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:00:56,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:00:56,420 INFO L87 Difference]: Start difference. First operand 37 states and 50 transitions. cyclomatic complexity: 20 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:56,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:00:56,452 INFO L93 Difference]: Finished difference Result 30 states and 39 transitions. [2024-10-31 22:00:56,453 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 39 transitions. [2024-10-31 22:00:56,453 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:56,454 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 24 states and 32 transitions. [2024-10-31 22:00:56,454 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-31 22:00:56,454 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-31 22:00:56,454 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 32 transitions. [2024-10-31 22:00:56,454 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:00:56,454 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-31 22:00:56,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 32 transitions. [2024-10-31 22:00:56,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2024-10-31 22:00:56,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.3333333333333333) internal successors, (32), 23 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:56,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2024-10-31 22:00:56,457 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-31 22:00:56,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-31 22:00:56,458 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2024-10-31 22:00:56,458 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-31 22:00:56,458 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 32 transitions. [2024-10-31 22:00:56,458 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:00:56,459 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:56,459 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:56,459 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:56,459 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:00:56,459 INFO L745 eck$LassoCheckResult]: Stem: 686#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 687#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 688#L367 assume !(main_~length~0#1 < 1); 677#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 678#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 679#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 689#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 693#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 690#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 691#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 699#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 696#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 684#L370-4 main_~j~0#1 := 0; 685#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 680#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 681#L378-2 [2024-10-31 22:00:56,459 INFO L747 eck$LassoCheckResult]: Loop: 681#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 692#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 681#L378-2 [2024-10-31 22:00:56,460 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:56,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1295959587, now seen corresponding path program 1 times [2024-10-31 22:00:56,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:56,460 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56419091] [2024-10-31 22:00:56,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:56,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:56,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:57,159 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:57,159 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:57,160 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [56419091] [2024-10-31 22:00:57,160 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [56419091] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:00:57,160 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1275664026] [2024-10-31 22:00:57,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:57,160 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:00:57,161 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:57,163 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:00:57,166 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-10-31 22:00:57,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:57,237 INFO L255 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-10-31 22:00:57,241 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:00:57,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-31 22:00:57,361 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2024-10-31 22:00:57,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2024-10-31 22:00:57,387 INFO L349 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2024-10-31 22:00:57,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2024-10-31 22:00:58,228 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-31 22:00:58,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 12 [2024-10-31 22:00:58,248 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:58,248 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:00:58,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-31 22:00:58,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-31 22:00:58,469 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:00:58,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1275664026] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:00:58,470 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:00:58,470 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7] total 21 [2024-10-31 22:00:58,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523846072] [2024-10-31 22:00:58,471 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:00:58,471 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:00:58,471 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:58,472 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 5 times [2024-10-31 22:00:58,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:58,472 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1314086450] [2024-10-31 22:00:58,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:58,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:58,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:58,477 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:58,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:58,482 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:58,552 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:58,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-10-31 22:00:58,553 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=358, Unknown=2, NotChecked=0, Total=462 [2024-10-31 22:00:58,554 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. cyclomatic complexity: 12 Second operand has 22 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:00,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:00,294 INFO L93 Difference]: Finished difference Result 37 states and 47 transitions. [2024-10-31 22:01:00,295 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 47 transitions. [2024-10-31 22:01:00,295 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:01:00,296 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 35 states and 45 transitions. [2024-10-31 22:01:00,297 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-31 22:01:00,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-31 22:01:00,297 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 45 transitions. [2024-10-31 22:01:00,298 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:00,298 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 45 transitions. [2024-10-31 22:01:00,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 45 transitions. [2024-10-31 22:01:00,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 19. [2024-10-31 22:01:00,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:00,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2024-10-31 22:01:00,301 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 24 transitions. [2024-10-31 22:01:00,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-10-31 22:01:00,302 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 24 transitions. [2024-10-31 22:01:00,302 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-31 22:01:00,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 24 transitions. [2024-10-31 22:01:00,303 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:00,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:00,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:00,303 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:00,303 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:00,303 INFO L745 eck$LassoCheckResult]: Stem: 870#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 871#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 872#L367 assume !(main_~length~0#1 < 1); 861#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 862#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 863#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 873#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 879#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 874#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 875#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 876#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 878#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 864#L370-4 main_~j~0#1 := 0; 865#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 868#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 869#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 866#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 867#L378-2 [2024-10-31 22:01:00,303 INFO L747 eck$LassoCheckResult]: Loop: 867#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 877#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 867#L378-2 [2024-10-31 22:01:00,304 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:00,304 INFO L85 PathProgramCache]: Analyzing trace with hash -685994466, now seen corresponding path program 2 times [2024-10-31 22:01:00,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:00,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263592843] [2024-10-31 22:01:00,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:00,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:00,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:00,836 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:00,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:00,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1263592843] [2024-10-31 22:01:00,838 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1263592843] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:00,838 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1330572086] [2024-10-31 22:01:00,838 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:01:00,838 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:00,838 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:00,841 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:00,842 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-10-31 22:01:00,910 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-31 22:01:00,911 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:01:00,912 INFO L255 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-10-31 22:01:00,914 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:01,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-31 22:01:01,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-31 22:01:01,205 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:01,206 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:01,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-31 22:01:01,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-31 22:01:01,359 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:01,362 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1330572086] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:01,363 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:01,363 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 18 [2024-10-31 22:01:01,363 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [303858442] [2024-10-31 22:01:01,363 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:01,363 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:01,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:01,364 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 6 times [2024-10-31 22:01:01,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:01,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556131867] [2024-10-31 22:01:01,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:01,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:01,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:01,370 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:01,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:01,376 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:01,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:01,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-10-31 22:01:01,445 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2024-10-31 22:01:01,446 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. cyclomatic complexity: 8 Second operand has 19 states, 18 states have (on average 2.0) internal successors, (36), 19 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:01,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:01,690 INFO L93 Difference]: Finished difference Result 35 states and 45 transitions. [2024-10-31 22:01:01,691 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 45 transitions. [2024-10-31 22:01:01,691 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:01:01,692 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 34 states and 44 transitions. [2024-10-31 22:01:01,692 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-31 22:01:01,692 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-31 22:01:01,692 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 44 transitions. [2024-10-31 22:01:01,692 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:01,693 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 44 transitions. [2024-10-31 22:01:01,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 44 transitions. [2024-10-31 22:01:01,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2024-10-31 22:01:01,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.2962962962962963) internal successors, (35), 26 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:01,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 35 transitions. [2024-10-31 22:01:01,696 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 35 transitions. [2024-10-31 22:01:01,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-31 22:01:01,697 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 35 transitions. [2024-10-31 22:01:01,697 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-10-31 22:01:01,697 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 35 transitions. [2024-10-31 22:01:01,698 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:01,698 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:01,698 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:01,699 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:01,699 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:01,699 INFO L745 eck$LassoCheckResult]: Stem: 1050#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1051#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1052#L367 assume !(main_~length~0#1 < 1); 1041#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1042#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1043#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1053#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1061#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1054#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1055#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1056#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1058#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1059#L370-4 main_~j~0#1 := 0; 1064#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1063#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1057#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1048#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1049#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1046#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1047#L378-2 [2024-10-31 22:01:01,699 INFO L747 eck$LassoCheckResult]: Loop: 1047#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1062#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1047#L378-2 [2024-10-31 22:01:01,700 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:01,700 INFO L85 PathProgramCache]: Analyzing trace with hash -2110686111, now seen corresponding path program 3 times [2024-10-31 22:01:01,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:01,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283619418] [2024-10-31 22:01:01,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:01,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:01,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:01,840 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:01,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:01,840 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283619418] [2024-10-31 22:01:01,840 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [283619418] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:01,840 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [78560340] [2024-10-31 22:01:01,840 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 22:01:01,840 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:01,841 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:01,844 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:01,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-10-31 22:01:01,926 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-10-31 22:01:01,926 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:01:01,927 INFO L255 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:01:01,928 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:02,019 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:02,019 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:02,097 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:02,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [78560340] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:02,098 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:02,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 14 [2024-10-31 22:01:02,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2023419683] [2024-10-31 22:01:02,099 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:02,100 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:02,100 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:02,100 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 7 times [2024-10-31 22:01:02,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:02,101 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383529183] [2024-10-31 22:01:02,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:02,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:02,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:02,148 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:02,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:02,153 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:02,224 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:02,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-10-31 22:01:02,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2024-10-31 22:01:02,225 INFO L87 Difference]: Start difference. First operand 27 states and 35 transitions. cyclomatic complexity: 12 Second operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:02,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:02,324 INFO L93 Difference]: Finished difference Result 38 states and 47 transitions. [2024-10-31 22:01:02,324 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 47 transitions. [2024-10-31 22:01:02,325 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:02,325 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 32 states and 41 transitions. [2024-10-31 22:01:02,325 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-31 22:01:02,325 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-31 22:01:02,326 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 41 transitions. [2024-10-31 22:01:02,326 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:02,326 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-31 22:01:02,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 41 transitions. [2024-10-31 22:01:02,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 29. [2024-10-31 22:01:02,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 28 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:02,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2024-10-31 22:01:02,332 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 37 transitions. [2024-10-31 22:01:02,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-31 22:01:02,333 INFO L425 stractBuchiCegarLoop]: Abstraction has 29 states and 37 transitions. [2024-10-31 22:01:02,333 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-10-31 22:01:02,334 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 37 transitions. [2024-10-31 22:01:02,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:02,334 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:02,334 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:02,335 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:02,335 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:02,335 INFO L745 eck$LassoCheckResult]: Stem: 1240#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1241#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1242#L367 assume !(main_~length~0#1 < 1); 1231#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1232#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1233#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1243#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1246#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1244#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1245#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1259#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1258#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1253#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1257#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1254#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1234#L370-4 main_~j~0#1 := 0; 1235#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1238#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1239#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1236#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1237#L378-2 [2024-10-31 22:01:02,335 INFO L747 eck$LassoCheckResult]: Loop: 1237#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1248#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1237#L378-2 [2024-10-31 22:01:02,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:02,335 INFO L85 PathProgramCache]: Analyzing trace with hash -761055450, now seen corresponding path program 1 times [2024-10-31 22:01:02,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:02,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451612804] [2024-10-31 22:01:02,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:02,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:02,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:02,927 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:02,930 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:02,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451612804] [2024-10-31 22:01:02,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451612804] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:02,931 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1600367783] [2024-10-31 22:01:02,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:02,931 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:02,931 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:02,936 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:02,938 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-10-31 22:01:03,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:03,020 INFO L255 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-10-31 22:01:03,023 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:03,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-31 22:01:03,124 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-31 22:01:03,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2024-10-31 22:01:03,152 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-31 22:01:03,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2024-10-31 22:01:04,271 INFO L349 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2024-10-31 22:01:04,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 12 [2024-10-31 22:01:04,294 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:04,294 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:04,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-31 22:01:04,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-31 22:01:04,519 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:01:04,520 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1600367783] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:04,520 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:04,520 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 9] total 18 [2024-10-31 22:01:04,520 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254248762] [2024-10-31 22:01:04,521 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:04,521 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:04,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:04,522 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 8 times [2024-10-31 22:01:04,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:04,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210071197] [2024-10-31 22:01:04,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:04,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:04,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:04,531 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:04,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:04,536 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:04,602 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:04,603 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-10-31 22:01:04,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=269, Unknown=1, NotChecked=0, Total=342 [2024-10-31 22:01:04,603 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. cyclomatic complexity: 12 Second operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 19 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:06,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:06,043 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-10-31 22:01:06,043 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 57 transitions. [2024-10-31 22:01:06,044 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:01:06,044 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 44 states and 55 transitions. [2024-10-31 22:01:06,044 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-31 22:01:06,044 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-31 22:01:06,044 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 55 transitions. [2024-10-31 22:01:06,045 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:06,045 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 55 transitions. [2024-10-31 22:01:06,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 55 transitions. [2024-10-31 22:01:06,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 24. [2024-10-31 22:01:06,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.25) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:06,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 30 transitions. [2024-10-31 22:01:06,047 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 30 transitions. [2024-10-31 22:01:06,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-31 22:01:06,052 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 30 transitions. [2024-10-31 22:01:06,052 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-10-31 22:01:06,052 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 30 transitions. [2024-10-31 22:01:06,052 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:06,052 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:06,052 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:06,053 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:06,053 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:06,053 INFO L745 eck$LassoCheckResult]: Stem: 1459#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1460#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1461#L367 assume !(main_~length~0#1 < 1); 1450#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1451#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1452#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1462#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1471#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1463#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1464#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1465#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1467#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1469#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1470#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1468#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1453#L370-4 main_~j~0#1 := 0; 1454#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1457#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1458#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1466#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1473#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1455#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1456#L378-2 [2024-10-31 22:01:06,053 INFO L747 eck$LassoCheckResult]: Loop: 1456#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1472#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1456#L378-2 [2024-10-31 22:01:06,053 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:06,054 INFO L85 PathProgramCache]: Analyzing trace with hash -1622874713, now seen corresponding path program 4 times [2024-10-31 22:01:06,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:06,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593268481] [2024-10-31 22:01:06,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:06,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:06,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:06,632 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:06,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:06,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593268481] [2024-10-31 22:01:06,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1593268481] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:06,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [750893281] [2024-10-31 22:01:06,632 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-31 22:01:06,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:06,633 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:06,636 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:06,637 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2024-10-31 22:01:06,713 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-31 22:01:06,714 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:01:06,715 INFO L255 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-10-31 22:01:06,717 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:06,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-31 22:01:06,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2024-10-31 22:01:06,869 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:06,870 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:07,020 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-31 22:01:07,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-31 22:01:07,039 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:07,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [750893281] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:07,039 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:07,039 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2024-10-31 22:01:07,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1440924073] [2024-10-31 22:01:07,039 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:07,040 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:07,040 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:07,040 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 9 times [2024-10-31 22:01:07,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:07,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263142957] [2024-10-31 22:01:07,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:07,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:07,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:07,046 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:07,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:07,050 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:07,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:07,114 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-10-31 22:01:07,114 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2024-10-31 22:01:07,114 INFO L87 Difference]: Start difference. First operand 24 states and 30 transitions. cyclomatic complexity: 9 Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 17 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:07,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:07,354 INFO L93 Difference]: Finished difference Result 42 states and 53 transitions. [2024-10-31 22:01:07,354 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 53 transitions. [2024-10-31 22:01:07,355 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:01:07,357 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 41 states and 52 transitions. [2024-10-31 22:01:07,357 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-31 22:01:07,357 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-31 22:01:07,357 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 52 transitions. [2024-10-31 22:01:07,357 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:07,357 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 52 transitions. [2024-10-31 22:01:07,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 52 transitions. [2024-10-31 22:01:07,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 32. [2024-10-31 22:01:07,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.28125) internal successors, (41), 31 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:07,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 41 transitions. [2024-10-31 22:01:07,364 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-31 22:01:07,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-31 22:01:07,366 INFO L425 stractBuchiCegarLoop]: Abstraction has 32 states and 41 transitions. [2024-10-31 22:01:07,366 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-10-31 22:01:07,366 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 41 transitions. [2024-10-31 22:01:07,366 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:07,367 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:07,367 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:07,367 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:07,367 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:07,367 INFO L745 eck$LassoCheckResult]: Stem: 1673#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1674#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1675#L367 assume !(main_~length~0#1 < 1); 1664#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1665#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1666#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1676#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1682#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1683#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1688#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1689#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1677#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1678#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1679#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1687#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1667#L370-4 main_~j~0#1 := 0; 1668#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1693#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1692#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1671#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1672#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1681#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1690#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1669#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1670#L378-2 [2024-10-31 22:01:07,368 INFO L747 eck$LassoCheckResult]: Loop: 1670#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1691#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1670#L378-2 [2024-10-31 22:01:07,368 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:07,368 INFO L85 PathProgramCache]: Analyzing trace with hash -509471318, now seen corresponding path program 5 times [2024-10-31 22:01:07,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:07,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031733179] [2024-10-31 22:01:07,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:07,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:07,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:07,531 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:07,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:07,531 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031733179] [2024-10-31 22:01:07,531 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031733179] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:07,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1613989174] [2024-10-31 22:01:07,532 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-31 22:01:07,532 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:07,532 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:07,534 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:07,536 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2024-10-31 22:01:07,629 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2024-10-31 22:01:07,629 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:01:07,630 INFO L255 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-10-31 22:01:07,631 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:07,735 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:07,735 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:07,816 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:07,816 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1613989174] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:07,817 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:07,817 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 17 [2024-10-31 22:01:07,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1845718502] [2024-10-31 22:01:07,817 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:07,817 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:07,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:07,818 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 10 times [2024-10-31 22:01:07,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:07,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [758855768] [2024-10-31 22:01:07,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:07,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:07,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:07,822 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:07,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:07,825 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:07,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:07,887 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-10-31 22:01:07,887 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2024-10-31 22:01:07,888 INFO L87 Difference]: Start difference. First operand 32 states and 41 transitions. cyclomatic complexity: 13 Second operand has 17 states, 17 states have (on average 2.235294117647059) internal successors, (38), 17 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:08,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:08,004 INFO L93 Difference]: Finished difference Result 45 states and 55 transitions. [2024-10-31 22:01:08,004 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 55 transitions. [2024-10-31 22:01:08,004 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:08,005 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 37 states and 47 transitions. [2024-10-31 22:01:08,005 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-31 22:01:08,005 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-31 22:01:08,005 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 47 transitions. [2024-10-31 22:01:08,005 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:08,005 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-31 22:01:08,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 47 transitions. [2024-10-31 22:01:08,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 34. [2024-10-31 22:01:08,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:08,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 43 transitions. [2024-10-31 22:01:08,010 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 43 transitions. [2024-10-31 22:01:08,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-31 22:01:08,011 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 43 transitions. [2024-10-31 22:01:08,011 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-10-31 22:01:08,011 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 43 transitions. [2024-10-31 22:01:08,011 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:08,012 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:08,012 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:08,012 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:08,012 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:08,012 INFO L745 eck$LassoCheckResult]: Stem: 1909#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1910#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1908#L367 assume !(main_~length~0#1 < 1); 1899#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1900#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1901#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1911#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1914#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1912#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1913#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1932#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1931#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1930#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 1929#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1928#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1923#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1927#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 1925#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1921#L370-4 main_~j~0#1 := 0; 1920#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1915#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1919#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1917#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1916#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1904#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1905#L378-2 [2024-10-31 22:01:08,012 INFO L747 eck$LassoCheckResult]: Loop: 1905#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1918#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1905#L378-2 [2024-10-31 22:01:08,013 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:08,013 INFO L85 PathProgramCache]: Analyzing trace with hash 1285147747, now seen corresponding path program 2 times [2024-10-31 22:01:08,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:08,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653064244] [2024-10-31 22:01:08,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:08,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:08,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:08,657 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:08,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:08,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1653064244] [2024-10-31 22:01:08,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1653064244] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:08,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [938088578] [2024-10-31 22:01:08,658 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:01:08,659 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:08,659 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:08,661 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:08,663 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2024-10-31 22:01:08,750 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-31 22:01:08,750 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:01:08,752 INFO L255 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-10-31 22:01:08,755 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:08,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-31 22:01:09,004 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-31 22:01:09,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2024-10-31 22:01:09,021 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-31 22:01:09,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2024-10-31 22:01:09,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-31 22:01:09,401 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-31 22:01:09,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 12 [2024-10-31 22:01:09,420 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:09,421 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:09,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-31 22:01:09,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-31 22:01:09,699 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:01:09,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [938088578] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:09,699 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:09,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 11] total 26 [2024-10-31 22:01:09,700 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111447882] [2024-10-31 22:01:09,700 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:09,700 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:09,701 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:09,701 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 11 times [2024-10-31 22:01:09,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:09,701 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010328078] [2024-10-31 22:01:09,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:09,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:09,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:09,706 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:09,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:09,711 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:09,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:09,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-31 22:01:09,781 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=586, Unknown=0, NotChecked=0, Total=702 [2024-10-31 22:01:09,781 INFO L87 Difference]: Start difference. First operand 34 states and 43 transitions. cyclomatic complexity: 13 Second operand has 27 states, 26 states have (on average 2.0384615384615383) internal successors, (53), 27 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:10,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:10,313 INFO L93 Difference]: Finished difference Result 55 states and 67 transitions. [2024-10-31 22:01:10,313 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 67 transitions. [2024-10-31 22:01:10,313 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:01:10,314 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 53 states and 65 transitions. [2024-10-31 22:01:10,316 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-10-31 22:01:10,316 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-10-31 22:01:10,316 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 65 transitions. [2024-10-31 22:01:10,316 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:10,316 INFO L218 hiAutomatonCegarLoop]: Abstraction has 53 states and 65 transitions. [2024-10-31 22:01:10,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 65 transitions. [2024-10-31 22:01:10,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 29. [2024-10-31 22:01:10,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2413793103448276) internal successors, (36), 28 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:10,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 36 transitions. [2024-10-31 22:01:10,322 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 36 transitions. [2024-10-31 22:01:10,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-31 22:01:10,323 INFO L425 stractBuchiCegarLoop]: Abstraction has 29 states and 36 transitions. [2024-10-31 22:01:10,323 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-10-31 22:01:10,323 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 36 transitions. [2024-10-31 22:01:10,323 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:10,323 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:10,323 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:10,324 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:10,324 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:10,324 INFO L745 eck$LassoCheckResult]: Stem: 2185#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2186#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2187#L367 assume !(main_~length~0#1 < 1); 2176#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2177#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2178#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2188#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2200#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2189#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2190#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2191#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2193#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2199#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2198#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2197#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2195#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2196#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2194#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2179#L370-4 main_~j~0#1 := 0; 2180#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2183#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2184#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2192#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2204#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2202#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2201#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2181#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2182#L378-2 [2024-10-31 22:01:10,324 INFO L747 eck$LassoCheckResult]: Loop: 2182#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2203#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2182#L378-2 [2024-10-31 22:01:10,325 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:10,325 INFO L85 PathProgramCache]: Analyzing trace with hash -1665431516, now seen corresponding path program 6 times [2024-10-31 22:01:10,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:10,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963975977] [2024-10-31 22:01:10,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:10,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:10,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:10,862 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:10,863 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:10,863 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963975977] [2024-10-31 22:01:10,863 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [963975977] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:10,863 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1222660727] [2024-10-31 22:01:10,864 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-31 22:01:10,864 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:10,864 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:10,866 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:10,868 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2024-10-31 22:01:10,958 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2024-10-31 22:01:10,958 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:01:10,959 INFO L255 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-10-31 22:01:10,963 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:11,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-10-31 22:01:11,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-10-31 22:01:11,427 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:11,427 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:11,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2024-10-31 22:01:11,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2024-10-31 22:01:11,701 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:11,702 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1222660727] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:11,702 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:11,702 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 26 [2024-10-31 22:01:11,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956778373] [2024-10-31 22:01:11,702 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:11,702 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:11,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:11,703 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 12 times [2024-10-31 22:01:11,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:11,703 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105694866] [2024-10-31 22:01:11,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:11,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:11,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:11,713 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:11,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:11,721 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:11,815 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:11,816 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-31 22:01:11,816 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=609, Unknown=0, NotChecked=0, Total=702 [2024-10-31 22:01:11,816 INFO L87 Difference]: Start difference. First operand 29 states and 36 transitions. cyclomatic complexity: 10 Second operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 27 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:12,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:12,301 INFO L93 Difference]: Finished difference Result 49 states and 61 transitions. [2024-10-31 22:01:12,301 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 61 transitions. [2024-10-31 22:01:12,302 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2024-10-31 22:01:12,302 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 48 states and 60 transitions. [2024-10-31 22:01:12,302 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-31 22:01:12,303 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-31 22:01:12,303 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 60 transitions. [2024-10-31 22:01:12,303 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:12,303 INFO L218 hiAutomatonCegarLoop]: Abstraction has 48 states and 60 transitions. [2024-10-31 22:01:12,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 60 transitions. [2024-10-31 22:01:12,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 37. [2024-10-31 22:01:12,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:12,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 47 transitions. [2024-10-31 22:01:12,308 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-31 22:01:12,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-31 22:01:12,310 INFO L425 stractBuchiCegarLoop]: Abstraction has 37 states and 47 transitions. [2024-10-31 22:01:12,310 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-10-31 22:01:12,310 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 47 transitions. [2024-10-31 22:01:12,311 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:12,311 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:12,311 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:12,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:12,313 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:12,314 INFO L745 eck$LassoCheckResult]: Stem: 2457#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2458#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2459#L367 assume !(main_~length~0#1 < 1); 2448#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2449#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2450#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2460#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2477#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2461#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2462#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2465#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2466#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2476#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2475#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2474#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2473#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2469#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2467#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2455#L370-4 main_~j~0#1 := 0; 2456#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2480#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2464#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2453#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2454#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2479#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2478#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2472#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2471#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2451#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2452#L378-2 [2024-10-31 22:01:12,314 INFO L747 eck$LassoCheckResult]: Loop: 2452#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2470#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2452#L378-2 [2024-10-31 22:01:12,314 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:12,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1543113959, now seen corresponding path program 7 times [2024-10-31 22:01:12,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:12,315 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646093540] [2024-10-31 22:01:12,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:12,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:12,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:12,559 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 13 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:12,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:12,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646093540] [2024-10-31 22:01:12,559 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646093540] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:12,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1343811480] [2024-10-31 22:01:12,560 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-10-31 22:01:12,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:12,560 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:12,562 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:12,568 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2024-10-31 22:01:12,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:12,712 INFO L255 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-31 22:01:12,714 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:12,887 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:12,887 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:01:13,003 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:13,003 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1343811480] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:01:13,004 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:01:13,004 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 20 [2024-10-31 22:01:13,004 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [681463616] [2024-10-31 22:01:13,004 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:01:13,004 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:01:13,005 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:13,005 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 13 times [2024-10-31 22:01:13,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:13,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650622312] [2024-10-31 22:01:13,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:13,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:13,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:13,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:01:13,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:01:13,014 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:01:13,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:01:13,074 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-10-31 22:01:13,074 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2024-10-31 22:01:13,074 INFO L87 Difference]: Start difference. First operand 37 states and 47 transitions. cyclomatic complexity: 14 Second operand has 20 states, 20 states have (on average 2.3) internal successors, (46), 20 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:13,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:01:13,206 INFO L93 Difference]: Finished difference Result 52 states and 63 transitions. [2024-10-31 22:01:13,206 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 63 transitions. [2024-10-31 22:01:13,207 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:13,207 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 42 states and 53 transitions. [2024-10-31 22:01:13,207 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2024-10-31 22:01:13,207 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2024-10-31 22:01:13,208 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42 states and 53 transitions. [2024-10-31 22:01:13,208 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-10-31 22:01:13,208 INFO L218 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2024-10-31 22:01:13,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states and 53 transitions. [2024-10-31 22:01:13,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 39. [2024-10-31 22:01:13,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.2564102564102564) internal successors, (49), 38 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:01:13,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 49 transitions. [2024-10-31 22:01:13,214 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 49 transitions. [2024-10-31 22:01:13,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-31 22:01:13,218 INFO L425 stractBuchiCegarLoop]: Abstraction has 39 states and 49 transitions. [2024-10-31 22:01:13,218 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-10-31 22:01:13,218 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 49 transitions. [2024-10-31 22:01:13,218 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2024-10-31 22:01:13,218 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:01:13,218 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:01:13,219 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:01:13,219 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:01:13,219 INFO L745 eck$LassoCheckResult]: Stem: 2737#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2738#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2739#L367 assume !(main_~length~0#1 < 1); 2728#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2729#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2730#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2740#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2743#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2741#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2742#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2766#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2765#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2764#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2763#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2762#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2761#L372 assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1; 2760#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2759#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2754#L372 assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2758#L370-2 main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1; 2755#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2752#L370-4 main_~j~0#1 := 0; 2751#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2744#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2750#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2749#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2748#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2746#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2745#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2733#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2734#L378-2 [2024-10-31 22:01:13,219 INFO L747 eck$LassoCheckResult]: Loop: 2734#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2747#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2734#L378-2 [2024-10-31 22:01:13,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:01:13,220 INFO L85 PathProgramCache]: Analyzing trace with hash -2086076244, now seen corresponding path program 3 times [2024-10-31 22:01:13,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:01:13,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470667996] [2024-10-31 22:01:13,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:01:13,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:01:13,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:01:14,036 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:01:14,036 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:01:14,036 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470667996] [2024-10-31 22:01:14,037 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470667996] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:01:14,037 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1806445598] [2024-10-31 22:01:14,037 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 22:01:14,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:01:14,037 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:01:14,040 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:01:14,041 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_48fe358d-f39e-467f-b3c8-07074ed808cb/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2024-10-31 22:01:14,157 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-10-31 22:01:14,157 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:01:14,159 INFO L255 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-10-31 22:01:14,161 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:01:14,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2024-10-31 22:01:14,285 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2024-10-31 22:01:14,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2024-10-31 22:01:14,308 INFO L349 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2024-10-31 22:01:14,308 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26