./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_4.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_4.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:02:00,347 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:02:00,448 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 22:02:00,453 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:02:00,454 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:02:00,496 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:02:00,498 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:02:00,498 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:02:00,499 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:02:00,500 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:02:00,500 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:02:00,501 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:02:00,501 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:02:00,502 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:02:00,504 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:02:00,505 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:02:00,505 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:02:00,505 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:02:00,506 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:02:00,506 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:02:00,506 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:02:00,507 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 22:02:00,511 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:02:00,511 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 22:02:00,511 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:02:00,512 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:02:00,512 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:02:00,512 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:02:00,512 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:02:00,513 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:02:00,513 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 22:02:00,513 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:02:00,513 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:02:00,513 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:02:00,514 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:02:00,514 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:02:00,514 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:02:00,514 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:02:00,517 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:02:00,517 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 [2024-10-31 22:02:00,875 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:02:00,924 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:02:00,927 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:02:00,928 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:02:00,929 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:02:00,930 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/loop-acceleration/array_4.i Unable to find full path for "g++" [2024-10-31 22:02:02,924 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:02:03,096 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:02:03,097 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/sv-benchmarks/c/loop-acceleration/array_4.i [2024-10-31 22:02:03,104 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/data/e73ab69ca/a02651bb46114544a59bb6095eda516e/FLAG6083113b4 [2024-10-31 22:02:03,138 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/data/e73ab69ca/a02651bb46114544a59bb6095eda516e [2024-10-31 22:02:03,140 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:02:03,142 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:02:03,143 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:02:03,143 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:02:03,151 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:02:03,152 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,153 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@41c47f62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03, skipping insertion in model container [2024-10-31 22:02:03,153 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,189 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:02:03,404 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:02:03,414 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:02:03,429 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:02:03,447 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:02:03,447 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03 WrapperNode [2024-10-31 22:02:03,448 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:02:03,449 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:02:03,449 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:02:03,449 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:02:03,456 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,461 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,477 INFO L138 Inliner]: procedures = 16, calls = 13, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 44 [2024-10-31 22:02:03,477 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:02:03,478 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:02:03,478 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:02:03,478 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:02:03,490 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,490 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,492 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,503 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 2 writes are split as follows [0, 2]. [2024-10-31 22:02:03,504 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,504 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,508 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,512 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,513 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,514 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,516 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:02:03,517 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:02:03,517 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:02:03,517 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:02:03,518 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (1/1) ... [2024-10-31 22:02:03,525 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:03,536 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:03,548 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:03,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:02:03,580 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-31 22:02:03,581 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-31 22:02:03,581 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-10-31 22:02:03,581 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-31 22:02:03,581 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-31 22:02:03,582 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-10-31 22:02:03,582 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:02:03,582 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:02:03,583 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-31 22:02:03,583 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-10-31 22:02:03,583 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-31 22:02:03,662 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:02:03,665 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:02:03,827 INFO L? ?]: Removed 7 outVars from TransFormulas that were not future-live. [2024-10-31 22:02:03,827 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:02:03,839 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:02:03,839 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-31 22:02:03,840 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:02:03 BoogieIcfgContainer [2024-10-31 22:02:03,840 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:02:03,841 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:02:03,841 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:02:03,845 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:02:03,846 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:02:03,846 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:02:03" (1/3) ... [2024-10-31 22:02:03,847 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@191f036 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:02:03, skipping insertion in model container [2024-10-31 22:02:03,848 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:02:03,848 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:02:03" (2/3) ... [2024-10-31 22:02:03,848 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@191f036 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:02:03, skipping insertion in model container [2024-10-31 22:02:03,848 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:02:03,849 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:02:03" (3/3) ... [2024-10-31 22:02:03,850 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_4.i [2024-10-31 22:02:03,911 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:02:03,911 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:02:03,911 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:02:03,911 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:02:03,912 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:02:03,912 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:02:03,912 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:02:03,912 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:02:03,917 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:03,944 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-31 22:02:03,944 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:03,944 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:03,948 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:02:03,949 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:02:03,949 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:02:03,949 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:03,950 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-10-31 22:02:03,951 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:03,951 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:03,951 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:02:03,951 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 22:02:03,958 INFO L745 eck$LassoCheckResult]: Stem: 13#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 6#L25-3true [2024-10-31 22:02:03,959 INFO L747 eck$LassoCheckResult]: Loop: 6#L25-3true assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 9#L25-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6#L25-3true [2024-10-31 22:02:03,965 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:03,965 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-31 22:02:03,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:03,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735057151] [2024-10-31 22:02:03,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:03,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:04,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:04,101 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:04,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:04,143 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:04,146 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:04,146 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-10-31 22:02:04,147 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:04,147 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [554066404] [2024-10-31 22:02:04,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:04,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:04,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:04,168 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:04,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:04,180 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:04,183 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:04,183 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-10-31 22:02:04,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:04,184 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771953418] [2024-10-31 22:02:04,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:04,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:04,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:04,221 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:04,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:04,236 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:04,718 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:02:04,719 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:02:04,719 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:02:04,719 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:02:04,720 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-31 22:02:04,720 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:04,720 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:02:04,720 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:02:04,720 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_4.i_Iteration1_Lasso [2024-10-31 22:02:04,720 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:02:04,721 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:02:04,737 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:02:04,747 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:02:04,767 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:02:04,770 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:02:04,773 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:02:04,985 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:02:04,991 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:02:05,225 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:02:05,229 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-31 22:02:05,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,232 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,254 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,257 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-31 22:02:05,259 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:02:05,273 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:02:05,273 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:02:05,274 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:02:05,274 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:02:05,274 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:02:05,276 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:02:05,276 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:02:05,280 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:02:05,301 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-31 22:02:05,302 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,302 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,304 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-31 22:02:05,307 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:02:05,322 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:02:05,322 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:02:05,323 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:02:05,323 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:02:05,326 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:02:05,326 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:02:05,346 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:02:05,365 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-10-31 22:02:05,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,366 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,369 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,371 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-31 22:02:05,372 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:02:05,386 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:02:05,386 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:02:05,386 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:02:05,386 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:02:05,390 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:02:05,390 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:02:05,395 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:02:05,414 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-10-31 22:02:05,415 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,416 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,419 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,421 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-10-31 22:02:05,423 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:02:05,438 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:02:05,438 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:02:05,439 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:02:05,439 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:02:05,439 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:02:05,441 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:02:05,441 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:02:05,443 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:02:05,461 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-10-31 22:02:05,463 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,465 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-10-31 22:02:05,469 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:02:05,484 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:02:05,484 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:02:05,484 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:02:05,485 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:02:05,485 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:02:05,486 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:02:05,486 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:02:05,488 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:02:05,505 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-10-31 22:02:05,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,506 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,508 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,510 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-10-31 22:02:05,511 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:02:05,525 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:02:05,526 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:02:05,526 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:02:05,526 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:02:05,529 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:02:05,530 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:02:05,535 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:02:05,554 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2024-10-31 22:02:05,555 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,555 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,557 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,559 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-10-31 22:02:05,560 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:02:05,575 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:02:05,575 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:02:05,575 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:02:05,575 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:02:05,583 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:02:05,583 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 22:02:05,601 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-31 22:02:05,625 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. [2024-10-31 22:02:05,625 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2024-10-31 22:02:05,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:02:05,627 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:05,635 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:02:05,643 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-10-31 22:02:05,643 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-31 22:02:05,659 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-31 22:02:05,660 INFO L474 LassoAnalysis]: Proved termination. [2024-10-31 22:02:05,660 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2045*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2024-10-31 22:02:05,679 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2024-10-31 22:02:05,704 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2024-10-31 22:02:05,715 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-31 22:02:05,717 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-31 22:02:05,741 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:05,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:05,763 INFO L255 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-31 22:02:05,764 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:02:05,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:05,784 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:02:05,785 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:02:05,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:05,863 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-31 22:02:05,865 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:05,929 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 17 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 32 states and 43 transitions. Complement of second has 6 states. [2024-10-31 22:02:05,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-31 22:02:05,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:05,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 21 transitions. [2024-10-31 22:02:05,942 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 21 transitions. Stem has 2 letters. Loop has 2 letters. [2024-10-31 22:02:05,943 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:02:05,944 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 21 transitions. Stem has 4 letters. Loop has 2 letters. [2024-10-31 22:02:05,944 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:02:05,944 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 21 transitions. Stem has 2 letters. Loop has 4 letters. [2024-10-31 22:02:05,945 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 22:02:05,946 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 43 transitions. [2024-10-31 22:02:05,948 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:05,952 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 9 states and 11 transitions. [2024-10-31 22:02:05,953 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2024-10-31 22:02:05,953 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-10-31 22:02:05,954 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions. [2024-10-31 22:02:05,954 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:02:05,954 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-10-31 22:02:05,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions. [2024-10-31 22:02:05,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2024-10-31 22:02:05,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:05,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2024-10-31 22:02:05,983 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-10-31 22:02:05,983 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2024-10-31 22:02:05,983 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:02:05,983 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 11 transitions. [2024-10-31 22:02:05,985 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:05,985 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:05,986 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:05,986 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-10-31 22:02:05,986 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:02:05,987 INFO L745 eck$LassoCheckResult]: Stem: 108#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 109#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 105#L25-3 assume !(main_~i~0#1 < 1023); 106#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 107#L30-4 [2024-10-31 22:02:05,987 INFO L747 eck$LassoCheckResult]: Loop: 107#L30-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 101#L30-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 102#L30-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 107#L30-4 [2024-10-31 22:02:05,987 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:05,988 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2024-10-31 22:02:05,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:05,988 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095707478] [2024-10-31 22:02:05,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:05,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:06,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:06,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:06,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:02:06,092 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095707478] [2024-10-31 22:02:06,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095707478] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:02:06,092 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:02:06,093 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:02:06,093 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314272019] [2024-10-31 22:02:06,094 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:02:06,096 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:02:06,096 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:06,097 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 1 times [2024-10-31 22:02:06,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:06,097 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [475837747] [2024-10-31 22:02:06,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:06,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:06,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:06,102 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:06,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:06,108 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:06,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:02:06,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:02:06,169 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:02:06,170 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:06,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:02:06,196 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2024-10-31 22:02:06,196 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 14 transitions. [2024-10-31 22:02:06,197 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:06,198 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 14 transitions. [2024-10-31 22:02:06,198 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2024-10-31 22:02:06,199 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2024-10-31 22:02:06,199 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 14 transitions. [2024-10-31 22:02:06,199 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:02:06,199 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 14 transitions. [2024-10-31 22:02:06,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 14 transitions. [2024-10-31 22:02:06,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 9. [2024-10-31 22:02:06,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:06,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2024-10-31 22:02:06,200 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-31 22:02:06,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:02:06,203 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-10-31 22:02:06,204 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:02:06,204 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2024-10-31 22:02:06,204 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:06,204 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:06,204 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:06,205 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-10-31 22:02:06,205 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:02:06,205 INFO L745 eck$LassoCheckResult]: Stem: 136#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 137#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 133#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 131#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 132#L25-3 assume !(main_~i~0#1 < 1023); 134#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 135#L30-4 [2024-10-31 22:02:06,205 INFO L747 eck$LassoCheckResult]: Loop: 135#L30-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 129#L30-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 130#L30-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 135#L30-4 [2024-10-31 22:02:06,205 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:06,205 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2024-10-31 22:02:06,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:06,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552766887] [2024-10-31 22:02:06,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:06,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:06,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:06,321 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:06,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:02:06,321 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552766887] [2024-10-31 22:02:06,321 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [552766887] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:02:06,322 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [67185344] [2024-10-31 22:02:06,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:06,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:02:06,322 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:06,325 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:02:06,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-31 22:02:06,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:06,380 INFO L255 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-31 22:02:06,380 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:02:06,397 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:06,398 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:02:06,429 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:06,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [67185344] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:02:06,429 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:02:06,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-10-31 22:02:06,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3597971] [2024-10-31 22:02:06,430 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:02:06,430 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:02:06,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:06,430 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 2 times [2024-10-31 22:02:06,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:06,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953683685] [2024-10-31 22:02:06,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:06,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:06,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:06,439 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:06,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:06,447 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:06,497 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:02:06,497 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-31 22:02:06,498 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:02:06,498 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:06,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:02:06,567 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2024-10-31 22:02:06,567 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2024-10-31 22:02:06,568 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:06,569 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2024-10-31 22:02:06,569 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2024-10-31 22:02:06,569 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2024-10-31 22:02:06,569 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2024-10-31 22:02:06,569 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:02:06,570 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-31 22:02:06,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2024-10-31 22:02:06,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 15. [2024-10-31 22:02:06,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:06,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2024-10-31 22:02:06,575 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-31 22:02:06,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:02:06,577 INFO L425 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-10-31 22:02:06,577 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:02:06,577 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2024-10-31 22:02:06,578 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:06,578 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:06,578 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:06,578 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2024-10-31 22:02:06,579 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:02:06,579 INFO L745 eck$LassoCheckResult]: Stem: 213#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 214#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 209#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 207#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 208#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 210#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 219#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 218#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 217#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 216#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 215#L25-3 assume !(main_~i~0#1 < 1023); 211#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 212#L30-4 [2024-10-31 22:02:06,579 INFO L747 eck$LassoCheckResult]: Loop: 212#L30-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 205#L30-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 206#L30-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 212#L30-4 [2024-10-31 22:02:06,579 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:06,579 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2024-10-31 22:02:06,579 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:06,580 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129075890] [2024-10-31 22:02:06,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:06,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:06,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:06,768 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:06,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:02:06,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129075890] [2024-10-31 22:02:06,770 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [129075890] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:02:06,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1199487932] [2024-10-31 22:02:06,771 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:02:06,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:02:06,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:06,774 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:02:06,776 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-10-31 22:02:06,839 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-31 22:02:06,839 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:02:06,840 INFO L255 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:02:06,842 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:02:06,883 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:06,884 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:02:06,977 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:06,978 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1199487932] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:02:06,978 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:02:06,978 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-10-31 22:02:06,978 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1337844300] [2024-10-31 22:02:06,978 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:02:06,979 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:02:06,983 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:06,983 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 3 times [2024-10-31 22:02:06,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:06,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1615544341] [2024-10-31 22:02:06,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:06,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:06,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:06,989 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:06,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:06,995 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:07,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:02:07,091 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-31 22:02:07,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-10-31 22:02:07,092 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:07,094 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-10-31 22:02:07,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:02:07,269 INFO L93 Difference]: Finished difference Result 57 states and 58 transitions. [2024-10-31 22:02:07,269 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 58 transitions. [2024-10-31 22:02:07,270 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:07,273 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 57 states and 58 transitions. [2024-10-31 22:02:07,274 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 37 [2024-10-31 22:02:07,275 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 37 [2024-10-31 22:02:07,275 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 58 transitions. [2024-10-31 22:02:07,275 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:02:07,275 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 58 transitions. [2024-10-31 22:02:07,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 58 transitions. [2024-10-31 22:02:07,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 27. [2024-10-31 22:02:07,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:07,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2024-10-31 22:02:07,280 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-31 22:02:07,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-31 22:02:07,281 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-10-31 22:02:07,282 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-31 22:02:07,282 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2024-10-31 22:02:07,283 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:07,283 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:07,283 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:07,284 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2024-10-31 22:02:07,285 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:02:07,286 INFO L745 eck$LassoCheckResult]: Stem: 367#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 368#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 363#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 361#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 362#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 364#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 385#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 384#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 383#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 382#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 381#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 380#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 379#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 378#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 377#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 376#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 375#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 374#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 373#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 372#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 371#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 370#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 369#L25-3 assume !(main_~i~0#1 < 1023); 365#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 366#L30-4 [2024-10-31 22:02:07,286 INFO L747 eck$LassoCheckResult]: Loop: 366#L30-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 359#L30-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 360#L30-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 366#L30-4 [2024-10-31 22:02:07,286 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:07,287 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2024-10-31 22:02:07,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:07,288 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [618661007] [2024-10-31 22:02:07,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:07,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:07,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:07,643 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:07,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:02:07,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [618661007] [2024-10-31 22:02:07,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [618661007] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:02:07,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [968034002] [2024-10-31 22:02:07,644 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 22:02:07,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:02:07,645 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:07,646 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:02:07,648 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-10-31 22:02:07,811 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-10-31 22:02:07,811 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:02:07,813 INFO L255 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-31 22:02:07,814 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:02:07,895 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:07,896 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:02:08,219 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:08,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [968034002] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:02:08,220 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:02:08,220 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-10-31 22:02:08,220 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8962891] [2024-10-31 22:02:08,220 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:02:08,220 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:02:08,221 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:08,221 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 4 times [2024-10-31 22:02:08,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:08,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463293638] [2024-10-31 22:02:08,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:08,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:08,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:08,228 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:08,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:08,233 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:08,288 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:02:08,289 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-31 22:02:08,289 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-10-31 22:02:08,290 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:08,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:02:08,574 INFO L93 Difference]: Finished difference Result 117 states and 118 transitions. [2024-10-31 22:02:08,574 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 118 transitions. [2024-10-31 22:02:08,578 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:08,579 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 117 states and 118 transitions. [2024-10-31 22:02:08,579 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 73 [2024-10-31 22:02:08,579 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 73 [2024-10-31 22:02:08,579 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 118 transitions. [2024-10-31 22:02:08,580 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:02:08,584 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 118 transitions. [2024-10-31 22:02:08,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 118 transitions. [2024-10-31 22:02:08,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 51. [2024-10-31 22:02:08,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:08,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2024-10-31 22:02:08,591 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-31 22:02:08,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-31 22:02:08,594 INFO L425 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-10-31 22:02:08,595 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-31 22:02:08,595 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2024-10-31 22:02:08,596 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:08,596 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:08,596 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:08,601 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2024-10-31 22:02:08,601 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:02:08,601 INFO L745 eck$LassoCheckResult]: Stem: 677#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 678#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 673#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 671#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 672#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 674#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 719#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 718#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 717#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 716#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 715#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 714#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 713#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 712#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 711#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 710#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 709#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 708#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 707#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 706#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 705#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 704#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 703#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 702#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 701#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 700#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 699#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 698#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 697#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 696#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 695#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 694#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 693#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 692#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 691#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 690#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 689#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 688#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 687#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 686#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 685#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 684#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 683#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 682#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 681#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 680#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 679#L25-3 assume !(main_~i~0#1 < 1023); 675#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 676#L30-4 [2024-10-31 22:02:08,601 INFO L747 eck$LassoCheckResult]: Loop: 676#L30-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 669#L30-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 670#L30-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 676#L30-4 [2024-10-31 22:02:08,602 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:08,602 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2024-10-31 22:02:08,602 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:08,602 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740789031] [2024-10-31 22:02:08,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:08,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:08,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:09,579 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:09,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:02:09,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740789031] [2024-10-31 22:02:09,582 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [740789031] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:02:09,582 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [576124002] [2024-10-31 22:02:09,583 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-31 22:02:09,583 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:02:09,583 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:09,585 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:02:09,588 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-10-31 22:02:09,730 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-31 22:02:09,730 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:02:09,732 INFO L255 TraceCheckSpWp]: Trace formula consists of 284 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-10-31 22:02:09,737 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:02:09,877 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:09,877 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:02:10,884 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:10,884 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [576124002] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:02:10,885 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:02:10,885 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-10-31 22:02:10,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2026568737] [2024-10-31 22:02:10,885 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:02:10,886 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:02:10,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:10,886 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 5 times [2024-10-31 22:02:10,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:10,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844648700] [2024-10-31 22:02:10,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:10,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:10,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:10,891 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:10,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:10,895 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:10,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:02:10,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-10-31 22:02:10,942 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-10-31 22:02:10,942 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:11,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:02:11,581 INFO L93 Difference]: Finished difference Result 237 states and 238 transitions. [2024-10-31 22:02:11,581 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 237 states and 238 transitions. [2024-10-31 22:02:11,585 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:11,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 237 states to 237 states and 238 transitions. [2024-10-31 22:02:11,587 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 145 [2024-10-31 22:02:11,587 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 145 [2024-10-31 22:02:11,588 INFO L73 IsDeterministic]: Start isDeterministic. Operand 237 states and 238 transitions. [2024-10-31 22:02:11,589 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:02:11,589 INFO L218 hiAutomatonCegarLoop]: Abstraction has 237 states and 238 transitions. [2024-10-31 22:02:11,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states and 238 transitions. [2024-10-31 22:02:11,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 99. [2024-10-31 22:02:11,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:11,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2024-10-31 22:02:11,597 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-31 22:02:11,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-10-31 22:02:11,598 INFO L425 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-10-31 22:02:11,598 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-31 22:02:11,599 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2024-10-31 22:02:11,600 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:11,600 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:11,600 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:11,603 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2024-10-31 22:02:11,603 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:02:11,603 INFO L745 eck$LassoCheckResult]: Stem: 1299#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 1300#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 1295#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1293#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1294#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1296#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1389#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1388#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1387#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1386#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1385#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1384#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1383#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1382#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1381#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1380#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1379#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1378#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1377#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1376#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1375#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1374#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1373#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1372#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1371#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1370#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1369#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1368#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1367#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1366#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1365#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1364#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1363#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1362#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1361#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1360#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1359#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1358#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1357#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1356#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1355#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1354#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1353#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1352#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1351#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1350#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1349#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1348#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1347#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1346#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1345#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1344#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1343#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1342#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1341#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1340#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1339#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1338#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1337#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1336#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1335#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1334#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1333#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1332#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1331#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1330#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1329#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1328#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1327#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1326#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1325#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1324#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1323#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1322#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1321#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1320#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1319#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1318#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1317#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1316#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1315#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1314#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1313#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1312#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1311#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1310#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1309#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1308#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1307#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1306#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1305#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1304#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1303#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1302#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1301#L25-3 assume !(main_~i~0#1 < 1023); 1297#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 1298#L30-4 [2024-10-31 22:02:11,604 INFO L747 eck$LassoCheckResult]: Loop: 1298#L30-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 1291#L30-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 1292#L30-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1298#L30-4 [2024-10-31 22:02:11,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:11,604 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2024-10-31 22:02:11,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:11,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225579098] [2024-10-31 22:02:11,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:11,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:11,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:14,439 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:14,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:02:14,444 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225579098] [2024-10-31 22:02:14,444 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [225579098] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:02:14,444 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1200321304] [2024-10-31 22:02:14,444 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-31 22:02:14,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:02:14,445 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:14,448 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:02:14,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-10-31 22:02:18,574 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-10-31 22:02:18,574 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:02:18,582 INFO L255 TraceCheckSpWp]: Trace formula consists of 548 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-10-31 22:02:18,585 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:02:18,939 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:18,939 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:02:22,260 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:22,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1200321304] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:02:22,261 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:02:22,261 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-10-31 22:02:22,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807148455] [2024-10-31 22:02:22,262 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:02:22,262 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:02:22,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:22,263 INFO L85 PathProgramCache]: Analyzing trace with hash 49813, now seen corresponding path program 6 times [2024-10-31 22:02:22,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:22,263 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281210618] [2024-10-31 22:02:22,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:22,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:22,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:22,268 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:02:22,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:02:22,272 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:02:22,320 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:02:22,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-10-31 22:02:22,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-10-31 22:02:22,328 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:24,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:02:24,215 INFO L93 Difference]: Finished difference Result 477 states and 478 transitions. [2024-10-31 22:02:24,215 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 477 states and 478 transitions. [2024-10-31 22:02:24,219 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:24,222 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 477 states to 477 states and 478 transitions. [2024-10-31 22:02:24,223 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 289 [2024-10-31 22:02:24,223 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 289 [2024-10-31 22:02:24,224 INFO L73 IsDeterministic]: Start isDeterministic. Operand 477 states and 478 transitions. [2024-10-31 22:02:24,225 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:02:24,226 INFO L218 hiAutomatonCegarLoop]: Abstraction has 477 states and 478 transitions. [2024-10-31 22:02:24,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states and 478 transitions. [2024-10-31 22:02:24,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 195. [2024-10-31 22:02:24,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:02:24,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2024-10-31 22:02:24,246 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-31 22:02:24,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-10-31 22:02:24,248 INFO L425 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-10-31 22:02:24,248 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-31 22:02:24,248 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2024-10-31 22:02:24,249 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-10-31 22:02:24,249 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:02:24,249 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:02:24,256 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2024-10-31 22:02:24,257 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:02:24,257 INFO L745 eck$LassoCheckResult]: Stem: 2545#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2); 2546#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 2541#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2539#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2540#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2542#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2731#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2730#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2729#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2728#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2727#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2726#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2725#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2724#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2723#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2722#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2721#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2720#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2719#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2718#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2717#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2716#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2715#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2714#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2713#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2712#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2711#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2710#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2709#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2708#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2707#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2706#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2705#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2704#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2703#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2702#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2701#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2700#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2699#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2698#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2697#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2696#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2695#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2694#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2693#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2692#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2691#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2690#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2689#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2688#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2687#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2686#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2685#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2684#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2683#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2682#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2681#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2680#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2679#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2678#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2677#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2676#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2675#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2674#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2673#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2672#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2671#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2670#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2669#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2668#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2667#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2666#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2665#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2664#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2663#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2662#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2661#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2660#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2659#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2658#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2657#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2656#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2655#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2654#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2653#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2652#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2651#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2650#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2649#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2648#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2647#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2646#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2645#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2644#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2643#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2642#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2641#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2640#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2639#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2638#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2637#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2636#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2635#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2634#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2633#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2632#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2631#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2630#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2629#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2628#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2627#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2626#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2625#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2624#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2623#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2622#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2621#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2620#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2619#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2618#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2617#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2616#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2615#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2614#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2613#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2612#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2611#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2610#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2609#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2608#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2607#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2606#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2605#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2604#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2603#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2602#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2601#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2600#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2599#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2598#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2597#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2596#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2595#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2594#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2593#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2592#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2591#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2590#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2589#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2588#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2587#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2586#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2585#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2584#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2583#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2582#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2581#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2580#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2579#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2578#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2577#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2576#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2575#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2574#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2573#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2572#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2571#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2570#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2569#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2568#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2567#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2566#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2565#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2564#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2563#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2562#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2561#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2560#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2559#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2558#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2557#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2556#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2555#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2554#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2553#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2552#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2551#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2550#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2549#L25-3 assume !!(main_~i~0#1 < 1023);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2548#L25-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2547#L25-3 assume !(main_~i~0#1 < 1023); 2543#L25-4 call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0; 2544#L30-4 [2024-10-31 22:02:24,257 INFO L747 eck$LassoCheckResult]: Loop: 2544#L30-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 2537#L30-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 2538#L30-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2544#L30-4 [2024-10-31 22:02:24,258 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:02:24,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2024-10-31 22:02:24,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:02:24,258 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56574877] [2024-10-31 22:02:24,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:02:24,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:02:24,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:02:32,604 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:02:32,604 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:02:32,604 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [56574877] [2024-10-31 22:02:32,604 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [56574877] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:02:32,604 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [391784042] [2024-10-31 22:02:32,604 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-31 22:02:32,605 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:02:32,605 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:02:32,606 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:02:32,607 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a98dd60f-bedc-4e19-90ed-7dc3036f2603/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process