./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 21:56:21,781 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 21:56:21,873 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 21:56:21,878 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 21:56:21,879 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 21:56:21,921 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 21:56:21,923 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 21:56:21,924 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 21:56:21,925 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 21:56:21,927 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 21:56:21,928 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 21:56:21,928 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 21:56:21,929 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 21:56:21,929 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 21:56:21,930 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 21:56:21,931 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 21:56:21,931 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 21:56:21,932 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 21:56:21,932 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 21:56:21,933 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 21:56:21,933 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 21:56:21,936 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 21:56:21,936 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 21:56:21,937 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 21:56:21,937 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 21:56:21,937 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 21:56:21,938 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 21:56:21,938 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 21:56:21,939 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 21:56:21,939 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 21:56:21,939 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 21:56:21,940 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 21:56:21,940 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 21:56:21,940 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 21:56:21,941 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 21:56:21,941 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 21:56:21,941 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 21:56:21,942 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 21:56:21,942 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 21:56:21,943 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 [2024-10-31 21:56:22,282 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 21:56:22,318 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 21:56:22,321 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 21:56:22,323 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 21:56:22,324 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 21:56:22,325 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i Unable to find full path for "g++" [2024-10-31 21:56:24,342 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 21:56:24,514 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 21:56:24,515 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2024-10-31 21:56:24,522 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/data/378bd069e/1ecf42c0fd9441c8b3ca0a8dba5c1bc7/FLAG981be23da [2024-10-31 21:56:24,537 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/data/378bd069e/1ecf42c0fd9441c8b3ca0a8dba5c1bc7 [2024-10-31 21:56:24,540 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 21:56:24,541 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 21:56:24,543 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 21:56:24,543 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 21:56:24,551 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 21:56:24,551 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,552 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1ea5a9f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24, skipping insertion in model container [2024-10-31 21:56:24,553 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,577 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 21:56:24,785 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 21:56:24,797 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 21:56:24,820 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 21:56:24,837 INFO L204 MainTranslator]: Completed translation [2024-10-31 21:56:24,837 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24 WrapperNode [2024-10-31 21:56:24,838 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 21:56:24,839 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 21:56:24,839 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 21:56:24,839 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 21:56:24,847 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,854 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,876 INFO L138 Inliner]: procedures = 16, calls = 21, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 73 [2024-10-31 21:56:24,876 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 21:56:24,877 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 21:56:24,877 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 21:56:24,877 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 21:56:24,889 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,889 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,892 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,910 INFO L175 MemorySlicer]: Split 11 memory accesses to 3 slices as follows [2, 5, 4]. 45 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 4 writes are split as follows [0, 2, 2]. [2024-10-31 21:56:24,910 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,910 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,916 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,920 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,922 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,923 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,929 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 21:56:24,930 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 21:56:24,934 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 21:56:24,934 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 21:56:24,935 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (1/1) ... [2024-10-31 21:56:24,941 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:24,953 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:24,968 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:24,971 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 21:56:25,000 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-31 21:56:25,000 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-31 21:56:25,001 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-10-31 21:56:25,001 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2024-10-31 21:56:25,001 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-31 21:56:25,001 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-10-31 21:56:25,001 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-10-31 21:56:25,002 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2024-10-31 21:56:25,002 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 21:56:25,002 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 21:56:25,002 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-10-31 21:56:25,003 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-10-31 21:56:25,003 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2024-10-31 21:56:25,003 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-31 21:56:25,089 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 21:56:25,091 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 21:56:25,335 INFO L? ?]: Removed 15 outVars from TransFormulas that were not future-live. [2024-10-31 21:56:25,335 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 21:56:25,358 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 21:56:25,360 INFO L316 CfgBuilder]: Removed 3 assume(true) statements. [2024-10-31 21:56:25,361 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 09:56:25 BoogieIcfgContainer [2024-10-31 21:56:25,361 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 21:56:25,362 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 21:56:25,363 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 21:56:25,369 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 21:56:25,370 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 21:56:25,371 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 09:56:24" (1/3) ... [2024-10-31 21:56:25,372 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@578e600a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 09:56:25, skipping insertion in model container [2024-10-31 21:56:25,373 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 21:56:25,373 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 09:56:24" (2/3) ... [2024-10-31 21:56:25,374 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@578e600a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 09:56:25, skipping insertion in model container [2024-10-31 21:56:25,375 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 21:56:25,376 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 09:56:25" (3/3) ... [2024-10-31 21:56:25,377 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_mul_init.i [2024-10-31 21:56:25,501 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 21:56:25,502 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 21:56:25,502 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 21:56:25,502 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 21:56:25,502 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 21:56:25,502 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 21:56:25,502 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 21:56:25,503 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 21:56:25,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:25,529 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2024-10-31 21:56:25,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:25,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:25,536 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 21:56:25,536 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 21:56:25,536 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 21:56:25,537 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:25,540 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2024-10-31 21:56:25,540 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:25,540 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:25,541 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 21:56:25,541 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-10-31 21:56:25,550 INFO L745 eck$LassoCheckResult]: Stem: 17#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 4#L21-3true [2024-10-31 21:56:25,550 INFO L747 eck$LassoCheckResult]: Loop: 4#L21-3true assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 18#L21-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4#L21-3true [2024-10-31 21:56:25,560 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:25,564 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-31 21:56:25,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:25,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24094396] [2024-10-31 21:56:25,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:25,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:25,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:25,717 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:25,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:25,750 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:25,753 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:25,754 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-10-31 21:56:25,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:25,754 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978024447] [2024-10-31 21:56:25,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:25,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:25,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:25,779 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:25,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:25,801 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:25,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:25,807 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-10-31 21:56:25,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:25,811 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372660155] [2024-10-31 21:56:25,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:25,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:25,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:25,860 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:25,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:25,903 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:26,479 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 21:56:26,480 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 21:56:26,481 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 21:56:26,482 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 21:56:26,482 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-31 21:56:26,482 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:26,482 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 21:56:26,482 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 21:56:26,483 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_mul_init.i_Iteration1_Lasso [2024-10-31 21:56:26,483 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 21:56:26,484 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 21:56:26,509 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,545 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,549 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,554 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,560 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,564 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,904 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,908 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,911 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,914 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,918 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,921 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,924 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,928 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:26,931 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 21:56:27,228 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 21:56:27,233 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-31 21:56:27,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,235 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,237 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,239 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-10-31 21:56:27,240 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,255 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,257 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,257 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,257 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,264 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,264 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,270 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,291 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-10-31 21:56:27,292 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,292 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,295 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,297 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-10-31 21:56:27,298 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,313 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,314 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,314 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,314 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,318 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,318 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,328 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,349 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-10-31 21:56:27,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,354 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-10-31 21:56:27,357 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,372 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,373 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 21:56:27,373 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,374 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,374 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,375 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 21:56:27,375 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 21:56:27,377 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,399 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-10-31 21:56:27,400 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,401 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,403 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,405 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-10-31 21:56:27,407 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,423 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,423 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 21:56:27,424 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,424 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,424 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,425 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 21:56:27,425 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 21:56:27,430 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,451 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-10-31 21:56:27,452 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,453 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,455 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,457 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-10-31 21:56:27,458 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,475 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,475 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 21:56:27,475 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,475 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,476 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,477 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 21:56:27,477 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 21:56:27,481 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,502 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-10-31 21:56:27,502 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,503 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,506 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,507 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-10-31 21:56:27,509 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,525 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,526 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 21:56:27,526 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,526 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,526 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,527 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 21:56:27,527 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 21:56:27,529 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,551 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-10-31 21:56:27,552 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,552 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,555 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,556 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-10-31 21:56:27,558 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,573 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,573 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,573 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,573 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,576 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,577 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,583 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,603 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-10-31 21:56:27,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,603 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,606 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,608 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-10-31 21:56:27,609 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,624 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,624 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 21:56:27,624 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,625 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,625 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,625 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 21:56:27,626 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 21:56:27,630 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,649 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-10-31 21:56:27,649 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,650 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,653 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,655 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-10-31 21:56:27,657 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,672 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,672 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,673 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,673 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,676 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,676 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,683 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,703 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2024-10-31 21:56:27,703 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,704 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,705 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,707 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-10-31 21:56:27,709 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,723 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,723 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,723 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,724 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,727 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,727 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,734 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,752 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-10-31 21:56:27,754 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,754 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,755 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,758 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-10-31 21:56:27,759 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,773 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,773 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,773 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,773 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,776 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,776 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,781 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,798 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-10-31 21:56:27,799 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,799 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,800 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,804 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-10-31 21:56:27,805 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,817 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,817 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,817 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,817 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,820 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,820 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,825 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,843 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-10-31 21:56:27,843 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,844 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,845 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,851 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-10-31 21:56:27,853 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,870 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,871 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,871 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,871 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,874 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,874 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,882 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,900 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-10-31 21:56:27,901 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,901 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,903 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,904 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-10-31 21:56:27,905 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,919 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,920 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,920 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,920 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,923 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,923 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,927 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 21:56:27,946 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-10-31 21:56:27,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:27,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:27,948 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:27,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-10-31 21:56:27,951 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 21:56:27,965 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 21:56:27,965 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 21:56:27,966 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 21:56:27,966 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 21:56:27,972 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 21:56:27,972 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-10-31 21:56:27,985 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-31 21:56:28,047 INFO L443 ModelExtractionUtils]: Simplification made 20 calls to the SMT solver. [2024-10-31 21:56:28,048 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2024-10-31 21:56:28,049 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 21:56:28,050 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:28,052 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 21:56:28,067 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-10-31 21:56:28,073 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-31 21:56:28,089 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-10-31 21:56:28,089 INFO L474 LassoAnalysis]: Proved termination. [2024-10-31 21:56:28,090 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-10-31 21:56:28,109 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-10-31 21:56:28,144 INFO L156 tatePredicateManager]: 8 out of 8 supporting invariants were superfluous and have been removed [2024-10-31 21:56:28,152 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-10-31 21:56:28,153 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-10-31 21:56:28,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:28,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:28,197 INFO L255 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-31 21:56:28,198 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 21:56:28,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:28,218 INFO L255 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 21:56:28,219 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 21:56:28,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 21:56:28,292 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-10-31 21:56:28,295 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:28,347 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 22 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 42 states and 61 transitions. Complement of second has 6 states. [2024-10-31 21:56:28,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-10-31 21:56:28,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:28,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 30 transitions. [2024-10-31 21:56:28,357 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 2 letters. Loop has 2 letters. [2024-10-31 21:56:28,357 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 21:56:28,357 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 4 letters. Loop has 2 letters. [2024-10-31 21:56:28,357 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 21:56:28,357 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 30 transitions. Stem has 2 letters. Loop has 4 letters. [2024-10-31 21:56:28,358 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-10-31 21:56:28,359 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 61 transitions. [2024-10-31 21:56:28,361 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-10-31 21:56:28,365 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 19 states and 27 transitions. [2024-10-31 21:56:28,366 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-31 21:56:28,366 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2024-10-31 21:56:28,367 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 27 transitions. [2024-10-31 21:56:28,367 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 21:56:28,367 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 27 transitions. [2024-10-31 21:56:28,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 27 transitions. [2024-10-31 21:56:28,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2024-10-31 21:56:28,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:28,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 27 transitions. [2024-10-31 21:56:28,392 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 27 transitions. [2024-10-31 21:56:28,392 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 27 transitions. [2024-10-31 21:56:28,392 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 21:56:28,392 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 27 transitions. [2024-10-31 21:56:28,393 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-10-31 21:56:28,393 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:28,393 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:28,394 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-10-31 21:56:28,394 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 21:56:28,394 INFO L745 eck$LassoCheckResult]: Stem: 150#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 141#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 134#L21-3 assume !(main_~i~0#1 < 100000); 135#L21-4 main_~i~0#1 := 0; 148#L26-3 [2024-10-31 21:56:28,394 INFO L747 eck$LassoCheckResult]: Loop: 148#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 149#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#1(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 147#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 148#L26-3 [2024-10-31 21:56:28,395 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:28,395 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2024-10-31 21:56:28,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:28,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437664202] [2024-10-31 21:56:28,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:28,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:28,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:28,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 21:56:28,494 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 21:56:28,494 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437664202] [2024-10-31 21:56:28,495 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1437664202] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 21:56:28,495 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 21:56:28,495 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 21:56:28,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874618589] [2024-10-31 21:56:28,496 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 21:56:28,498 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 21:56:28,499 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:28,499 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2024-10-31 21:56:28,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:28,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147500643] [2024-10-31 21:56:28,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:28,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:28,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-10-31 21:56:28,512 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [234001781] [2024-10-31 21:56:28,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:28,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:28,513 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:28,515 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:28,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-10-31 21:56:28,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:28,566 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:28,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:28,577 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:28,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 21:56:28,742 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 21:56:28,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 21:56:28,748 INFO L87 Difference]: Start difference. First operand 19 states and 27 transitions. cyclomatic complexity: 11 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:28,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 21:56:28,813 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2024-10-31 21:56:28,813 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 36 transitions. [2024-10-31 21:56:28,814 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:28,815 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 26 states and 32 transitions. [2024-10-31 21:56:28,815 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-10-31 21:56:28,816 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-10-31 21:56:28,816 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 32 transitions. [2024-10-31 21:56:28,816 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 21:56:28,816 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2024-10-31 21:56:28,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 32 transitions. [2024-10-31 21:56:28,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 17. [2024-10-31 21:56:28,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:28,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2024-10-31 21:56:28,819 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2024-10-31 21:56:28,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 21:56:28,821 INFO L425 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2024-10-31 21:56:28,821 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 21:56:28,821 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2024-10-31 21:56:28,822 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:28,822 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:28,822 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:28,823 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-31 21:56:28,823 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 21:56:28,823 INFO L745 eck$LassoCheckResult]: Stem: 202#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 195#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 187#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 188#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 189#L21-3 assume !(main_~i~0#1 < 100000); 190#L21-4 main_~i~0#1 := 0; 203#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 201#L28 [2024-10-31 21:56:28,824 INFO L747 eck$LassoCheckResult]: Loop: 201#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#1(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 198#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 199#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 201#L28 [2024-10-31 21:56:28,824 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:28,824 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669547, now seen corresponding path program 1 times [2024-10-31 21:56:28,825 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:28,825 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8607967] [2024-10-31 21:56:28,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:28,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:28,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:28,913 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 21:56:28,913 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 21:56:28,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8607967] [2024-10-31 21:56:28,914 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [8607967] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 21:56:28,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1800076266] [2024-10-31 21:56:28,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:28,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:28,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:28,917 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:28,918 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-10-31 21:56:28,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:28,981 INFO L255 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-31 21:56:28,981 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 21:56:28,997 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 21:56:28,997 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 21:56:29,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 21:56:29,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1800076266] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 21:56:29,022 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 21:56:29,022 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-10-31 21:56:29,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [330531470] [2024-10-31 21:56:29,022 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 21:56:29,023 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 21:56:29,023 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:29,023 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 2 times [2024-10-31 21:56:29,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:29,024 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899269971] [2024-10-31 21:56:29,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:29,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:29,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-10-31 21:56:29,033 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1942287493] [2024-10-31 21:56:29,033 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 21:56:29,033 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:29,033 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:29,036 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:29,038 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-10-31 21:56:29,091 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-10-31 21:56:29,091 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-10-31 21:56:29,091 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:29,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:29,104 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:29,257 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 21:56:29,258 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-31 21:56:29,258 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-31 21:56:29,258 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:29,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 21:56:29,387 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2024-10-31 21:56:29,388 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2024-10-31 21:56:29,389 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:29,390 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2024-10-31 21:56:29,390 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2024-10-31 21:56:29,390 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2024-10-31 21:56:29,390 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2024-10-31 21:56:29,393 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 21:56:29,393 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2024-10-31 21:56:29,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2024-10-31 21:56:29,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 32. [2024-10-31 21:56:29,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.21875) internal successors, (39), 31 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:29,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2024-10-31 21:56:29,396 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 39 transitions. [2024-10-31 21:56:29,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 21:56:29,400 INFO L425 stractBuchiCegarLoop]: Abstraction has 32 states and 39 transitions. [2024-10-31 21:56:29,400 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 21:56:29,400 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 39 transitions. [2024-10-31 21:56:29,401 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:29,401 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:29,401 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:29,401 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1] [2024-10-31 21:56:29,401 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 21:56:29,402 INFO L745 eck$LassoCheckResult]: Stem: 316#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 309#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 301#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 302#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 303#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 304#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 328#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 326#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 324#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 322#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 321#L21-3 assume !(main_~i~0#1 < 100000); 317#L21-4 main_~i~0#1 := 0; 318#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 315#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 312#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 313#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 332#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 331#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 330#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 329#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 327#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 325#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 320#L28 [2024-10-31 21:56:29,402 INFO L747 eck$LassoCheckResult]: Loop: 320#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#1(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 323#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 319#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 320#L28 [2024-10-31 21:56:29,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:29,402 INFO L85 PathProgramCache]: Analyzing trace with hash -1950889807, now seen corresponding path program 1 times [2024-10-31 21:56:29,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:29,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982667358] [2024-10-31 21:56:29,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:29,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:29,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:29,642 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-31 21:56:29,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 21:56:29,643 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982667358] [2024-10-31 21:56:29,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [982667358] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 21:56:29,643 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1040731158] [2024-10-31 21:56:29,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:29,643 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:29,643 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:29,646 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:29,647 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-10-31 21:56:29,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:29,725 INFO L255 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 21:56:29,726 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 21:56:29,769 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-31 21:56:29,769 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 21:56:29,856 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-31 21:56:29,856 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1040731158] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 21:56:29,857 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 21:56:29,857 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-10-31 21:56:29,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [46921988] [2024-10-31 21:56:29,857 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 21:56:29,857 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 21:56:29,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:29,858 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 3 times [2024-10-31 21:56:29,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:29,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782675629] [2024-10-31 21:56:29,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:29,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:29,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-10-31 21:56:29,865 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [939199491] [2024-10-31 21:56:29,866 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 21:56:29,879 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:29,879 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:29,891 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:29,900 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-10-31 21:56:29,927 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-10-31 21:56:29,974 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-10-31 21:56:29,975 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-10-31 21:56:29,975 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:29,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:29,986 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:30,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 21:56:30,132 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-31 21:56:30,132 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-10-31 21:56:30,133 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. cyclomatic complexity: 10 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:30,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 21:56:30,393 INFO L93 Difference]: Finished difference Result 117 states and 139 transitions. [2024-10-31 21:56:30,394 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 139 transitions. [2024-10-31 21:56:30,396 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:30,397 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 117 states and 139 transitions. [2024-10-31 21:56:30,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2024-10-31 21:56:30,398 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2024-10-31 21:56:30,398 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 139 transitions. [2024-10-31 21:56:30,399 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 21:56:30,399 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 139 transitions. [2024-10-31 21:56:30,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 139 transitions. [2024-10-31 21:56:30,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 62. [2024-10-31 21:56:30,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.2096774193548387) internal successors, (75), 61 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:30,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 75 transitions. [2024-10-31 21:56:30,409 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 75 transitions. [2024-10-31 21:56:30,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-31 21:56:30,410 INFO L425 stractBuchiCegarLoop]: Abstraction has 62 states and 75 transitions. [2024-10-31 21:56:30,411 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-31 21:56:30,411 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 75 transitions. [2024-10-31 21:56:30,412 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:30,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:30,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:30,413 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 9, 1, 1, 1, 1] [2024-10-31 21:56:30,414 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 21:56:30,414 INFO L745 eck$LassoCheckResult]: Stem: 607#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 600#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 594#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 595#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 596#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 597#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 608#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 643#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 641#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 639#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 637#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 635#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 633#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 631#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 629#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 627#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 625#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 623#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 621#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 619#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 617#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 615#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 614#L21-3 assume !(main_~i~0#1 < 100000); 609#L21-4 main_~i~0#1 := 0; 610#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 606#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 603#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 604#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 611#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 653#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 652#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 651#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 650#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 649#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 648#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 647#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 646#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 645#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 644#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 642#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 640#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 638#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 636#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 634#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 632#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 630#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 628#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 626#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 624#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 622#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 620#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 618#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 613#L28 [2024-10-31 21:56:30,414 INFO L747 eck$LassoCheckResult]: Loop: 613#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#1(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 616#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 612#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 613#L28 [2024-10-31 21:56:30,415 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:30,415 INFO L85 PathProgramCache]: Analyzing trace with hash 403223997, now seen corresponding path program 2 times [2024-10-31 21:56:30,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:30,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666165189] [2024-10-31 21:56:30,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:30,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:30,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:30,814 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2024-10-31 21:56:30,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 21:56:30,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1666165189] [2024-10-31 21:56:30,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1666165189] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 21:56:30,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [60647787] [2024-10-31 21:56:30,814 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 21:56:30,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:30,815 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:30,818 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:30,820 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-10-31 21:56:30,936 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-31 21:56:30,936 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 21:56:30,940 INFO L255 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-10-31 21:56:30,942 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 21:56:31,002 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2024-10-31 21:56:31,002 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 21:56:31,377 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2024-10-31 21:56:31,378 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [60647787] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 21:56:31,378 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 21:56:31,378 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-10-31 21:56:31,378 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371564965] [2024-10-31 21:56:31,379 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 21:56:31,379 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 21:56:31,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:31,382 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 4 times [2024-10-31 21:56:31,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:31,383 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1147515815] [2024-10-31 21:56:31,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:31,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:31,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-10-31 21:56:31,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [380943790] [2024-10-31 21:56:31,395 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-31 21:56:31,395 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:31,395 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:31,397 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:31,400 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2024-10-31 21:56:31,454 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-31 21:56:31,454 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-10-31 21:56:31,455 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:31,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:31,463 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:31,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 21:56:31,612 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-10-31 21:56:31,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-10-31 21:56:31,613 INFO L87 Difference]: Start difference. First operand 62 states and 75 transitions. cyclomatic complexity: 16 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:32,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 21:56:32,147 INFO L93 Difference]: Finished difference Result 249 states and 295 transitions. [2024-10-31 21:56:32,148 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 295 transitions. [2024-10-31 21:56:32,150 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:32,152 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 249 states and 295 transitions. [2024-10-31 21:56:32,152 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 205 [2024-10-31 21:56:32,153 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 205 [2024-10-31 21:56:32,153 INFO L73 IsDeterministic]: Start isDeterministic. Operand 249 states and 295 transitions. [2024-10-31 21:56:32,154 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 21:56:32,154 INFO L218 hiAutomatonCegarLoop]: Abstraction has 249 states and 295 transitions. [2024-10-31 21:56:32,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states and 295 transitions. [2024-10-31 21:56:32,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 122. [2024-10-31 21:56:32,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 122 states have (on average 1.2049180327868851) internal successors, (147), 121 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:32,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 147 transitions. [2024-10-31 21:56:32,161 INFO L240 hiAutomatonCegarLoop]: Abstraction has 122 states and 147 transitions. [2024-10-31 21:56:32,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-31 21:56:32,163 INFO L425 stractBuchiCegarLoop]: Abstraction has 122 states and 147 transitions. [2024-10-31 21:56:32,163 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-31 21:56:32,163 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 122 states and 147 transitions. [2024-10-31 21:56:32,164 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:32,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:32,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:32,167 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 22, 21, 21, 1, 1, 1, 1] [2024-10-31 21:56:32,167 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 21:56:32,167 INFO L745 eck$LassoCheckResult]: Stem: 1253#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 1245#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 1237#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1238#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1239#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1240#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1338#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1336#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1334#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1332#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1330#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1328#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1326#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1324#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1322#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1320#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1318#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1316#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1314#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1312#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1310#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1308#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1306#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1304#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1302#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1300#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1298#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1296#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1294#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1292#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1290#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1288#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1286#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1284#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1282#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1280#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1278#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1276#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1274#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1272#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1270#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1268#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1266#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1264#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1262#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1260#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1259#L21-3 assume !(main_~i~0#1 < 100000); 1254#L21-4 main_~i~0#1 := 0; 1255#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1256#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1248#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1249#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1251#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1252#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1358#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1357#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1356#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1355#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1354#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1353#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1352#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1351#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1350#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1349#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1348#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1347#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1346#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1345#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1344#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1343#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1342#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1341#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1340#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1339#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1337#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1335#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1333#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1331#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1329#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1327#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1325#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1323#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1321#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1319#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1317#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1315#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1313#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1311#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1309#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1307#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1305#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1303#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1301#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1299#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1297#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1295#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1293#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1291#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1289#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1287#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1285#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1283#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1281#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1279#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1277#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1275#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1273#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1271#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1269#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1267#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1265#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1263#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1258#L28 [2024-10-31 21:56:32,167 INFO L747 eck$LassoCheckResult]: Loop: 1258#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#1(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1261#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1257#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1258#L28 [2024-10-31 21:56:32,168 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:32,168 INFO L85 PathProgramCache]: Analyzing trace with hash 615339989, now seen corresponding path program 3 times [2024-10-31 21:56:32,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:32,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676489017] [2024-10-31 21:56:32,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:32,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:32,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:33,336 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2024-10-31 21:56:33,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 21:56:33,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676489017] [2024-10-31 21:56:33,337 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1676489017] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 21:56:33,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1415773011] [2024-10-31 21:56:33,337 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 21:56:33,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:33,337 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:33,343 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:33,344 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2024-10-31 21:56:42,535 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2024-10-31 21:56:42,535 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 21:56:42,546 INFO L255 TraceCheckSpWp]: Trace formula consists of 568 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-10-31 21:56:42,550 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 21:56:42,680 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2024-10-31 21:56:42,680 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 21:56:43,731 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2024-10-31 21:56:43,731 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1415773011] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 21:56:43,732 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 21:56:43,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-10-31 21:56:43,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186879460] [2024-10-31 21:56:43,733 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 21:56:43,734 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 21:56:43,735 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:43,735 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 5 times [2024-10-31 21:56:43,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:43,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104812538] [2024-10-31 21:56:43,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:43,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:43,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-10-31 21:56:43,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2016522800] [2024-10-31 21:56:43,747 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-31 21:56:43,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:43,747 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:43,749 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:43,751 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2024-10-31 21:56:43,815 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-10-31 21:56:43,815 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-10-31 21:56:43,815 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:43,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:43,826 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:43,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 21:56:43,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-10-31 21:56:43,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-10-31 21:56:43,966 INFO L87 Difference]: Start difference. First operand 122 states and 147 transitions. cyclomatic complexity: 28 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:45,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 21:56:45,267 INFO L93 Difference]: Finished difference Result 513 states and 607 transitions. [2024-10-31 21:56:45,267 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 513 states and 607 transitions. [2024-10-31 21:56:45,271 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:45,277 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 513 states to 513 states and 607 transitions. [2024-10-31 21:56:45,280 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 421 [2024-10-31 21:56:45,281 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 421 [2024-10-31 21:56:45,281 INFO L73 IsDeterministic]: Start isDeterministic. Operand 513 states and 607 transitions. [2024-10-31 21:56:45,283 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 21:56:45,283 INFO L218 hiAutomatonCegarLoop]: Abstraction has 513 states and 607 transitions. [2024-10-31 21:56:45,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states and 607 transitions. [2024-10-31 21:56:45,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 242. [2024-10-31 21:56:45,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.2024793388429753) internal successors, (291), 241 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 21:56:45,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 291 transitions. [2024-10-31 21:56:45,313 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 291 transitions. [2024-10-31 21:56:45,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-10-31 21:56:45,314 INFO L425 stractBuchiCegarLoop]: Abstraction has 242 states and 291 transitions. [2024-10-31 21:56:45,314 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-31 21:56:45,314 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 291 transitions. [2024-10-31 21:56:45,316 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-10-31 21:56:45,316 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 21:56:45,316 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 21:56:45,323 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 46, 45, 45, 1, 1, 1, 1] [2024-10-31 21:56:45,323 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 21:56:45,324 INFO L745 eck$LassoCheckResult]: Stem: 2606#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 2598#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 2590#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2591#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2592#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2593#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2787#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2785#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2783#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2781#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2779#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2777#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2775#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2773#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2771#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2769#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2767#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2765#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2763#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2761#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2759#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2757#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2755#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2753#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2751#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2749#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2747#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2745#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2743#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2741#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2739#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2737#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2735#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2733#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2731#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2729#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2727#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2725#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2723#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2721#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2719#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2717#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2715#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2713#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2711#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2709#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2707#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2705#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2703#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2701#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2699#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2697#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2695#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2693#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2691#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2689#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2687#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2685#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2683#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2681#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2679#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2677#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2675#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2673#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2671#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2669#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2667#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2665#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2663#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2661#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2659#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2657#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2655#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2653#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2651#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2649#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2647#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2645#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2643#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2641#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2639#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2637#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2635#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2633#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2631#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2629#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2627#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2625#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2623#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2621#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2619#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2617#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2615#L21-3 assume !!(main_~i~0#1 < 100000);call write~int#1(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2613#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2612#L21-3 assume !(main_~i~0#1 < 100000); 2607#L21-4 main_~i~0#1 := 0; 2608#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2609#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2601#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2602#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2604#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2605#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2831#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2830#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2829#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2828#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2827#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2826#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2825#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2824#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2823#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2822#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2821#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2820#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2819#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2818#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2817#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2816#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2815#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2814#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2813#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2812#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2811#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2810#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2809#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2808#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2807#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2806#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2805#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2804#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2803#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2802#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2801#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2800#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2799#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2798#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2797#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2796#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2795#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2794#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2793#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2792#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2791#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2790#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2789#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2788#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2786#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2784#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2782#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2780#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2778#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2776#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2774#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2772#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2770#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2768#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2766#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2764#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2762#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2760#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2758#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2756#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2754#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2752#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2750#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2748#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2746#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2744#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2742#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2740#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2738#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2736#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2734#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2732#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2730#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2728#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2726#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2724#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2722#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2720#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2718#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2716#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2714#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2712#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2710#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2708#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2706#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2704#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2702#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2700#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2698#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2696#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2694#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2692#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2690#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2688#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2686#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2684#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2682#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2680#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2678#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2676#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2674#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2672#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2670#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2668#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2666#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2664#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2662#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2660#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2658#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2656#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2654#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2652#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2650#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2648#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2646#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2644#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2642#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2640#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2638#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2636#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2634#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2632#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2630#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2628#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2626#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2624#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2622#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2620#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2618#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2616#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2611#L28 [2024-10-31 21:56:45,324 INFO L747 eck$LassoCheckResult]: Loop: 2611#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#1(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#2(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2614#L26-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2610#L26-3 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2611#L28 [2024-10-31 21:56:45,325 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:45,325 INFO L85 PathProgramCache]: Analyzing trace with hash 982432773, now seen corresponding path program 4 times [2024-10-31 21:56:45,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:45,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101818418] [2024-10-31 21:56:45,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:45,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:45,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 21:56:48,975 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2024-10-31 21:56:48,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 21:56:48,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101818418] [2024-10-31 21:56:48,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2101818418] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 21:56:48,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2139751303] [2024-10-31 21:56:48,976 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-31 21:56:48,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:48,977 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:48,979 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:48,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2024-10-31 21:56:49,278 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-31 21:56:49,278 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 21:56:49,283 INFO L255 TraceCheckSpWp]: Trace formula consists of 1144 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-10-31 21:56:49,290 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 21:56:49,522 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2024-10-31 21:56:49,522 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 21:56:53,146 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2024-10-31 21:56:53,146 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2139751303] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 21:56:53,146 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 21:56:53,146 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-10-31 21:56:53,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381306385] [2024-10-31 21:56:53,147 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 21:56:53,147 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 21:56:53,148 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 21:56:53,148 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 6 times [2024-10-31 21:56:53,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 21:56:53,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1917675832] [2024-10-31 21:56:53,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 21:56:53,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 21:56:53,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-10-31 21:56:53,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [697103651] [2024-10-31 21:56:53,157 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-31 21:56:53,157 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 21:56:53,158 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 21:56:53,160 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 21:56:53,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a30b2a85-28e5-41d5-b1a6-898375f8a032/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2024-10-31 21:56:53,243 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2024-10-31 21:56:53,243 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-10-31 21:56:53,243 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 21:56:53,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 21:56:53,250 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 21:56:53,382 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 21:56:53,384 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-10-31 21:56:53,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-10-31 21:56:53,387 INFO L87 Difference]: Start difference. First operand 242 states and 291 transitions. cyclomatic complexity: 52 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)