./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/bitvector/byte_add-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/bitvector/byte_add-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7dfc9f1e1cbceb1807370dcac22a0449d857eff9a54bdefbc84178983a910e84 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:17:21,423 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:17:21,514 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 22:17:21,520 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:17:21,521 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:17:21,564 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:17:21,565 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:17:21,565 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:17:21,566 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:17:21,567 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:17:21,568 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:17:21,569 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:17:21,569 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:17:21,571 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:17:21,572 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:17:21,572 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:17:21,576 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:17:21,576 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:17:21,577 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:17:21,577 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:17:21,577 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:17:21,578 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 22:17:21,578 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:17:21,578 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 22:17:21,579 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:17:21,579 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:17:21,579 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:17:21,582 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:17:21,583 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:17:21,583 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:17:21,584 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 22:17:21,584 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:17:21,584 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:17:21,585 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:17:21,585 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:17:21,585 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:17:21,586 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:17:21,586 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:17:21,586 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:17:21,587 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7dfc9f1e1cbceb1807370dcac22a0449d857eff9a54bdefbc84178983a910e84 [2024-10-31 22:17:21,889 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:17:21,942 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:17:21,947 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:17:21,949 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:17:21,951 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:17:21,952 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/bitvector/byte_add-1.i Unable to find full path for "g++" [2024-10-31 22:17:24,164 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:17:24,457 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:17:24,458 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/sv-benchmarks/c/bitvector/byte_add-1.i [2024-10-31 22:17:24,467 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/data/81cd49ff9/7b538aa8e40e4cba95fc6a42bfa3b7dc/FLAG5f5162c02 [2024-10-31 22:17:24,480 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/data/81cd49ff9/7b538aa8e40e4cba95fc6a42bfa3b7dc [2024-10-31 22:17:24,482 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:17:24,484 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:17:24,485 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:17:24,485 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:17:24,494 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:17:24,495 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:24,496 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ac14c68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24, skipping insertion in model container [2024-10-31 22:17:24,496 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:24,534 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:17:24,844 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:17:24,858 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:17:24,911 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:17:24,931 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:17:24,931 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24 WrapperNode [2024-10-31 22:17:24,931 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:17:24,933 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:17:24,933 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:17:24,933 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:17:24,943 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:24,952 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:24,994 INFO L138 Inliner]: procedures = 16, calls = 9, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 151 [2024-10-31 22:17:24,995 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:17:24,996 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:17:24,996 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:17:24,996 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:17:25,009 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,009 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,013 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,031 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-31 22:17:25,031 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,031 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,044 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,053 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,056 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,058 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,062 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:17:25,063 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:17:25,063 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:17:25,063 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:17:25,064 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (1/1) ... [2024-10-31 22:17:25,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:25,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:25,119 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:25,126 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:17:25,162 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-31 22:17:25,162 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-31 22:17:25,163 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:17:25,163 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:17:25,255 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:17:25,258 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:17:25,753 INFO L? ?]: Removed 37 outVars from TransFormulas that were not future-live. [2024-10-31 22:17:25,753 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:17:25,771 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:17:25,772 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-31 22:17:25,772 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:17:25 BoogieIcfgContainer [2024-10-31 22:17:25,772 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:17:25,773 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:17:25,773 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:17:25,779 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:17:25,780 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:17:25,780 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:17:24" (1/3) ... [2024-10-31 22:17:25,781 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@22fdb7dd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:17:25, skipping insertion in model container [2024-10-31 22:17:25,781 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:17:25,781 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:17:24" (2/3) ... [2024-10-31 22:17:25,782 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@22fdb7dd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:17:25, skipping insertion in model container [2024-10-31 22:17:25,782 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:17:25,782 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:17:25" (3/3) ... [2024-10-31 22:17:25,786 INFO L332 chiAutomizerObserver]: Analyzing ICFG byte_add-1.i [2024-10-31 22:17:25,858 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:17:25,858 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:17:25,858 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:17:25,858 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:17:25,858 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:17:25,859 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:17:25,859 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:17:25,859 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:17:25,863 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.7254901960784315) internal successors, (88), 51 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:25,884 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 23 [2024-10-31 22:17:25,886 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:25,886 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:25,894 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-10-31 22:17:25,895 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:25,895 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:17:25,895 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.7254901960784315) internal successors, (88), 51 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:25,899 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 23 [2024-10-31 22:17:25,899 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:25,899 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:25,900 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-10-31 22:17:25,900 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:25,906 INFO L745 eck$LassoCheckResult]: Stem: 25#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 33#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 30#L59true assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 10#L59-1true mp_add_~nb~0#1 := 4; 11#L69true assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 48#L69-1true mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 15#L80-2true [2024-10-31 22:17:25,907 INFO L747 eck$LassoCheckResult]: Loop: 15#L80-2true assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21#L83true assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 52#L83-1true assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6#L89true assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 29#L95-1true assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 40#L99-1true assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 8#L100-1true assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 17#L101-1true assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 18#L102-1true mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 15#L80-2true [2024-10-31 22:17:25,913 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:25,913 INFO L85 PathProgramCache]: Analyzing trace with hash 889938151, now seen corresponding path program 1 times [2024-10-31 22:17:25,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:25,924 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286669001] [2024-10-31 22:17:25,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:25,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:26,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:26,073 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:26,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:26,151 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:26,154 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:26,155 INFO L85 PathProgramCache]: Analyzing trace with hash 318197182, now seen corresponding path program 1 times [2024-10-31 22:17:26,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:26,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693613659] [2024-10-31 22:17:26,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:26,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:26,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:26,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:26,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:26,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [693613659] [2024-10-31 22:17:26,262 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [693613659] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:26,262 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:26,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:17:26,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024305377] [2024-10-31 22:17:26,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:26,268 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:26,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:26,304 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:17:26,304 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:17:26,307 INFO L87 Difference]: Start difference. First operand has 52 states, 51 states have (on average 1.7254901960784315) internal successors, (88), 51 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:26,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:26,533 INFO L93 Difference]: Finished difference Result 74 states and 110 transitions. [2024-10-31 22:17:26,534 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 110 transitions. [2024-10-31 22:17:26,541 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 41 [2024-10-31 22:17:26,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 56 states and 86 transitions. [2024-10-31 22:17:26,546 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2024-10-31 22:17:26,546 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2024-10-31 22:17:26,547 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 86 transitions. [2024-10-31 22:17:26,548 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:26,548 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 86 transitions. [2024-10-31 22:17:26,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 86 transitions. [2024-10-31 22:17:26,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 54. [2024-10-31 22:17:26,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.5555555555555556) internal successors, (84), 53 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:26,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 84 transitions. [2024-10-31 22:17:26,571 INFO L240 hiAutomatonCegarLoop]: Abstraction has 54 states and 84 transitions. [2024-10-31 22:17:26,573 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:17:26,576 INFO L425 stractBuchiCegarLoop]: Abstraction has 54 states and 84 transitions. [2024-10-31 22:17:26,577 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:17:26,577 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 84 transitions. [2024-10-31 22:17:26,578 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 39 [2024-10-31 22:17:26,579 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:26,579 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:26,579 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:26,579 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:26,580 INFO L745 eck$LassoCheckResult]: Stem: 174#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 148#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 135#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 136#L59-1 mp_add_~nb~0#1 := 4; 153#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 146#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 172#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 182#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 180#L83-1 [2024-10-31 22:17:26,580 INFO L747 eck$LassoCheckResult]: Loop: 180#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 139#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 140#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 175#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 178#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 163#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 164#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 158#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 159#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 169#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 156#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 173#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 181#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 180#L83-1 [2024-10-31 22:17:26,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:26,581 INFO L85 PathProgramCache]: Analyzing trace with hash 532072804, now seen corresponding path program 1 times [2024-10-31 22:17:26,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:26,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111191256] [2024-10-31 22:17:26,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:26,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:26,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:26,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:26,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:26,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111191256] [2024-10-31 22:17:26,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1111191256] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:26,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:26,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:17:26,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349398109] [2024-10-31 22:17:26,959 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:26,960 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:26,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:26,961 INFO L85 PathProgramCache]: Analyzing trace with hash 1939143242, now seen corresponding path program 1 times [2024-10-31 22:17:26,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:26,962 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098252859] [2024-10-31 22:17:26,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:26,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:26,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:27,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:27,143 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:27,143 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098252859] [2024-10-31 22:17:27,143 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2098252859] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:27,143 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:27,143 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:17:27,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828903569] [2024-10-31 22:17:27,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:27,146 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:27,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:27,147 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:17:27,147 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:17:27,147 INFO L87 Difference]: Start difference. First operand 54 states and 84 transitions. cyclomatic complexity: 32 Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:27,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:27,519 INFO L93 Difference]: Finished difference Result 140 states and 215 transitions. [2024-10-31 22:17:27,519 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 140 states and 215 transitions. [2024-10-31 22:17:27,522 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 99 [2024-10-31 22:17:27,527 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 140 states to 140 states and 215 transitions. [2024-10-31 22:17:27,527 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 140 [2024-10-31 22:17:27,528 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 140 [2024-10-31 22:17:27,528 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 215 transitions. [2024-10-31 22:17:27,529 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:27,529 INFO L218 hiAutomatonCegarLoop]: Abstraction has 140 states and 215 transitions. [2024-10-31 22:17:27,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 215 transitions. [2024-10-31 22:17:27,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 78. [2024-10-31 22:17:27,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.4487179487179487) internal successors, (113), 77 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:27,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 113 transitions. [2024-10-31 22:17:27,536 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78 states and 113 transitions. [2024-10-31 22:17:27,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:17:27,539 INFO L425 stractBuchiCegarLoop]: Abstraction has 78 states and 113 transitions. [2024-10-31 22:17:27,539 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:17:27,539 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 113 transitions. [2024-10-31 22:17:27,540 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 39 [2024-10-31 22:17:27,540 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:27,540 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:27,541 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:27,541 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:27,541 INFO L745 eck$LassoCheckResult]: Stem: 386#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 355#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 345#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 347#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 348#L59-1 mp_add_~nb~0#1 := 4; 360#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 384#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 385#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 392#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 414#L83-1 [2024-10-31 22:17:27,545 INFO L747 eck$LassoCheckResult]: Loop: 414#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 416#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 388#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 389#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 415#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 373#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 374#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 394#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 395#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 380#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 364#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 368#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 369#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 414#L83-1 [2024-10-31 22:17:27,545 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:27,545 INFO L85 PathProgramCache]: Analyzing trace with hash -384676570, now seen corresponding path program 1 times [2024-10-31 22:17:27,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:27,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824870940] [2024-10-31 22:17:27,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:27,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:27,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:27,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:27,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:27,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1824870940] [2024-10-31 22:17:27,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1824870940] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:27,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:27,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:17:27,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436929576] [2024-10-31 22:17:27,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:27,739 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:27,739 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:27,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1939143242, now seen corresponding path program 2 times [2024-10-31 22:17:27,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:27,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111843689] [2024-10-31 22:17:27,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:27,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:27,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:27,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:27,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:27,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111843689] [2024-10-31 22:17:27,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2111843689] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:27,846 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:27,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:17:27,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1710518620] [2024-10-31 22:17:27,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:27,847 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:27,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:27,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-31 22:17:27,848 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-10-31 22:17:27,848 INFO L87 Difference]: Start difference. First operand 78 states and 113 transitions. cyclomatic complexity: 37 Second operand has 6 states, 5 states have (on average 1.8) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:28,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:28,221 INFO L93 Difference]: Finished difference Result 170 states and 246 transitions. [2024-10-31 22:17:28,221 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 170 states and 246 transitions. [2024-10-31 22:17:28,223 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 99 [2024-10-31 22:17:28,225 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 170 states to 170 states and 246 transitions. [2024-10-31 22:17:28,225 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 170 [2024-10-31 22:17:28,226 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 170 [2024-10-31 22:17:28,226 INFO L73 IsDeterministic]: Start isDeterministic. Operand 170 states and 246 transitions. [2024-10-31 22:17:28,227 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:28,227 INFO L218 hiAutomatonCegarLoop]: Abstraction has 170 states and 246 transitions. [2024-10-31 22:17:28,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states and 246 transitions. [2024-10-31 22:17:28,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 85. [2024-10-31 22:17:28,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 85 states have (on average 1.4470588235294117) internal successors, (123), 84 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:28,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 123 transitions. [2024-10-31 22:17:28,233 INFO L240 hiAutomatonCegarLoop]: Abstraction has 85 states and 123 transitions. [2024-10-31 22:17:28,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-31 22:17:28,235 INFO L425 stractBuchiCegarLoop]: Abstraction has 85 states and 123 transitions. [2024-10-31 22:17:28,235 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:17:28,235 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 85 states and 123 transitions. [2024-10-31 22:17:28,236 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 39 [2024-10-31 22:17:28,236 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:28,237 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:28,237 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:28,237 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:28,238 INFO L745 eck$LassoCheckResult]: Stem: 648#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 621#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 610#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 612#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 613#L59-1 mp_add_~nb~0#1 := 4; 677#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 653#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 631#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 632#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 628#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 629#L84-2 [2024-10-31 22:17:28,238 INFO L747 eck$LassoCheckResult]: Loop: 629#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 633#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 622#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 623#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 607#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 608#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 627#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 616#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 617#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 637#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 638#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 652#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 644#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 629#L84-2 [2024-10-31 22:17:28,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:28,239 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 1 times [2024-10-31 22:17:28,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:28,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727407502] [2024-10-31 22:17:28,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:28,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:28,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:28,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:28,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:28,289 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:28,289 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:28,290 INFO L85 PathProgramCache]: Analyzing trace with hash 119486142, now seen corresponding path program 3 times [2024-10-31 22:17:28,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:28,290 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280800442] [2024-10-31 22:17:28,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:28,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:28,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:28,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:28,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:28,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280800442] [2024-10-31 22:17:28,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [280800442] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:28,399 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:28,399 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:17:28,399 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674121908] [2024-10-31 22:17:28,400 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:28,400 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:28,400 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:28,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:17:28,401 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:17:28,401 INFO L87 Difference]: Start difference. First operand 85 states and 123 transitions. cyclomatic complexity: 40 Second operand has 4 states, 3 states have (on average 4.333333333333333) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:28,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:28,599 INFO L93 Difference]: Finished difference Result 110 states and 164 transitions. [2024-10-31 22:17:28,599 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 110 states and 164 transitions. [2024-10-31 22:17:28,600 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 64 [2024-10-31 22:17:28,602 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 110 states to 110 states and 164 transitions. [2024-10-31 22:17:28,604 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2024-10-31 22:17:28,605 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2024-10-31 22:17:28,605 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 164 transitions. [2024-10-31 22:17:28,605 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:28,605 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 164 transitions. [2024-10-31 22:17:28,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 164 transitions. [2024-10-31 22:17:28,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 102. [2024-10-31 22:17:28,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.4705882352941178) internal successors, (150), 101 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:28,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 150 transitions. [2024-10-31 22:17:28,618 INFO L240 hiAutomatonCegarLoop]: Abstraction has 102 states and 150 transitions. [2024-10-31 22:17:28,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:17:28,619 INFO L425 stractBuchiCegarLoop]: Abstraction has 102 states and 150 transitions. [2024-10-31 22:17:28,622 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-31 22:17:28,622 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102 states and 150 transitions. [2024-10-31 22:17:28,623 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56 [2024-10-31 22:17:28,623 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:28,623 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:28,624 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:28,624 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:28,624 INFO L745 eck$LassoCheckResult]: Stem: 851#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 823#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 812#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 814#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 815#L59-1 mp_add_~nb~0#1 := 4; 828#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 849#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 850#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 909#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 831#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 832#L84-2 [2024-10-31 22:17:28,625 INFO L747 eck$LassoCheckResult]: Loop: 832#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 835#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 824#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 825#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 894#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 874#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 889#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 888#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 842#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 843#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 858#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 859#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 852#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 808#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 809#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 829#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 818#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 819#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 868#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 866#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 867#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 904#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 832#L84-2 [2024-10-31 22:17:28,625 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:28,625 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 2 times [2024-10-31 22:17:28,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:28,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878288875] [2024-10-31 22:17:28,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:28,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:28,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:28,663 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:28,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:28,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:28,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:28,698 INFO L85 PathProgramCache]: Analyzing trace with hash 522403369, now seen corresponding path program 1 times [2024-10-31 22:17:28,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:28,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920351137] [2024-10-31 22:17:28,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:28,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:28,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:28,751 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-31 22:17:28,751 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:28,751 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920351137] [2024-10-31 22:17:28,752 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1920351137] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:28,752 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:28,752 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:17:28,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135448350] [2024-10-31 22:17:28,752 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:28,753 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:28,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:28,753 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:17:28,754 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:17:28,755 INFO L87 Difference]: Start difference. First operand 102 states and 150 transitions. cyclomatic complexity: 50 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:28,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:28,877 INFO L93 Difference]: Finished difference Result 127 states and 184 transitions. [2024-10-31 22:17:28,877 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 127 states and 184 transitions. [2024-10-31 22:17:28,878 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2024-10-31 22:17:28,880 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 127 states to 127 states and 184 transitions. [2024-10-31 22:17:28,881 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2024-10-31 22:17:28,881 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2024-10-31 22:17:28,881 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 184 transitions. [2024-10-31 22:17:28,882 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:28,882 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 184 transitions. [2024-10-31 22:17:28,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 184 transitions. [2024-10-31 22:17:28,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2024-10-31 22:17:28,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 125 states have (on average 1.456) internal successors, (182), 124 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:28,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 182 transitions. [2024-10-31 22:17:28,889 INFO L240 hiAutomatonCegarLoop]: Abstraction has 125 states and 182 transitions. [2024-10-31 22:17:28,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:17:28,890 INFO L425 stractBuchiCegarLoop]: Abstraction has 125 states and 182 transitions. [2024-10-31 22:17:28,891 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-31 22:17:28,891 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 125 states and 182 transitions. [2024-10-31 22:17:28,892 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 79 [2024-10-31 22:17:28,892 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:28,892 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:28,893 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:28,893 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:28,893 INFO L745 eck$LassoCheckResult]: Stem: 1086#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1059#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 1048#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 1050#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 1051#L59-1 mp_add_~nb~0#1 := 4; 1066#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 1055#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 1085#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1082#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1067#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1068#L84-2 [2024-10-31 22:17:28,893 INFO L747 eck$LassoCheckResult]: Loop: 1068#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1084#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1151#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1148#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1139#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1112#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 1111#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1110#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1106#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1103#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1096#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1097#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 1061#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1043#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1044#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1089#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 1057#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1058#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1077#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1100#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1101#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1158#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1068#L84-2 [2024-10-31 22:17:28,894 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:28,894 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 3 times [2024-10-31 22:17:28,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:28,895 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50766914] [2024-10-31 22:17:28,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:28,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:28,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:28,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:28,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:28,950 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:28,951 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:28,952 INFO L85 PathProgramCache]: Analyzing trace with hash 581508713, now seen corresponding path program 1 times [2024-10-31 22:17:28,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:28,952 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517264326] [2024-10-31 22:17:28,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:28,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:28,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:29,041 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:29,042 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:29,042 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1517264326] [2024-10-31 22:17:29,042 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1517264326] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:29,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:29,043 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:17:29,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [417181525] [2024-10-31 22:17:29,044 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:29,044 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:29,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:29,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:17:29,045 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:17:29,045 INFO L87 Difference]: Start difference. First operand 125 states and 182 transitions. cyclomatic complexity: 59 Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:29,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:29,125 INFO L93 Difference]: Finished difference Result 193 states and 284 transitions. [2024-10-31 22:17:29,125 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 284 transitions. [2024-10-31 22:17:29,127 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 147 [2024-10-31 22:17:29,128 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 193 states and 284 transitions. [2024-10-31 22:17:29,129 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 193 [2024-10-31 22:17:29,129 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 193 [2024-10-31 22:17:29,130 INFO L73 IsDeterministic]: Start isDeterministic. Operand 193 states and 284 transitions. [2024-10-31 22:17:29,131 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:29,132 INFO L218 hiAutomatonCegarLoop]: Abstraction has 193 states and 284 transitions. [2024-10-31 22:17:29,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states and 284 transitions. [2024-10-31 22:17:29,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 165. [2024-10-31 22:17:29,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 165 states have (on average 1.490909090909091) internal successors, (246), 164 states have internal predecessors, (246), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:29,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 246 transitions. [2024-10-31 22:17:29,145 INFO L240 hiAutomatonCegarLoop]: Abstraction has 165 states and 246 transitions. [2024-10-31 22:17:29,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:17:29,150 INFO L425 stractBuchiCegarLoop]: Abstraction has 165 states and 246 transitions. [2024-10-31 22:17:29,151 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-31 22:17:29,151 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 165 states and 246 transitions. [2024-10-31 22:17:29,152 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 119 [2024-10-31 22:17:29,152 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:29,152 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:29,153 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:29,153 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:29,153 INFO L745 eck$LassoCheckResult]: Stem: 1416#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1387#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 1368#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 1370#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 1371#L59-1 mp_add_~nb~0#1 := 4; 1392#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 1383#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 1492#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1491#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1489#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1465#L84-2 [2024-10-31 22:17:29,153 INFO L747 eck$LassoCheckResult]: Loop: 1465#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1490#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1488#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1485#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1483#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 1450#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 1446#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1444#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1442#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1440#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1436#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1437#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 1389#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1380#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1419#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1420#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 1394#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1404#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1405#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1398#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1399#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1464#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1465#L84-2 [2024-10-31 22:17:29,156 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:29,156 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 4 times [2024-10-31 22:17:29,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:29,156 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1710005958] [2024-10-31 22:17:29,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:29,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:29,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:29,189 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:29,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:29,208 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:29,211 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:29,211 INFO L85 PathProgramCache]: Analyzing trace with hash -1412635993, now seen corresponding path program 1 times [2024-10-31 22:17:29,211 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:29,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664851437] [2024-10-31 22:17:29,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:29,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:29,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:29,398 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:29,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:29,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1664851437] [2024-10-31 22:17:29,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1664851437] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:29,399 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:29,402 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:17:29,403 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [626117944] [2024-10-31 22:17:29,403 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:29,403 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:29,403 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:29,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:17:29,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:17:29,404 INFO L87 Difference]: Start difference. First operand 165 states and 246 transitions. cyclomatic complexity: 83 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:29,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:29,688 INFO L93 Difference]: Finished difference Result 300 states and 446 transitions. [2024-10-31 22:17:29,688 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 300 states and 446 transitions. [2024-10-31 22:17:29,691 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 249 [2024-10-31 22:17:29,694 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 300 states to 300 states and 446 transitions. [2024-10-31 22:17:29,694 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 300 [2024-10-31 22:17:29,694 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 300 [2024-10-31 22:17:29,695 INFO L73 IsDeterministic]: Start isDeterministic. Operand 300 states and 446 transitions. [2024-10-31 22:17:29,696 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:29,696 INFO L218 hiAutomatonCegarLoop]: Abstraction has 300 states and 446 transitions. [2024-10-31 22:17:29,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states and 446 transitions. [2024-10-31 22:17:29,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 244. [2024-10-31 22:17:29,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 244 states have (on average 1.4918032786885247) internal successors, (364), 243 states have internal predecessors, (364), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:29,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 364 transitions. [2024-10-31 22:17:29,717 INFO L240 hiAutomatonCegarLoop]: Abstraction has 244 states and 364 transitions. [2024-10-31 22:17:29,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:17:29,721 INFO L425 stractBuchiCegarLoop]: Abstraction has 244 states and 364 transitions. [2024-10-31 22:17:29,722 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-31 22:17:29,722 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 244 states and 364 transitions. [2024-10-31 22:17:29,724 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 196 [2024-10-31 22:17:29,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:29,725 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:29,727 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:29,727 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:29,728 INFO L745 eck$LassoCheckResult]: Stem: 1895#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 1863#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 1844#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 1846#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 1847#L59-1 mp_add_~nb~0#1 := 4; 1871#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 1859#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 2041#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2040#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1872#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1873#L84-2 [2024-10-31 22:17:29,729 INFO L747 eck$LassoCheckResult]: Loop: 1873#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2039#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2038#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2035#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 2033#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 1925#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 1926#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1921#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1922#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1917#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1918#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2031#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 2066#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1856#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 1936#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1932#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1929#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 1927#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 1915#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1916#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1989#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1974#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1873#L84-2 [2024-10-31 22:17:29,729 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:29,730 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 5 times [2024-10-31 22:17:29,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:29,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734707830] [2024-10-31 22:17:29,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:29,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:29,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:29,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:29,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:29,796 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:29,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:29,798 INFO L85 PathProgramCache]: Analyzing trace with hash 983324395, now seen corresponding path program 1 times [2024-10-31 22:17:29,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:29,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650031409] [2024-10-31 22:17:29,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:29,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:29,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:29,835 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-31 22:17:29,835 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:29,835 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1650031409] [2024-10-31 22:17:29,835 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1650031409] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:29,836 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:29,836 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:17:29,836 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205691717] [2024-10-31 22:17:29,836 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:29,836 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:29,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:29,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:17:29,837 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:17:29,837 INFO L87 Difference]: Start difference. First operand 244 states and 364 transitions. cyclomatic complexity: 122 Second operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:29,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:29,961 INFO L93 Difference]: Finished difference Result 282 states and 423 transitions. [2024-10-31 22:17:29,961 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 282 states and 423 transitions. [2024-10-31 22:17:29,964 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 234 [2024-10-31 22:17:29,966 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 282 states to 282 states and 423 transitions. [2024-10-31 22:17:29,966 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 282 [2024-10-31 22:17:29,966 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 282 [2024-10-31 22:17:29,967 INFO L73 IsDeterministic]: Start isDeterministic. Operand 282 states and 423 transitions. [2024-10-31 22:17:29,967 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:29,967 INFO L218 hiAutomatonCegarLoop]: Abstraction has 282 states and 423 transitions. [2024-10-31 22:17:29,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states and 423 transitions. [2024-10-31 22:17:29,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 276. [2024-10-31 22:17:29,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 276 states, 276 states have (on average 1.5108695652173914) internal successors, (417), 275 states have internal predecessors, (417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:29,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 417 transitions. [2024-10-31 22:17:29,976 INFO L240 hiAutomatonCegarLoop]: Abstraction has 276 states and 417 transitions. [2024-10-31 22:17:29,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:17:29,978 INFO L425 stractBuchiCegarLoop]: Abstraction has 276 states and 417 transitions. [2024-10-31 22:17:29,978 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-10-31 22:17:29,978 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 276 states and 417 transitions. [2024-10-31 22:17:29,980 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 228 [2024-10-31 22:17:29,980 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:29,981 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:29,981 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:29,982 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:29,982 INFO L745 eck$LassoCheckResult]: Stem: 2421#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 2394#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 2376#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 2378#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 2379#L59-1 mp_add_~nb~0#1 := 4; 2401#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 2390#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 2563#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2560#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 2545#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 2509#L84-2 [2024-10-31 22:17:29,982 INFO L747 eck$LassoCheckResult]: Loop: 2509#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2554#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2553#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2530#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 2527#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 2452#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 2453#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2448#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2449#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2515#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 2432#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2433#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 2595#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 2592#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 2466#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2458#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2457#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2454#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 2455#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 2434#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2435#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 2511#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 2509#L84-2 [2024-10-31 22:17:29,983 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:29,983 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 6 times [2024-10-31 22:17:29,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:29,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690630347] [2024-10-31 22:17:29,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:29,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:30,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:30,003 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:30,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:30,037 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:30,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:30,038 INFO L85 PathProgramCache]: Analyzing trace with hash 1040582697, now seen corresponding path program 1 times [2024-10-31 22:17:30,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:30,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912630458] [2024-10-31 22:17:30,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:30,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:30,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:30,267 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:30,267 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:30,268 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912630458] [2024-10-31 22:17:30,268 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [912630458] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:30,269 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [437021754] [2024-10-31 22:17:30,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:30,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:30,270 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:30,272 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:30,273 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-10-31 22:17:30,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:30,327 INFO L255 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:17:30,329 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:30,398 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:30,398 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:30,467 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:30,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [437021754] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:30,468 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:30,468 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2024-10-31 22:17:30,468 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824815975] [2024-10-31 22:17:30,468 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:30,468 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:30,469 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:30,469 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-31 22:17:30,469 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2024-10-31 22:17:30,469 INFO L87 Difference]: Start difference. First operand 276 states and 417 transitions. cyclomatic complexity: 143 Second operand has 8 states, 8 states have (on average 5.5) internal successors, (44), 8 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:30,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:30,859 INFO L93 Difference]: Finished difference Result 414 states and 586 transitions. [2024-10-31 22:17:30,859 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 414 states and 586 transitions. [2024-10-31 22:17:30,862 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 329 [2024-10-31 22:17:30,864 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 414 states to 414 states and 586 transitions. [2024-10-31 22:17:30,864 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 414 [2024-10-31 22:17:30,865 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 414 [2024-10-31 22:17:30,865 INFO L73 IsDeterministic]: Start isDeterministic. Operand 414 states and 586 transitions. [2024-10-31 22:17:30,866 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:30,866 INFO L218 hiAutomatonCegarLoop]: Abstraction has 414 states and 586 transitions. [2024-10-31 22:17:30,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 414 states and 586 transitions. [2024-10-31 22:17:30,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 414 to 296. [2024-10-31 22:17:30,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 296 states, 296 states have (on average 1.4831081081081081) internal successors, (439), 295 states have internal predecessors, (439), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:30,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 439 transitions. [2024-10-31 22:17:30,905 INFO L240 hiAutomatonCegarLoop]: Abstraction has 296 states and 439 transitions. [2024-10-31 22:17:30,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-31 22:17:30,906 INFO L425 stractBuchiCegarLoop]: Abstraction has 296 states and 439 transitions. [2024-10-31 22:17:30,906 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-10-31 22:17:30,907 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 296 states and 439 transitions. [2024-10-31 22:17:30,908 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 248 [2024-10-31 22:17:30,909 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:30,909 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:30,909 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:30,910 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:30,910 INFO L745 eck$LassoCheckResult]: Stem: 3255#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 3226#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 3215#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 3217#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 3218#L59-1 mp_add_~nb~0#1 := 4; 3234#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 3224#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 3466#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 3467#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 3235#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 3236#L84-2 [2024-10-31 22:17:30,910 INFO L747 eck$LassoCheckResult]: Loop: 3236#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3238#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3227#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3228#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 3480#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 3461#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 3313#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3295#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3280#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3281#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 3266#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 3267#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 3443#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3438#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 3437#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3435#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3432#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 3429#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 3428#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3424#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 3409#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3334#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3401#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 3400#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 3397#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 3391#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 3236#L84-2 [2024-10-31 22:17:30,911 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:30,911 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 7 times [2024-10-31 22:17:30,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:30,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153125761] [2024-10-31 22:17:30,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:30,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:30,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:30,932 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:30,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:30,956 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:30,958 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:30,959 INFO L85 PathProgramCache]: Analyzing trace with hash -1386448425, now seen corresponding path program 1 times [2024-10-31 22:17:30,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:30,959 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134837590] [2024-10-31 22:17:30,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:30,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:30,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:31,058 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:17:31,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:31,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134837590] [2024-10-31 22:17:31,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [134837590] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:31,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:31,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:17:31,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864362690] [2024-10-31 22:17:31,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:31,059 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:31,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:31,059 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:17:31,059 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:17:31,060 INFO L87 Difference]: Start difference. First operand 296 states and 439 transitions. cyclomatic complexity: 145 Second operand has 4 states, 3 states have (on average 8.666666666666666) internal successors, (26), 4 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:31,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:31,286 INFO L93 Difference]: Finished difference Result 436 states and 627 transitions. [2024-10-31 22:17:31,286 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 436 states and 627 transitions. [2024-10-31 22:17:31,289 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 388 [2024-10-31 22:17:31,293 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 436 states to 436 states and 627 transitions. [2024-10-31 22:17:31,293 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 436 [2024-10-31 22:17:31,294 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 436 [2024-10-31 22:17:31,294 INFO L73 IsDeterministic]: Start isDeterministic. Operand 436 states and 627 transitions. [2024-10-31 22:17:31,295 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:31,295 INFO L218 hiAutomatonCegarLoop]: Abstraction has 436 states and 627 transitions. [2024-10-31 22:17:31,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 436 states and 627 transitions. [2024-10-31 22:17:31,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 436 to 352. [2024-10-31 22:17:31,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 352 states, 352 states have (on average 1.4744318181818181) internal successors, (519), 351 states have internal predecessors, (519), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:31,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 352 states to 352 states and 519 transitions. [2024-10-31 22:17:31,305 INFO L240 hiAutomatonCegarLoop]: Abstraction has 352 states and 519 transitions. [2024-10-31 22:17:31,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-31 22:17:31,306 INFO L425 stractBuchiCegarLoop]: Abstraction has 352 states and 519 transitions. [2024-10-31 22:17:31,307 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-10-31 22:17:31,307 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 352 states and 519 transitions. [2024-10-31 22:17:31,309 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 304 [2024-10-31 22:17:31,309 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:31,309 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:31,310 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:31,311 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:31,311 INFO L745 eck$LassoCheckResult]: Stem: 4001#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 3969#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 3951#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 3953#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 3954#L59-1 mp_add_~nb~0#1 := 4; 3974#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 3965#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 4195#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4182#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 4183#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 4088#L84-2 [2024-10-31 22:17:31,312 INFO L747 eck$LassoCheckResult]: Loop: 4088#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4192#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4190#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4191#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 4180#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 4181#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 4086#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4087#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4068#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4069#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 4034#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4035#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 4302#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 4301#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 4176#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4100#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 4048#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4027#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4028#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 4053#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4203#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 4177#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 4284#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 4282#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4091#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4070#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 4064#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4063#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 4062#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4058#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 4059#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 4088#L84-2 [2024-10-31 22:17:31,312 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:31,313 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 8 times [2024-10-31 22:17:31,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:31,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532474687] [2024-10-31 22:17:31,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:31,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:31,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:31,335 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:31,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:31,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:31,348 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:31,349 INFO L85 PathProgramCache]: Analyzing trace with hash -980790750, now seen corresponding path program 1 times [2024-10-31 22:17:31,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:31,349 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1373814633] [2024-10-31 22:17:31,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:31,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:31,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:31,511 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:31,511 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:31,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1373814633] [2024-10-31 22:17:31,511 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1373814633] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:31,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [432613167] [2024-10-31 22:17:31,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:31,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:31,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:31,522 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:31,523 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-10-31 22:17:31,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:31,576 INFO L255 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:17:31,577 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:31,613 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-10-31 22:17:31,614 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:17:31,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [432613167] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:31,614 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:17:31,614 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 7 [2024-10-31 22:17:31,614 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313796956] [2024-10-31 22:17:31,615 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:31,615 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:31,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:31,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:17:31,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:17:31,616 INFO L87 Difference]: Start difference. First operand 352 states and 519 transitions. cyclomatic complexity: 169 Second operand has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:31,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:31,830 INFO L93 Difference]: Finished difference Result 365 states and 486 transitions. [2024-10-31 22:17:31,831 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 365 states and 486 transitions. [2024-10-31 22:17:31,833 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 317 [2024-10-31 22:17:31,835 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 365 states to 365 states and 486 transitions. [2024-10-31 22:17:31,835 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 365 [2024-10-31 22:17:31,836 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 365 [2024-10-31 22:17:31,836 INFO L73 IsDeterministic]: Start isDeterministic. Operand 365 states and 486 transitions. [2024-10-31 22:17:31,836 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:31,837 INFO L218 hiAutomatonCegarLoop]: Abstraction has 365 states and 486 transitions. [2024-10-31 22:17:31,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states and 486 transitions. [2024-10-31 22:17:31,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 318. [2024-10-31 22:17:31,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 318 states, 318 states have (on average 1.3584905660377358) internal successors, (432), 317 states have internal predecessors, (432), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:31,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 432 transitions. [2024-10-31 22:17:31,843 INFO L240 hiAutomatonCegarLoop]: Abstraction has 318 states and 432 transitions. [2024-10-31 22:17:31,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:17:31,844 INFO L425 stractBuchiCegarLoop]: Abstraction has 318 states and 432 transitions. [2024-10-31 22:17:31,844 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-10-31 22:17:31,845 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 318 states and 432 transitions. [2024-10-31 22:17:31,846 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 270 [2024-10-31 22:17:31,846 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:31,846 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:31,847 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:31,847 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:31,848 INFO L745 eck$LassoCheckResult]: Stem: 4816#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 4784#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 4773#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 4775#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 4776#L59-1 mp_add_~nb~0#1 := 4; 4791#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 4782#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 4937#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4936#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 4934#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 4894#L84-2 [2024-10-31 22:17:31,848 INFO L747 eck$LassoCheckResult]: Loop: 4894#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4935#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4932#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4933#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 4983#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 4982#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 4883#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4884#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4873#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4874#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 4845#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4846#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 5019#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 5016#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 4896#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5065#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 4853#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5063#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5059#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 5058#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4906#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 4907#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 4990#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 4988#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4925#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4927#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4919#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4910#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 4909#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4897#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 4893#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 4894#L84-2 [2024-10-31 22:17:31,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:31,848 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 9 times [2024-10-31 22:17:31,849 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:31,849 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437992381] [2024-10-31 22:17:31,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:31,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:31,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:31,864 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:31,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:31,876 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:31,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:31,877 INFO L85 PathProgramCache]: Analyzing trace with hash -923532448, now seen corresponding path program 2 times [2024-10-31 22:17:31,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:31,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309955191] [2024-10-31 22:17:31,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:31,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:31,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:32,062 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 25 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:32,062 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:32,063 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309955191] [2024-10-31 22:17:32,063 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1309955191] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:32,063 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [226297658] [2024-10-31 22:17:32,063 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:17:32,063 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:32,063 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:32,066 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:32,068 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-10-31 22:17:32,122 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-31 22:17:32,122 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:17:32,123 INFO L255 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-10-31 22:17:32,124 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:32,188 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-31 22:17:32,188 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:32,279 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-31 22:17:32,279 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [226297658] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:32,279 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:32,279 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 11 [2024-10-31 22:17:32,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076178660] [2024-10-31 22:17:32,280 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:32,280 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:32,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:32,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-10-31 22:17:32,281 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2024-10-31 22:17:32,281 INFO L87 Difference]: Start difference. First operand 318 states and 432 transitions. cyclomatic complexity: 116 Second operand has 11 states, 11 states have (on average 6.0) internal successors, (66), 11 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:34,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:34,195 INFO L93 Difference]: Finished difference Result 545 states and 670 transitions. [2024-10-31 22:17:34,196 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 545 states and 670 transitions. [2024-10-31 22:17:34,199 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 481 [2024-10-31 22:17:34,203 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 545 states to 545 states and 670 transitions. [2024-10-31 22:17:34,203 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 545 [2024-10-31 22:17:34,203 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 545 [2024-10-31 22:17:34,204 INFO L73 IsDeterministic]: Start isDeterministic. Operand 545 states and 670 transitions. [2024-10-31 22:17:34,204 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:34,205 INFO L218 hiAutomatonCegarLoop]: Abstraction has 545 states and 670 transitions. [2024-10-31 22:17:34,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states and 670 transitions. [2024-10-31 22:17:34,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 344. [2024-10-31 22:17:34,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 344 states, 344 states have (on average 1.2761627906976745) internal successors, (439), 343 states have internal predecessors, (439), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:34,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 439 transitions. [2024-10-31 22:17:34,213 INFO L240 hiAutomatonCegarLoop]: Abstraction has 344 states and 439 transitions. [2024-10-31 22:17:34,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2024-10-31 22:17:34,214 INFO L425 stractBuchiCegarLoop]: Abstraction has 344 states and 439 transitions. [2024-10-31 22:17:34,214 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-10-31 22:17:34,214 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 344 states and 439 transitions. [2024-10-31 22:17:34,216 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 287 [2024-10-31 22:17:34,216 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:34,216 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:34,217 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:34,217 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [7, 7, 6, 6, 6, 6, 5, 5, 4, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:34,218 INFO L745 eck$LassoCheckResult]: Stem: 5975#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 5944#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 5929#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 5931#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 5932#L59-1 mp_add_~nb~0#1 := 4; 5952#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 5940#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 6085#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6083#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 6082#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 6081#L84-2 [2024-10-31 22:17:34,218 INFO L747 eck$LassoCheckResult]: Loop: 6081#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6080#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6079#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6077#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6073#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 6071#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 6069#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6067#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6045#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6037#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6038#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6215#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 5953#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5954#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 6053#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6257#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6255#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6251#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 6245#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6137#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 6136#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6134#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6132#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6130#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6128#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6129#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6158#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 6119#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6150#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6148#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 6143#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5988#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 5989#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6108#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6103#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 6100#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6102#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6101#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6097#L92-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296); 6098#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 6260#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6259#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6253#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6194#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 6190#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6189#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6186#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6179#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6176#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 6174#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6171#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6172#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5943#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5962#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6043#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6063#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6084#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 6065#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6066#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6055#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6057#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6139#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 6138#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6035#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6032#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6031#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6030#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6029#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6027#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6025#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6021#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 6019#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6015#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6013#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6010#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6006#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6003#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6004#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 6058#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 6081#L84-2 [2024-10-31 22:17:34,219 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:34,219 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 10 times [2024-10-31 22:17:34,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:34,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021568106] [2024-10-31 22:17:34,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:34,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:34,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:34,237 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:34,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:34,259 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:34,260 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:34,260 INFO L85 PathProgramCache]: Analyzing trace with hash -1833974370, now seen corresponding path program 1 times [2024-10-31 22:17:34,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:34,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191961794] [2024-10-31 22:17:34,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:34,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:34,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:34,480 INFO L134 CoverageAnalysis]: Checked inductivity of 197 backedges. 131 proven. 5 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-10-31 22:17:34,480 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:34,480 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191961794] [2024-10-31 22:17:34,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [191961794] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:34,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1467970543] [2024-10-31 22:17:34,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:34,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:34,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:34,484 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:34,487 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-31 22:17:34,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:34,556 INFO L255 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-31 22:17:34,558 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:34,650 INFO L134 CoverageAnalysis]: Checked inductivity of 197 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2024-10-31 22:17:34,651 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:17:34,651 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1467970543] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:34,651 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:17:34,651 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 8 [2024-10-31 22:17:34,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1312408880] [2024-10-31 22:17:34,652 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:34,652 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:34,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:34,653 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:17:34,653 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2024-10-31 22:17:34,653 INFO L87 Difference]: Start difference. First operand 344 states and 439 transitions. cyclomatic complexity: 97 Second operand has 4 states, 4 states have (on average 10.75) internal successors, (43), 4 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:34,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:34,757 INFO L93 Difference]: Finished difference Result 605 states and 748 transitions. [2024-10-31 22:17:34,758 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 605 states and 748 transitions. [2024-10-31 22:17:34,761 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 521 [2024-10-31 22:17:34,764 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 605 states to 597 states and 739 transitions. [2024-10-31 22:17:34,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 597 [2024-10-31 22:17:34,765 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 597 [2024-10-31 22:17:34,765 INFO L73 IsDeterministic]: Start isDeterministic. Operand 597 states and 739 transitions. [2024-10-31 22:17:34,766 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:34,766 INFO L218 hiAutomatonCegarLoop]: Abstraction has 597 states and 739 transitions. [2024-10-31 22:17:34,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 597 states and 739 transitions. [2024-10-31 22:17:34,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 597 to 522. [2024-10-31 22:17:34,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 522 states, 522 states have (on average 1.2509578544061302) internal successors, (653), 521 states have internal predecessors, (653), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:34,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 522 states to 522 states and 653 transitions. [2024-10-31 22:17:34,776 INFO L240 hiAutomatonCegarLoop]: Abstraction has 522 states and 653 transitions. [2024-10-31 22:17:34,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:17:34,777 INFO L425 stractBuchiCegarLoop]: Abstraction has 522 states and 653 transitions. [2024-10-31 22:17:34,777 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-10-31 22:17:34,778 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 522 states and 653 transitions. [2024-10-31 22:17:34,780 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 450 [2024-10-31 22:17:34,780 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:34,781 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:34,781 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:34,781 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [7, 7, 6, 6, 6, 6, 5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:34,782 INFO L745 eck$LassoCheckResult]: Stem: 7167#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 7138#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 7123#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 7125#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 7126#L59-1 mp_add_~nb~0#1 := 4; 7146#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 7134#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 7332#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7328#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 7266#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 7259#L84-2 [2024-10-31 22:17:34,782 INFO L747 eck$LassoCheckResult]: Loop: 7259#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7260#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7253#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7254#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 7258#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 7255#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7251#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7252#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7630#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 7627#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 7624#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7621#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7620#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7618#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7610#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7608#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 7161#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 7588#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7560#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 7490#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7559#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7557#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 7556#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7555#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 7237#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7554#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7553#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7550#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7551#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 7619#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 7617#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 7483#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7616#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7614#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 7492#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7241#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7242#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7449#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 7448#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 7445#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7447#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7446#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7442#L92-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296); 7443#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 7495#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7480#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7475#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7471#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 7468#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7467#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7466#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 7465#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 7464#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 7463#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7462#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7460#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7426#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7392#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7393#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7420#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 7419#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7417#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7415#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7414#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7412#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 7411#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 7520#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7517#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7234#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7232#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7229#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7230#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7224#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 7226#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 7220#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 7221#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7214#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7215#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7209#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7210#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7196#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7197#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 7323#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 7259#L84-2 [2024-10-31 22:17:34,783 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:34,783 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 11 times [2024-10-31 22:17:34,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:34,783 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728490180] [2024-10-31 22:17:34,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:34,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:34,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:34,799 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:34,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:34,811 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:34,812 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:34,812 INFO L85 PathProgramCache]: Analyzing trace with hash 1604096996, now seen corresponding path program 1 times [2024-10-31 22:17:34,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:34,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340007668] [2024-10-31 22:17:34,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:34,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:34,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:35,116 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 138 proven. 0 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-10-31 22:17:35,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:35,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340007668] [2024-10-31 22:17:35,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1340007668] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:35,117 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:35,117 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-10-31 22:17:35,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161578216] [2024-10-31 22:17:35,117 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:35,118 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:35,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:35,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-31 22:17:35,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:17:35,119 INFO L87 Difference]: Start difference. First operand 522 states and 653 transitions. cyclomatic complexity: 134 Second operand has 7 states, 7 states have (on average 7.285714285714286) internal successors, (51), 7 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:35,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:35,549 INFO L93 Difference]: Finished difference Result 824 states and 1019 transitions. [2024-10-31 22:17:35,549 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 824 states and 1019 transitions. [2024-10-31 22:17:35,554 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 714 [2024-10-31 22:17:35,558 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 824 states to 816 states and 1008 transitions. [2024-10-31 22:17:35,559 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 816 [2024-10-31 22:17:35,559 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 816 [2024-10-31 22:17:35,560 INFO L73 IsDeterministic]: Start isDeterministic. Operand 816 states and 1008 transitions. [2024-10-31 22:17:35,561 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:35,561 INFO L218 hiAutomatonCegarLoop]: Abstraction has 816 states and 1008 transitions. [2024-10-31 22:17:35,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 816 states and 1008 transitions. [2024-10-31 22:17:35,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 816 to 734. [2024-10-31 22:17:35,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 734 states, 734 states have (on average 1.2547683923705721) internal successors, (921), 733 states have internal predecessors, (921), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:35,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 921 transitions. [2024-10-31 22:17:35,574 INFO L240 hiAutomatonCegarLoop]: Abstraction has 734 states and 921 transitions. [2024-10-31 22:17:35,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-31 22:17:35,575 INFO L425 stractBuchiCegarLoop]: Abstraction has 734 states and 921 transitions. [2024-10-31 22:17:35,575 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-10-31 22:17:35,576 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 734 states and 921 transitions. [2024-10-31 22:17:35,579 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 662 [2024-10-31 22:17:35,579 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:35,579 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:35,580 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:35,580 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [7, 7, 6, 6, 6, 6, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:35,581 INFO L745 eck$LassoCheckResult]: Stem: 8543#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 8511#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 8500#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 8502#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 8503#L59-1 mp_add_~nb~0#1 := 4; 8516#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 8541#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 8542#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8892#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 8891#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 8890#L84-2 [2024-10-31 22:17:35,581 INFO L747 eck$LassoCheckResult]: Loop: 8890#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8889#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8888#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8886#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 8885#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 8884#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8883#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8882#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8881#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 8880#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 8878#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8876#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8874#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8872#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8869#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8870#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 8802#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 8801#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8800#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 8614#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8794#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8790#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 8785#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8782#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 8777#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8775#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8773#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8771#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8762#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 8743#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 8742#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8741#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8740#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 8739#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8737#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 8736#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8735#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8734#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 8733#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8732#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8731#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8729#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 8727#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 8726#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 8724#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8722#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8719#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8715#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 8710#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8707#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8708#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 8798#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 8797#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8796#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8795#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8792#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8786#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 8784#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8781#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8658#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8656#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8637#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8634#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8635#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 8627#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8625#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8623#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8622#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8619#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 8605#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 8603#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8598#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8600#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8594#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8595#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8649#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8647#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 8645#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 8644#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 8643#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8642#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8640#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8639#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8638#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8636#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8630#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 8631#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 8890#L84-2 [2024-10-31 22:17:35,582 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:35,582 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 12 times [2024-10-31 22:17:35,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:35,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642882589] [2024-10-31 22:17:35,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:35,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:35,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:35,595 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:35,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:35,606 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:35,606 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:35,606 INFO L85 PathProgramCache]: Analyzing trace with hash -104737462, now seen corresponding path program 1 times [2024-10-31 22:17:35,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:35,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629061634] [2024-10-31 22:17:35,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:35,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:35,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:35,813 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 139 proven. 41 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-31 22:17:35,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:35,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629061634] [2024-10-31 22:17:35,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [629061634] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:35,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [212538000] [2024-10-31 22:17:35,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:35,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:35,814 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:35,816 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:35,849 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-31 22:17:35,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:35,919 INFO L255 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:17:35,921 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:36,335 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 169 proven. 14 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-10-31 22:17:36,336 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:36,566 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 143 proven. 40 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-10-31 22:17:36,566 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [212538000] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:36,566 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:36,567 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-10-31 22:17:36,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1294745922] [2024-10-31 22:17:36,567 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:36,567 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:36,567 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:36,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-31 22:17:36,568 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2024-10-31 22:17:36,568 INFO L87 Difference]: Start difference. First operand 734 states and 921 transitions. cyclomatic complexity: 191 Second operand has 13 states, 13 states have (on average 8.692307692307692) internal successors, (113), 13 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:38,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:38,736 INFO L93 Difference]: Finished difference Result 2293 states and 2818 transitions. [2024-10-31 22:17:38,736 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2293 states and 2818 transitions. [2024-10-31 22:17:38,749 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 1845 [2024-10-31 22:17:38,759 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2293 states to 2271 states and 2796 transitions. [2024-10-31 22:17:38,759 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2271 [2024-10-31 22:17:38,761 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2271 [2024-10-31 22:17:38,761 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2271 states and 2796 transitions. [2024-10-31 22:17:38,764 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:38,764 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2271 states and 2796 transitions. [2024-10-31 22:17:38,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2271 states and 2796 transitions. [2024-10-31 22:17:38,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2271 to 1568. [2024-10-31 22:17:38,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1568 states, 1568 states have (on average 1.2633928571428572) internal successors, (1981), 1567 states have internal predecessors, (1981), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:38,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1568 states to 1568 states and 1981 transitions. [2024-10-31 22:17:38,796 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1568 states and 1981 transitions. [2024-10-31 22:17:38,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2024-10-31 22:17:38,797 INFO L425 stractBuchiCegarLoop]: Abstraction has 1568 states and 1981 transitions. [2024-10-31 22:17:38,797 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-10-31 22:17:38,798 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1568 states and 1981 transitions. [2024-10-31 22:17:38,806 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 1341 [2024-10-31 22:17:38,806 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:38,806 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:38,807 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:38,807 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [7, 7, 6, 6, 6, 6, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:38,807 INFO L745 eck$LassoCheckResult]: Stem: 12167#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 12139#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 12124#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 12126#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 12127#L59-1 mp_add_~nb~0#1 := 4; 12144#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 12135#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 12252#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12253#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12245#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 12246#L84-2 [2024-10-31 22:17:38,811 INFO L747 eck$LassoCheckResult]: Loop: 12246#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13252#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13251#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13250#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 13249#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 13248#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13247#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13246#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13244#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 13243#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 13242#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13241#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13240#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13239#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 13236#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 13237#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 13167#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13124#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 13121#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13122#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13111#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 13112#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13098#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 13096#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13097#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13162#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 13163#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12940#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 12938#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12936#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12934#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12931#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12932#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12895#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12894#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12893#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 12892#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12890#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 12889#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12888#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12887#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 12886#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12884#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 12883#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12882#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12881#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 12880#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12879#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12878#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12876#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12877#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13033#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13032#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13030#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 13026#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 13028#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 13130#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13129#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13128#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13103#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 13104#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 13017#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 13018#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 12710#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 12711#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 13344#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13342#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13338#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13219#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12777#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12778#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 13156#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 13157#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13152#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13175#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13174#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13172#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 13173#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 13181#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13155#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13154#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13101#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13102#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12408#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12409#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 12361#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 12354#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 12355#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12350#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12351#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12345#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12346#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12341#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12342#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12654#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 12246#L84-2 [2024-10-31 22:17:38,812 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:38,812 INFO L85 PathProgramCache]: Analyzing trace with hash 959927467, now seen corresponding path program 13 times [2024-10-31 22:17:38,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:38,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809636960] [2024-10-31 22:17:38,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:38,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:38,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:38,834 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:38,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:38,856 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:38,857 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:38,857 INFO L85 PathProgramCache]: Analyzing trace with hash 563035476, now seen corresponding path program 1 times [2024-10-31 22:17:38,857 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:38,857 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155311562] [2024-10-31 22:17:38,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:38,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:38,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:39,502 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 163 proven. 9 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-31 22:17:39,502 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:39,502 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155311562] [2024-10-31 22:17:39,502 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155311562] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:39,502 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1626717905] [2024-10-31 22:17:39,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:39,503 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:39,503 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:39,509 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:39,517 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-31 22:17:39,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:39,690 INFO L255 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:17:39,692 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:39,758 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 147 proven. 3 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-10-31 22:17:39,758 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:39,821 INFO L134 CoverageAnalysis]: Checked inductivity of 241 backedges. 147 proven. 3 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-10-31 22:17:39,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1626717905] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:39,821 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:39,821 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 4, 4] total 13 [2024-10-31 22:17:39,821 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [299563241] [2024-10-31 22:17:39,822 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:39,822 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:39,823 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:39,824 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-31 22:17:39,824 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2024-10-31 22:17:39,824 INFO L87 Difference]: Start difference. First operand 1568 states and 1981 transitions. cyclomatic complexity: 421 Second operand has 13 states, 13 states have (on average 7.538461538461538) internal successors, (98), 13 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:43,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:43,036 INFO L93 Difference]: Finished difference Result 2057 states and 2471 transitions. [2024-10-31 22:17:43,037 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2057 states and 2471 transitions. [2024-10-31 22:17:43,049 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 1643 [2024-10-31 22:17:43,059 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2057 states to 2036 states and 2450 transitions. [2024-10-31 22:17:43,060 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2036 [2024-10-31 22:17:43,062 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2036 [2024-10-31 22:17:43,062 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2036 states and 2450 transitions. [2024-10-31 22:17:43,064 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:43,064 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2036 states and 2450 transitions. [2024-10-31 22:17:43,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2036 states and 2450 transitions. [2024-10-31 22:17:43,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2036 to 903. [2024-10-31 22:17:43,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 903 states, 903 states have (on average 1.2081949058693244) internal successors, (1091), 902 states have internal predecessors, (1091), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:43,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 903 states to 903 states and 1091 transitions. [2024-10-31 22:17:43,091 INFO L240 hiAutomatonCegarLoop]: Abstraction has 903 states and 1091 transitions. [2024-10-31 22:17:43,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2024-10-31 22:17:43,092 INFO L425 stractBuchiCegarLoop]: Abstraction has 903 states and 1091 transitions. [2024-10-31 22:17:43,092 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-10-31 22:17:43,092 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 903 states and 1091 transitions. [2024-10-31 22:17:43,096 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 682 [2024-10-31 22:17:43,097 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:43,097 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:43,097 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:43,097 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 2, 2, 1, 1, 1] [2024-10-31 22:17:43,098 INFO L745 eck$LassoCheckResult]: Stem: 16530#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 16498#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 16487#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 16489#L61 assume 0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 16491#L63 assume !(0 == (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296)); 16492#L59-1 mp_add_~nb~0#1 := 4; 16549#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 16546#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 16544#L80-2 assume !(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296)); 16543#L107-1 assume !!((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < 4); 16541#L108 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := 0; 16542#L108-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16550#L109-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16551#L110-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16555#L111-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 16554#L107-1 assume !!((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < 4); 16553#L108 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16552#L108-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := 0; 16517#L109-1 [2024-10-31 22:17:43,098 INFO L747 eck$LassoCheckResult]: Loop: 16517#L109-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16509#L110-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16510#L111-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 16560#L107-1 assume !!((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < 4); 16558#L108 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16536#L108-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16534#L109-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := 0; 16535#L110-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16539#L111-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 16515#L107-1 assume !!((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < 4); 16516#L108 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16522#L108-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16525#L109-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16568#L110-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := 0; 16501#L111-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 16502#L107-1 assume !!((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < 4); 16537#L108 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16538#L108-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := 0; 16517#L109-1 [2024-10-31 22:17:43,098 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:43,098 INFO L85 PathProgramCache]: Analyzing trace with hash -2073809327, now seen corresponding path program 1 times [2024-10-31 22:17:43,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:43,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593100621] [2024-10-31 22:17:43,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:43,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:43,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:43,165 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-31 22:17:43,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:43,166 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593100621] [2024-10-31 22:17:43,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593100621] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:43,166 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:43,166 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:17:43,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572411339] [2024-10-31 22:17:43,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:43,167 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:43,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:43,168 INFO L85 PathProgramCache]: Analyzing trace with hash -830477736, now seen corresponding path program 1 times [2024-10-31 22:17:43,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:43,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240126183] [2024-10-31 22:17:43,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:43,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:43,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:43,223 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:17:43,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:43,224 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240126183] [2024-10-31 22:17:43,224 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1240126183] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:43,224 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2004669238] [2024-10-31 22:17:43,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:43,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:43,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:43,227 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:43,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-31 22:17:43,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:43,328 INFO L255 TraceCheckSpWp]: Trace formula consists of 32 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:17:43,329 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:43,366 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-31 22:17:43,366 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:17:43,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2004669238] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:43,367 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:17:43,370 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 6 [2024-10-31 22:17:43,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1450387364] [2024-10-31 22:17:43,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:43,371 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:43,371 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:43,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:17:43,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:17:43,372 INFO L87 Difference]: Start difference. First operand 903 states and 1091 transitions. cyclomatic complexity: 197 Second operand has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:43,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:43,573 INFO L93 Difference]: Finished difference Result 1014 states and 1195 transitions. [2024-10-31 22:17:43,573 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1014 states and 1195 transitions. [2024-10-31 22:17:43,587 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 741 [2024-10-31 22:17:43,599 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1014 states to 909 states and 1029 transitions. [2024-10-31 22:17:43,599 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 909 [2024-10-31 22:17:43,600 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 909 [2024-10-31 22:17:43,603 INFO L73 IsDeterministic]: Start isDeterministic. Operand 909 states and 1029 transitions. [2024-10-31 22:17:43,605 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:43,609 INFO L218 hiAutomatonCegarLoop]: Abstraction has 909 states and 1029 transitions. [2024-10-31 22:17:43,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 909 states and 1029 transitions. [2024-10-31 22:17:43,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 909 to 769. [2024-10-31 22:17:43,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 769 states, 769 states have (on average 1.1495448634590377) internal successors, (884), 768 states have internal predecessors, (884), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:43,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 769 states to 769 states and 884 transitions. [2024-10-31 22:17:43,629 INFO L240 hiAutomatonCegarLoop]: Abstraction has 769 states and 884 transitions. [2024-10-31 22:17:43,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:17:43,630 INFO L425 stractBuchiCegarLoop]: Abstraction has 769 states and 884 transitions. [2024-10-31 22:17:43,630 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-10-31 22:17:43,630 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 769 states and 884 transitions. [2024-10-31 22:17:43,634 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 653 [2024-10-31 22:17:43,634 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:43,634 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:43,635 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:43,635 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:43,635 INFO L745 eck$LassoCheckResult]: Stem: 18498#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 18479#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 18462#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 18463#L59-1 mp_add_~nb~0#1 := 4; 18484#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 18477#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 18522#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 18523#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 18519#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 18520#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18515#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18516#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18503#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 18468#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 18469#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 18483#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18474#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18475#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18490#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19204#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19173#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19154#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19155#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 19115#L85-1 [2024-10-31 22:17:43,636 INFO L747 eck$LassoCheckResult]: Loop: 19115#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19211#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19210#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 19208#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 19205#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19206#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 19199#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19200#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19194#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19195#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19170#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 18485#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18486#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19120#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 19112#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19165#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 19164#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 19163#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19162#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19161#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 19160#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19159#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19156#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19153#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19152#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19151#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19150#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19149#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 19148#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 19146#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 19144#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19145#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19140#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19141#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 19136#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19137#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19187#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19133#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19132#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19130#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19131#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19127#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 19128#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 19124#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19123#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19122#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19121#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19119#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19118#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19117#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19116#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19114#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 19115#L85-1 [2024-10-31 22:17:43,636 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:43,636 INFO L85 PathProgramCache]: Analyzing trace with hash 847980263, now seen corresponding path program 1 times [2024-10-31 22:17:43,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:43,637 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101318332] [2024-10-31 22:17:43,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:43,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:43,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:43,783 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:43,784 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:43,784 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101318332] [2024-10-31 22:17:43,784 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1101318332] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:43,784 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:43,784 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:17:43,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723912959] [2024-10-31 22:17:43,785 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:43,785 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:43,785 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:43,786 INFO L85 PathProgramCache]: Analyzing trace with hash -95611915, now seen corresponding path program 1 times [2024-10-31 22:17:43,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:43,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378091705] [2024-10-31 22:17:43,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:43,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:43,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:44,126 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 18 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:44,126 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:44,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378091705] [2024-10-31 22:17:44,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1378091705] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:44,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [638244789] [2024-10-31 22:17:44,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:44,127 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:44,128 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:44,131 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:44,134 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-31 22:17:44,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:44,203 INFO L255 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:17:44,205 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:44,293 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-10-31 22:17:44,293 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:44,393 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-10-31 22:17:44,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [638244789] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:44,393 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:44,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 12 [2024-10-31 22:17:44,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681408211] [2024-10-31 22:17:44,394 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:44,394 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:44,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:44,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:17:44,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:17:44,395 INFO L87 Difference]: Start difference. First operand 769 states and 884 transitions. cyclomatic complexity: 123 Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:44,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:44,548 INFO L93 Difference]: Finished difference Result 1382 states and 1585 transitions. [2024-10-31 22:17:44,548 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1382 states and 1585 transitions. [2024-10-31 22:17:44,556 INFO L131 ngComponentsAnalysis]: Automaton has 14 accepting balls. 1177 [2024-10-31 22:17:44,563 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1382 states to 1382 states and 1585 transitions. [2024-10-31 22:17:44,563 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1382 [2024-10-31 22:17:44,565 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1382 [2024-10-31 22:17:44,565 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1382 states and 1585 transitions. [2024-10-31 22:17:44,567 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:44,567 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1382 states and 1585 transitions. [2024-10-31 22:17:44,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1382 states and 1585 transitions. [2024-10-31 22:17:44,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1382 to 788. [2024-10-31 22:17:44,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 788 states, 788 states have (on average 1.1472081218274113) internal successors, (904), 787 states have internal predecessors, (904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:44,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 788 states to 788 states and 904 transitions. [2024-10-31 22:17:44,590 INFO L240 hiAutomatonCegarLoop]: Abstraction has 788 states and 904 transitions. [2024-10-31 22:17:44,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:17:44,592 INFO L425 stractBuchiCegarLoop]: Abstraction has 788 states and 904 transitions. [2024-10-31 22:17:44,592 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-10-31 22:17:44,592 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 788 states and 904 transitions. [2024-10-31 22:17:44,596 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 653 [2024-10-31 22:17:44,596 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:44,597 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:44,597 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:44,597 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:44,598 INFO L745 eck$LassoCheckResult]: Stem: 20975#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 20954#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 20943#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 20944#L59-1 mp_add_~nb~0#1 := 4; 20957#L69 assume 0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 20960#L71 assume !(0 == (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296)); 20973#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 20974#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21032#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21033#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 21030#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21031#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21028#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21029#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21027#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 21158#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 21157#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21156#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21155#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21154#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21153#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21152#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21151#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21150#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 21069#L85-1 [2024-10-31 22:17:44,598 INFO L747 eck$LassoCheckResult]: Loop: 21069#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21149#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21148#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21146#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 21142#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21143#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 21136#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21137#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21128#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21129#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21122#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21121#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21120#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21118#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 21117#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21116#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21115#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 21114#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21113#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21112#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 21111#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21110#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21109#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21108#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21107#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21106#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21105#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21104#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 21103#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21102#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 21100#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21098#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21096#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21094#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 21092#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21090#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21087#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21086#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21085#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21064#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21065#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21084#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21080#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 21081#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21077#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21076#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21075#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21074#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21073#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21072#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21071#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21068#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 21069#L85-1 [2024-10-31 22:17:44,599 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:44,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1525234442, now seen corresponding path program 1 times [2024-10-31 22:17:44,599 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:44,599 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141468987] [2024-10-31 22:17:44,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:44,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:44,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:44,726 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:44,726 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:44,726 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141468987] [2024-10-31 22:17:44,726 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141468987] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:44,726 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:44,727 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:17:44,727 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352674973] [2024-10-31 22:17:44,727 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:44,727 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:44,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:44,728 INFO L85 PathProgramCache]: Analyzing trace with hash -95611915, now seen corresponding path program 2 times [2024-10-31 22:17:44,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:44,728 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452386156] [2024-10-31 22:17:44,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:44,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:44,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:44,889 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 18 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:44,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:44,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452386156] [2024-10-31 22:17:44,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1452386156] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:44,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [914484025] [2024-10-31 22:17:44,890 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:17:44,890 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:44,890 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:44,895 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:44,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-31 22:17:44,940 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-10-31 22:17:44,940 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:17:44,940 INFO L255 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:17:44,941 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:45,097 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-31 22:17:45,098 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:17:45,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [914484025] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:45,098 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:17:45,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 10 [2024-10-31 22:17:45,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591851374] [2024-10-31 22:17:45,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:45,099 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:45,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:45,099 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:17:45,099 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:17:45,101 INFO L87 Difference]: Start difference. First operand 788 states and 904 transitions. cyclomatic complexity: 124 Second operand has 5 states, 5 states have (on average 4.8) internal successors, (24), 5 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:45,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:45,345 INFO L93 Difference]: Finished difference Result 1995 states and 2286 transitions. [2024-10-31 22:17:45,345 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1995 states and 2286 transitions. [2024-10-31 22:17:45,357 INFO L131 ngComponentsAnalysis]: Automaton has 20 accepting balls. 1701 [2024-10-31 22:17:45,365 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1995 states to 1995 states and 2286 transitions. [2024-10-31 22:17:45,365 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1995 [2024-10-31 22:17:45,367 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1995 [2024-10-31 22:17:45,367 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1995 states and 2286 transitions. [2024-10-31 22:17:45,369 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:45,369 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1995 states and 2286 transitions. [2024-10-31 22:17:45,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1995 states and 2286 transitions. [2024-10-31 22:17:45,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1995 to 788. [2024-10-31 22:17:45,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 788 states, 788 states have (on average 1.1472081218274113) internal successors, (904), 787 states have internal predecessors, (904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:45,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 788 states to 788 states and 904 transitions. [2024-10-31 22:17:45,390 INFO L240 hiAutomatonCegarLoop]: Abstraction has 788 states and 904 transitions. [2024-10-31 22:17:45,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:17:45,391 INFO L425 stractBuchiCegarLoop]: Abstraction has 788 states and 904 transitions. [2024-10-31 22:17:45,391 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-10-31 22:17:45,391 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 788 states and 904 transitions. [2024-10-31 22:17:45,395 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 653 [2024-10-31 22:17:45,396 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:45,396 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:45,396 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:45,396 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:45,397 INFO L745 eck$LassoCheckResult]: Stem: 23930#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 23913#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 23896#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 23897#L59-1 mp_add_~nb~0#1 := 4; 24265#L69 assume 0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 24264#L71 assume 0 == (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 24262#L73 assume 0 == (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 24263#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 24502#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 24499#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 24496#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 24494#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24492#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24490#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24488#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 24486#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 24482#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 24483#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24473#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24474#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24469#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 24470#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 24465#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 24466#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24462#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 24461#L85-1 [2024-10-31 22:17:45,398 INFO L747 eck$LassoCheckResult]: Loop: 24461#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24460#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24457#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 24458#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 24557#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24555#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 24553#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24551#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24549#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 24547#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 24544#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 24543#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24542#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24541#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 24540#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24539#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 24538#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 24537#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24536#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24535#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 24534#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24533#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 24532#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 24531#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 24530#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24529#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24528#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24527#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 24526#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 24524#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 24522#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24523#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24518#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24519#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 24514#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 24515#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 24511#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 24510#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24508#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24506#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24507#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24561#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 24560#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 24559#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24475#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24476#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24471#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24472#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 24467#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 24468#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 24463#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 24464#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 24461#L85-1 [2024-10-31 22:17:45,398 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:45,398 INFO L85 PathProgramCache]: Analyzing trace with hash -311032260, now seen corresponding path program 1 times [2024-10-31 22:17:45,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:45,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237486462] [2024-10-31 22:17:45,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:45,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:45,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:45,530 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:45,530 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:45,530 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1237486462] [2024-10-31 22:17:45,530 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1237486462] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:45,530 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:45,530 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-10-31 22:17:45,531 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203185346] [2024-10-31 22:17:45,531 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:45,531 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:45,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:45,531 INFO L85 PathProgramCache]: Analyzing trace with hash -1885531531, now seen corresponding path program 3 times [2024-10-31 22:17:45,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:45,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697224801] [2024-10-31 22:17:45,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:45,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:45,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:45,694 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 18 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:45,695 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:45,695 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697224801] [2024-10-31 22:17:45,695 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1697224801] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:45,695 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [147638100] [2024-10-31 22:17:45,695 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 22:17:45,695 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:45,695 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:45,698 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:45,699 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-10-31 22:17:45,742 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-10-31 22:17:45,743 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:17:45,743 INFO L255 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:17:45,744 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:45,870 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-31 22:17:45,870 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:17:45,870 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [147638100] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:45,870 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:17:45,871 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 10 [2024-10-31 22:17:45,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669505461] [2024-10-31 22:17:45,871 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:45,871 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:45,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:45,872 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-31 22:17:45,872 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:17:45,872 INFO L87 Difference]: Start difference. First operand 788 states and 904 transitions. cyclomatic complexity: 124 Second operand has 7 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:46,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:46,475 INFO L93 Difference]: Finished difference Result 2469 states and 2833 transitions. [2024-10-31 22:17:46,475 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2469 states and 2833 transitions. [2024-10-31 22:17:46,487 INFO L131 ngComponentsAnalysis]: Automaton has 24 accepting balls. 2096 [2024-10-31 22:17:46,498 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2469 states to 2469 states and 2833 transitions. [2024-10-31 22:17:46,498 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2469 [2024-10-31 22:17:46,500 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2469 [2024-10-31 22:17:46,500 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2469 states and 2833 transitions. [2024-10-31 22:17:46,503 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:46,504 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2469 states and 2833 transitions. [2024-10-31 22:17:46,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2469 states and 2833 transitions. [2024-10-31 22:17:46,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2469 to 630. [2024-10-31 22:17:46,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 630 states, 630 states have (on average 1.1587301587301588) internal successors, (730), 629 states have internal predecessors, (730), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:46,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 630 states to 630 states and 730 transitions. [2024-10-31 22:17:46,532 INFO L240 hiAutomatonCegarLoop]: Abstraction has 630 states and 730 transitions. [2024-10-31 22:17:46,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-31 22:17:46,533 INFO L425 stractBuchiCegarLoop]: Abstraction has 630 states and 730 transitions. [2024-10-31 22:17:46,533 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-10-31 22:17:46,533 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 630 states and 730 transitions. [2024-10-31 22:17:46,536 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 524 [2024-10-31 22:17:46,536 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:46,536 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:46,537 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:46,537 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:46,537 INFO L745 eck$LassoCheckResult]: Stem: 27369#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 27350#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 27333#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 27335#L61 assume 0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 27337#L63 assume !(0 == (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296)); 27338#L59-1 mp_add_~nb~0#1 := 4; 27913#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 27910#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 27909#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 27908#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 27907#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 27906#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 27905#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27904#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27903#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27902#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 27901#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 27899#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27897#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27895#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27893#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 27891#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 27889#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 27887#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 27885#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27882#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 27862#L91-1 [2024-10-31 22:17:46,538 INFO L747 eck$LassoCheckResult]: Loop: 27862#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27942#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27959#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 27957#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27955#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 27953#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27952#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27365#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 27358#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 27359#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 27366#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 27363#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27364#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27941#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 27341#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27342#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 27344#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27354#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27348#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 27349#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27951#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 27939#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 27940#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 27936#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 27935#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27934#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27933#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27932#L92-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296); 27930#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 27929#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27928#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27927#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27926#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 27925#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 27924#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 27923#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 27921#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 27922#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 27962#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27900#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27898#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27896#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27894#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 27892#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 27890#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 27888#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 27886#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 27883#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 27862#L91-1 [2024-10-31 22:17:46,538 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:46,538 INFO L85 PathProgramCache]: Analyzing trace with hash -2064453638, now seen corresponding path program 1 times [2024-10-31 22:17:46,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:46,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37186968] [2024-10-31 22:17:46,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:46,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:46,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:46,697 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-31 22:17:46,698 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:46,698 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [37186968] [2024-10-31 22:17:46,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [37186968] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:46,699 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:46,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-10-31 22:17:46,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1757314513] [2024-10-31 22:17:46,699 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:46,700 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:46,700 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:46,700 INFO L85 PathProgramCache]: Analyzing trace with hash -959575817, now seen corresponding path program 1 times [2024-10-31 22:17:46,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:46,701 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905396547] [2024-10-31 22:17:46,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:46,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:46,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:46,855 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 35 proven. 30 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:17:46,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:46,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905396547] [2024-10-31 22:17:46,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1905396547] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:46,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1153131205] [2024-10-31 22:17:46,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:46,856 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:46,856 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:46,859 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:46,862 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-10-31 22:17:46,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:46,936 INFO L255 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:17:46,937 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:47,061 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 44 proven. 11 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-31 22:17:47,062 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:47,220 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 44 proven. 11 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-31 22:17:47,220 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1153131205] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:47,221 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:47,221 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 13 [2024-10-31 22:17:47,221 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190734031] [2024-10-31 22:17:47,221 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:47,221 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:47,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:47,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-31 22:17:47,222 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-10-31 22:17:47,222 INFO L87 Difference]: Start difference. First operand 630 states and 730 transitions. cyclomatic complexity: 106 Second operand has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:47,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:47,597 INFO L93 Difference]: Finished difference Result 2349 states and 2706 transitions. [2024-10-31 22:17:47,598 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2349 states and 2706 transitions. [2024-10-31 22:17:47,612 INFO L131 ngComponentsAnalysis]: Automaton has 24 accepting balls. 2096 [2024-10-31 22:17:47,625 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2349 states to 2349 states and 2706 transitions. [2024-10-31 22:17:47,626 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2349 [2024-10-31 22:17:47,629 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2349 [2024-10-31 22:17:47,629 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2349 states and 2706 transitions. [2024-10-31 22:17:47,632 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:47,632 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2349 states and 2706 transitions. [2024-10-31 22:17:47,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2349 states and 2706 transitions. [2024-10-31 22:17:47,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2349 to 630. [2024-10-31 22:17:47,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 630 states, 630 states have (on average 1.1587301587301588) internal successors, (730), 629 states have internal predecessors, (730), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:47,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 630 states to 630 states and 730 transitions. [2024-10-31 22:17:47,662 INFO L240 hiAutomatonCegarLoop]: Abstraction has 630 states and 730 transitions. [2024-10-31 22:17:47,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-31 22:17:47,663 INFO L425 stractBuchiCegarLoop]: Abstraction has 630 states and 730 transitions. [2024-10-31 22:17:47,663 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-10-31 22:17:47,664 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 630 states and 730 transitions. [2024-10-31 22:17:47,666 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 524 [2024-10-31 22:17:47,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:47,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:47,667 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:47,667 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:47,667 INFO L745 eck$LassoCheckResult]: Stem: 30658#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 30638#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 30627#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 30629#L61 assume 0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 30631#L63 assume 0 == (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 30632#L59-1 mp_add_~nb~0#1 := 4; 31222#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 31219#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 31218#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 31217#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 31216#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 31215#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 31214#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31213#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31212#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31211#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 31210#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 31209#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31208#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31207#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31206#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 31205#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 30653#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 30654#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 30651#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 30652#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 30625#L91-1 [2024-10-31 22:17:47,668 INFO L747 eck$LassoCheckResult]: Loop: 30625#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 30626#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 30621#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 30622#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 30659#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 31166#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31164#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31162#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 31160#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 31158#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 31156#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 31154#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31152#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31149#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 30623#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 30624#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 31227#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31226#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31225#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 31224#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31223#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 30647#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 30648#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 31203#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 31201#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31199#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31198#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31196#L92-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296); 31193#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 31191#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31189#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31187#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31185#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 31183#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 31182#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 31180#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 31176#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 31174#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 31171#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31169#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31167#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31165#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31163#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 31161#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 31159#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 31157#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 31155#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 31153#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 30625#L91-1 [2024-10-31 22:17:47,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:47,669 INFO L85 PathProgramCache]: Analyzing trace with hash 2011658940, now seen corresponding path program 1 times [2024-10-31 22:17:47,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:47,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312962519] [2024-10-31 22:17:47,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:47,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:47,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:47,814 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-31 22:17:47,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:47,815 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312962519] [2024-10-31 22:17:47,815 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [312962519] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:47,815 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:17:47,815 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-10-31 22:17:47,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107412627] [2024-10-31 22:17:47,815 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:47,816 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:47,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:47,816 INFO L85 PathProgramCache]: Analyzing trace with hash -959575817, now seen corresponding path program 2 times [2024-10-31 22:17:47,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:47,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032737930] [2024-10-31 22:17:47,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:47,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:47,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:48,012 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 35 proven. 30 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:17:48,012 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:48,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2032737930] [2024-10-31 22:17:48,013 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2032737930] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:48,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1213344598] [2024-10-31 22:17:48,013 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:17:48,013 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:48,014 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:48,016 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:48,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-10-31 22:17:48,072 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-10-31 22:17:48,072 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:17:48,073 INFO L255 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:17:48,074 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:48,220 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-31 22:17:48,220 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:17:48,221 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1213344598] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:17:48,221 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:17:48,221 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [5] total 9 [2024-10-31 22:17:48,221 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [943021777] [2024-10-31 22:17:48,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:17:48,222 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:48,222 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:48,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-31 22:17:48,223 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:17:48,223 INFO L87 Difference]: Start difference. First operand 630 states and 730 transitions. cyclomatic complexity: 106 Second operand has 7 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:49,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:49,049 INFO L93 Difference]: Finished difference Result 2336 states and 2691 transitions. [2024-10-31 22:17:49,049 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2336 states and 2691 transitions. [2024-10-31 22:17:49,060 INFO L131 ngComponentsAnalysis]: Automaton has 24 accepting balls. 2096 [2024-10-31 22:17:49,071 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2336 states to 2336 states and 2691 transitions. [2024-10-31 22:17:49,072 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2336 [2024-10-31 22:17:49,074 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2336 [2024-10-31 22:17:49,074 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2336 states and 2691 transitions. [2024-10-31 22:17:49,077 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:49,078 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2336 states and 2691 transitions. [2024-10-31 22:17:49,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2336 states and 2691 transitions. [2024-10-31 22:17:49,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2336 to 610. [2024-10-31 22:17:49,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 610 states, 610 states have (on average 1.1557377049180328) internal successors, (705), 609 states have internal predecessors, (705), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:49,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 610 states to 610 states and 705 transitions. [2024-10-31 22:17:49,107 INFO L240 hiAutomatonCegarLoop]: Abstraction has 610 states and 705 transitions. [2024-10-31 22:17:49,107 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-31 22:17:49,108 INFO L425 stractBuchiCegarLoop]: Abstraction has 610 states and 705 transitions. [2024-10-31 22:17:49,108 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-10-31 22:17:49,108 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 610 states and 705 transitions. [2024-10-31 22:17:49,110 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 524 [2024-10-31 22:17:49,111 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:49,111 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:49,111 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:49,112 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:49,112 INFO L745 eck$LassoCheckResult]: Stem: 33786#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 33770#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 33760#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 33761#L59-1 mp_add_~nb~0#1 := 4; 34345#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 34342#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 34341#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 34340#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 34339#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 34338#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 34337#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 34336#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 34335#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 34334#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 34333#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 34332#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 34331#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 34330#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 33805#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 33804#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33803#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33802#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33801#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 33799#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 33800#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 33797#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33793#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 33794#L85-1 [2024-10-31 22:17:49,112 INFO L747 eck$LassoCheckResult]: Loop: 33794#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33940#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33938#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 33937#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33936#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 33921#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33935#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33933#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 33929#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33930#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 33911#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33912#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33907#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 33908#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 33904#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 33903#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33902#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33900#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 33899#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33897#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 33896#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33895#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33894#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 33893#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33891#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 33890#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33889#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33888#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 33886#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33887#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 33883#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 33881#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 33880#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33879#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33878#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33876#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 33873#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 33869#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 33868#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33867#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33865#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33866#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 33974#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 33973#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 33972#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 33845#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33841#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33842#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33949#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33948#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 33944#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 34147#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33926#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33858#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33859#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33854#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 33855#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 33850#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 33851#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 33843#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 33794#L85-1 [2024-10-31 22:17:49,113 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:49,113 INFO L85 PathProgramCache]: Analyzing trace with hash 1546560413, now seen corresponding path program 1 times [2024-10-31 22:17:49,113 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:49,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100296199] [2024-10-31 22:17:49,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:49,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:49,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:49,139 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:49,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:49,162 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:49,163 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:49,163 INFO L85 PathProgramCache]: Analyzing trace with hash 370312889, now seen corresponding path program 1 times [2024-10-31 22:17:49,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:49,163 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441148058] [2024-10-31 22:17:49,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:49,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:49,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:49,389 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 11 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:17:49,389 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:49,389 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441148058] [2024-10-31 22:17:49,390 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [441148058] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:49,390 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2054946455] [2024-10-31 22:17:49,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:49,390 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:49,390 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:49,392 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:49,395 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-10-31 22:17:49,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:49,457 INFO L255 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:17:49,458 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:49,537 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 50 proven. 11 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-31 22:17:49,537 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:49,632 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 50 proven. 11 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-31 22:17:49,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2054946455] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:49,632 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:49,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 12 [2024-10-31 22:17:49,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203667040] [2024-10-31 22:17:49,633 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:49,633 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:17:49,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:17:49,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-31 22:17:49,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2024-10-31 22:17:49,634 INFO L87 Difference]: Start difference. First operand 610 states and 705 transitions. cyclomatic complexity: 101 Second operand has 13 states, 12 states have (on average 10.75) internal successors, (129), 13 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:50,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:17:50,098 INFO L93 Difference]: Finished difference Result 576 states and 630 transitions. [2024-10-31 22:17:50,098 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 576 states and 630 transitions. [2024-10-31 22:17:50,100 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 76 [2024-10-31 22:17:50,102 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 576 states to 532 states and 584 transitions. [2024-10-31 22:17:50,103 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 532 [2024-10-31 22:17:50,103 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 532 [2024-10-31 22:17:50,103 INFO L73 IsDeterministic]: Start isDeterministic. Operand 532 states and 584 transitions. [2024-10-31 22:17:50,104 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:17:50,104 INFO L218 hiAutomatonCegarLoop]: Abstraction has 532 states and 584 transitions. [2024-10-31 22:17:50,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 532 states and 584 transitions. [2024-10-31 22:17:50,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 532 to 242. [2024-10-31 22:17:50,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.1322314049586777) internal successors, (274), 241 states have internal predecessors, (274), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:17:50,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 274 transitions. [2024-10-31 22:17:50,111 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 274 transitions. [2024-10-31 22:17:50,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-31 22:17:50,112 INFO L425 stractBuchiCegarLoop]: Abstraction has 242 states and 274 transitions. [2024-10-31 22:17:50,112 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-10-31 22:17:50,112 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 274 transitions. [2024-10-31 22:17:50,113 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 43 [2024-10-31 22:17:50,113 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:17:50,113 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:17:50,114 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:50,114 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:17:50,114 INFO L745 eck$LassoCheckResult]: Stem: 35352#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(13, 2); 35336#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~ret6#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~a~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;main_~b~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 35326#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 35327#L59-1 mp_add_~nb~0#1 := 4; 35339#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 35334#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 35391#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 35392#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 35387#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 35388#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35383#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35384#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35379#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 35380#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 35375#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35376#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35371#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35372#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 35370#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 35365#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35366#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35361#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35362#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 35357#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 35358#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 35510#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 35509#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35507#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 35508#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35526#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35525#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 35524#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35523#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 35522#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35521#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35520#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 35519#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 35518#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 35402#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 35517#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35516#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35514#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 35515#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35549#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 35547#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35545#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35543#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 35541#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35539#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 35537#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 35535#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 35533#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 35534#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 35560#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35563#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35562#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35561#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 35346#L102-1 [2024-10-31 22:17:50,115 INFO L747 eck$LassoCheckResult]: Loop: 35346#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 35343#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 35344#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 35349#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 35347#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35348#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35324#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35325#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35322#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 254); 35323#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35340#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35331#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35332#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 35346#L102-1 [2024-10-31 22:17:50,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:50,115 INFO L85 PathProgramCache]: Analyzing trace with hash 1393305669, now seen corresponding path program 1 times [2024-10-31 22:17:50,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:50,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595729288] [2024-10-31 22:17:50,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:50,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:50,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:50,299 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 38 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-10-31 22:17:50,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:17:50,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595729288] [2024-10-31 22:17:50,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1595729288] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:17:50,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [607529456] [2024-10-31 22:17:50,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:50,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:17:50,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:50,303 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:17:50,304 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a24adfa7-25c0-4236-aa98-141801bd4d29/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-10-31 22:17:50,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:50,378 INFO L255 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:17:50,379 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:50,518 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 37 proven. 3 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-31 22:17:50,518 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:17:50,791 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 47 proven. 9 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-31 22:17:50,791 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [607529456] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:17:50,791 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:17:50,792 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 7] total 13 [2024-10-31 22:17:50,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808384128] [2024-10-31 22:17:50,792 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:17:50,792 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:17:50,793 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:50,793 INFO L85 PathProgramCache]: Analyzing trace with hash -1233229496, now seen corresponding path program 1 times [2024-10-31 22:17:50,793 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:17:50,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948659697] [2024-10-31 22:17:50,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:17:50,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:17:50,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:50,798 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:17:50,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:17:50,802 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:50,937 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:17:50,938 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:17:50,938 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:17:50,938 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:17:50,938 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-10-31 22:17:50,938 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:50,938 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:17:50,938 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:17:50,939 INFO L132 ssoRankerPreferences]: Filename of dumped script: byte_add-1.i_Iteration24_Loop [2024-10-31 22:17:50,939 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:17:50,939 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:17:50,956 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:50,968 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true