./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/bitvector/byte_add_1-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/bitvector/byte_add_1-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0ba3e3db8f44a5e9ad151b8422bee8deebac1dcf47a42cba5485daeafd8d8e80 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:03:33,510 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:03:33,610 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 22:03:33,615 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:03:33,615 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:03:33,640 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:03:33,641 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:03:33,641 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:03:33,642 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:03:33,642 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:03:33,643 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:03:33,644 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:03:33,644 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:03:33,645 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:03:33,645 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:03:33,646 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:03:33,646 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:03:33,647 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:03:33,647 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:03:33,648 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:03:33,648 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:03:33,653 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 22:03:33,653 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:03:33,654 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 22:03:33,654 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:03:33,654 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:03:33,655 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:03:33,655 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:03:33,655 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:03:33,656 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:03:33,656 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 22:03:33,656 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:03:33,656 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:03:33,657 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:03:33,657 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:03:33,658 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:03:33,658 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:03:33,658 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:03:33,659 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:03:33,659 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0ba3e3db8f44a5e9ad151b8422bee8deebac1dcf47a42cba5485daeafd8d8e80 [2024-10-31 22:03:33,968 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:03:33,994 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:03:33,997 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:03:33,998 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:03:33,999 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:03:34,000 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/bitvector/byte_add_1-1.i Unable to find full path for "g++" [2024-10-31 22:03:36,050 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:03:36,251 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:03:36,252 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/sv-benchmarks/c/bitvector/byte_add_1-1.i [2024-10-31 22:03:36,261 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/data/6edaee0cc/b05850ca575745c8869a59eed83600eb/FLAG30542db56 [2024-10-31 22:03:36,276 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/data/6edaee0cc/b05850ca575745c8869a59eed83600eb [2024-10-31 22:03:36,278 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:03:36,279 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:03:36,280 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:03:36,280 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:03:36,285 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:03:36,286 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,287 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7e926582 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36, skipping insertion in model container [2024-10-31 22:03:36,287 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,316 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:03:36,567 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:03:36,579 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:03:36,627 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:03:36,647 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:03:36,647 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36 WrapperNode [2024-10-31 22:03:36,647 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:03:36,648 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:03:36,649 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:03:36,649 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:03:36,657 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,664 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,707 INFO L138 Inliner]: procedures = 16, calls = 9, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 149 [2024-10-31 22:03:36,712 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:03:36,713 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:03:36,713 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:03:36,713 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:03:36,726 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,726 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,729 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,745 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-31 22:03:36,746 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,746 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,753 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,757 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,759 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,761 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,764 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:03:36,765 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:03:36,766 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:03:36,766 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:03:36,767 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (1/1) ... [2024-10-31 22:03:36,773 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:36,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:36,808 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:36,813 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:03:36,850 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-31 22:03:36,850 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-31 22:03:36,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:03:36,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:03:36,942 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:03:36,944 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:03:37,450 INFO L? ?]: Removed 37 outVars from TransFormulas that were not future-live. [2024-10-31 22:03:37,451 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:03:37,471 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:03:37,471 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-31 22:03:37,472 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:03:37 BoogieIcfgContainer [2024-10-31 22:03:37,472 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:03:37,473 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:03:37,473 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:03:37,478 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:03:37,479 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:03:37,479 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:03:36" (1/3) ... [2024-10-31 22:03:37,480 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@47af63db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:03:37, skipping insertion in model container [2024-10-31 22:03:37,481 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:03:37,481 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:03:36" (2/3) ... [2024-10-31 22:03:37,481 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@47af63db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:03:37, skipping insertion in model container [2024-10-31 22:03:37,481 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:03:37,482 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:03:37" (3/3) ... [2024-10-31 22:03:37,483 INFO L332 chiAutomizerObserver]: Analyzing ICFG byte_add_1-1.i [2024-10-31 22:03:37,544 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:03:37,545 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:03:37,545 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:03:37,545 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:03:37,545 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:03:37,545 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:03:37,545 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:03:37,546 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:03:37,551 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.7254901960784315) internal successors, (88), 51 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:37,576 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 23 [2024-10-31 22:03:37,576 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:37,576 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:37,585 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-10-31 22:03:37,585 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:37,585 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:03:37,586 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.7254901960784315) internal successors, (88), 51 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:37,590 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 23 [2024-10-31 22:03:37,590 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:37,590 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:37,591 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-10-31 22:03:37,591 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:37,600 INFO L745 eck$LassoCheckResult]: Stem: 25#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 33#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 30#L59true assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 10#L59-1true mp_add_~nb~0#1 := 4; 11#L69true assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 48#L69-1true mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 15#L80-2true [2024-10-31 22:03:37,601 INFO L747 eck$LassoCheckResult]: Loop: 15#L80-2true assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21#L83true assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 52#L83-1true assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6#L89true assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 29#L95-1true assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 40#L99-1true assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 8#L100-1true assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 17#L101-1true assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 18#L102-1true mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 15#L80-2true [2024-10-31 22:03:37,607 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:37,608 INFO L85 PathProgramCache]: Analyzing trace with hash 889938151, now seen corresponding path program 1 times [2024-10-31 22:03:37,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:37,623 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266226382] [2024-10-31 22:03:37,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:37,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:37,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:37,813 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:37,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:37,897 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:37,901 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:37,901 INFO L85 PathProgramCache]: Analyzing trace with hash 318197182, now seen corresponding path program 1 times [2024-10-31 22:03:37,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:37,902 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64574769] [2024-10-31 22:03:37,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:37,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:37,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:38,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:38,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:38,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64574769] [2024-10-31 22:03:38,101 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64574769] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:38,101 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:38,101 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:38,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389845610] [2024-10-31 22:03:38,102 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:38,107 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:38,108 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:38,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:03:38,144 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:03:38,160 INFO L87 Difference]: Start difference. First operand has 52 states, 51 states have (on average 1.7254901960784315) internal successors, (88), 51 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:38,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:38,409 INFO L93 Difference]: Finished difference Result 74 states and 110 transitions. [2024-10-31 22:03:38,411 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 110 transitions. [2024-10-31 22:03:38,415 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 41 [2024-10-31 22:03:38,423 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 56 states and 86 transitions. [2024-10-31 22:03:38,425 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2024-10-31 22:03:38,427 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2024-10-31 22:03:38,428 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 86 transitions. [2024-10-31 22:03:38,429 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:38,429 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 86 transitions. [2024-10-31 22:03:38,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 86 transitions. [2024-10-31 22:03:38,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 54. [2024-10-31 22:03:38,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.5555555555555556) internal successors, (84), 53 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:38,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 84 transitions. [2024-10-31 22:03:38,456 INFO L240 hiAutomatonCegarLoop]: Abstraction has 54 states and 84 transitions. [2024-10-31 22:03:38,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:03:38,461 INFO L425 stractBuchiCegarLoop]: Abstraction has 54 states and 84 transitions. [2024-10-31 22:03:38,461 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:03:38,462 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 84 transitions. [2024-10-31 22:03:38,463 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 39 [2024-10-31 22:03:38,463 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:38,463 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:38,464 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:38,464 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:38,467 INFO L745 eck$LassoCheckResult]: Stem: 174#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 148#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 135#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 136#L59-1 mp_add_~nb~0#1 := 4; 153#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 146#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 172#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 182#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 180#L83-1 [2024-10-31 22:03:38,467 INFO L747 eck$LassoCheckResult]: Loop: 180#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 139#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 140#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 175#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 178#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 163#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 164#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 158#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 159#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 169#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 156#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 173#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 181#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 180#L83-1 [2024-10-31 22:03:38,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:38,468 INFO L85 PathProgramCache]: Analyzing trace with hash 532072804, now seen corresponding path program 1 times [2024-10-31 22:03:38,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:38,469 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091011578] [2024-10-31 22:03:38,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:38,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:38,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:38,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:38,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:38,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091011578] [2024-10-31 22:03:38,941 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1091011578] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:38,941 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:38,941 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:38,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2086034966] [2024-10-31 22:03:38,942 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:38,942 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:38,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:38,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1939143242, now seen corresponding path program 1 times [2024-10-31 22:03:38,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:38,946 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827401803] [2024-10-31 22:03:38,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:38,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:38,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:39,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:39,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:39,116 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1827401803] [2024-10-31 22:03:39,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1827401803] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:39,118 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:39,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:39,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061090441] [2024-10-31 22:03:39,119 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:39,119 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:39,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:39,120 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:03:39,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:03:39,120 INFO L87 Difference]: Start difference. First operand 54 states and 84 transitions. cyclomatic complexity: 32 Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:39,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:39,497 INFO L93 Difference]: Finished difference Result 140 states and 215 transitions. [2024-10-31 22:03:39,497 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 140 states and 215 transitions. [2024-10-31 22:03:39,500 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 99 [2024-10-31 22:03:39,501 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 140 states to 140 states and 215 transitions. [2024-10-31 22:03:39,502 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 140 [2024-10-31 22:03:39,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 140 [2024-10-31 22:03:39,503 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 215 transitions. [2024-10-31 22:03:39,503 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:39,504 INFO L218 hiAutomatonCegarLoop]: Abstraction has 140 states and 215 transitions. [2024-10-31 22:03:39,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 215 transitions. [2024-10-31 22:03:39,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 78. [2024-10-31 22:03:39,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.4487179487179487) internal successors, (113), 77 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:39,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 113 transitions. [2024-10-31 22:03:39,511 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78 states and 113 transitions. [2024-10-31 22:03:39,511 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:03:39,512 INFO L425 stractBuchiCegarLoop]: Abstraction has 78 states and 113 transitions. [2024-10-31 22:03:39,513 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:03:39,513 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 113 transitions. [2024-10-31 22:03:39,514 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 39 [2024-10-31 22:03:39,514 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:39,515 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:39,515 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:39,516 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:39,516 INFO L745 eck$LassoCheckResult]: Stem: 386#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 355#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 345#L59 assume 0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~na~0#1 := (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) - 1; 347#L61 assume !(0 == (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296)); 348#L59-1 mp_add_~nb~0#1 := 4; 360#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 384#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 385#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 392#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 414#L83-1 [2024-10-31 22:03:39,517 INFO L747 eck$LassoCheckResult]: Loop: 414#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 416#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 388#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 389#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 415#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 373#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 374#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 394#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 395#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 380#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 364#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 368#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 369#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 414#L83-1 [2024-10-31 22:03:39,517 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:39,517 INFO L85 PathProgramCache]: Analyzing trace with hash -384676570, now seen corresponding path program 1 times [2024-10-31 22:03:39,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:39,518 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392496484] [2024-10-31 22:03:39,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:39,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:39,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:39,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:39,656 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:39,656 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392496484] [2024-10-31 22:03:39,656 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [392496484] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:39,657 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:39,657 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:39,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2015905448] [2024-10-31 22:03:39,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:39,658 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:39,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:39,659 INFO L85 PathProgramCache]: Analyzing trace with hash 1939143242, now seen corresponding path program 2 times [2024-10-31 22:03:39,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:39,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171983368] [2024-10-31 22:03:39,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:39,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:39,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:39,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:39,759 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:39,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171983368] [2024-10-31 22:03:39,760 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1171983368] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:39,760 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:39,760 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:39,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925840264] [2024-10-31 22:03:39,760 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:39,761 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:39,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:39,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:03:39,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:03:39,762 INFO L87 Difference]: Start difference. First operand 78 states and 113 transitions. cyclomatic complexity: 37 Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:39,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:39,768 INFO L93 Difference]: Finished difference Result 66 states and 93 transitions. [2024-10-31 22:03:39,768 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 93 transitions. [2024-10-31 22:03:39,769 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 39 [2024-10-31 22:03:39,770 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 66 states and 93 transitions. [2024-10-31 22:03:39,770 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 66 [2024-10-31 22:03:39,770 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 66 [2024-10-31 22:03:39,770 INFO L73 IsDeterministic]: Start isDeterministic. Operand 66 states and 93 transitions. [2024-10-31 22:03:39,771 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:39,771 INFO L218 hiAutomatonCegarLoop]: Abstraction has 66 states and 93 transitions. [2024-10-31 22:03:39,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states and 93 transitions. [2024-10-31 22:03:39,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2024-10-31 22:03:39,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.4090909090909092) internal successors, (93), 65 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:39,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 93 transitions. [2024-10-31 22:03:39,776 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66 states and 93 transitions. [2024-10-31 22:03:39,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:03:39,777 INFO L425 stractBuchiCegarLoop]: Abstraction has 66 states and 93 transitions. [2024-10-31 22:03:39,778 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:03:39,778 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 93 transitions. [2024-10-31 22:03:39,779 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 39 [2024-10-31 22:03:39,779 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:39,779 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:39,781 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:39,781 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:39,781 INFO L745 eck$LassoCheckResult]: Stem: 528#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 504#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 493#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 494#L59-1 mp_add_~nb~0#1 := 4; 509#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 500#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 526#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 547#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 511#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 512#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 558#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 556#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 553#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 551#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 496#L95-1 [2024-10-31 22:03:39,782 INFO L747 eck$LassoCheckResult]: Loop: 496#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 510#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 502#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 503#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 533#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 530#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 531#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 540#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 541#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 522#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 497#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 498#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 495#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 496#L95-1 [2024-10-31 22:03:39,782 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:39,782 INFO L85 PathProgramCache]: Analyzing trace with hash 1874592092, now seen corresponding path program 1 times [2024-10-31 22:03:39,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:39,783 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863909675] [2024-10-31 22:03:39,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:39,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:39,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:39,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:39,967 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:39,967 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1863909675] [2024-10-31 22:03:39,967 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1863909675] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:39,968 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:39,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:39,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107615165] [2024-10-31 22:03:39,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:39,969 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:39,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:39,969 INFO L85 PathProgramCache]: Analyzing trace with hash -1213684438, now seen corresponding path program 1 times [2024-10-31 22:03:39,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:39,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709264880] [2024-10-31 22:03:39,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:39,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:39,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:40,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:40,046 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:40,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709264880] [2024-10-31 22:03:40,047 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1709264880] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:40,047 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:40,047 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:40,047 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656192059] [2024-10-31 22:03:40,047 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:40,048 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:40,048 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:40,048 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:03:40,048 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:03:40,049 INFO L87 Difference]: Start difference. First operand 66 states and 93 transitions. cyclomatic complexity: 29 Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:40,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:40,245 INFO L93 Difference]: Finished difference Result 91 states and 134 transitions. [2024-10-31 22:03:40,245 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 134 transitions. [2024-10-31 22:03:40,246 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 64 [2024-10-31 22:03:40,247 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 91 states and 134 transitions. [2024-10-31 22:03:40,247 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2024-10-31 22:03:40,248 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2024-10-31 22:03:40,248 INFO L73 IsDeterministic]: Start isDeterministic. Operand 91 states and 134 transitions. [2024-10-31 22:03:40,249 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:40,249 INFO L218 hiAutomatonCegarLoop]: Abstraction has 91 states and 134 transitions. [2024-10-31 22:03:40,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states and 134 transitions. [2024-10-31 22:03:40,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 83. [2024-10-31 22:03:40,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.4457831325301205) internal successors, (120), 82 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:40,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 120 transitions. [2024-10-31 22:03:40,254 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 120 transitions. [2024-10-31 22:03:40,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:03:40,256 INFO L425 stractBuchiCegarLoop]: Abstraction has 83 states and 120 transitions. [2024-10-31 22:03:40,256 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-31 22:03:40,256 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 120 transitions. [2024-10-31 22:03:40,257 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56 [2024-10-31 22:03:40,257 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:40,257 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:40,259 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:40,259 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:40,259 INFO L745 eck$LassoCheckResult]: Stem: 698#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 670#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 663#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 664#L59-1 mp_add_~nb~0#1 := 4; 675#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 668#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 697#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 724#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 723#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 722#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 721#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 719#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 715#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 711#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 712#L95-1 [2024-10-31 22:03:40,259 INFO L747 eck$LassoCheckResult]: Loop: 712#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 717#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 713#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 710#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 708#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 700#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 701#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 699#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 661#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 662#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 676#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 665#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 666#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 688#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 702#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 705#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 737#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 736#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 735#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 733#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 728#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 729#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 712#L95-1 [2024-10-31 22:03:40,260 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:40,260 INFO L85 PathProgramCache]: Analyzing trace with hash 1874592092, now seen corresponding path program 2 times [2024-10-31 22:03:40,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:40,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214142118] [2024-10-31 22:03:40,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:40,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:40,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:40,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:40,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:40,431 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214142118] [2024-10-31 22:03:40,432 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1214142118] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:40,432 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:40,432 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:40,432 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605821895] [2024-10-31 22:03:40,432 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:40,433 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:40,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:40,433 INFO L85 PathProgramCache]: Analyzing trace with hash -1043280079, now seen corresponding path program 1 times [2024-10-31 22:03:40,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:40,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827173507] [2024-10-31 22:03:40,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:40,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:40,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:40,481 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-31 22:03:40,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:40,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827173507] [2024-10-31 22:03:40,483 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [827173507] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:40,483 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:40,483 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:40,483 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [129469818] [2024-10-31 22:03:40,484 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:40,484 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:40,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:40,486 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:03:40,486 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:03:40,486 INFO L87 Difference]: Start difference. First operand 83 states and 120 transitions. cyclomatic complexity: 39 Second operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:40,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:40,696 INFO L93 Difference]: Finished difference Result 152 states and 218 transitions. [2024-10-31 22:03:40,696 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 152 states and 218 transitions. [2024-10-31 22:03:40,698 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 100 [2024-10-31 22:03:40,699 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 152 states to 152 states and 218 transitions. [2024-10-31 22:03:40,699 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 152 [2024-10-31 22:03:40,700 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 152 [2024-10-31 22:03:40,702 INFO L73 IsDeterministic]: Start isDeterministic. Operand 152 states and 218 transitions. [2024-10-31 22:03:40,703 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:40,703 INFO L218 hiAutomatonCegarLoop]: Abstraction has 152 states and 218 transitions. [2024-10-31 22:03:40,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states and 218 transitions. [2024-10-31 22:03:40,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 91. [2024-10-31 22:03:40,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.4065934065934067) internal successors, (128), 90 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:40,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 128 transitions. [2024-10-31 22:03:40,715 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 128 transitions. [2024-10-31 22:03:40,716 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:03:40,719 INFO L425 stractBuchiCegarLoop]: Abstraction has 91 states and 128 transitions. [2024-10-31 22:03:40,719 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-31 22:03:40,719 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 128 transitions. [2024-10-31 22:03:40,720 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56 [2024-10-31 22:03:40,720 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:40,720 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:40,721 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:40,721 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:40,721 INFO L745 eck$LassoCheckResult]: Stem: 942#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 916#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 909#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 910#L59-1 mp_add_~nb~0#1 := 4; 921#L69 assume 0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 913#L71 assume !(0 == (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296)); 914#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 970#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 969#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 968#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 967#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 966#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 965#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 963#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 961#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 944#L95-1 [2024-10-31 22:03:40,722 INFO L747 eck$LassoCheckResult]: Loop: 944#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 922#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 911#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 912#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 953#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 946#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 947#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 985#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 904#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 905#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 958#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 956#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 955#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 954#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 951#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 952#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 992#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 990#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 987#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 986#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 982#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 980#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 944#L95-1 [2024-10-31 22:03:40,724 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:40,724 INFO L85 PathProgramCache]: Analyzing trace with hash -2095675795, now seen corresponding path program 1 times [2024-10-31 22:03:40,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:40,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853872041] [2024-10-31 22:03:40,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:40,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:40,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:40,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:40,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:40,864 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853872041] [2024-10-31 22:03:40,864 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [853872041] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:40,865 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:40,865 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:03:40,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309215776] [2024-10-31 22:03:40,865 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:40,866 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:40,866 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:40,866 INFO L85 PathProgramCache]: Analyzing trace with hash 857385497, now seen corresponding path program 1 times [2024-10-31 22:03:40,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:40,867 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250437668] [2024-10-31 22:03:40,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:40,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:40,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:40,901 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-31 22:03:40,902 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:40,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250437668] [2024-10-31 22:03:40,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [250437668] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:40,903 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:40,903 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:40,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724536562] [2024-10-31 22:03:40,903 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:40,904 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:40,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:40,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:03:40,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:03:40,905 INFO L87 Difference]: Start difference. First operand 91 states and 128 transitions. cyclomatic complexity: 39 Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:41,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:41,260 INFO L93 Difference]: Finished difference Result 221 states and 316 transitions. [2024-10-31 22:03:41,260 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 221 states and 316 transitions. [2024-10-31 22:03:41,262 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 144 [2024-10-31 22:03:41,264 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 221 states to 221 states and 316 transitions. [2024-10-31 22:03:41,264 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 221 [2024-10-31 22:03:41,265 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 221 [2024-10-31 22:03:41,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 221 states and 316 transitions. [2024-10-31 22:03:41,269 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:41,269 INFO L218 hiAutomatonCegarLoop]: Abstraction has 221 states and 316 transitions. [2024-10-31 22:03:41,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states and 316 transitions. [2024-10-31 22:03:41,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 91. [2024-10-31 22:03:41,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.4065934065934067) internal successors, (128), 90 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:41,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 128 transitions. [2024-10-31 22:03:41,280 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 128 transitions. [2024-10-31 22:03:41,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:03:41,282 INFO L425 stractBuchiCegarLoop]: Abstraction has 91 states and 128 transitions. [2024-10-31 22:03:41,282 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-31 22:03:41,282 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 128 transitions. [2024-10-31 22:03:41,283 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56 [2024-10-31 22:03:41,283 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:41,283 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:41,283 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:41,284 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:41,284 INFO L745 eck$LassoCheckResult]: Stem: 1265#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 1240#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 1233#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 1234#L59-1 mp_add_~nb~0#1 := 4; 1245#L69 assume 0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 1237#L71 assume 0 == (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 1239#L73 assume 0 == (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 1266#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 1292#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1291#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1290#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1289#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1288#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1287#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1285#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1283#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1232#L95-1 [2024-10-31 22:03:41,284 INFO L747 eck$LassoCheckResult]: Loop: 1232#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 1246#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1235#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1236#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1274#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1267#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1268#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 1315#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1313#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1281#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1279#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 1277#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 1276#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 1275#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1272#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1273#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 1304#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 1305#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 1260#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1229#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1230#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1231#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1232#L95-1 [2024-10-31 22:03:41,284 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:41,285 INFO L85 PathProgramCache]: Analyzing trace with hash -1829134745, now seen corresponding path program 1 times [2024-10-31 22:03:41,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:41,287 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556391179] [2024-10-31 22:03:41,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:41,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:41,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:41,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:41,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:41,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [556391179] [2024-10-31 22:03:41,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [556391179] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:41,461 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:41,461 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:41,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338882400] [2024-10-31 22:03:41,461 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:41,462 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:41,462 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:41,462 INFO L85 PathProgramCache]: Analyzing trace with hash -1043280079, now seen corresponding path program 2 times [2024-10-31 22:03:41,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:41,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495138976] [2024-10-31 22:03:41,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:41,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:41,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:41,516 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-31 22:03:41,516 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:41,516 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495138976] [2024-10-31 22:03:41,516 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495138976] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:41,516 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:41,516 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:41,517 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [245109638] [2024-10-31 22:03:41,517 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:41,517 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:41,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:41,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:03:41,518 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:03:41,518 INFO L87 Difference]: Start difference. First operand 91 states and 128 transitions. cyclomatic complexity: 39 Second operand has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:41,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:41,679 INFO L93 Difference]: Finished difference Result 209 states and 305 transitions. [2024-10-31 22:03:41,679 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 209 states and 305 transitions. [2024-10-31 22:03:41,681 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 167 [2024-10-31 22:03:41,682 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 209 states to 209 states and 305 transitions. [2024-10-31 22:03:41,683 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 209 [2024-10-31 22:03:41,683 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 209 [2024-10-31 22:03:41,683 INFO L73 IsDeterministic]: Start isDeterministic. Operand 209 states and 305 transitions. [2024-10-31 22:03:41,684 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:41,684 INFO L218 hiAutomatonCegarLoop]: Abstraction has 209 states and 305 transitions. [2024-10-31 22:03:41,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states and 305 transitions. [2024-10-31 22:03:41,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 149. [2024-10-31 22:03:41,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 149 states have (on average 1.5033557046979866) internal successors, (224), 148 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:41,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 224 transitions. [2024-10-31 22:03:41,693 INFO L240 hiAutomatonCegarLoop]: Abstraction has 149 states and 224 transitions. [2024-10-31 22:03:41,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-31 22:03:41,694 INFO L425 stractBuchiCegarLoop]: Abstraction has 149 states and 224 transitions. [2024-10-31 22:03:41,694 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-31 22:03:41,694 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 149 states and 224 transitions. [2024-10-31 22:03:41,695 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 113 [2024-10-31 22:03:41,695 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:41,695 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:41,696 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:41,696 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:41,697 INFO L745 eck$LassoCheckResult]: Stem: 1581#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 1554#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 1542#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 1543#L59-1 mp_add_~nb~0#1 := 4; 1560#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 1552#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 1579#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1622#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1621#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1620#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1618#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1616#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1614#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 1608#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 1611#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1609#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1605#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1606#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1623#L95-1 [2024-10-31 22:03:41,697 INFO L747 eck$LassoCheckResult]: Loop: 1623#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 1661#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1690#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1689#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1688#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1587#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1588#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 1666#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1662#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1659#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1658#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 1657#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 1656#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 1655#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1651#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1647#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 1648#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 1668#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 1635#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1631#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1626#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1624#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1623#L95-1 [2024-10-31 22:03:41,697 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:41,698 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 1 times [2024-10-31 22:03:41,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:41,698 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501844135] [2024-10-31 22:03:41,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:41,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:41,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:41,722 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:41,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:41,752 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:41,752 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:41,753 INFO L85 PathProgramCache]: Analyzing trace with hash -1043280079, now seen corresponding path program 3 times [2024-10-31 22:03:41,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:41,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051052065] [2024-10-31 22:03:41,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:41,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:41,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:41,798 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-31 22:03:41,798 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:41,799 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051052065] [2024-10-31 22:03:41,801 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2051052065] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:41,804 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:41,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:41,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452652810] [2024-10-31 22:03:41,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:41,805 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:41,805 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:41,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:03:41,806 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:03:41,806 INFO L87 Difference]: Start difference. First operand 149 states and 224 transitions. cyclomatic complexity: 77 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:41,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:41,927 INFO L93 Difference]: Finished difference Result 194 states and 283 transitions. [2024-10-31 22:03:41,927 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 194 states and 283 transitions. [2024-10-31 22:03:41,929 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 158 [2024-10-31 22:03:41,931 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 194 states to 194 states and 283 transitions. [2024-10-31 22:03:41,931 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 194 [2024-10-31 22:03:41,932 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 194 [2024-10-31 22:03:41,932 INFO L73 IsDeterministic]: Start isDeterministic. Operand 194 states and 283 transitions. [2024-10-31 22:03:41,933 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:41,933 INFO L218 hiAutomatonCegarLoop]: Abstraction has 194 states and 283 transitions. [2024-10-31 22:03:41,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states and 283 transitions. [2024-10-31 22:03:41,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2024-10-31 22:03:41,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 191 states, 191 states have (on average 1.4659685863874345) internal successors, (280), 190 states have internal predecessors, (280), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:41,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 280 transitions. [2024-10-31 22:03:41,946 INFO L240 hiAutomatonCegarLoop]: Abstraction has 191 states and 280 transitions. [2024-10-31 22:03:41,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:03:41,947 INFO L425 stractBuchiCegarLoop]: Abstraction has 191 states and 280 transitions. [2024-10-31 22:03:41,947 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-10-31 22:03:41,947 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states and 280 transitions. [2024-10-31 22:03:41,949 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 155 [2024-10-31 22:03:41,950 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:41,951 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:41,952 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:41,952 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:41,952 INFO L745 eck$LassoCheckResult]: Stem: 1934#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 1902#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 1891#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 1892#L59-1 mp_add_~nb~0#1 := 4; 1907#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 1898#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 1932#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1970#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1969#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1968#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1966#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1964#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1962#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 1956#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 1959#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1957#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1953#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1954#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1974#L95-1 [2024-10-31 22:03:41,952 INFO L747 eck$LassoCheckResult]: Loop: 1974#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 1972#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1973#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2011#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2008#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1938#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1939#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 1985#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 1980#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1937#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1908#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 1909#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1976#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 1942#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 1941#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 1929#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 1910#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 1911#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2073#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2072#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2068#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 2065#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 1974#L95-1 [2024-10-31 22:03:41,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:41,956 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 2 times [2024-10-31 22:03:41,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:41,956 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275708590] [2024-10-31 22:03:41,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:41,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:41,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:41,995 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:42,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:42,028 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:42,029 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:42,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1165423065, now seen corresponding path program 1 times [2024-10-31 22:03:42,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:42,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446420690] [2024-10-31 22:03:42,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:42,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:42,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:42,186 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:42,187 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:42,187 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446420690] [2024-10-31 22:03:42,187 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1446420690] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:42,187 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:42,187 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:03:42,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300831491] [2024-10-31 22:03:42,188 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:42,188 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:42,189 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:42,189 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:03:42,189 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:03:42,190 INFO L87 Difference]: Start difference. First operand 191 states and 280 transitions. cyclomatic complexity: 91 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:42,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:42,494 INFO L93 Difference]: Finished difference Result 341 states and 499 transitions. [2024-10-31 22:03:42,494 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 341 states and 499 transitions. [2024-10-31 22:03:42,497 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 305 [2024-10-31 22:03:42,499 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 341 states to 341 states and 499 transitions. [2024-10-31 22:03:42,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 341 [2024-10-31 22:03:42,499 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 341 [2024-10-31 22:03:42,500 INFO L73 IsDeterministic]: Start isDeterministic. Operand 341 states and 499 transitions. [2024-10-31 22:03:42,500 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:42,500 INFO L218 hiAutomatonCegarLoop]: Abstraction has 341 states and 499 transitions. [2024-10-31 22:03:42,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states and 499 transitions. [2024-10-31 22:03:42,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 287. [2024-10-31 22:03:42,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 287 states, 287 states have (on average 1.456445993031359) internal successors, (418), 286 states have internal predecessors, (418), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:42,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 418 transitions. [2024-10-31 22:03:42,513 INFO L240 hiAutomatonCegarLoop]: Abstraction has 287 states and 418 transitions. [2024-10-31 22:03:42,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:03:42,515 INFO L425 stractBuchiCegarLoop]: Abstraction has 287 states and 418 transitions. [2024-10-31 22:03:42,515 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-10-31 22:03:42,515 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 287 states and 418 transitions. [2024-10-31 22:03:42,516 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 251 [2024-10-31 22:03:42,517 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:42,517 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:42,517 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:42,518 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:42,536 INFO L745 eck$LassoCheckResult]: Stem: 2482#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 2447#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 2434#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 2435#L59-1 mp_add_~nb~0#1 := 4; 2452#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 2443#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 2480#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2516#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 2515#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 2514#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2512#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2510#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2508#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 2502#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 2505#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2503#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2499#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2500#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 2538#L95-1 [2024-10-31 22:03:42,536 INFO L747 eck$LassoCheckResult]: Loop: 2538#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 2539#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2530#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2531#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2524#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 2525#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2564#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 2561#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 2562#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 2698#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2697#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2455#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 2593#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 2470#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 2523#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 2586#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 2456#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 2457#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2481#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2448#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 2449#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 2654#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 2538#L95-1 [2024-10-31 22:03:42,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:42,536 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 3 times [2024-10-31 22:03:42,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:42,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936769508] [2024-10-31 22:03:42,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:42,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:42,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:42,579 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:42,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:42,609 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:42,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:42,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1115550935, now seen corresponding path program 1 times [2024-10-31 22:03:42,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:42,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672494460] [2024-10-31 22:03:42,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:42,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:42,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:42,646 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-31 22:03:42,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:42,646 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672494460] [2024-10-31 22:03:42,647 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [672494460] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:42,647 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:42,647 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:42,647 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531326768] [2024-10-31 22:03:42,647 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:42,648 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:42,648 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:42,648 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:03:42,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:03:42,649 INFO L87 Difference]: Start difference. First operand 287 states and 418 transitions. cyclomatic complexity: 133 Second operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:42,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:42,761 INFO L93 Difference]: Finished difference Result 339 states and 494 transitions. [2024-10-31 22:03:42,761 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 339 states and 494 transitions. [2024-10-31 22:03:42,763 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 303 [2024-10-31 22:03:42,765 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 339 states to 339 states and 494 transitions. [2024-10-31 22:03:42,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 339 [2024-10-31 22:03:42,766 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 339 [2024-10-31 22:03:42,766 INFO L73 IsDeterministic]: Start isDeterministic. Operand 339 states and 494 transitions. [2024-10-31 22:03:42,766 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:42,767 INFO L218 hiAutomatonCegarLoop]: Abstraction has 339 states and 494 transitions. [2024-10-31 22:03:42,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states and 494 transitions. [2024-10-31 22:03:42,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 333. [2024-10-31 22:03:42,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 333 states, 333 states have (on average 1.4654654654654655) internal successors, (488), 332 states have internal predecessors, (488), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:42,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 488 transitions. [2024-10-31 22:03:42,773 INFO L240 hiAutomatonCegarLoop]: Abstraction has 333 states and 488 transitions. [2024-10-31 22:03:42,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:03:42,774 INFO L425 stractBuchiCegarLoop]: Abstraction has 333 states and 488 transitions. [2024-10-31 22:03:42,775 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-10-31 22:03:42,775 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 333 states and 488 transitions. [2024-10-31 22:03:42,777 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 297 [2024-10-31 22:03:42,777 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:42,777 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:42,778 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:42,778 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:42,778 INFO L745 eck$LassoCheckResult]: Stem: 3109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 3078#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 3066#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 3067#L59-1 mp_add_~nb~0#1 := 4; 3083#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 3074#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 3106#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 3148#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 3147#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 3146#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3144#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3142#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3140#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 3134#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 3137#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3135#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3131#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3132#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 3169#L95-1 [2024-10-31 22:03:42,778 INFO L747 eck$LassoCheckResult]: Loop: 3169#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 3170#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3163#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3164#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3156#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 3157#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 3149#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 3151#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 3263#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 3181#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3182#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3174#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 3175#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3158#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 3159#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 3217#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 3214#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 3215#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3332#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3331#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 3329#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 3324#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 3169#L95-1 [2024-10-31 22:03:42,779 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:42,779 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 4 times [2024-10-31 22:03:42,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:42,780 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66167763] [2024-10-31 22:03:42,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:42,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:42,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:42,800 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:42,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:42,821 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:42,821 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:42,821 INFO L85 PathProgramCache]: Analyzing trace with hash 722523925, now seen corresponding path program 1 times [2024-10-31 22:03:42,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:42,822 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942211325] [2024-10-31 22:03:42,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:42,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:42,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:43,000 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:43,000 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:43,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942211325] [2024-10-31 22:03:43,001 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [942211325] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:43,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2067771231] [2024-10-31 22:03:43,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:43,001 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:43,001 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:43,005 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:43,007 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-10-31 22:03:43,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:43,065 INFO L255 TraceCheckSpWp]: Trace formula consists of 51 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:03:43,067 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:43,175 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:43,175 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:03:43,232 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:43,233 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2067771231] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:03:43,233 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:03:43,233 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 3] total 7 [2024-10-31 22:03:43,233 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1033110098] [2024-10-31 22:03:43,234 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:03:43,234 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:43,234 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:43,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-31 22:03:43,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2024-10-31 22:03:43,235 INFO L87 Difference]: Start difference. First operand 333 states and 488 transitions. cyclomatic complexity: 157 Second operand has 8 states, 8 states have (on average 5.25) internal successors, (42), 7 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:43,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:43,707 INFO L93 Difference]: Finished difference Result 470 states and 642 transitions. [2024-10-31 22:03:43,707 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 470 states and 642 transitions. [2024-10-31 22:03:43,711 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 429 [2024-10-31 22:03:43,713 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 470 states to 470 states and 642 transitions. [2024-10-31 22:03:43,714 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 470 [2024-10-31 22:03:43,714 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 470 [2024-10-31 22:03:43,714 INFO L73 IsDeterministic]: Start isDeterministic. Operand 470 states and 642 transitions. [2024-10-31 22:03:43,715 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:43,715 INFO L218 hiAutomatonCegarLoop]: Abstraction has 470 states and 642 transitions. [2024-10-31 22:03:43,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 470 states and 642 transitions. [2024-10-31 22:03:43,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 470 to 422. [2024-10-31 22:03:43,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 422 states, 422 states have (on average 1.3909952606635072) internal successors, (587), 421 states have internal predecessors, (587), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:43,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 587 transitions. [2024-10-31 22:03:43,724 INFO L240 hiAutomatonCegarLoop]: Abstraction has 422 states and 587 transitions. [2024-10-31 22:03:43,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-31 22:03:43,725 INFO L425 stractBuchiCegarLoop]: Abstraction has 422 states and 587 transitions. [2024-10-31 22:03:43,725 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-10-31 22:03:43,725 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 422 states and 587 transitions. [2024-10-31 22:03:43,728 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 386 [2024-10-31 22:03:43,728 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:43,728 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:43,729 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:43,729 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:43,729 INFO L745 eck$LassoCheckResult]: Stem: 4051#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 4021#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 4010#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 4011#L59-1 mp_add_~nb~0#1 := 4; 4026#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 4017#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 4049#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4102#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 4101#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 4100#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4098#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4096#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4094#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 4088#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 4091#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4089#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4085#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4086#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 4123#L95-1 [2024-10-31 22:03:43,730 INFO L747 eck$LassoCheckResult]: Loop: 4123#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 4122#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4121#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4119#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4120#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 4288#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4284#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 4282#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4280#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 4277#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4275#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4270#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 4264#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 4260#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4255#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 4252#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4249#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4246#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 4245#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 4243#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 4244#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 4050#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4033#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4022#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 4023#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 4419#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 4123#L95-1 [2024-10-31 22:03:43,730 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:43,730 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 5 times [2024-10-31 22:03:43,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:43,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284731485] [2024-10-31 22:03:43,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:43,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:43,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:43,750 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:43,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:43,769 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:43,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:43,770 INFO L85 PathProgramCache]: Analyzing trace with hash 1570645289, now seen corresponding path program 1 times [2024-10-31 22:03:43,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:43,770 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538741554] [2024-10-31 22:03:43,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:43,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:43,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:43,893 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:43,893 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:43,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538741554] [2024-10-31 22:03:43,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [538741554] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:43,894 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:43,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:43,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919175974] [2024-10-31 22:03:43,894 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:43,895 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:43,896 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:43,896 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:03:43,896 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:03:43,897 INFO L87 Difference]: Start difference. First operand 422 states and 587 transitions. cyclomatic complexity: 167 Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 4 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:44,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:44,139 INFO L93 Difference]: Finished difference Result 550 states and 730 transitions. [2024-10-31 22:03:44,139 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 550 states and 730 transitions. [2024-10-31 22:03:44,144 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 510 [2024-10-31 22:03:44,147 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 550 states to 550 states and 730 transitions. [2024-10-31 22:03:44,148 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 550 [2024-10-31 22:03:44,148 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 550 [2024-10-31 22:03:44,149 INFO L73 IsDeterministic]: Start isDeterministic. Operand 550 states and 730 transitions. [2024-10-31 22:03:44,150 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:44,150 INFO L218 hiAutomatonCegarLoop]: Abstraction has 550 states and 730 transitions. [2024-10-31 22:03:44,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states and 730 transitions. [2024-10-31 22:03:44,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 444. [2024-10-31 22:03:44,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 444 states, 444 states have (on average 1.3355855855855856) internal successors, (593), 443 states have internal predecessors, (593), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:44,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 593 transitions. [2024-10-31 22:03:44,162 INFO L240 hiAutomatonCegarLoop]: Abstraction has 444 states and 593 transitions. [2024-10-31 22:03:44,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-31 22:03:44,165 INFO L425 stractBuchiCegarLoop]: Abstraction has 444 states and 593 transitions. [2024-10-31 22:03:44,166 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-10-31 22:03:44,166 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 444 states and 593 transitions. [2024-10-31 22:03:44,169 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 406 [2024-10-31 22:03:44,169 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:44,169 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:44,170 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:44,171 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:44,171 INFO L745 eck$LassoCheckResult]: Stem: 5036#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 5004#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 4992#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 4993#L59-1 mp_add_~nb~0#1 := 4; 5010#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 5000#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 5033#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 5084#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 5083#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 5082#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5080#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5078#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5076#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 5070#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 5073#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5071#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5067#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5068#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 5202#L95-1 [2024-10-31 22:03:44,172 INFO L747 eck$LassoCheckResult]: Loop: 5202#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 5201#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5200#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5199#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5197#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 5195#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 5192#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 5193#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 5393#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 5391#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5118#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 5119#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5106#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5107#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 5094#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 5095#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 5166#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 5366#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 5367#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5130#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5131#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5122#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 5087#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 5088#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 5267#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 5262#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 5263#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5338#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5336#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 5325#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 5324#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 5202#L95-1 [2024-10-31 22:03:44,172 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:44,175 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 6 times [2024-10-31 22:03:44,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:44,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527674743] [2024-10-31 22:03:44,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:44,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:44,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:44,203 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:44,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:44,236 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:44,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:44,240 INFO L85 PathProgramCache]: Analyzing trace with hash 1950939250, now seen corresponding path program 1 times [2024-10-31 22:03:44,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:44,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116119914] [2024-10-31 22:03:44,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:44,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:44,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:44,378 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:44,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:44,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116119914] [2024-10-31 22:03:44,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1116119914] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:44,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:44,379 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-31 22:03:44,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1705618887] [2024-10-31 22:03:44,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:44,380 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:44,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:44,381 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:03:44,381 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-31 22:03:44,381 INFO L87 Difference]: Start difference. First operand 444 states and 593 transitions. cyclomatic complexity: 151 Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 4 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:44,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:44,482 INFO L93 Difference]: Finished difference Result 514 states and 668 transitions. [2024-10-31 22:03:44,482 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 514 states and 668 transitions. [2024-10-31 22:03:44,485 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 476 [2024-10-31 22:03:44,488 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 514 states to 514 states and 668 transitions. [2024-10-31 22:03:44,489 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 514 [2024-10-31 22:03:44,489 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 514 [2024-10-31 22:03:44,490 INFO L73 IsDeterministic]: Start isDeterministic. Operand 514 states and 668 transitions. [2024-10-31 22:03:44,490 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:44,491 INFO L218 hiAutomatonCegarLoop]: Abstraction has 514 states and 668 transitions. [2024-10-31 22:03:44,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states and 668 transitions. [2024-10-31 22:03:44,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 432. [2024-10-31 22:03:44,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 432 states, 432 states have (on average 1.3055555555555556) internal successors, (564), 431 states have internal predecessors, (564), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:44,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 432 states to 432 states and 564 transitions. [2024-10-31 22:03:44,500 INFO L240 hiAutomatonCegarLoop]: Abstraction has 432 states and 564 transitions. [2024-10-31 22:03:44,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:03:44,501 INFO L425 stractBuchiCegarLoop]: Abstraction has 432 states and 564 transitions. [2024-10-31 22:03:44,501 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-10-31 22:03:44,501 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 432 states and 564 transitions. [2024-10-31 22:03:44,503 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 394 [2024-10-31 22:03:44,504 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:44,504 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:44,504 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:44,505 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:44,505 INFO L745 eck$LassoCheckResult]: Stem: 5999#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 5969#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 5957#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 5958#L59-1 mp_add_~nb~0#1 := 4; 5975#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 5965#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 5981#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 5982#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 6356#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 6355#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6353#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6351#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6349#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 6340#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 6346#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6343#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6338#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6333#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 6204#L95-1 [2024-10-31 22:03:44,505 INFO L747 eck$LassoCheckResult]: Loop: 6204#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 6199#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6197#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6194#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6191#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6188#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6183#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6176#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6177#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 6162#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6373#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 6369#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6366#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6364#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6009#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6010#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6098#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6093#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 6090#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6061#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6032#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6023#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 6021#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6017#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6018#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 6104#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6101#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 6099#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6097#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6094#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 6091#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 6092#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6341#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6335#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6313#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 6204#L95-1 [2024-10-31 22:03:44,506 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:44,506 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 7 times [2024-10-31 22:03:44,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:44,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888436052] [2024-10-31 22:03:44,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:44,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:44,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:44,526 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:44,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:44,549 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:44,552 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:44,552 INFO L85 PathProgramCache]: Analyzing trace with hash 1265935866, now seen corresponding path program 1 times [2024-10-31 22:03:44,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:44,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416207246] [2024-10-31 22:03:44,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:44,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:44,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:44,601 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-31 22:03:44,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:44,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [416207246] [2024-10-31 22:03:44,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [416207246] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:44,602 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:44,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:03:44,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1713001745] [2024-10-31 22:03:44,603 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:44,603 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:44,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:44,604 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:03:44,604 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:03:44,604 INFO L87 Difference]: Start difference. First operand 432 states and 564 transitions. cyclomatic complexity: 134 Second operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:44,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:44,712 INFO L93 Difference]: Finished difference Result 431 states and 548 transitions. [2024-10-31 22:03:44,712 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 431 states and 548 transitions. [2024-10-31 22:03:44,715 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 393 [2024-10-31 22:03:44,717 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 431 states to 431 states and 548 transitions. [2024-10-31 22:03:44,717 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 431 [2024-10-31 22:03:44,718 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 431 [2024-10-31 22:03:44,718 INFO L73 IsDeterministic]: Start isDeterministic. Operand 431 states and 548 transitions. [2024-10-31 22:03:44,719 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:44,719 INFO L218 hiAutomatonCegarLoop]: Abstraction has 431 states and 548 transitions. [2024-10-31 22:03:44,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 431 states and 548 transitions. [2024-10-31 22:03:44,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 431 to 398. [2024-10-31 22:03:44,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 398 states, 398 states have (on average 1.263819095477387) internal successors, (503), 397 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:44,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 503 transitions. [2024-10-31 22:03:44,726 INFO L240 hiAutomatonCegarLoop]: Abstraction has 398 states and 503 transitions. [2024-10-31 22:03:44,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:03:44,727 INFO L425 stractBuchiCegarLoop]: Abstraction has 398 states and 503 transitions. [2024-10-31 22:03:44,727 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-10-31 22:03:44,728 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 398 states and 503 transitions. [2024-10-31 22:03:44,729 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 360 [2024-10-31 22:03:44,730 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:44,730 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:44,730 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:44,731 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:44,731 INFO L745 eck$LassoCheckResult]: Stem: 6865#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 6839#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 6826#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 6827#L59-1 mp_add_~nb~0#1 := 4; 6845#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 6835#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 6850#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6851#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 6847#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 6848#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6864#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7210#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7144#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 7142#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 7140#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7138#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7136#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7134#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 7131#L95-1 [2024-10-31 22:03:44,731 INFO L747 eck$LassoCheckResult]: Loop: 7131#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 7128#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7127#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7125#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7123#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 7122#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 7120#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 7121#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 7055#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 7045#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7044#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 7043#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7042#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7041#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6872#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6873#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 6952#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 6950#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 6948#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6901#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6897#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 6887#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 6885#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 6880#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 6881#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 7080#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 7081#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7170#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7168#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7165#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 7150#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 7160#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7158#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7148#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 7133#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 7131#L95-1 [2024-10-31 22:03:44,732 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:44,732 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 8 times [2024-10-31 22:03:44,732 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:44,732 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077692190] [2024-10-31 22:03:44,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:44,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:44,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:44,750 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:44,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:44,768 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:44,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:44,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1955946050, now seen corresponding path program 1 times [2024-10-31 22:03:44,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:44,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127747389] [2024-10-31 22:03:44,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:44,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:44,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:44,906 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 24 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-31 22:03:44,906 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:44,906 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127747389] [2024-10-31 22:03:44,906 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2127747389] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:44,907 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [213258039] [2024-10-31 22:03:44,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:44,907 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:44,907 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:44,909 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:44,911 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-10-31 22:03:44,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:44,970 INFO L255 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:03:44,971 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:45,021 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-31 22:03:45,022 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:03:45,084 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 23 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-31 22:03:45,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [213258039] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:03:45,085 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:03:45,085 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 9 [2024-10-31 22:03:45,085 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [681026567] [2024-10-31 22:03:45,085 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:03:45,085 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:45,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:45,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-31 22:03:45,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-10-31 22:03:45,086 INFO L87 Difference]: Start difference. First operand 398 states and 503 transitions. cyclomatic complexity: 107 Second operand has 9 states, 9 states have (on average 7.111111111111111) internal successors, (64), 9 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:46,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:46,476 INFO L93 Difference]: Finished difference Result 459 states and 548 transitions. [2024-10-31 22:03:46,476 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 459 states and 548 transitions. [2024-10-31 22:03:46,479 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 418 [2024-10-31 22:03:46,481 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 459 states to 459 states and 548 transitions. [2024-10-31 22:03:46,481 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 459 [2024-10-31 22:03:46,482 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 459 [2024-10-31 22:03:46,482 INFO L73 IsDeterministic]: Start isDeterministic. Operand 459 states and 548 transitions. [2024-10-31 22:03:46,483 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:46,483 INFO L218 hiAutomatonCegarLoop]: Abstraction has 459 states and 548 transitions. [2024-10-31 22:03:46,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states and 548 transitions. [2024-10-31 22:03:46,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 279. [2024-10-31 22:03:46,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 279 states, 279 states have (on average 1.2508960573476702) internal successors, (349), 278 states have internal predecessors, (349), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:46,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 349 transitions. [2024-10-31 22:03:46,489 INFO L240 hiAutomatonCegarLoop]: Abstraction has 279 states and 349 transitions. [2024-10-31 22:03:46,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-10-31 22:03:46,490 INFO L425 stractBuchiCegarLoop]: Abstraction has 279 states and 349 transitions. [2024-10-31 22:03:46,491 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-10-31 22:03:46,491 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 279 states and 349 transitions. [2024-10-31 22:03:46,492 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 243 [2024-10-31 22:03:46,492 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:46,493 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:46,493 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:46,493 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:46,494 INFO L745 eck$LassoCheckResult]: Stem: 8010#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 7982#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 7969#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 7970#L59-1 mp_add_~nb~0#1 := 4; 7987#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 7978#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 8183#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8181#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 8177#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 8178#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8172#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8173#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8151#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 8150#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 8149#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8148#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8147#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8144#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 8143#L95-1 [2024-10-31 22:03:46,494 INFO L747 eck$LassoCheckResult]: Loop: 8143#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 8142#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8141#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8139#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8140#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8135#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8136#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 8132#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 8131#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8130#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 8129#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8128#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8126#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 8125#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8124#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 8123#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8122#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8121#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8119#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8116#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 8090#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 8083#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8104#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8084#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 8081#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8080#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 8079#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8078#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8077#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 8076#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8074#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 8073#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8071#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 8072#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 8188#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8187#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8186#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8185#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 8146#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 8143#L95-1 [2024-10-31 22:03:46,494 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:46,495 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 9 times [2024-10-31 22:03:46,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:46,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72543587] [2024-10-31 22:03:46,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:46,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:46,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:46,512 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:46,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:46,529 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:46,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:46,530 INFO L85 PathProgramCache]: Analyzing trace with hash 1111117554, now seen corresponding path program 1 times [2024-10-31 22:03:46,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:46,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737252920] [2024-10-31 22:03:46,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:46,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:46,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:46,640 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 16 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-31 22:03:46,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:46,640 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737252920] [2024-10-31 22:03:46,640 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [737252920] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:46,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343611622] [2024-10-31 22:03:46,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:46,641 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:46,641 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:46,644 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:46,645 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-10-31 22:03:46,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:46,705 INFO L255 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-31 22:03:46,706 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:46,817 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-31 22:03:46,817 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:03:46,817 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343611622] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:46,818 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:03:46,818 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 8 [2024-10-31 22:03:46,818 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985701742] [2024-10-31 22:03:46,818 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:46,818 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:46,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:46,819 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:03:46,819 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-10-31 22:03:46,819 INFO L87 Difference]: Start difference. First operand 279 states and 349 transitions. cyclomatic complexity: 72 Second operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:47,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:47,067 INFO L93 Difference]: Finished difference Result 577 states and 705 transitions. [2024-10-31 22:03:47,068 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 577 states and 705 transitions. [2024-10-31 22:03:47,071 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 475 [2024-10-31 22:03:47,074 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 577 states to 577 states and 705 transitions. [2024-10-31 22:03:47,074 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 577 [2024-10-31 22:03:47,074 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 577 [2024-10-31 22:03:47,075 INFO L73 IsDeterministic]: Start isDeterministic. Operand 577 states and 705 transitions. [2024-10-31 22:03:47,075 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:47,075 INFO L218 hiAutomatonCegarLoop]: Abstraction has 577 states and 705 transitions. [2024-10-31 22:03:47,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 577 states and 705 transitions. [2024-10-31 22:03:47,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 577 to 475. [2024-10-31 22:03:47,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 475 states, 475 states have (on average 1.2526315789473683) internal successors, (595), 474 states have internal predecessors, (595), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:47,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 475 states to 475 states and 595 transitions. [2024-10-31 22:03:47,085 INFO L240 hiAutomatonCegarLoop]: Abstraction has 475 states and 595 transitions. [2024-10-31 22:03:47,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:03:47,086 INFO L425 stractBuchiCegarLoop]: Abstraction has 475 states and 595 transitions. [2024-10-31 22:03:47,086 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-10-31 22:03:47,086 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 475 states and 595 transitions. [2024-10-31 22:03:47,088 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 409 [2024-10-31 22:03:47,088 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:47,088 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:47,089 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:47,089 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:47,089 INFO L745 eck$LassoCheckResult]: Stem: 8991#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 8964#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 8953#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 8954#L59-1 mp_add_~nb~0#1 := 4; 8969#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 8971#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 8989#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 8987#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 8972#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 8973#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9427#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9426#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9411#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 9409#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 9406#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9404#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9401#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9396#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 9393#L95-1 [2024-10-31 22:03:47,090 INFO L747 eck$LassoCheckResult]: Loop: 9393#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 9391#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9389#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9383#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9384#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 9378#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 9379#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 9373#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 9371#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9121#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 9122#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9117#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9118#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 9112#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9113#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 9108#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9109#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9098#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 9099#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 9054#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 9048#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 9030#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 9029#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9027#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9028#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 9020#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9015#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 9002#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 9003#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 9342#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 8990#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8978#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8965#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 8966#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 9425#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 9424#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9423#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9422#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 9421#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 9393#L95-1 [2024-10-31 22:03:47,090 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:47,090 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 10 times [2024-10-31 22:03:47,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:47,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947729249] [2024-10-31 22:03:47,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:47,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:47,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:47,109 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:47,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:47,125 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:47,126 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:47,126 INFO L85 PathProgramCache]: Analyzing trace with hash -593187128, now seen corresponding path program 1 times [2024-10-31 22:03:47,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:47,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1423464128] [2024-10-31 22:03:47,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:47,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:47,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:47,308 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 23 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:47,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:47,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1423464128] [2024-10-31 22:03:47,308 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1423464128] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:47,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1920850853] [2024-10-31 22:03:47,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:47,309 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:47,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:47,311 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:47,314 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-31 22:03:47,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:47,369 INFO L255 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:03:47,370 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:47,412 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-31 22:03:47,412 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:03:47,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1920850853] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:47,413 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:03:47,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2024-10-31 22:03:47,413 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [873691533] [2024-10-31 22:03:47,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:47,414 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:47,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:47,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:03:47,414 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-10-31 22:03:47,414 INFO L87 Difference]: Start difference. First operand 475 states and 595 transitions. cyclomatic complexity: 123 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:47,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:47,611 INFO L93 Difference]: Finished difference Result 480 states and 562 transitions. [2024-10-31 22:03:47,611 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 480 states and 562 transitions. [2024-10-31 22:03:47,614 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 399 [2024-10-31 22:03:47,617 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 480 states to 480 states and 562 transitions. [2024-10-31 22:03:47,617 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 480 [2024-10-31 22:03:47,618 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 480 [2024-10-31 22:03:47,618 INFO L73 IsDeterministic]: Start isDeterministic. Operand 480 states and 562 transitions. [2024-10-31 22:03:47,618 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:47,619 INFO L218 hiAutomatonCegarLoop]: Abstraction has 480 states and 562 transitions. [2024-10-31 22:03:47,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480 states and 562 transitions. [2024-10-31 22:03:47,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480 to 436. [2024-10-31 22:03:47,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 436 states, 436 states have (on average 1.1811926605504588) internal successors, (515), 435 states have internal predecessors, (515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:47,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 515 transitions. [2024-10-31 22:03:47,627 INFO L240 hiAutomatonCegarLoop]: Abstraction has 436 states and 515 transitions. [2024-10-31 22:03:47,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:03:47,628 INFO L425 stractBuchiCegarLoop]: Abstraction has 436 states and 515 transitions. [2024-10-31 22:03:47,629 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-10-31 22:03:47,629 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 436 states and 515 transitions. [2024-10-31 22:03:47,631 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 370 [2024-10-31 22:03:47,631 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:47,631 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:47,632 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:47,632 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:47,632 INFO L745 eck$LassoCheckResult]: Stem: 10076#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 10047#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 10034#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 10035#L59-1 mp_add_~nb~0#1 := 4; 10052#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 10054#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 10073#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 10070#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 10071#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 10450#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10449#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10447#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10445#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 10443#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 10441#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10439#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10438#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10434#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 10435#L95-1 [2024-10-31 22:03:47,632 INFO L747 eck$LassoCheckResult]: Loop: 10435#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 10455#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10454#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10453#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10452#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 10451#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 10428#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 10422#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 10469#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10468#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 10415#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10467#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10465#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 10466#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10393#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 10394#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10388#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10389#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 10379#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 10374#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 10372#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 10205#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10238#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10208#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 10206#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10202#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 10199#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10197#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10195#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 10193#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10191#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 10189#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 10186#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 10187#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 10336#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 10173#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10137#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10133#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10134#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 10116#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 10081#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 10082#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 10157#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 10074#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10075#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10457#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10079#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 10080#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 10448#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10446#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10444#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 10442#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 10435#L95-1 [2024-10-31 22:03:47,633 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:47,633 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 11 times [2024-10-31 22:03:47,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:47,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385602131] [2024-10-31 22:03:47,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:47,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:47,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:47,658 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:47,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:47,685 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:47,686 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:47,686 INFO L85 PathProgramCache]: Analyzing trace with hash -775097405, now seen corresponding path program 1 times [2024-10-31 22:03:47,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:47,686 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416781461] [2024-10-31 22:03:47,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:47,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:47,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:47,899 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 36 proven. 21 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-31 22:03:47,899 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:47,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [416781461] [2024-10-31 22:03:47,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [416781461] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:47,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2046948187] [2024-10-31 22:03:47,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:47,900 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:47,900 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:47,903 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:47,904 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-31 22:03:47,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:47,967 INFO L255 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-10-31 22:03:47,968 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:48,006 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-31 22:03:48,006 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-31 22:03:48,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2046948187] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:48,007 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-31 22:03:48,007 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2024-10-31 22:03:48,007 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646134803] [2024-10-31 22:03:48,007 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:48,007 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:48,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:48,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-31 22:03:48,008 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-10-31 22:03:48,008 INFO L87 Difference]: Start difference. First operand 436 states and 515 transitions. cyclomatic complexity: 82 Second operand has 4 states, 4 states have (on average 8.5) internal successors, (34), 4 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:48,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:48,175 INFO L93 Difference]: Finished difference Result 470 states and 543 transitions. [2024-10-31 22:03:48,175 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 470 states and 543 transitions. [2024-10-31 22:03:48,177 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 381 [2024-10-31 22:03:48,179 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 470 states to 447 states and 510 transitions. [2024-10-31 22:03:48,179 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 447 [2024-10-31 22:03:48,180 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 447 [2024-10-31 22:03:48,180 INFO L73 IsDeterministic]: Start isDeterministic. Operand 447 states and 510 transitions. [2024-10-31 22:03:48,180 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:48,181 INFO L218 hiAutomatonCegarLoop]: Abstraction has 447 states and 510 transitions. [2024-10-31 22:03:48,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 447 states and 510 transitions. [2024-10-31 22:03:48,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 447 to 377. [2024-10-31 22:03:48,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 377 states, 377 states have (on average 1.1511936339522546) internal successors, (434), 376 states have internal predecessors, (434), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:48,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 434 transitions. [2024-10-31 22:03:48,187 INFO L240 hiAutomatonCegarLoop]: Abstraction has 377 states and 434 transitions. [2024-10-31 22:03:48,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-31 22:03:48,188 INFO L425 stractBuchiCegarLoop]: Abstraction has 377 states and 434 transitions. [2024-10-31 22:03:48,188 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-10-31 22:03:48,188 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 377 states and 434 transitions. [2024-10-31 22:03:48,190 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 321 [2024-10-31 22:03:48,190 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:48,190 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:48,190 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:48,191 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:48,191 INFO L745 eck$LassoCheckResult]: Stem: 11143#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 11117#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 11105#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 11106#L59-1 mp_add_~nb~0#1 := 4; 11122#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 11124#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 11355#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 11352#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 11349#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 11350#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11344#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11345#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11340#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 11341#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 11336#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11337#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11332#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11333#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 11329#L95-1 [2024-10-31 22:03:48,191 INFO L747 eck$LassoCheckResult]: Loop: 11329#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 11328#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11327#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11326#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11325#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 11324#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 11322#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 11323#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 11458#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11457#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 11456#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11455#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11454#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 11453#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11452#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 11451#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11450#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11302#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 11297#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 11298#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 11278#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 11216#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11220#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11218#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 11214#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11211#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 11212#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11207#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11208#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 11203#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11204#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 11199#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 11200#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 11195#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11196#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11190#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11191#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 11184#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 11183#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 11178#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11179#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11174#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11175#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 11170#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 11171#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 11166#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 11161#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 11160#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 11156#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11154#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11155#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11151#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11149#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 11150#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 11304#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 11305#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 11346#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11347#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11342#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11343#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 11338#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 11339#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11334#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11335#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 11330#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 11329#L95-1 [2024-10-31 22:03:48,191 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:48,191 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 12 times [2024-10-31 22:03:48,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:48,192 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590956728] [2024-10-31 22:03:48,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:48,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:48,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:48,209 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:48,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:48,225 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:48,226 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:48,226 INFO L85 PathProgramCache]: Analyzing trace with hash 1817634826, now seen corresponding path program 1 times [2024-10-31 22:03:48,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:48,226 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307286679] [2024-10-31 22:03:48,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:48,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:48,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:48,404 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 77 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-31 22:03:48,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:48,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307286679] [2024-10-31 22:03:48,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307286679] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:48,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1715456838] [2024-10-31 22:03:48,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:48,405 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:48,405 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:48,408 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:48,409 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-31 22:03:48,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:48,482 INFO L255 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-31 22:03:48,483 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:48,563 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 80 proven. 3 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-31 22:03:48,563 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:03:48,685 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-31 22:03:48,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1715456838] provided 1 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:48,686 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-10-31 22:03:48,686 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6, 5] total 9 [2024-10-31 22:03:48,686 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047680591] [2024-10-31 22:03:48,686 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:48,687 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:48,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:48,687 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:03:48,687 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-10-31 22:03:48,688 INFO L87 Difference]: Start difference. First operand 377 states and 434 transitions. cyclomatic complexity: 60 Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:48,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:48,960 INFO L93 Difference]: Finished difference Result 586 states and 667 transitions. [2024-10-31 22:03:48,960 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 586 states and 667 transitions. [2024-10-31 22:03:48,963 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 487 [2024-10-31 22:03:48,965 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 586 states to 574 states and 655 transitions. [2024-10-31 22:03:48,965 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 574 [2024-10-31 22:03:48,966 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 574 [2024-10-31 22:03:48,966 INFO L73 IsDeterministic]: Start isDeterministic. Operand 574 states and 655 transitions. [2024-10-31 22:03:48,966 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:48,967 INFO L218 hiAutomatonCegarLoop]: Abstraction has 574 states and 655 transitions. [2024-10-31 22:03:48,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 574 states and 655 transitions. [2024-10-31 22:03:48,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 574 to 492. [2024-10-31 22:03:48,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 492 states, 492 states have (on average 1.1524390243902438) internal successors, (567), 491 states have internal predecessors, (567), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:48,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 492 states to 492 states and 567 transitions. [2024-10-31 22:03:48,975 INFO L240 hiAutomatonCegarLoop]: Abstraction has 492 states and 567 transitions. [2024-10-31 22:03:48,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-31 22:03:48,975 INFO L425 stractBuchiCegarLoop]: Abstraction has 492 states and 567 transitions. [2024-10-31 22:03:48,976 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-10-31 22:03:48,976 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 492 states and 567 transitions. [2024-10-31 22:03:48,977 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 435 [2024-10-31 22:03:48,978 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:48,978 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:48,978 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:48,978 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:48,979 INFO L745 eck$LassoCheckResult]: Stem: 12511#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 12482#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 12475#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 12476#L59-1 mp_add_~nb~0#1 := 4; 12487#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 12490#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 12510#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12869#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12491#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 12492#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12509#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12483#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12484#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 12956#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 12954#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12472#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12473#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12961#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 12948#L95-1 [2024-10-31 22:03:48,979 INFO L747 eck$LassoCheckResult]: Loop: 12948#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 12959#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12957#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12500#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12501#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12494#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12495#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12764#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12762#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 12761#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12760#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12759#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 12758#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12757#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 12756#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12754#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12751#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 12749#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12747#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 12745#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12743#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12742#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12740#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12737#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 12735#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 12732#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 12694#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12729#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12726#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 12724#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12722#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12720#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12718#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 12690#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 12816#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12815#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12814#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12813#L92-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296); 12568#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 12799#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12812#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12811#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12810#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 12809#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12808#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12806#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12531#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12536#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12537#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12529#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12526#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 12524#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 12523#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12522#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12521#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12520#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12518#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 12519#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 12768#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 12765#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 12766#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12496#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12497#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12953#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 12952#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 12951#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12950#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12949#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 12947#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 12948#L95-1 [2024-10-31 22:03:48,979 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:48,980 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 13 times [2024-10-31 22:03:48,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:48,980 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920588061] [2024-10-31 22:03:48,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:48,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:48,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:48,995 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:49,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:49,010 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:49,011 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:49,011 INFO L85 PathProgramCache]: Analyzing trace with hash 1713995060, now seen corresponding path program 1 times [2024-10-31 22:03:49,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:49,011 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272909754] [2024-10-31 22:03:49,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:49,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:49,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:49,205 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-31 22:03:49,205 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:49,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272909754] [2024-10-31 22:03:49,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [272909754] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:49,206 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:49,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-10-31 22:03:49,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685753030] [2024-10-31 22:03:49,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:49,208 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:49,208 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:49,208 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-31 22:03:49,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:03:49,210 INFO L87 Difference]: Start difference. First operand 492 states and 567 transitions. cyclomatic complexity: 79 Second operand has 7 states, 7 states have (on average 7.714285714285714) internal successors, (54), 7 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:49,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:49,808 INFO L93 Difference]: Finished difference Result 775 states and 865 transitions. [2024-10-31 22:03:49,811 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 775 states and 865 transitions. [2024-10-31 22:03:49,819 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 558 [2024-10-31 22:03:49,822 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 775 states to 680 states and 755 transitions. [2024-10-31 22:03:49,823 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 680 [2024-10-31 22:03:49,824 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 680 [2024-10-31 22:03:49,827 INFO L73 IsDeterministic]: Start isDeterministic. Operand 680 states and 755 transitions. [2024-10-31 22:03:49,828 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:49,828 INFO L218 hiAutomatonCegarLoop]: Abstraction has 680 states and 755 transitions. [2024-10-31 22:03:49,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 680 states and 755 transitions. [2024-10-31 22:03:49,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 680 to 609. [2024-10-31 22:03:49,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 609 states have (on average 1.1182266009852218) internal successors, (681), 608 states have internal predecessors, (681), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:49,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 681 transitions. [2024-10-31 22:03:49,849 INFO L240 hiAutomatonCegarLoop]: Abstraction has 609 states and 681 transitions. [2024-10-31 22:03:49,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-31 22:03:49,850 INFO L425 stractBuchiCegarLoop]: Abstraction has 609 states and 681 transitions. [2024-10-31 22:03:49,851 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-10-31 22:03:49,851 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 609 states and 681 transitions. [2024-10-31 22:03:49,859 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 508 [2024-10-31 22:03:49,861 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:49,862 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:49,862 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:49,862 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:49,862 INFO L745 eck$LassoCheckResult]: Stem: 13796#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 13773#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 13766#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 13767#L59-1 mp_add_~nb~0#1 := 4; 13778#L69 assume 0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 13770#L71 assume 0 == (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 13772#L73 assume 0 == (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 13797#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 14211#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 14209#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 14208#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 14206#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14204#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14202#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14201#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 13968#L89 [2024-10-31 22:03:49,863 INFO L747 eck$LassoCheckResult]: Loop: 13968#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 14198#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 14196#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14194#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14192#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14190#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 14188#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 14130#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 14129#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14128#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 14127#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14126#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14125#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 13921#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 13925#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14122#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 14119#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14116#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14065#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 14063#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 14061#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 14058#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14056#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14054#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 14052#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13909#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 14049#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 13860#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14046#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14021#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 14020#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14019#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 14018#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 14017#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 14016#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14015#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14014#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14013#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 13846#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 14011#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 13839#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14010#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14009#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 14008#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 14007#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 14006#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 14005#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 13831#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13857#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13858#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13828#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13829#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 14000#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 13998#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13996#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13994#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13992#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13990#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 13987#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 13984#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 13980#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 13977#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13974#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13970#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 13967#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 13968#L89 [2024-10-31 22:03:49,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:49,863 INFO L85 PathProgramCache]: Analyzing trace with hash -890288343, now seen corresponding path program 1 times [2024-10-31 22:03:49,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:49,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317461451] [2024-10-31 22:03:49,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:49,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:49,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:50,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:50,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:50,037 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317461451] [2024-10-31 22:03:50,037 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1317461451] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:03:50,038 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:03:50,038 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-10-31 22:03:50,038 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960148415] [2024-10-31 22:03:50,038 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:03:50,038 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:50,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:50,039 INFO L85 PathProgramCache]: Analyzing trace with hash 1197554810, now seen corresponding path program 1 times [2024-10-31 22:03:50,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:50,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457134366] [2024-10-31 22:03:50,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:50,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:50,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:50,280 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 24 proven. 106 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:50,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:50,280 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457134366] [2024-10-31 22:03:50,280 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1457134366] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:50,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [38085689] [2024-10-31 22:03:50,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:50,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:50,281 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:50,284 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:50,285 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-31 22:03:50,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:50,351 INFO L255 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-10-31 22:03:50,355 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:50,462 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 83 proven. 10 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-31 22:03:50,462 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:03:50,570 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 83 proven. 10 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-31 22:03:50,570 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [38085689] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:03:50,570 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:03:50,570 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 5, 5] total 13 [2024-10-31 22:03:50,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587439390] [2024-10-31 22:03:50,571 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:03:50,571 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:50,571 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:50,571 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-31 22:03:50,572 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-10-31 22:03:50,572 INFO L87 Difference]: Start difference. First operand 609 states and 681 transitions. cyclomatic complexity: 77 Second operand has 7 states, 6 states have (on average 2.5) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:51,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:51,203 INFO L93 Difference]: Finished difference Result 2111 states and 2361 transitions. [2024-10-31 22:03:51,203 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2111 states and 2361 transitions. [2024-10-31 22:03:51,215 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 1881 [2024-10-31 22:03:51,224 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2111 states to 2111 states and 2361 transitions. [2024-10-31 22:03:51,224 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2111 [2024-10-31 22:03:51,226 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2111 [2024-10-31 22:03:51,226 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2111 states and 2361 transitions. [2024-10-31 22:03:51,229 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:51,229 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2111 states and 2361 transitions. [2024-10-31 22:03:51,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2111 states and 2361 transitions. [2024-10-31 22:03:51,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2111 to 601. [2024-10-31 22:03:51,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 601 states, 601 states have (on average 1.1181364392678868) internal successors, (672), 600 states have internal predecessors, (672), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:51,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 601 states to 601 states and 672 transitions. [2024-10-31 22:03:51,249 INFO L240 hiAutomatonCegarLoop]: Abstraction has 601 states and 672 transitions. [2024-10-31 22:03:51,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-31 22:03:51,250 INFO L425 stractBuchiCegarLoop]: Abstraction has 601 states and 672 transitions. [2024-10-31 22:03:51,250 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-10-31 22:03:51,250 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 601 states and 672 transitions. [2024-10-31 22:03:51,252 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 508 [2024-10-31 22:03:51,254 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:51,254 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:51,254 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:51,255 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:51,255 INFO L745 eck$LassoCheckResult]: Stem: 16929#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 16906#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 16899#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 16900#L59-1 mp_add_~nb~0#1 := 4; 16911#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 16913#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 16928#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 17436#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 17435#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 17434#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17433#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17432#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17431#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 17430#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 17429#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17428#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17427#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17426#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 17415#L95-1 [2024-10-31 22:03:51,255 INFO L747 eck$LassoCheckResult]: Loop: 17415#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 17460#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17459#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17379#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17307#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 17304#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 17300#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 17230#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17222#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 17221#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17220#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17219#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 17218#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17217#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 17216#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17214#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17211#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 17209#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17207#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 17205#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17203#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17202#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 17200#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 17196#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 17198#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 16991#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16990#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16989#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 16986#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16984#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 16983#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16982#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16981#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 16980#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16979#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 16978#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 16976#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 16977#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 16971#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17193#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17194#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16968#L92-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296); 16969#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 16963#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16964#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16959#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 16960#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 16955#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 16956#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 16950#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 16952#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 16943#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 17408#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17406#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17402#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17398#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17394#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 17391#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 17388#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 17225#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 17226#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17447#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17445#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17443#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 17441#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 17439#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17437#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17418#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 17414#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 17415#L95-1 [2024-10-31 22:03:51,256 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:51,256 INFO L85 PathProgramCache]: Analyzing trace with hash 389365736, now seen corresponding path program 14 times [2024-10-31 22:03:51,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:51,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056182388] [2024-10-31 22:03:51,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:51,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:51,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:51,273 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:51,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:51,314 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:51,317 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:51,317 INFO L85 PathProgramCache]: Analyzing trace with hash -44497702, now seen corresponding path program 1 times [2024-10-31 22:03:51,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:51,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866226887] [2024-10-31 22:03:51,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:51,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:51,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:51,626 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 27 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:03:51,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:51,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866226887] [2024-10-31 22:03:51,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1866226887] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:51,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [155309186] [2024-10-31 22:03:51,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:51,628 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:51,628 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:51,630 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:51,632 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-31 22:03:51,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:51,702 INFO L255 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-10-31 22:03:51,703 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:51,776 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 73 proven. 8 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-31 22:03:51,777 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:03:51,869 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 73 proven. 8 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-31 22:03:51,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [155309186] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:03:51,869 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:03:51,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 13 [2024-10-31 22:03:51,869 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [245397456] [2024-10-31 22:03:51,869 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:03:51,870 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:03:51,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:51,870 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-31 22:03:51,870 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2024-10-31 22:03:51,871 INFO L87 Difference]: Start difference. First operand 601 states and 672 transitions. cyclomatic complexity: 76 Second operand has 13 states, 13 states have (on average 9.615384615384615) internal successors, (125), 13 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:52,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:52,655 INFO L93 Difference]: Finished difference Result 617 states and 683 transitions. [2024-10-31 22:03:52,655 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 617 states and 683 transitions. [2024-10-31 22:03:52,658 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 66 [2024-10-31 22:03:52,661 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 617 states to 613 states and 667 transitions. [2024-10-31 22:03:52,661 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 613 [2024-10-31 22:03:52,662 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 613 [2024-10-31 22:03:52,662 INFO L73 IsDeterministic]: Start isDeterministic. Operand 613 states and 667 transitions. [2024-10-31 22:03:52,662 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:52,663 INFO L218 hiAutomatonCegarLoop]: Abstraction has 613 states and 667 transitions. [2024-10-31 22:03:52,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 613 states and 667 transitions. [2024-10-31 22:03:52,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 613 to 328. [2024-10-31 22:03:52,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 328 states, 328 states have (on average 1.103658536585366) internal successors, (362), 327 states have internal predecessors, (362), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:52,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 362 transitions. [2024-10-31 22:03:52,671 INFO L240 hiAutomatonCegarLoop]: Abstraction has 328 states and 362 transitions. [2024-10-31 22:03:52,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-31 22:03:52,671 INFO L425 stractBuchiCegarLoop]: Abstraction has 328 states and 362 transitions. [2024-10-31 22:03:52,672 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-10-31 22:03:52,672 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 328 states and 362 transitions. [2024-10-31 22:03:52,674 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 31 [2024-10-31 22:03:52,674 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:52,674 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:52,675 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:52,675 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:52,675 INFO L745 eck$LassoCheckResult]: Stem: 18572#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 18554#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 18547#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 18548#L59-1 mp_add_~nb~0#1 := 4; 18557#L69 assume !(0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296)); 18559#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 18571#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 18607#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 18606#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 18605#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18604#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18603#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18602#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 18601#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 18600#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18599#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18598#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18596#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 18594#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 18595#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18590#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18591#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18586#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 18587#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 18581#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 18583#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 18657#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18656#L90-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296); 18655#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18654#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18652#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 18653#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18648#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 18649#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18644#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18645#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 18640#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 18641#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 18819#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 18817#L90 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18815#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18813#L91-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296); 18811#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18808#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 18809#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18805#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18804#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 18803#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18801#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 18802#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 18569#L83 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296)); 18570#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 18831#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 18865#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18870#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18869#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18868#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 18565#L102-1 [2024-10-31 22:03:52,676 INFO L747 eck$LassoCheckResult]: Loop: 18565#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 18568#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 18792#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 18560#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18561#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18564#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18555#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18556#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 18543#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 18544#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18558#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18549#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18550#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 18565#L102-1 [2024-10-31 22:03:52,676 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:52,676 INFO L85 PathProgramCache]: Analyzing trace with hash -529922365, now seen corresponding path program 1 times [2024-10-31 22:03:52,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:52,677 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453885963] [2024-10-31 22:03:52,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:52,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:52,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:52,860 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 38 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-10-31 22:03:52,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:52,860 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1453885963] [2024-10-31 22:03:52,860 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1453885963] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:52,860 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [479704462] [2024-10-31 22:03:52,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:52,860 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:52,860 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:52,863 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:52,867 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-31 22:03:52,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:52,958 INFO L255 TraceCheckSpWp]: Trace formula consists of 159 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:03:52,959 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:53,084 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 37 proven. 3 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-31 22:03:53,085 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:03:53,334 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 47 proven. 9 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-31 22:03:53,334 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [479704462] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:03:53,334 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:03:53,334 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 7] total 13 [2024-10-31 22:03:53,335 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284696150] [2024-10-31 22:03:53,335 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:03:53,335 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:53,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:53,335 INFO L85 PathProgramCache]: Analyzing trace with hash 672830572, now seen corresponding path program 1 times [2024-10-31 22:03:53,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:53,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172513098] [2024-10-31 22:03:53,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:53,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:53,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:53,342 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:53,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:53,350 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:53,483 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:03:53,483 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:03:53,484 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:03:53,484 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:03:53,484 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-10-31 22:03:53,484 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:53,484 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:03:53,484 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:03:53,484 INFO L132 ssoRankerPreferences]: Filename of dumped script: byte_add_1-1.i_Iteration23_Loop [2024-10-31 22:03:53,485 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:03:53,485 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:03:53,503 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:53,529 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:53,846 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:03:53,847 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-10-31 22:03:53,849 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:53,850 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:53,852 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:53,854 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-10-31 22:03:53,856 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:03:53,856 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:03:53,941 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-10-31 22:03:53,942 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:53,942 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:53,944 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:53,946 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-10-31 22:03:53,947 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-10-31 22:03:53,947 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:03:54,531 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2024-10-31 22:03:54,536 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:54,536 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:03:54,536 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:03:54,536 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:03:54,536 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:03:54,536 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-31 22:03:54,536 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:54,537 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:03:54,537 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:03:54,537 INFO L132 ssoRankerPreferences]: Filename of dumped script: byte_add_1-1.i_Iteration23_Loop [2024-10-31 22:03:54,537 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:03:54,537 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:03:54,538 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:54,561 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:54,890 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:03:54,895 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-31 22:03:54,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:54,896 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:54,897 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:54,898 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-10-31 22:03:54,899 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:54,911 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:54,911 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:54,911 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:54,912 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:54,912 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:03:54,916 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:03:54,916 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:54,922 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:54,937 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-10-31 22:03:54,937 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:54,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:54,940 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:54,941 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-10-31 22:03:54,943 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:54,956 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:54,956 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:54,956 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:54,956 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:54,956 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:03:54,958 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:03:54,958 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:54,961 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:54,974 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:54,975 INFO L451 LassoAnalysis]: Using template '2-nested'. [2024-10-31 22:03:54,975 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:54,975 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:54,976 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:54,980 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-10-31 22:03:54,980 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:54,991 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:54,991 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:54,992 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:54,992 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:54,992 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:54,997 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:54,997 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,002 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,023 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-10-31 22:03:55,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,024 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,026 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,027 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-10-31 22:03:55,028 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,043 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:55,043 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,043 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,043 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,043 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:55,046 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:55,046 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,051 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,070 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-10-31 22:03:55,071 INFO L451 LassoAnalysis]: Using template '3-nested'. [2024-10-31 22:03:55,071 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,071 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,072 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,074 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-10-31 22:03:55,076 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,090 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:55,090 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,091 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,091 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,091 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:55,101 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:55,101 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,116 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,135 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-10-31 22:03:55,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,136 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,138 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,139 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-10-31 22:03:55,141 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,154 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:55,154 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,154 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,154 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,154 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:55,157 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:55,157 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,165 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,184 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:55,184 INFO L451 LassoAnalysis]: Using template '4-nested'. [2024-10-31 22:03:55,184 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,187 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-10-31 22:03:55,189 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,205 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:55,205 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,205 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,205 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,205 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:03:55,212 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:03:55,213 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,223 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,240 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2024-10-31 22:03:55,241 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,241 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,242 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,245 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-10-31 22:03:55,248 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,263 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:55,263 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,264 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,264 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,264 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:03:55,267 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:03:55,268 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,274 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,292 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:55,295 INFO L451 LassoAnalysis]: Using template '2-phase'. [2024-10-31 22:03:55,295 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,295 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,297 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,299 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-10-31 22:03:55,300 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,314 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,314 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:03:55,314 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,315 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,315 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,315 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:55,320 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:55,320 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,333 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,351 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:55,351 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,351 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,353 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-10-31 22:03:55,356 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,371 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,371 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:03:55,371 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,372 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,372 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,372 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:55,374 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:55,374 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,380 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,398 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:55,398 INFO L451 LassoAnalysis]: Using template '3-phase'. [2024-10-31 22:03:55,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,401 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,402 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2024-10-31 22:03:55,403 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,418 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,418 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2024-10-31 22:03:55,418 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,418 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,418 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,418 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:55,426 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:55,426 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,441 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,459 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2024-10-31 22:03:55,459 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,459 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,461 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,464 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-10-31 22:03:55,465 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,480 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,480 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2024-10-31 22:03:55,481 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,481 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,482 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,482 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:55,485 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:55,485 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,494 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,512 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2024-10-31 22:03:55,513 INFO L451 LassoAnalysis]: Using template '4-phase'. [2024-10-31 22:03:55,513 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,513 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,515 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2024-10-31 22:03:55,518 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,533 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,533 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:03:55,533 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,534 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,534 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,534 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:03:55,546 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:03:55,547 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,570 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,590 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:55,590 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,590 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,592 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,593 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2024-10-31 22:03:55,596 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,611 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,612 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:03:55,612 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,612 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,612 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,613 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:03:55,617 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:03:55,617 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,630 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,647 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2024-10-31 22:03:55,648 INFO L451 LassoAnalysis]: Using template '2-lex'. [2024-10-31 22:03:55,648 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,648 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,650 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,651 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2024-10-31 22:03:55,652 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,666 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,667 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:03:55,667 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,667 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,667 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,667 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:55,674 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:55,674 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,685 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,703 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:55,703 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,703 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,705 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,707 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2024-10-31 22:03:55,709 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,724 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,724 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:03:55,724 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,724 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,724 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,724 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:55,727 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:55,728 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,734 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,752 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:55,753 INFO L451 LassoAnalysis]: Using template '3-lex'. [2024-10-31 22:03:55,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,753 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,755 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,756 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2024-10-31 22:03:55,757 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,771 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,771 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:03:55,771 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,772 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,772 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,772 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2024-10-31 22:03:55,780 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:03:55,780 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,797 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,815 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Ended with exit code 0 [2024-10-31 22:03:55,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:55,816 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:55,819 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:55,820 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2024-10-31 22:03:55,821 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:55,836 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:55,837 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:03:55,837 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:55,837 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:55,837 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:55,837 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2024-10-31 22:03:55,842 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:03:55,842 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:55,852 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:55,870 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2024-10-31 22:03:55,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:03:55,871 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-10-31 22:03:55,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2024-10-31 22:03:55,872 INFO L87 Difference]: Start difference. First operand 328 states and 362 transitions. cyclomatic complexity: 36 Second operand has 13 states, 13 states have (on average 8.692307692307692) internal successors, (113), 13 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:56,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:03:56,394 INFO L93 Difference]: Finished difference Result 491 states and 523 transitions. [2024-10-31 22:03:56,394 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 491 states and 523 transitions. [2024-10-31 22:03:56,421 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 83 [2024-10-31 22:03:56,424 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 491 states to 424 states and 454 transitions. [2024-10-31 22:03:56,424 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 424 [2024-10-31 22:03:56,425 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 424 [2024-10-31 22:03:56,425 INFO L73 IsDeterministic]: Start isDeterministic. Operand 424 states and 454 transitions. [2024-10-31 22:03:56,426 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:03:56,426 INFO L218 hiAutomatonCegarLoop]: Abstraction has 424 states and 454 transitions. [2024-10-31 22:03:56,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states and 454 transitions. [2024-10-31 22:03:56,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 308. [2024-10-31 22:03:56,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 308 states have (on average 1.0844155844155845) internal successors, (334), 307 states have internal predecessors, (334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:03:56,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 334 transitions. [2024-10-31 22:03:56,434 INFO L240 hiAutomatonCegarLoop]: Abstraction has 308 states and 334 transitions. [2024-10-31 22:03:56,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-31 22:03:56,435 INFO L425 stractBuchiCegarLoop]: Abstraction has 308 states and 334 transitions. [2024-10-31 22:03:56,435 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-10-31 22:03:56,435 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 308 states and 334 transitions. [2024-10-31 22:03:56,436 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 48 [2024-10-31 22:03:56,437 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:03:56,437 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:03:56,437 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:56,437 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:03:56,438 INFO L745 eck$LassoCheckResult]: Stem: 19764#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 19745#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 19738#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 19739#L59-1 mp_add_~nb~0#1 := 4; 19748#L69 assume 0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 19742#L71 assume !(0 == (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296)); 19743#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 19763#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19814#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19815#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 19810#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19811#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19806#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19807#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 19802#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 19803#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19798#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19799#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19794#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 19792#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 19793#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19788#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19789#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19784#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19785#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19780#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19781#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19776#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 19777#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19772#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19773#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 19991#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 19989#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19990#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 19985#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19986#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19981#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19982#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19977#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19978#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19973#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19974#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 20024#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20023#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 20021#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 20019#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20017#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20015#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 20014#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20013#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19753#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 19754#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19760#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19761#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19762#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20005#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 20004#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 20002#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 20003#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20038#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20037#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 20036#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 19756#L102-1 [2024-10-31 22:03:56,438 INFO L747 eck$LassoCheckResult]: Loop: 19756#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 19757#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 20010#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 19751#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19752#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19755#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19746#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19747#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 19732#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 19733#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19749#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19740#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19741#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 19756#L102-1 [2024-10-31 22:03:56,439 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:56,439 INFO L85 PathProgramCache]: Analyzing trace with hash -267040966, now seen corresponding path program 1 times [2024-10-31 22:03:56,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:56,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591368715] [2024-10-31 22:03:56,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:56,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:56,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:56,653 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 45 proven. 7 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-31 22:03:56,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:03:56,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591368715] [2024-10-31 22:03:56,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [591368715] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:03:56,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1054973287] [2024-10-31 22:03:56,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:56,654 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:03:56,654 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:56,656 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:03:56,657 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2024-10-31 22:03:56,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:03:56,765 INFO L255 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-31 22:03:56,766 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:03:56,869 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 45 proven. 4 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-31 22:03:56,869 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:03:57,021 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 49 proven. 3 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-31 22:03:57,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1054973287] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:03:57,021 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:03:57,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7] total 15 [2024-10-31 22:03:57,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068101857] [2024-10-31 22:03:57,022 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:03:57,022 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:03:57,022 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:03:57,022 INFO L85 PathProgramCache]: Analyzing trace with hash 672830572, now seen corresponding path program 2 times [2024-10-31 22:03:57,022 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:03:57,023 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [271951664] [2024-10-31 22:03:57,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:03:57,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:03:57,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:57,027 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:03:57,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:03:57,031 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:03:57,146 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:03:57,146 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:03:57,146 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:03:57,146 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:03:57,146 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-10-31 22:03:57,146 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:57,146 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:03:57,146 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:03:57,147 INFO L132 ssoRankerPreferences]: Filename of dumped script: byte_add_1-1.i_Iteration24_Loop [2024-10-31 22:03:57,147 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:03:57,147 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:03:57,148 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:57,157 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:57,427 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:03:57,427 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-10-31 22:03:57,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:57,428 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:57,433 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:57,434 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2024-10-31 22:03:57,435 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:03:57,435 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:03:57,467 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:03:57,467 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_mp_add_~carry~0#1=0, ULTIMATE.start_mp_add_~partial_sum~0#1=0} Honda state: {ULTIMATE.start_mp_add_~carry~0#1=0, ULTIMATE.start_mp_add_~partial_sum~0#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:03:57,485 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:57,485 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:57,485 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:57,487 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:57,489 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2024-10-31 22:03:57,490 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:03:57,490 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:03:57,582 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:57,582 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:57,582 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:57,583 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:57,587 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2024-10-31 22:03:57,588 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-10-31 22:03:57,588 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:03:58,919 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2024-10-31 22:03:58,928 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:58,928 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:03:58,928 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:03:58,928 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:03:58,928 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:03:58,928 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-31 22:03:58,928 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:58,928 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:03:58,928 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:03:58,929 INFO L132 ssoRankerPreferences]: Filename of dumped script: byte_add_1-1.i_Iteration24_Loop [2024-10-31 22:03:58,929 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:03:58,929 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:03:58,934 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:58,961 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:03:59,312 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:03:59,313 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-31 22:03:59,314 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,314 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,317 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,318 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2024-10-31 22:03:59,319 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,333 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,333 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,334 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,334 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,334 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:03:59,337 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:03:59,337 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,343 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,361 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,362 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,362 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,363 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,365 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2024-10-31 22:03:59,366 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,381 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,381 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,381 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,381 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,381 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:03:59,383 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:03:59,383 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,387 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,405 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,406 INFO L451 LassoAnalysis]: Using template '2-nested'. [2024-10-31 22:03:59,406 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,406 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,407 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,409 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2024-10-31 22:03:59,411 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,426 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,426 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,426 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,426 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,426 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:59,431 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:59,431 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,438 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,457 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,460 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2024-10-31 22:03:59,462 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,479 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,479 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,479 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,480 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,480 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:59,481 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:59,482 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,486 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,504 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,505 INFO L451 LassoAnalysis]: Using template '3-nested'. [2024-10-31 22:03:59,505 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,505 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,506 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,509 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2024-10-31 22:03:59,510 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,525 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,525 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,526 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,526 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,526 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:59,530 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:59,530 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,542 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,560 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,561 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,561 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,562 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,591 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2024-10-31 22:03:59,592 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,607 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,607 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,607 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,607 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,608 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:59,610 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:59,610 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,615 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,632 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,633 INFO L451 LassoAnalysis]: Using template '4-nested'. [2024-10-31 22:03:59,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,633 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,636 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,637 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2024-10-31 22:03:59,638 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,654 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,654 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,654 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,654 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,654 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:03:59,661 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:03:59,661 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,671 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,691 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,692 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,694 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2024-10-31 22:03:59,696 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,710 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:03:59,711 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,711 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,711 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,711 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:03:59,718 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:03:59,718 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,728 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,747 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,747 INFO L451 LassoAnalysis]: Using template '2-phase'. [2024-10-31 22:03:59,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,747 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,750 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,751 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2024-10-31 22:03:59,752 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,768 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:59,768 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:03:59,768 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,768 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,768 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,768 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:59,772 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:59,772 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,783 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,801 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,804 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,805 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2024-10-31 22:03:59,806 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,821 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:59,821 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:03:59,821 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,821 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,821 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,822 INFO L205 nArgumentSynthesizer]: 3 template conjuncts. [2024-10-31 22:03:59,824 INFO L401 nArgumentSynthesizer]: We have 3 Motzkin's Theorem applications. [2024-10-31 22:03:59,824 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,831 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,849 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2024-10-31 22:03:59,850 INFO L451 LassoAnalysis]: Using template '3-phase'. [2024-10-31 22:03:59,850 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,850 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,851 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,854 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2024-10-31 22:03:59,856 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,872 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:59,873 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2024-10-31 22:03:59,873 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,873 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,873 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,873 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:59,881 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:59,881 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,897 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,943 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Ended with exit code 0 [2024-10-31 22:03:59,943 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,946 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:03:59,947 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2024-10-31 22:03:59,948 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:03:59,964 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:03:59,965 INFO L338 nArgumentSynthesizer]: Template has degree 2. [2024-10-31 22:03:59,965 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:03:59,965 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:03:59,965 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:03:59,965 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:03:59,968 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:03:59,968 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:03:59,977 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:03:59,996 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Ended with exit code 0 [2024-10-31 22:03:59,996 INFO L451 LassoAnalysis]: Using template '4-phase'. [2024-10-31 22:03:59,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:03:59,996 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:03:59,998 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:00,001 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2024-10-31 22:04:00,003 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:04:00,021 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:04:00,021 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:04:00,021 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:04:00,044 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:04:00,044 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:04:00,044 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:04:00,055 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:04:00,055 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:04:00,077 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:04:00,096 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Forceful destruction successful, exit code 0 [2024-10-31 22:04:00,096 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:00,097 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:00,098 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:00,099 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2024-10-31 22:04:00,099 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:04:00,111 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:04:00,111 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:04:00,112 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:04:00,112 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:04:00,112 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:04:00,112 INFO L205 nArgumentSynthesizer]: 5 template conjuncts. [2024-10-31 22:04:00,116 INFO L401 nArgumentSynthesizer]: We have 5 Motzkin's Theorem applications. [2024-10-31 22:04:00,116 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:04:00,127 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:04:00,140 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Forceful destruction successful, exit code 0 [2024-10-31 22:04:00,141 INFO L451 LassoAnalysis]: Using template '2-lex'. [2024-10-31 22:04:00,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:00,141 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:00,142 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:00,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2024-10-31 22:04:00,144 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:04:00,155 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:04:00,155 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:04:00,155 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:04:00,155 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:04:00,156 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:04:00,156 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:04:00,160 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:04:00,161 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:04:00,169 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:04:00,181 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Forceful destruction successful, exit code 0 [2024-10-31 22:04:00,181 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:00,181 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:00,182 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:00,183 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2024-10-31 22:04:00,184 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:04:00,195 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:04:00,195 INFO L338 nArgumentSynthesizer]: Template has degree 1. [2024-10-31 22:04:00,195 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:04:00,195 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:04:00,195 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:04:00,195 INFO L205 nArgumentSynthesizer]: 4 template conjuncts. [2024-10-31 22:04:00,198 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2024-10-31 22:04:00,198 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:04:00,204 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:04:00,216 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Forceful destruction successful, exit code 0 [2024-10-31 22:04:00,216 INFO L451 LassoAnalysis]: Using template '3-lex'. [2024-10-31 22:04:00,216 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:00,216 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:00,218 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:00,219 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process [2024-10-31 22:04:00,220 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:04:00,231 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:04:00,231 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:04:00,232 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:04:00,232 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:04:00,232 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:04:00,232 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2024-10-31 22:04:00,239 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:04:00,240 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:04:00,251 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:04:00,263 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Ended with exit code 0 [2024-10-31 22:04:00,264 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:00,264 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:00,265 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:00,266 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Waiting until timeout for monitored process [2024-10-31 22:04:00,266 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:04:00,278 WARN L333 nArgumentSynthesizer]: Using a linear SMT query and a templates of degree > 0, hence this method is incomplete. [2024-10-31 22:04:00,278 INFO L338 nArgumentSynthesizer]: Template has degree 3. [2024-10-31 22:04:00,278 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:04:00,278 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:04:00,279 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:04:00,279 INFO L205 nArgumentSynthesizer]: 6 template conjuncts. [2024-10-31 22:04:00,283 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-10-31 22:04:00,283 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:04:00,293 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:04:00,305 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Forceful destruction successful, exit code 0 [2024-10-31 22:04:00,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:04:00,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-10-31 22:04:00,305 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2024-10-31 22:04:00,306 INFO L87 Difference]: Start difference. First operand 308 states and 334 transitions. cyclomatic complexity: 29 Second operand has 15 states, 15 states have (on average 6.866666666666666) internal successors, (103), 15 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:04:01,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:04:01,071 INFO L93 Difference]: Finished difference Result 583 states and 621 transitions. [2024-10-31 22:04:01,071 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 583 states and 621 transitions. [2024-10-31 22:04:01,075 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 93 [2024-10-31 22:04:01,077 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 583 states to 553 states and 589 transitions. [2024-10-31 22:04:01,078 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 553 [2024-10-31 22:04:01,079 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 553 [2024-10-31 22:04:01,079 INFO L73 IsDeterministic]: Start isDeterministic. Operand 553 states and 589 transitions. [2024-10-31 22:04:01,080 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:04:01,080 INFO L218 hiAutomatonCegarLoop]: Abstraction has 553 states and 589 transitions. [2024-10-31 22:04:01,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states and 589 transitions. [2024-10-31 22:04:01,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 392. [2024-10-31 22:04:01,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 392 states have (on average 1.0739795918367347) internal successors, (421), 391 states have internal predecessors, (421), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:04:01,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 421 transitions. [2024-10-31 22:04:01,090 INFO L240 hiAutomatonCegarLoop]: Abstraction has 392 states and 421 transitions. [2024-10-31 22:04:01,091 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-31 22:04:01,091 INFO L425 stractBuchiCegarLoop]: Abstraction has 392 states and 421 transitions. [2024-10-31 22:04:01,092 INFO L332 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2024-10-31 22:04:01,092 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 392 states and 421 transitions. [2024-10-31 22:04:01,094 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 61 [2024-10-31 22:04:01,094 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:04:01,094 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:04:01,095 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:04:01,095 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:04:01,095 INFO L745 eck$LassoCheckResult]: Stem: 21051#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(15, 2); 21034#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~ret5#1, main_~a~0#1, main_~b~0#1, main_~r~1#1;havoc main_~a~0#1;havoc main_~b~0#1;havoc main_~r~1#1;havoc main_#t~nondet4#1;main_~b~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;main_~a~0#1 := 234770789;assume { :begin_inline_mp_add } true;mp_add_#in~a#1, mp_add_#in~b#1 := main_~a~0#1, main_~b~0#1;havoc mp_add_#res#1;havoc mp_add_#t~bitwise1#1, mp_add_#t~bitwise2#1, mp_add_#t~bitwise3#1, mp_add_~a#1, mp_add_~b#1, mp_add_~a0~0#1, mp_add_~a1~0#1, mp_add_~a2~0#1, mp_add_~a3~0#1, mp_add_~b0~0#1, mp_add_~b1~0#1, mp_add_~b2~0#1, mp_add_~b3~0#1, mp_add_~r0~0#1, mp_add_~r1~0#1, mp_add_~r2~0#1, mp_add_~r3~0#1, mp_add_~carry~0#1, mp_add_~partial_sum~0#1, mp_add_~r~0#1, mp_add_~i~0#1, mp_add_~na~0#1, mp_add_~nb~0#1;mp_add_~a#1 := mp_add_#in~a#1;mp_add_~b#1 := mp_add_#in~b#1;havoc mp_add_~a0~0#1;havoc mp_add_~a1~0#1;havoc mp_add_~a2~0#1;havoc mp_add_~a3~0#1;havoc mp_add_~b0~0#1;havoc mp_add_~b1~0#1;havoc mp_add_~b2~0#1;havoc mp_add_~b3~0#1;havoc mp_add_~r0~0#1;havoc mp_add_~r1~0#1;havoc mp_add_~r2~0#1;havoc mp_add_~r3~0#1;havoc mp_add_~carry~0#1;havoc mp_add_~partial_sum~0#1;havoc mp_add_~r~0#1;havoc mp_add_~i~0#1;havoc mp_add_~na~0#1;havoc mp_add_~nb~0#1;mp_add_~a0~0#1 := mp_add_~a#1;mp_add_~a1~0#1 := mp_add_~a#1 % 4294967296 / 256;mp_add_~a2~0#1 := mp_add_~a#1 % 4294967296 / 65536;mp_add_~a3~0#1 := mp_add_~a#1 % 4294967296 / 16777216;mp_add_~b0~0#1 := mp_add_~b#1;mp_add_~b1~0#1 := mp_add_~b#1 % 4294967296 / 256;mp_add_~b2~0#1 := mp_add_~b#1 % 4294967296 / 65536;mp_add_~b3~0#1 := mp_add_~b#1 % 4294967296 / 16777216;mp_add_~na~0#1 := 4; 21027#L59 assume !(0 == (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296)); 21028#L59-1 mp_add_~nb~0#1 := 4; 21037#L69 assume 0 == (if mp_add_~b3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b3~0#1 % 256 % 4294967296 else mp_add_~b3~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 21031#L71 assume 0 == (if mp_add_~b2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b2~0#1 % 256 % 4294967296 else mp_add_~b2~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 21033#L73 assume 0 == (if mp_add_~b1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b1~0#1 % 256 % 4294967296 else mp_add_~b1~0#1 % 256 % 4294967296 - 4294967296);mp_add_~nb~0#1 := (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296) - 1; 21052#L69-1 mp_add_~carry~0#1 := 0;mp_add_~i~0#1 := 0; 21093#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21094#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21089#L84 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a0~0#1 % 256 % 4294967296 else mp_add_~a0~0#1 % 256 % 4294967296 - 4294967296); 21090#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21085#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21086#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21081#L83-1 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296); 21082#L90 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~b0~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~b0~0#1 % 256 % 4294967296 else mp_add_~b0~0#1 % 256 % 4294967296 - 4294967296); 21077#L90-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21078#L91-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21073#L92-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21074#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 21362#L95-1 assume 0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r0~0#1 := mp_add_~partial_sum~0#1; 21360#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21358#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21356#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21354#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21352#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21350#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21348#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21346#L84-2 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a1~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a1~0#1 % 256 % 4294967296 else mp_add_~a1~0#1 % 256 % 4294967296 - 4294967296); 21344#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21342#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21340#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21337#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 21336#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21335#L99-1 assume 1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r1~0#1 := mp_add_~partial_sum~0#1; 21334#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21333#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21332#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21331#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21330#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21329#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21327#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21328#L85-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a2~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a2~0#1 % 256 % 4294967296 else mp_add_~a2~0#1 % 256 % 4294967296 - 4294967296); 21399#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21398#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21026#L89 assume (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255;mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) % 256;mp_add_~carry~0#1 := 1; 21395#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21393#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21391#L100-1 assume 2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r2~0#1 := mp_add_~partial_sum~0#1; 21388#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21386#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21384#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21382#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21381#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21380#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21378#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21377#L86-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~partial_sum~0#1 := (if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) + (if mp_add_~a3~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~a3~0#1 % 256 % 4294967296 else mp_add_~a3~0#1 % 256 % 4294967296 - 4294967296); 21376#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21374#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 21375#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21411#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21410#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21389#L101-1 assume 3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296);mp_add_~r3~0#1 := mp_add_~partial_sum~0#1; 21387#L102-1 [2024-10-31 22:04:01,096 INFO L747 eck$LassoCheckResult]: Loop: 21387#L102-1 mp_add_~i~0#1 := 1 + (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296); 21385#L80-2 assume !!(((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296) || (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)) || 0 != (if mp_add_~carry~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~carry~0#1 % 65536 % 4294967296 else mp_add_~carry~0#1 % 65536 % 4294967296 - 4294967296));mp_add_~partial_sum~0#1 := mp_add_~carry~0#1;mp_add_~carry~0#1 := 0; 21383#L83 assume (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~na~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~na~0#1 % 256 % 4294967296 else mp_add_~na~0#1 % 256 % 4294967296 - 4294967296); 21367#L84 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21048#L84-2 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21044#L85-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21035#L86-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21036#L83-1 assume !((if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296) < (if mp_add_~nb~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~nb~0#1 % 256 % 4294967296 else mp_add_~nb~0#1 % 256 % 4294967296 - 4294967296)); 21397#L89 assume !((if mp_add_~partial_sum~0#1 % 65536 % 4294967296 <= 2147483647 then mp_add_~partial_sum~0#1 % 65536 % 4294967296 else mp_add_~partial_sum~0#1 % 65536 % 4294967296 - 4294967296) > 255); 21396#L95-1 assume !(0 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21394#L99-1 assume !(1 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21392#L100-1 assume !(2 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21390#L101-1 assume !(3 == (if mp_add_~i~0#1 % 256 % 4294967296 <= 2147483647 then mp_add_~i~0#1 % 256 % 4294967296 else mp_add_~i~0#1 % 256 % 4294967296 - 4294967296)); 21387#L102-1 [2024-10-31 22:04:01,096 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:04:01,096 INFO L85 PathProgramCache]: Analyzing trace with hash 775906304, now seen corresponding path program 1 times [2024-10-31 22:04:01,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:04:01,097 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313529971] [2024-10-31 22:04:01,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:04:01,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:04:01,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:04:01,725 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 61 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-31 22:04:01,725 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:04:01,725 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313529971] [2024-10-31 22:04:01,726 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313529971] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:04:01,726 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2094396687] [2024-10-31 22:04:01,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:04:01,726 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:04:01,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:01,728 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:04:01,729 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2024-10-31 22:04:01,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:04:01,956 INFO L255 TraceCheckSpWp]: Trace formula consists of 177 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-10-31 22:04:01,959 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:04:02,076 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 50 proven. 4 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-31 22:04:02,077 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:04:02,209 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 46 proven. 8 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-31 22:04:02,209 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2094396687] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:04:02,209 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:04:02,210 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6] total 17 [2024-10-31 22:04:02,210 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366405553] [2024-10-31 22:04:02,210 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:04:02,211 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:04:02,212 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:04:02,212 INFO L85 PathProgramCache]: Analyzing trace with hash 672830572, now seen corresponding path program 3 times [2024-10-31 22:04:02,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:04:02,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563399376] [2024-10-31 22:04:02,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:04:02,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:04:02,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:04:02,217 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:04:02,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:04:02,220 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:04:02,321 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:04:02,322 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:04:02,322 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:04:02,322 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:04:02,322 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-10-31 22:04:02,322 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:02,322 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:04:02,322 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:04:02,322 INFO L132 ssoRankerPreferences]: Filename of dumped script: byte_add_1-1.i_Iteration25_Loop [2024-10-31 22:04:02,322 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:04:02,322 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:04:02,323 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:04:02,330 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:04:02,626 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:04:02,626 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-10-31 22:04:02,626 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:02,627 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:02,629 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:02,630 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Waiting until timeout for monitored process [2024-10-31 22:04:02,631 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:04:02,631 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:04:02,661 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:04:02,661 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_mp_add_~carry~0#1=0, ULTIMATE.start_mp_add_~partial_sum~0#1=0} Honda state: {ULTIMATE.start_mp_add_~carry~0#1=0, ULTIMATE.start_mp_add_~partial_sum~0#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:04:02,678 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Ended with exit code 0 [2024-10-31 22:04:02,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:02,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:02,679 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:02,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Waiting until timeout for monitored process [2024-10-31 22:04:02,682 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:04:02,682 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:04:02,744 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Forceful destruction successful, exit code 0 [2024-10-31 22:04:02,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:04:02,745 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:04:02,746 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:04:02,748 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_804bc98a-e58e-4566-a4e5-0844102d02cf/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (56)] Waiting until timeout for monitored process [2024-10-31 22:04:02,749 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-10-31 22:04:02,749 INFO L160 nArgumentSynthesizer]: Using integer mode.