./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-simple/nested_4.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-simple/nested_4.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fcf77da5263056f8d62c4caf3b92919690d80ef4ff864a75d0d8d1eec10bdccf --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:16:48,700 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:16:48,791 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 22:16:48,795 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:16:48,796 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:16:48,828 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:16:48,830 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:16:48,831 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:16:48,832 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:16:48,833 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:16:48,834 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:16:48,835 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:16:48,835 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:16:48,835 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:16:48,837 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:16:48,838 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:16:48,838 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:16:48,839 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:16:48,839 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:16:48,839 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:16:48,840 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:16:48,844 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 22:16:48,844 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:16:48,845 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 22:16:48,845 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:16:48,845 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:16:48,846 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:16:48,846 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:16:48,846 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:16:48,847 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:16:48,847 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 22:16:48,847 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:16:48,847 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:16:48,848 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:16:48,848 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:16:48,848 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:16:48,849 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:16:48,849 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:16:48,849 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:16:48,850 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fcf77da5263056f8d62c4caf3b92919690d80ef4ff864a75d0d8d1eec10bdccf [2024-10-31 22:16:49,132 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:16:49,158 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:16:49,161 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:16:49,162 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:16:49,163 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:16:49,164 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/loop-simple/nested_4.c Unable to find full path for "g++" [2024-10-31 22:16:51,602 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:16:51,849 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:16:51,850 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/sv-benchmarks/c/loop-simple/nested_4.c [2024-10-31 22:16:51,858 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/data/fecb8e5bb/95ed629bb18a4a8c83f21b119cdc652f/FLAG6d036c94b [2024-10-31 22:16:51,879 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/data/fecb8e5bb/95ed629bb18a4a8c83f21b119cdc652f [2024-10-31 22:16:51,882 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:16:51,884 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:16:51,886 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:16:51,888 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:16:51,894 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:16:51,895 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:16:51" (1/1) ... [2024-10-31 22:16:51,899 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@20cd9cab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:51, skipping insertion in model container [2024-10-31 22:16:51,899 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:16:51" (1/1) ... [2024-10-31 22:16:51,922 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:16:52,119 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:16:52,135 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:16:52,156 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:16:52,177 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:16:52,178 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52 WrapperNode [2024-10-31 22:16:52,178 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:16:52,179 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:16:52,180 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:16:52,180 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:16:52,188 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,196 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,215 INFO L138 Inliner]: procedures = 10, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 50 [2024-10-31 22:16:52,216 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:16:52,216 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:16:52,217 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:16:52,217 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:16:52,230 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,230 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,235 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,253 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-31 22:16:52,254 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,254 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,261 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,269 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,270 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,271 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,273 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:16:52,277 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:16:52,277 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:16:52,277 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:16:52,278 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (1/1) ... [2024-10-31 22:16:52,286 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:16:52,297 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:16:52,312 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:16:52,315 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:16:52,346 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-31 22:16:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:16:52,347 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:16:52,347 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-31 22:16:52,426 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:16:52,429 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:16:52,592 INFO L? ?]: Removed 6 outVars from TransFormulas that were not future-live. [2024-10-31 22:16:52,593 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:16:52,606 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:16:52,606 INFO L316 CfgBuilder]: Removed 4 assume(true) statements. [2024-10-31 22:16:52,607 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:16:52 BoogieIcfgContainer [2024-10-31 22:16:52,607 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:16:52,609 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:16:52,609 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:16:52,613 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:16:52,614 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:16:52,616 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:16:51" (1/3) ... [2024-10-31 22:16:52,617 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@41c9b0ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:16:52, skipping insertion in model container [2024-10-31 22:16:52,618 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:16:52,618 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:16:52" (2/3) ... [2024-10-31 22:16:52,618 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@41c9b0ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:16:52, skipping insertion in model container [2024-10-31 22:16:52,619 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:16:52,619 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:16:52" (3/3) ... [2024-10-31 22:16:52,621 INFO L332 chiAutomizerObserver]: Analyzing ICFG nested_4.c [2024-10-31 22:16:52,691 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:16:52,691 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:16:52,692 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:16:52,692 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:16:52,692 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:16:52,693 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:16:52,693 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:16:52,694 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:16:52,717 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.6) internal successors, (24), 15 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:52,755 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2024-10-31 22:16:52,757 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:52,757 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:52,763 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:52,764 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:16:52,764 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:16:52,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.6) internal successors, (24), 15 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:52,767 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2024-10-31 22:16:52,767 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:52,767 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:52,768 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:52,768 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-10-31 22:16:52,776 INFO L745 eck$LassoCheckResult]: Stem: 12#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 6#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 13#L22-3true [2024-10-31 22:16:52,776 INFO L747 eck$LassoCheckResult]: Loop: 13#L22-3true assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 14#L23-3true assume !(main_~b~0#1 < 6); 7#L22-2true main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 13#L22-3true [2024-10-31 22:16:52,794 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:52,795 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-10-31 22:16:52,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:52,812 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764958770] [2024-10-31 22:16:52,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:52,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:52,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:52,932 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:52,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:52,968 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:52,971 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:52,971 INFO L85 PathProgramCache]: Analyzing trace with hash 39945, now seen corresponding path program 1 times [2024-10-31 22:16:52,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:52,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054208412] [2024-10-31 22:16:52,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:52,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:52,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:53,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:53,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:53,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2054208412] [2024-10-31 22:16:53,077 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2054208412] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:16:53,077 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:16:53,078 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-31 22:16:53,078 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1150547119] [2024-10-31 22:16:53,079 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:16:53,084 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:53,085 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:53,124 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:16:53,125 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:16:53,127 INFO L87 Difference]: Start difference. First operand has 16 states, 15 states have (on average 1.6) internal successors, (24), 15 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:53,163 INFO L93 Difference]: Finished difference Result 21 states and 26 transitions. [2024-10-31 22:16:53,165 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 26 transitions. [2024-10-31 22:16:53,169 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 14 [2024-10-31 22:16:53,174 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 16 states and 21 transitions. [2024-10-31 22:16:53,175 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-10-31 22:16:53,175 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-10-31 22:16:53,176 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 21 transitions. [2024-10-31 22:16:53,177 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:53,177 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 21 transitions. [2024-10-31 22:16:53,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 21 transitions. [2024-10-31 22:16:53,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 11. [2024-10-31 22:16:53,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 14 transitions. [2024-10-31 22:16:53,203 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 14 transitions. [2024-10-31 22:16:53,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:16:53,209 INFO L425 stractBuchiCegarLoop]: Abstraction has 11 states and 14 transitions. [2024-10-31 22:16:53,209 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:16:53,209 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 14 transitions. [2024-10-31 22:16:53,210 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2024-10-31 22:16:53,210 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:53,210 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:53,210 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:53,210 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-10-31 22:16:53,211 INFO L745 eck$LassoCheckResult]: Stem: 52#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 53#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 55#L22-3 [2024-10-31 22:16:53,211 INFO L747 eck$LassoCheckResult]: Loop: 55#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 54#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 49#L24-3 assume !(main_~c~0#1 < 6); 50#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 51#L23-3 assume !(main_~b~0#1 < 6); 56#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 55#L22-3 [2024-10-31 22:16:53,215 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,215 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2024-10-31 22:16:53,216 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,216 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238243560] [2024-10-31 22:16:53,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,230 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:53,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,241 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:53,242 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,242 INFO L85 PathProgramCache]: Analyzing trace with hash 1191176381, now seen corresponding path program 1 times [2024-10-31 22:16:53,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524122879] [2024-10-31 22:16:53,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:53,296 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:53,300 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:53,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524122879] [2024-10-31 22:16:53,301 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1524122879] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:16:53,301 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:16:53,301 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:16:53,301 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1656137850] [2024-10-31 22:16:53,302 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:16:53,302 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:53,302 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:53,303 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:16:53,303 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:16:53,303 INFO L87 Difference]: Start difference. First operand 11 states and 14 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:53,335 INFO L93 Difference]: Finished difference Result 15 states and 19 transitions. [2024-10-31 22:16:53,335 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 19 transitions. [2024-10-31 22:16:53,336 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2024-10-31 22:16:53,338 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 19 transitions. [2024-10-31 22:16:53,338 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-10-31 22:16:53,339 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-10-31 22:16:53,339 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 19 transitions. [2024-10-31 22:16:53,339 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:53,340 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 19 transitions. [2024-10-31 22:16:53,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 19 transitions. [2024-10-31 22:16:53,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 12. [2024-10-31 22:16:53,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.25) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 15 transitions. [2024-10-31 22:16:53,344 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 15 transitions. [2024-10-31 22:16:53,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:16:53,346 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 15 transitions. [2024-10-31 22:16:53,346 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:16:53,347 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 15 transitions. [2024-10-31 22:16:53,348 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 [2024-10-31 22:16:53,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:53,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:53,349 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:53,350 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:16:53,350 INFO L745 eck$LassoCheckResult]: Stem: 84#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 85#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 86#L22-3 [2024-10-31 22:16:53,352 INFO L747 eck$LassoCheckResult]: Loop: 86#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 87#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 88#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 79#L25-3 assume !(main_~d~0#1 < 6); 80#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 81#L24-3 assume !(main_~c~0#1 < 6); 82#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 83#L23-3 assume !(main_~b~0#1 < 6); 89#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 86#L22-3 [2024-10-31 22:16:53,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,353 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2024-10-31 22:16:53,353 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,353 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102375300] [2024-10-31 22:16:53,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,366 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:53,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,376 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:53,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,378 INFO L85 PathProgramCache]: Analyzing trace with hash -1526250579, now seen corresponding path program 1 times [2024-10-31 22:16:53,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808455500] [2024-10-31 22:16:53,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:53,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:53,424 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:53,424 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808455500] [2024-10-31 22:16:53,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1808455500] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:16:53,425 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:16:53,425 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:16:53,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1081931631] [2024-10-31 22:16:53,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:16:53,426 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:53,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:53,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:16:53,427 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:16:53,427 INFO L87 Difference]: Start difference. First operand 12 states and 15 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:53,439 INFO L93 Difference]: Finished difference Result 14 states and 17 transitions. [2024-10-31 22:16:53,440 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 17 transitions. [2024-10-31 22:16:53,440 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2024-10-31 22:16:53,441 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 17 transitions. [2024-10-31 22:16:53,441 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2024-10-31 22:16:53,441 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2024-10-31 22:16:53,441 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 17 transitions. [2024-10-31 22:16:53,441 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:53,442 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 17 transitions. [2024-10-31 22:16:53,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 17 transitions. [2024-10-31 22:16:53,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 13. [2024-10-31 22:16:53,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 12 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 16 transitions. [2024-10-31 22:16:53,444 INFO L240 hiAutomatonCegarLoop]: Abstraction has 13 states and 16 transitions. [2024-10-31 22:16:53,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:16:53,445 INFO L425 stractBuchiCegarLoop]: Abstraction has 13 states and 16 transitions. [2024-10-31 22:16:53,445 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:16:53,446 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 16 transitions. [2024-10-31 22:16:53,446 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 11 [2024-10-31 22:16:53,446 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:53,446 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:53,447 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:53,447 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:16:53,447 INFO L745 eck$LassoCheckResult]: Stem: 117#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 118#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 119#L22-3 [2024-10-31 22:16:53,447 INFO L747 eck$LassoCheckResult]: Loop: 119#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 120#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 121#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 116#L25-3 assume !!(main_~d~0#1 < 6); 110#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 111#L25-3 assume !(main_~d~0#1 < 6); 112#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 113#L24-3 assume !(main_~c~0#1 < 6); 114#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 115#L23-3 assume !(main_~b~0#1 < 6); 122#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 119#L22-3 [2024-10-31 22:16:53,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,448 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2024-10-31 22:16:53,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280461512] [2024-10-31 22:16:53,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,455 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:53,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,460 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:53,461 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,461 INFO L85 PathProgramCache]: Analyzing trace with hash -1981778385, now seen corresponding path program 1 times [2024-10-31 22:16:53,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,462 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672479326] [2024-10-31 22:16:53,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:53,533 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:53,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:53,537 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672479326] [2024-10-31 22:16:53,537 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [672479326] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:16:53,537 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1152794101] [2024-10-31 22:16:53,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,538 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:16:53,538 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:16:53,542 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:16:53,544 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-10-31 22:16:53,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:53,598 INFO L255 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-31 22:16:53,599 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:16:53,641 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:53,642 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:16:53,670 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:53,670 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1152794101] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:16:53,671 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:16:53,671 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2024-10-31 22:16:53,671 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [686404572] [2024-10-31 22:16:53,671 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:16:53,672 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:53,672 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:53,672 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-31 22:16:53,673 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2024-10-31 22:16:53,673 INFO L87 Difference]: Start difference. First operand 13 states and 16 transitions. cyclomatic complexity: 4 Second operand has 6 states, 6 states have (on average 2.5) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:53,710 INFO L93 Difference]: Finished difference Result 19 states and 22 transitions. [2024-10-31 22:16:53,711 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 22 transitions. [2024-10-31 22:16:53,711 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2024-10-31 22:16:53,711 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 22 transitions. [2024-10-31 22:16:53,712 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2024-10-31 22:16:53,712 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2024-10-31 22:16:53,712 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 22 transitions. [2024-10-31 22:16:53,712 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:53,712 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 22 transitions. [2024-10-31 22:16:53,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 22 transitions. [2024-10-31 22:16:53,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2024-10-31 22:16:53,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 18 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:53,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 22 transitions. [2024-10-31 22:16:53,716 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 22 transitions. [2024-10-31 22:16:53,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:16:53,719 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 22 transitions. [2024-10-31 22:16:53,719 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-10-31 22:16:53,719 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 22 transitions. [2024-10-31 22:16:53,719 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2024-10-31 22:16:53,720 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:53,720 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:53,721 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:53,722 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:16:53,722 INFO L745 eck$LassoCheckResult]: Stem: 218#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 219#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 220#L22-3 [2024-10-31 22:16:53,722 INFO L747 eck$LassoCheckResult]: Loop: 220#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 221#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 222#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 217#L25-3 assume !!(main_~d~0#1 < 6); 211#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 212#L25-3 assume !!(main_~d~0#1 < 6); 229#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 228#L25-3 assume !!(main_~d~0#1 < 6); 227#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 226#L25-3 assume !!(main_~d~0#1 < 6); 225#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 224#L25-3 assume !(main_~d~0#1 < 6); 213#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 214#L24-3 assume !(main_~c~0#1 < 6); 215#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 216#L23-3 assume !(main_~b~0#1 < 6); 223#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 220#L22-3 [2024-10-31 22:16:53,723 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,723 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2024-10-31 22:16:53,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,723 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140822953] [2024-10-31 22:16:53,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,735 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:53,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:53,745 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:53,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:53,745 INFO L85 PathProgramCache]: Analyzing trace with hash 669317813, now seen corresponding path program 2 times [2024-10-31 22:16:53,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:53,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755766272] [2024-10-31 22:16:53,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:53,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:53,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:53,821 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-31 22:16:53,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:53,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755766272] [2024-10-31 22:16:53,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1755766272] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:16:53,823 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [485635889] [2024-10-31 22:16:53,823 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-31 22:16:53,823 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:16:53,824 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:16:53,832 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:16:53,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-10-31 22:16:53,877 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-31 22:16:53,877 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:16:53,878 INFO L255 TraceCheckSpWp]: Trace formula consists of 32 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:16:53,879 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:16:53,957 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:53,957 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:16:54,047 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:16:54,048 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [485635889] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:16:54,048 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:16:54,048 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 7, 7] total 10 [2024-10-31 22:16:54,049 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [823100239] [2024-10-31 22:16:54,049 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:16:54,049 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:54,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:54,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-10-31 22:16:54,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2024-10-31 22:16:54,051 INFO L87 Difference]: Start difference. First operand 19 states and 22 transitions. cyclomatic complexity: 4 Second operand has 10 states, 10 states have (on average 2.8) internal successors, (28), 10 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:54,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:54,299 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2024-10-31 22:16:54,300 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 57 transitions. [2024-10-31 22:16:54,301 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 50 [2024-10-31 22:16:54,302 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 57 transitions. [2024-10-31 22:16:54,302 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2024-10-31 22:16:54,303 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-10-31 22:16:54,303 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 57 transitions. [2024-10-31 22:16:54,303 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:54,304 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 57 transitions. [2024-10-31 22:16:54,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 57 transitions. [2024-10-31 22:16:54,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 38. [2024-10-31 22:16:54,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:54,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 42 transitions. [2024-10-31 22:16:54,308 INFO L240 hiAutomatonCegarLoop]: Abstraction has 38 states and 42 transitions. [2024-10-31 22:16:54,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-10-31 22:16:54,309 INFO L425 stractBuchiCegarLoop]: Abstraction has 38 states and 42 transitions. [2024-10-31 22:16:54,309 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-10-31 22:16:54,310 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 42 transitions. [2024-10-31 22:16:54,310 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-10-31 22:16:54,311 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:54,311 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:54,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:54,312 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [12, 12, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-10-31 22:16:54,312 INFO L745 eck$LassoCheckResult]: Stem: 422#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 423#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 426#L22-3 [2024-10-31 22:16:54,312 INFO L747 eck$LassoCheckResult]: Loop: 426#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 424#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 425#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 443#L25-3 assume !!(main_~d~0#1 < 6); 442#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 441#L25-3 assume !!(main_~d~0#1 < 6); 440#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 439#L25-3 assume !!(main_~d~0#1 < 6); 438#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 437#L25-3 assume !!(main_~d~0#1 < 6); 436#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 435#L25-3 assume !!(main_~d~0#1 < 6); 434#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 433#L25-3 assume !!(main_~d~0#1 < 6); 432#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 431#L25-3 assume !(main_~d~0#1 < 6); 417#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 418#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 427#L25-3 assume !!(main_~d~0#1 < 6); 415#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 416#L25-3 assume !!(main_~d~0#1 < 6); 421#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 452#L25-3 assume !!(main_~d~0#1 < 6); 451#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 450#L25-3 assume !!(main_~d~0#1 < 6); 449#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 448#L25-3 assume !!(main_~d~0#1 < 6); 447#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 446#L25-3 assume !!(main_~d~0#1 < 6); 445#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 444#L25-3 assume !(main_~d~0#1 < 6); 430#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 429#L24-3 assume !(main_~c~0#1 < 6); 419#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 420#L23-3 assume !(main_~b~0#1 < 6); 428#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 426#L22-3 [2024-10-31 22:16:54,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:54,313 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2024-10-31 22:16:54,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:54,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62119846] [2024-10-31 22:16:54,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:54,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:54,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:54,335 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:54,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:54,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:54,344 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:54,344 INFO L85 PathProgramCache]: Analyzing trace with hash -1141890755, now seen corresponding path program 3 times [2024-10-31 22:16:54,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:54,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158884524] [2024-10-31 22:16:54,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:54,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:54,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:54,456 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 161 trivial. 0 not checked. [2024-10-31 22:16:54,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:54,457 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158884524] [2024-10-31 22:16:54,457 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1158884524] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:16:54,457 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1908899011] [2024-10-31 22:16:54,458 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-31 22:16:54,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:16:54,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:16:54,460 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:16:54,463 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-10-31 22:16:54,503 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2024-10-31 22:16:54,504 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:16:54,504 INFO L255 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-31 22:16:54,506 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:16:54,585 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 161 trivial. 0 not checked. [2024-10-31 22:16:54,585 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:16:54,683 INFO L134 CoverageAnalysis]: Checked inductivity of 162 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 161 trivial. 0 not checked. [2024-10-31 22:16:54,683 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1908899011] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:16:54,683 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:16:54,684 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 5 [2024-10-31 22:16:54,684 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629844002] [2024-10-31 22:16:54,684 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:16:54,684 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:54,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:54,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-31 22:16:54,685 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2024-10-31 22:16:54,686 INFO L87 Difference]: Start difference. First operand 38 states and 42 transitions. cyclomatic complexity: 5 Second operand has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:54,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:54,734 INFO L93 Difference]: Finished difference Result 137 states and 150 transitions. [2024-10-31 22:16:54,734 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 137 states and 150 transitions. [2024-10-31 22:16:54,736 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 135 [2024-10-31 22:16:54,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 137 states to 137 states and 150 transitions. [2024-10-31 22:16:54,741 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 137 [2024-10-31 22:16:54,742 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 137 [2024-10-31 22:16:54,742 INFO L73 IsDeterministic]: Start isDeterministic. Operand 137 states and 150 transitions. [2024-10-31 22:16:54,742 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:54,742 INFO L218 hiAutomatonCegarLoop]: Abstraction has 137 states and 150 transitions. [2024-10-31 22:16:54,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states and 150 transitions. [2024-10-31 22:16:54,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2024-10-31 22:16:54,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 137 states have (on average 1.094890510948905) internal successors, (150), 136 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:54,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 150 transitions. [2024-10-31 22:16:54,756 INFO L240 hiAutomatonCegarLoop]: Abstraction has 137 states and 150 transitions. [2024-10-31 22:16:54,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-31 22:16:54,759 INFO L425 stractBuchiCegarLoop]: Abstraction has 137 states and 150 transitions. [2024-10-31 22:16:54,759 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-10-31 22:16:54,759 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 137 states and 150 transitions. [2024-10-31 22:16:54,763 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 135 [2024-10-31 22:16:54,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:54,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:54,769 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:54,769 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [48, 48, 8, 8, 8, 4, 4, 4, 1, 1, 1] [2024-10-31 22:16:54,769 INFO L745 eck$LassoCheckResult]: Stem: 816#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 817#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 820#L22-3 [2024-10-31 22:16:54,770 INFO L747 eck$LassoCheckResult]: Loop: 820#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 818#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 819#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 815#L25-3 assume !!(main_~d~0#1 < 6); 809#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 810#L25-3 assume !!(main_~d~0#1 < 6); 941#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 939#L25-3 assume !!(main_~d~0#1 < 6); 937#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 935#L25-3 assume !!(main_~d~0#1 < 6); 933#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 931#L25-3 assume !!(main_~d~0#1 < 6); 929#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 927#L25-3 assume !!(main_~d~0#1 < 6); 925#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 924#L25-3 assume !(main_~d~0#1 < 6); 811#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 812#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 893#L25-3 assume !!(main_~d~0#1 < 6); 919#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 917#L25-3 assume !!(main_~d~0#1 < 6); 915#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 913#L25-3 assume !!(main_~d~0#1 < 6); 911#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 909#L25-3 assume !!(main_~d~0#1 < 6); 907#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 905#L25-3 assume !!(main_~d~0#1 < 6); 903#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 901#L25-3 assume !!(main_~d~0#1 < 6); 899#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 898#L25-3 assume !(main_~d~0#1 < 6); 895#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 892#L24-3 assume !(main_~c~0#1 < 6); 813#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 814#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 945#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 944#L25-3 assume !!(main_~d~0#1 < 6); 943#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 942#L25-3 assume !!(main_~d~0#1 < 6); 940#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 938#L25-3 assume !!(main_~d~0#1 < 6); 936#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 934#L25-3 assume !!(main_~d~0#1 < 6); 932#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 930#L25-3 assume !!(main_~d~0#1 < 6); 928#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 926#L25-3 assume !!(main_~d~0#1 < 6); 923#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 922#L25-3 assume !(main_~d~0#1 < 6); 921#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 920#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 891#L25-3 assume !!(main_~d~0#1 < 6); 918#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 916#L25-3 assume !!(main_~d~0#1 < 6); 914#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 912#L25-3 assume !!(main_~d~0#1 < 6); 910#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 908#L25-3 assume !!(main_~d~0#1 < 6); 906#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 904#L25-3 assume !!(main_~d~0#1 < 6); 902#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 900#L25-3 assume !!(main_~d~0#1 < 6); 897#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 896#L25-3 assume !(main_~d~0#1 < 6); 894#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 890#L24-3 assume !(main_~c~0#1 < 6); 889#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 888#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 887#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 886#L25-3 assume !!(main_~d~0#1 < 6); 885#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 884#L25-3 assume !!(main_~d~0#1 < 6); 883#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 882#L25-3 assume !!(main_~d~0#1 < 6); 881#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 880#L25-3 assume !!(main_~d~0#1 < 6); 879#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 878#L25-3 assume !!(main_~d~0#1 < 6); 877#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 876#L25-3 assume !!(main_~d~0#1 < 6); 875#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 874#L25-3 assume !(main_~d~0#1 < 6); 873#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 872#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 858#L25-3 assume !!(main_~d~0#1 < 6); 871#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 870#L25-3 assume !!(main_~d~0#1 < 6); 869#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 868#L25-3 assume !!(main_~d~0#1 < 6); 867#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 866#L25-3 assume !!(main_~d~0#1 < 6); 865#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 864#L25-3 assume !!(main_~d~0#1 < 6); 863#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 862#L25-3 assume !!(main_~d~0#1 < 6); 861#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 860#L25-3 assume !(main_~d~0#1 < 6); 859#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 857#L24-3 assume !(main_~c~0#1 < 6); 856#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 855#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 823#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 854#L25-3 assume !!(main_~d~0#1 < 6); 853#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 852#L25-3 assume !!(main_~d~0#1 < 6); 851#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 850#L25-3 assume !!(main_~d~0#1 < 6); 849#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 848#L25-3 assume !!(main_~d~0#1 < 6); 847#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 846#L25-3 assume !!(main_~d~0#1 < 6); 845#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 844#L25-3 assume !!(main_~d~0#1 < 6); 843#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 842#L25-3 assume !(main_~d~0#1 < 6); 841#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 840#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 826#L25-3 assume !!(main_~d~0#1 < 6); 839#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 838#L25-3 assume !!(main_~d~0#1 < 6); 837#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 836#L25-3 assume !!(main_~d~0#1 < 6); 835#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 834#L25-3 assume !!(main_~d~0#1 < 6); 833#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 832#L25-3 assume !!(main_~d~0#1 < 6); 831#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 830#L25-3 assume !!(main_~d~0#1 < 6); 829#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 828#L25-3 assume !(main_~d~0#1 < 6); 827#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 825#L24-3 assume !(main_~c~0#1 < 6); 824#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 822#L23-3 assume !(main_~b~0#1 < 6); 821#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 820#L22-3 [2024-10-31 22:16:54,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:54,771 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2024-10-31 22:16:54,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:54,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029010050] [2024-10-31 22:16:54,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:54,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:54,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:54,782 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:54,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:54,788 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:54,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:54,789 INFO L85 PathProgramCache]: Analyzing trace with hash -1405490935, now seen corresponding path program 4 times [2024-10-31 22:16:54,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:54,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213143235] [2024-10-31 22:16:54,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:54,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:54,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:55,044 INFO L134 CoverageAnalysis]: Checked inductivity of 2778 backedges. 1063 proven. 89 refuted. 0 times theorem prover too weak. 1626 trivial. 0 not checked. [2024-10-31 22:16:55,047 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:55,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1213143235] [2024-10-31 22:16:55,047 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1213143235] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:16:55,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1235378758] [2024-10-31 22:16:55,048 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-31 22:16:55,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:16:55,049 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:16:55,051 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:16:55,053 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-31 22:16:55,150 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-31 22:16:55,150 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:16:55,153 INFO L255 TraceCheckSpWp]: Trace formula consists of 224 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-31 22:16:55,156 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:16:55,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2778 backedges. 1063 proven. 89 refuted. 0 times theorem prover too weak. 1626 trivial. 0 not checked. [2024-10-31 22:16:55,253 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:16:55,371 INFO L134 CoverageAnalysis]: Checked inductivity of 2778 backedges. 1063 proven. 89 refuted. 0 times theorem prover too weak. 1626 trivial. 0 not checked. [2024-10-31 22:16:55,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1235378758] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:16:55,371 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:16:55,372 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 8 [2024-10-31 22:16:55,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597111263] [2024-10-31 22:16:55,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:16:55,373 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:55,373 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:55,373 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-31 22:16:55,374 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2024-10-31 22:16:55,374 INFO L87 Difference]: Start difference. First operand 137 states and 150 transitions. cyclomatic complexity: 14 Second operand has 8 states, 8 states have (on average 4.375) internal successors, (35), 8 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:55,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:55,459 INFO L93 Difference]: Finished difference Result 377 states and 406 transitions. [2024-10-31 22:16:55,459 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 377 states and 406 transitions. [2024-10-31 22:16:55,465 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 375 [2024-10-31 22:16:55,468 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 377 states to 377 states and 406 transitions. [2024-10-31 22:16:55,468 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 377 [2024-10-31 22:16:55,469 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 377 [2024-10-31 22:16:55,470 INFO L73 IsDeterministic]: Start isDeterministic. Operand 377 states and 406 transitions. [2024-10-31 22:16:55,471 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:55,472 INFO L218 hiAutomatonCegarLoop]: Abstraction has 377 states and 406 transitions. [2024-10-31 22:16:55,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states and 406 transitions. [2024-10-31 22:16:55,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 377. [2024-10-31 22:16:55,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 377 states, 377 states have (on average 1.0769230769230769) internal successors, (406), 376 states have internal predecessors, (406), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:55,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 406 transitions. [2024-10-31 22:16:55,503 INFO L240 hiAutomatonCegarLoop]: Abstraction has 377 states and 406 transitions. [2024-10-31 22:16:55,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-31 22:16:55,508 INFO L425 stractBuchiCegarLoop]: Abstraction has 377 states and 406 transitions. [2024-10-31 22:16:55,508 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-10-31 22:16:55,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 377 states and 406 transitions. [2024-10-31 22:16:55,511 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 375 [2024-10-31 22:16:55,512 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:55,512 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:55,517 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:55,517 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [144, 144, 24, 24, 24, 4, 4, 4, 1, 1, 1] [2024-10-31 22:16:55,517 INFO L745 eck$LassoCheckResult]: Stem: 2145#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 2146#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 2149#L22-3 [2024-10-31 22:16:55,518 INFO L747 eck$LassoCheckResult]: Loop: 2149#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 2147#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 2148#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2144#L25-3 assume !!(main_~d~0#1 < 6); 2138#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2139#L25-3 assume !!(main_~d~0#1 < 6); 2510#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2508#L25-3 assume !!(main_~d~0#1 < 6); 2506#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2504#L25-3 assume !!(main_~d~0#1 < 6); 2502#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2500#L25-3 assume !!(main_~d~0#1 < 6); 2498#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2496#L25-3 assume !!(main_~d~0#1 < 6); 2494#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2493#L25-3 assume !(main_~d~0#1 < 6); 2140#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2141#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2488#L25-3 assume !!(main_~d~0#1 < 6); 2486#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2484#L25-3 assume !!(main_~d~0#1 < 6); 2482#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2480#L25-3 assume !!(main_~d~0#1 < 6); 2478#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2476#L25-3 assume !!(main_~d~0#1 < 6); 2474#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2472#L25-3 assume !!(main_~d~0#1 < 6); 2470#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2468#L25-3 assume !!(main_~d~0#1 < 6); 2466#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2465#L25-3 assume !(main_~d~0#1 < 6); 2462#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2460#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2458#L25-3 assume !!(main_~d~0#1 < 6); 2456#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2454#L25-3 assume !!(main_~d~0#1 < 6); 2452#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2450#L25-3 assume !!(main_~d~0#1 < 6); 2448#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2446#L25-3 assume !!(main_~d~0#1 < 6); 2444#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2442#L25-3 assume !!(main_~d~0#1 < 6); 2440#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2438#L25-3 assume !!(main_~d~0#1 < 6); 2436#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2435#L25-3 assume !(main_~d~0#1 < 6); 2432#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2430#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2428#L25-3 assume !!(main_~d~0#1 < 6); 2426#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2424#L25-3 assume !!(main_~d~0#1 < 6); 2422#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2420#L25-3 assume !!(main_~d~0#1 < 6); 2418#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2416#L25-3 assume !!(main_~d~0#1 < 6); 2414#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2412#L25-3 assume !!(main_~d~0#1 < 6); 2410#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2408#L25-3 assume !!(main_~d~0#1 < 6); 2406#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2405#L25-3 assume !(main_~d~0#1 < 6); 2402#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2400#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2398#L25-3 assume !!(main_~d~0#1 < 6); 2396#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2394#L25-3 assume !!(main_~d~0#1 < 6); 2392#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2390#L25-3 assume !!(main_~d~0#1 < 6); 2388#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2386#L25-3 assume !!(main_~d~0#1 < 6); 2384#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2382#L25-3 assume !!(main_~d~0#1 < 6); 2380#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2378#L25-3 assume !!(main_~d~0#1 < 6); 2376#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2375#L25-3 assume !(main_~d~0#1 < 6); 2372#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2370#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2342#L25-3 assume !!(main_~d~0#1 < 6); 2368#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2366#L25-3 assume !!(main_~d~0#1 < 6); 2364#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2362#L25-3 assume !!(main_~d~0#1 < 6); 2360#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2358#L25-3 assume !!(main_~d~0#1 < 6); 2356#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2354#L25-3 assume !!(main_~d~0#1 < 6); 2352#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2350#L25-3 assume !!(main_~d~0#1 < 6); 2348#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2347#L25-3 assume !(main_~d~0#1 < 6); 2344#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2341#L24-3 assume !(main_~c~0#1 < 6); 2142#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 2143#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 2514#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2513#L25-3 assume !!(main_~d~0#1 < 6); 2512#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2511#L25-3 assume !!(main_~d~0#1 < 6); 2509#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2507#L25-3 assume !!(main_~d~0#1 < 6); 2505#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2503#L25-3 assume !!(main_~d~0#1 < 6); 2501#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2499#L25-3 assume !!(main_~d~0#1 < 6); 2497#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2495#L25-3 assume !!(main_~d~0#1 < 6); 2492#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2491#L25-3 assume !(main_~d~0#1 < 6); 2490#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2489#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2487#L25-3 assume !!(main_~d~0#1 < 6); 2485#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2483#L25-3 assume !!(main_~d~0#1 < 6); 2481#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2479#L25-3 assume !!(main_~d~0#1 < 6); 2477#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2475#L25-3 assume !!(main_~d~0#1 < 6); 2473#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2471#L25-3 assume !!(main_~d~0#1 < 6); 2469#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2467#L25-3 assume !!(main_~d~0#1 < 6); 2464#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2463#L25-3 assume !(main_~d~0#1 < 6); 2461#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2459#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2457#L25-3 assume !!(main_~d~0#1 < 6); 2455#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2453#L25-3 assume !!(main_~d~0#1 < 6); 2451#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2449#L25-3 assume !!(main_~d~0#1 < 6); 2447#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2445#L25-3 assume !!(main_~d~0#1 < 6); 2443#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2441#L25-3 assume !!(main_~d~0#1 < 6); 2439#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2437#L25-3 assume !!(main_~d~0#1 < 6); 2434#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2433#L25-3 assume !(main_~d~0#1 < 6); 2431#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2429#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2427#L25-3 assume !!(main_~d~0#1 < 6); 2425#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2423#L25-3 assume !!(main_~d~0#1 < 6); 2421#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2419#L25-3 assume !!(main_~d~0#1 < 6); 2417#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2415#L25-3 assume !!(main_~d~0#1 < 6); 2413#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2411#L25-3 assume !!(main_~d~0#1 < 6); 2409#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2407#L25-3 assume !!(main_~d~0#1 < 6); 2404#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2403#L25-3 assume !(main_~d~0#1 < 6); 2401#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2399#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2397#L25-3 assume !!(main_~d~0#1 < 6); 2395#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2393#L25-3 assume !!(main_~d~0#1 < 6); 2391#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2389#L25-3 assume !!(main_~d~0#1 < 6); 2387#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2385#L25-3 assume !!(main_~d~0#1 < 6); 2383#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2381#L25-3 assume !!(main_~d~0#1 < 6); 2379#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2377#L25-3 assume !!(main_~d~0#1 < 6); 2374#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2373#L25-3 assume !(main_~d~0#1 < 6); 2371#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2369#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2340#L25-3 assume !!(main_~d~0#1 < 6); 2367#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2365#L25-3 assume !!(main_~d~0#1 < 6); 2363#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2361#L25-3 assume !!(main_~d~0#1 < 6); 2359#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2357#L25-3 assume !!(main_~d~0#1 < 6); 2355#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2353#L25-3 assume !!(main_~d~0#1 < 6); 2351#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2349#L25-3 assume !!(main_~d~0#1 < 6); 2346#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2345#L25-3 assume !(main_~d~0#1 < 6); 2343#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2339#L24-3 assume !(main_~c~0#1 < 6); 2338#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 2337#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 2336#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2335#L25-3 assume !!(main_~d~0#1 < 6); 2334#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2333#L25-3 assume !!(main_~d~0#1 < 6); 2332#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2331#L25-3 assume !!(main_~d~0#1 < 6); 2330#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2329#L25-3 assume !!(main_~d~0#1 < 6); 2328#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2327#L25-3 assume !!(main_~d~0#1 < 6); 2326#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2325#L25-3 assume !!(main_~d~0#1 < 6); 2324#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2323#L25-3 assume !(main_~d~0#1 < 6); 2322#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2321#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2320#L25-3 assume !!(main_~d~0#1 < 6); 2319#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2318#L25-3 assume !!(main_~d~0#1 < 6); 2317#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2316#L25-3 assume !!(main_~d~0#1 < 6); 2315#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2314#L25-3 assume !!(main_~d~0#1 < 6); 2313#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2312#L25-3 assume !!(main_~d~0#1 < 6); 2311#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2310#L25-3 assume !!(main_~d~0#1 < 6); 2309#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2308#L25-3 assume !(main_~d~0#1 < 6); 2307#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2306#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2305#L25-3 assume !!(main_~d~0#1 < 6); 2304#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2303#L25-3 assume !!(main_~d~0#1 < 6); 2302#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2301#L25-3 assume !!(main_~d~0#1 < 6); 2300#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2299#L25-3 assume !!(main_~d~0#1 < 6); 2298#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2297#L25-3 assume !!(main_~d~0#1 < 6); 2296#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2295#L25-3 assume !!(main_~d~0#1 < 6); 2294#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2293#L25-3 assume !(main_~d~0#1 < 6); 2292#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2291#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2290#L25-3 assume !!(main_~d~0#1 < 6); 2289#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2288#L25-3 assume !!(main_~d~0#1 < 6); 2287#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2286#L25-3 assume !!(main_~d~0#1 < 6); 2285#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2284#L25-3 assume !!(main_~d~0#1 < 6); 2283#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2282#L25-3 assume !!(main_~d~0#1 < 6); 2281#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2280#L25-3 assume !!(main_~d~0#1 < 6); 2279#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2278#L25-3 assume !(main_~d~0#1 < 6); 2277#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2276#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2275#L25-3 assume !!(main_~d~0#1 < 6); 2274#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2273#L25-3 assume !!(main_~d~0#1 < 6); 2272#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2271#L25-3 assume !!(main_~d~0#1 < 6); 2270#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2269#L25-3 assume !!(main_~d~0#1 < 6); 2268#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2267#L25-3 assume !!(main_~d~0#1 < 6); 2266#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2265#L25-3 assume !!(main_~d~0#1 < 6); 2264#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2263#L25-3 assume !(main_~d~0#1 < 6); 2262#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2261#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2247#L25-3 assume !!(main_~d~0#1 < 6); 2260#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2259#L25-3 assume !!(main_~d~0#1 < 6); 2258#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2257#L25-3 assume !!(main_~d~0#1 < 6); 2256#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2255#L25-3 assume !!(main_~d~0#1 < 6); 2254#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2253#L25-3 assume !!(main_~d~0#1 < 6); 2252#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2251#L25-3 assume !!(main_~d~0#1 < 6); 2250#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2249#L25-3 assume !(main_~d~0#1 < 6); 2248#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2246#L24-3 assume !(main_~c~0#1 < 6); 2245#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 2244#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 2152#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2243#L25-3 assume !!(main_~d~0#1 < 6); 2242#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2241#L25-3 assume !!(main_~d~0#1 < 6); 2240#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2239#L25-3 assume !!(main_~d~0#1 < 6); 2238#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2237#L25-3 assume !!(main_~d~0#1 < 6); 2236#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2235#L25-3 assume !!(main_~d~0#1 < 6); 2234#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2233#L25-3 assume !!(main_~d~0#1 < 6); 2232#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2231#L25-3 assume !(main_~d~0#1 < 6); 2230#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2229#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2228#L25-3 assume !!(main_~d~0#1 < 6); 2227#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2226#L25-3 assume !!(main_~d~0#1 < 6); 2225#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2224#L25-3 assume !!(main_~d~0#1 < 6); 2223#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2222#L25-3 assume !!(main_~d~0#1 < 6); 2221#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2220#L25-3 assume !!(main_~d~0#1 < 6); 2219#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2218#L25-3 assume !!(main_~d~0#1 < 6); 2217#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2216#L25-3 assume !(main_~d~0#1 < 6); 2215#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2214#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2213#L25-3 assume !!(main_~d~0#1 < 6); 2212#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2211#L25-3 assume !!(main_~d~0#1 < 6); 2210#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2209#L25-3 assume !!(main_~d~0#1 < 6); 2208#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2207#L25-3 assume !!(main_~d~0#1 < 6); 2206#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2205#L25-3 assume !!(main_~d~0#1 < 6); 2204#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2203#L25-3 assume !!(main_~d~0#1 < 6); 2202#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2201#L25-3 assume !(main_~d~0#1 < 6); 2200#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2199#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2198#L25-3 assume !!(main_~d~0#1 < 6); 2197#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2196#L25-3 assume !!(main_~d~0#1 < 6); 2195#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2194#L25-3 assume !!(main_~d~0#1 < 6); 2193#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2192#L25-3 assume !!(main_~d~0#1 < 6); 2191#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2190#L25-3 assume !!(main_~d~0#1 < 6); 2189#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2188#L25-3 assume !!(main_~d~0#1 < 6); 2187#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2186#L25-3 assume !(main_~d~0#1 < 6); 2185#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2184#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2183#L25-3 assume !!(main_~d~0#1 < 6); 2182#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2181#L25-3 assume !!(main_~d~0#1 < 6); 2180#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2179#L25-3 assume !!(main_~d~0#1 < 6); 2178#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2177#L25-3 assume !!(main_~d~0#1 < 6); 2176#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2175#L25-3 assume !!(main_~d~0#1 < 6); 2174#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2173#L25-3 assume !!(main_~d~0#1 < 6); 2172#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2171#L25-3 assume !(main_~d~0#1 < 6); 2170#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2169#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 2155#L25-3 assume !!(main_~d~0#1 < 6); 2168#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2167#L25-3 assume !!(main_~d~0#1 < 6); 2166#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2165#L25-3 assume !!(main_~d~0#1 < 6); 2164#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2163#L25-3 assume !!(main_~d~0#1 < 6); 2162#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2161#L25-3 assume !!(main_~d~0#1 < 6); 2160#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2159#L25-3 assume !!(main_~d~0#1 < 6); 2158#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 2157#L25-3 assume !(main_~d~0#1 < 6); 2156#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 2154#L24-3 assume !(main_~c~0#1 < 6); 2153#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 2151#L23-3 assume !(main_~b~0#1 < 6); 2150#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 2149#L22-3 [2024-10-31 22:16:55,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:55,521 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2024-10-31 22:16:55,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:55,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45880049] [2024-10-31 22:16:55,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:55,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:55,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:55,533 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:55,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:55,541 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:55,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:55,542 INFO L85 PathProgramCache]: Analyzing trace with hash -1738509047, now seen corresponding path program 5 times [2024-10-31 22:16:55,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:55,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [342317611] [2024-10-31 22:16:55,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:55,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:55,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:16:56,348 INFO L134 CoverageAnalysis]: Checked inductivity of 24994 backedges. 0 proven. 18886 refuted. 0 times theorem prover too weak. 6108 trivial. 0 not checked. [2024-10-31 22:16:56,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:16:56,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [342317611] [2024-10-31 22:16:56,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [342317611] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-31 22:16:56,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2131492457] [2024-10-31 22:16:56,349 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-31 22:16:56,350 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-31 22:16:56,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:16:56,352 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-31 22:16:56,356 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-31 22:16:56,678 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 130 check-sat command(s) [2024-10-31 22:16:56,678 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-31 22:16:56,681 INFO L255 TraceCheckSpWp]: Trace formula consists of 608 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-31 22:16:56,692 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:16:57,347 INFO L134 CoverageAnalysis]: Checked inductivity of 24994 backedges. 0 proven. 18886 refuted. 0 times theorem prover too weak. 6108 trivial. 0 not checked. [2024-10-31 22:16:57,348 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-31 22:16:58,100 INFO L134 CoverageAnalysis]: Checked inductivity of 24994 backedges. 0 proven. 18886 refuted. 0 times theorem prover too weak. 6108 trivial. 0 not checked. [2024-10-31 22:16:58,101 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2131492457] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-31 22:16:58,101 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-31 22:16:58,101 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 7 [2024-10-31 22:16:58,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199892228] [2024-10-31 22:16:58,102 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-31 22:16:58,102 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:16:58,102 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:16:58,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-10-31 22:16:58,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2024-10-31 22:16:58,107 INFO L87 Difference]: Start difference. First operand 377 states and 406 transitions. cyclomatic complexity: 30 Second operand has 8 states, 8 states have (on average 5.625) internal successors, (45), 7 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:58,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:16:58,147 INFO L93 Difference]: Finished difference Result 563 states and 606 transitions. [2024-10-31 22:16:58,147 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 563 states and 606 transitions. [2024-10-31 22:16:58,151 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 561 [2024-10-31 22:16:58,154 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 563 states to 563 states and 606 transitions. [2024-10-31 22:16:58,154 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 563 [2024-10-31 22:16:58,155 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 563 [2024-10-31 22:16:58,156 INFO L73 IsDeterministic]: Start isDeterministic. Operand 563 states and 606 transitions. [2024-10-31 22:16:58,158 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:16:58,158 INFO L218 hiAutomatonCegarLoop]: Abstraction has 563 states and 606 transitions. [2024-10-31 22:16:58,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states and 606 transitions. [2024-10-31 22:16:58,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 563. [2024-10-31 22:16:58,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 563 states, 563 states have (on average 1.0763765541740675) internal successors, (606), 562 states have internal predecessors, (606), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:16:58,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 563 states to 563 states and 606 transitions. [2024-10-31 22:16:58,180 INFO L240 hiAutomatonCegarLoop]: Abstraction has 563 states and 606 transitions. [2024-10-31 22:16:58,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-31 22:16:58,186 INFO L425 stractBuchiCegarLoop]: Abstraction has 563 states and 606 transitions. [2024-10-31 22:16:58,186 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-10-31 22:16:58,186 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 563 states and 606 transitions. [2024-10-31 22:16:58,189 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 561 [2024-10-31 22:16:58,189 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:16:58,189 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:16:58,193 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-10-31 22:16:58,193 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [216, 216, 36, 36, 36, 6, 6, 6, 1, 1, 1] [2024-10-31 22:16:58,193 INFO L745 eck$LassoCheckResult]: Stem: 5340#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3); 5341#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~pre4#1, main_#t~pre5#1, main_#t~pre6#1, main_#t~pre7#1, main_~a~0#1, main_~b~0#1, main_~c~0#1, main_~d~0#1;main_~a~0#1 := 6;main_~b~0#1 := 6;main_~c~0#1 := 6;main_~d~0#1 := 6;main_~a~0#1 := 0; 5344#L22-3 [2024-10-31 22:16:58,194 INFO L747 eck$LassoCheckResult]: Loop: 5344#L22-3 assume !!(main_~a~0#1 < 6);main_~b~0#1 := 0; 5342#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 5343#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5339#L25-3 assume !!(main_~d~0#1 < 6); 5333#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5334#L25-3 assume !!(main_~d~0#1 < 6); 5891#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5889#L25-3 assume !!(main_~d~0#1 < 6); 5887#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5885#L25-3 assume !!(main_~d~0#1 < 6); 5883#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5881#L25-3 assume !!(main_~d~0#1 < 6); 5879#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5877#L25-3 assume !!(main_~d~0#1 < 6); 5875#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5874#L25-3 assume !(main_~d~0#1 < 6); 5335#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5336#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5869#L25-3 assume !!(main_~d~0#1 < 6); 5867#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5865#L25-3 assume !!(main_~d~0#1 < 6); 5863#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5861#L25-3 assume !!(main_~d~0#1 < 6); 5859#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5857#L25-3 assume !!(main_~d~0#1 < 6); 5855#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5853#L25-3 assume !!(main_~d~0#1 < 6); 5851#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5849#L25-3 assume !!(main_~d~0#1 < 6); 5847#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5846#L25-3 assume !(main_~d~0#1 < 6); 5843#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5841#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5839#L25-3 assume !!(main_~d~0#1 < 6); 5837#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5835#L25-3 assume !!(main_~d~0#1 < 6); 5833#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5831#L25-3 assume !!(main_~d~0#1 < 6); 5829#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5827#L25-3 assume !!(main_~d~0#1 < 6); 5825#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5823#L25-3 assume !!(main_~d~0#1 < 6); 5821#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5819#L25-3 assume !!(main_~d~0#1 < 6); 5817#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5816#L25-3 assume !(main_~d~0#1 < 6); 5813#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5811#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5809#L25-3 assume !!(main_~d~0#1 < 6); 5807#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5805#L25-3 assume !!(main_~d~0#1 < 6); 5803#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5801#L25-3 assume !!(main_~d~0#1 < 6); 5799#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5797#L25-3 assume !!(main_~d~0#1 < 6); 5795#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5793#L25-3 assume !!(main_~d~0#1 < 6); 5791#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5789#L25-3 assume !!(main_~d~0#1 < 6); 5787#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5786#L25-3 assume !(main_~d~0#1 < 6); 5783#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5781#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5779#L25-3 assume !!(main_~d~0#1 < 6); 5777#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5775#L25-3 assume !!(main_~d~0#1 < 6); 5773#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5771#L25-3 assume !!(main_~d~0#1 < 6); 5769#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5767#L25-3 assume !!(main_~d~0#1 < 6); 5765#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5763#L25-3 assume !!(main_~d~0#1 < 6); 5761#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5759#L25-3 assume !!(main_~d~0#1 < 6); 5757#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5756#L25-3 assume !(main_~d~0#1 < 6); 5753#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5751#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5723#L25-3 assume !!(main_~d~0#1 < 6); 5749#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5747#L25-3 assume !!(main_~d~0#1 < 6); 5745#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5743#L25-3 assume !!(main_~d~0#1 < 6); 5741#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5739#L25-3 assume !!(main_~d~0#1 < 6); 5737#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5735#L25-3 assume !!(main_~d~0#1 < 6); 5733#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5731#L25-3 assume !!(main_~d~0#1 < 6); 5729#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5728#L25-3 assume !(main_~d~0#1 < 6); 5725#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5722#L24-3 assume !(main_~c~0#1 < 6); 5337#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 5338#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 5895#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5894#L25-3 assume !!(main_~d~0#1 < 6); 5893#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5892#L25-3 assume !!(main_~d~0#1 < 6); 5890#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5888#L25-3 assume !!(main_~d~0#1 < 6); 5886#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5884#L25-3 assume !!(main_~d~0#1 < 6); 5882#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5880#L25-3 assume !!(main_~d~0#1 < 6); 5878#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5876#L25-3 assume !!(main_~d~0#1 < 6); 5873#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5872#L25-3 assume !(main_~d~0#1 < 6); 5871#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5870#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5868#L25-3 assume !!(main_~d~0#1 < 6); 5866#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5864#L25-3 assume !!(main_~d~0#1 < 6); 5862#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5860#L25-3 assume !!(main_~d~0#1 < 6); 5858#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5856#L25-3 assume !!(main_~d~0#1 < 6); 5854#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5852#L25-3 assume !!(main_~d~0#1 < 6); 5850#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5848#L25-3 assume !!(main_~d~0#1 < 6); 5845#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5844#L25-3 assume !(main_~d~0#1 < 6); 5842#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5840#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5838#L25-3 assume !!(main_~d~0#1 < 6); 5836#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5834#L25-3 assume !!(main_~d~0#1 < 6); 5832#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5830#L25-3 assume !!(main_~d~0#1 < 6); 5828#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5826#L25-3 assume !!(main_~d~0#1 < 6); 5824#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5822#L25-3 assume !!(main_~d~0#1 < 6); 5820#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5818#L25-3 assume !!(main_~d~0#1 < 6); 5815#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5814#L25-3 assume !(main_~d~0#1 < 6); 5812#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5810#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5808#L25-3 assume !!(main_~d~0#1 < 6); 5806#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5804#L25-3 assume !!(main_~d~0#1 < 6); 5802#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5800#L25-3 assume !!(main_~d~0#1 < 6); 5798#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5796#L25-3 assume !!(main_~d~0#1 < 6); 5794#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5792#L25-3 assume !!(main_~d~0#1 < 6); 5790#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5788#L25-3 assume !!(main_~d~0#1 < 6); 5785#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5784#L25-3 assume !(main_~d~0#1 < 6); 5782#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5780#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5778#L25-3 assume !!(main_~d~0#1 < 6); 5776#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5774#L25-3 assume !!(main_~d~0#1 < 6); 5772#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5770#L25-3 assume !!(main_~d~0#1 < 6); 5768#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5766#L25-3 assume !!(main_~d~0#1 < 6); 5764#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5762#L25-3 assume !!(main_~d~0#1 < 6); 5760#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5758#L25-3 assume !!(main_~d~0#1 < 6); 5755#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5754#L25-3 assume !(main_~d~0#1 < 6); 5752#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5750#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5721#L25-3 assume !!(main_~d~0#1 < 6); 5748#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5746#L25-3 assume !!(main_~d~0#1 < 6); 5744#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5742#L25-3 assume !!(main_~d~0#1 < 6); 5740#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5738#L25-3 assume !!(main_~d~0#1 < 6); 5736#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5734#L25-3 assume !!(main_~d~0#1 < 6); 5732#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5730#L25-3 assume !!(main_~d~0#1 < 6); 5727#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5726#L25-3 assume !(main_~d~0#1 < 6); 5724#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5720#L24-3 assume !(main_~c~0#1 < 6); 5719#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 5718#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 5717#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5716#L25-3 assume !!(main_~d~0#1 < 6); 5715#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5714#L25-3 assume !!(main_~d~0#1 < 6); 5713#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5712#L25-3 assume !!(main_~d~0#1 < 6); 5711#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5710#L25-3 assume !!(main_~d~0#1 < 6); 5709#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5708#L25-3 assume !!(main_~d~0#1 < 6); 5707#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5706#L25-3 assume !!(main_~d~0#1 < 6); 5705#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5704#L25-3 assume !(main_~d~0#1 < 6); 5703#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5702#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5701#L25-3 assume !!(main_~d~0#1 < 6); 5700#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5699#L25-3 assume !!(main_~d~0#1 < 6); 5698#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5697#L25-3 assume !!(main_~d~0#1 < 6); 5696#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5695#L25-3 assume !!(main_~d~0#1 < 6); 5694#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5693#L25-3 assume !!(main_~d~0#1 < 6); 5692#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5691#L25-3 assume !!(main_~d~0#1 < 6); 5690#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5689#L25-3 assume !(main_~d~0#1 < 6); 5688#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5687#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5686#L25-3 assume !!(main_~d~0#1 < 6); 5685#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5684#L25-3 assume !!(main_~d~0#1 < 6); 5683#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5682#L25-3 assume !!(main_~d~0#1 < 6); 5681#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5680#L25-3 assume !!(main_~d~0#1 < 6); 5679#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5678#L25-3 assume !!(main_~d~0#1 < 6); 5677#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5676#L25-3 assume !!(main_~d~0#1 < 6); 5675#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5674#L25-3 assume !(main_~d~0#1 < 6); 5673#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5672#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5671#L25-3 assume !!(main_~d~0#1 < 6); 5670#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5669#L25-3 assume !!(main_~d~0#1 < 6); 5668#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5667#L25-3 assume !!(main_~d~0#1 < 6); 5666#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5665#L25-3 assume !!(main_~d~0#1 < 6); 5664#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5663#L25-3 assume !!(main_~d~0#1 < 6); 5662#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5661#L25-3 assume !!(main_~d~0#1 < 6); 5660#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5659#L25-3 assume !(main_~d~0#1 < 6); 5658#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5657#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5656#L25-3 assume !!(main_~d~0#1 < 6); 5655#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5654#L25-3 assume !!(main_~d~0#1 < 6); 5653#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5652#L25-3 assume !!(main_~d~0#1 < 6); 5651#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5650#L25-3 assume !!(main_~d~0#1 < 6); 5649#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5648#L25-3 assume !!(main_~d~0#1 < 6); 5647#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5646#L25-3 assume !!(main_~d~0#1 < 6); 5645#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5644#L25-3 assume !(main_~d~0#1 < 6); 5643#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5642#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5628#L25-3 assume !!(main_~d~0#1 < 6); 5641#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5640#L25-3 assume !!(main_~d~0#1 < 6); 5639#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5638#L25-3 assume !!(main_~d~0#1 < 6); 5637#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5636#L25-3 assume !!(main_~d~0#1 < 6); 5635#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5634#L25-3 assume !!(main_~d~0#1 < 6); 5633#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5632#L25-3 assume !!(main_~d~0#1 < 6); 5631#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5630#L25-3 assume !(main_~d~0#1 < 6); 5629#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5627#L24-3 assume !(main_~c~0#1 < 6); 5626#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 5625#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 5624#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5623#L25-3 assume !!(main_~d~0#1 < 6); 5622#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5621#L25-3 assume !!(main_~d~0#1 < 6); 5620#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5619#L25-3 assume !!(main_~d~0#1 < 6); 5618#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5617#L25-3 assume !!(main_~d~0#1 < 6); 5616#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5615#L25-3 assume !!(main_~d~0#1 < 6); 5614#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5613#L25-3 assume !!(main_~d~0#1 < 6); 5612#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5611#L25-3 assume !(main_~d~0#1 < 6); 5610#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5609#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5608#L25-3 assume !!(main_~d~0#1 < 6); 5607#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5606#L25-3 assume !!(main_~d~0#1 < 6); 5605#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5604#L25-3 assume !!(main_~d~0#1 < 6); 5603#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5602#L25-3 assume !!(main_~d~0#1 < 6); 5601#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5600#L25-3 assume !!(main_~d~0#1 < 6); 5599#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5598#L25-3 assume !!(main_~d~0#1 < 6); 5597#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5596#L25-3 assume !(main_~d~0#1 < 6); 5595#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5594#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5593#L25-3 assume !!(main_~d~0#1 < 6); 5592#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5591#L25-3 assume !!(main_~d~0#1 < 6); 5590#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5589#L25-3 assume !!(main_~d~0#1 < 6); 5588#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5587#L25-3 assume !!(main_~d~0#1 < 6); 5586#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5585#L25-3 assume !!(main_~d~0#1 < 6); 5584#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5583#L25-3 assume !!(main_~d~0#1 < 6); 5582#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5581#L25-3 assume !(main_~d~0#1 < 6); 5580#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5579#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5578#L25-3 assume !!(main_~d~0#1 < 6); 5577#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5576#L25-3 assume !!(main_~d~0#1 < 6); 5575#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5574#L25-3 assume !!(main_~d~0#1 < 6); 5573#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5572#L25-3 assume !!(main_~d~0#1 < 6); 5571#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5570#L25-3 assume !!(main_~d~0#1 < 6); 5569#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5568#L25-3 assume !!(main_~d~0#1 < 6); 5567#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5566#L25-3 assume !(main_~d~0#1 < 6); 5565#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5564#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5563#L25-3 assume !!(main_~d~0#1 < 6); 5562#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5561#L25-3 assume !!(main_~d~0#1 < 6); 5560#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5559#L25-3 assume !!(main_~d~0#1 < 6); 5558#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5557#L25-3 assume !!(main_~d~0#1 < 6); 5556#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5555#L25-3 assume !!(main_~d~0#1 < 6); 5554#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5553#L25-3 assume !!(main_~d~0#1 < 6); 5552#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5551#L25-3 assume !(main_~d~0#1 < 6); 5550#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5549#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5535#L25-3 assume !!(main_~d~0#1 < 6); 5548#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5547#L25-3 assume !!(main_~d~0#1 < 6); 5546#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5545#L25-3 assume !!(main_~d~0#1 < 6); 5544#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5543#L25-3 assume !!(main_~d~0#1 < 6); 5542#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5541#L25-3 assume !!(main_~d~0#1 < 6); 5540#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5539#L25-3 assume !!(main_~d~0#1 < 6); 5538#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5537#L25-3 assume !(main_~d~0#1 < 6); 5536#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5534#L24-3 assume !(main_~c~0#1 < 6); 5533#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 5532#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 5531#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5530#L25-3 assume !!(main_~d~0#1 < 6); 5529#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5528#L25-3 assume !!(main_~d~0#1 < 6); 5527#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5526#L25-3 assume !!(main_~d~0#1 < 6); 5525#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5524#L25-3 assume !!(main_~d~0#1 < 6); 5523#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5522#L25-3 assume !!(main_~d~0#1 < 6); 5521#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5520#L25-3 assume !!(main_~d~0#1 < 6); 5519#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5518#L25-3 assume !(main_~d~0#1 < 6); 5517#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5516#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5515#L25-3 assume !!(main_~d~0#1 < 6); 5514#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5513#L25-3 assume !!(main_~d~0#1 < 6); 5512#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5511#L25-3 assume !!(main_~d~0#1 < 6); 5510#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5509#L25-3 assume !!(main_~d~0#1 < 6); 5508#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5507#L25-3 assume !!(main_~d~0#1 < 6); 5506#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5505#L25-3 assume !!(main_~d~0#1 < 6); 5504#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5503#L25-3 assume !(main_~d~0#1 < 6); 5502#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5501#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5500#L25-3 assume !!(main_~d~0#1 < 6); 5499#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5498#L25-3 assume !!(main_~d~0#1 < 6); 5497#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5496#L25-3 assume !!(main_~d~0#1 < 6); 5495#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5494#L25-3 assume !!(main_~d~0#1 < 6); 5493#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5492#L25-3 assume !!(main_~d~0#1 < 6); 5491#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5490#L25-3 assume !!(main_~d~0#1 < 6); 5489#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5488#L25-3 assume !(main_~d~0#1 < 6); 5487#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5486#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5485#L25-3 assume !!(main_~d~0#1 < 6); 5484#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5483#L25-3 assume !!(main_~d~0#1 < 6); 5482#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5481#L25-3 assume !!(main_~d~0#1 < 6); 5480#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5479#L25-3 assume !!(main_~d~0#1 < 6); 5478#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5477#L25-3 assume !!(main_~d~0#1 < 6); 5476#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5475#L25-3 assume !!(main_~d~0#1 < 6); 5474#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5473#L25-3 assume !(main_~d~0#1 < 6); 5472#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5471#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5470#L25-3 assume !!(main_~d~0#1 < 6); 5469#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5468#L25-3 assume !!(main_~d~0#1 < 6); 5467#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5466#L25-3 assume !!(main_~d~0#1 < 6); 5465#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5464#L25-3 assume !!(main_~d~0#1 < 6); 5463#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5462#L25-3 assume !!(main_~d~0#1 < 6); 5461#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5460#L25-3 assume !!(main_~d~0#1 < 6); 5459#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5458#L25-3 assume !(main_~d~0#1 < 6); 5457#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5456#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5442#L25-3 assume !!(main_~d~0#1 < 6); 5455#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5454#L25-3 assume !!(main_~d~0#1 < 6); 5453#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5452#L25-3 assume !!(main_~d~0#1 < 6); 5451#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5450#L25-3 assume !!(main_~d~0#1 < 6); 5449#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5448#L25-3 assume !!(main_~d~0#1 < 6); 5447#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5446#L25-3 assume !!(main_~d~0#1 < 6); 5445#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5444#L25-3 assume !(main_~d~0#1 < 6); 5443#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5441#L24-3 assume !(main_~c~0#1 < 6); 5440#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 5439#L23-3 assume !!(main_~b~0#1 < 6);main_~c~0#1 := 0; 5347#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5438#L25-3 assume !!(main_~d~0#1 < 6); 5437#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5436#L25-3 assume !!(main_~d~0#1 < 6); 5435#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5434#L25-3 assume !!(main_~d~0#1 < 6); 5433#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5432#L25-3 assume !!(main_~d~0#1 < 6); 5431#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5430#L25-3 assume !!(main_~d~0#1 < 6); 5429#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5428#L25-3 assume !!(main_~d~0#1 < 6); 5427#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5426#L25-3 assume !(main_~d~0#1 < 6); 5425#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5424#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5423#L25-3 assume !!(main_~d~0#1 < 6); 5422#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5421#L25-3 assume !!(main_~d~0#1 < 6); 5420#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5419#L25-3 assume !!(main_~d~0#1 < 6); 5418#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5417#L25-3 assume !!(main_~d~0#1 < 6); 5416#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5415#L25-3 assume !!(main_~d~0#1 < 6); 5414#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5413#L25-3 assume !!(main_~d~0#1 < 6); 5412#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5411#L25-3 assume !(main_~d~0#1 < 6); 5410#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5409#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5408#L25-3 assume !!(main_~d~0#1 < 6); 5407#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5406#L25-3 assume !!(main_~d~0#1 < 6); 5405#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5404#L25-3 assume !!(main_~d~0#1 < 6); 5403#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5402#L25-3 assume !!(main_~d~0#1 < 6); 5401#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5400#L25-3 assume !!(main_~d~0#1 < 6); 5399#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5398#L25-3 assume !!(main_~d~0#1 < 6); 5397#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5396#L25-3 assume !(main_~d~0#1 < 6); 5395#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5394#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5393#L25-3 assume !!(main_~d~0#1 < 6); 5392#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5391#L25-3 assume !!(main_~d~0#1 < 6); 5390#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5389#L25-3 assume !!(main_~d~0#1 < 6); 5388#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5387#L25-3 assume !!(main_~d~0#1 < 6); 5386#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5385#L25-3 assume !!(main_~d~0#1 < 6); 5384#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5383#L25-3 assume !!(main_~d~0#1 < 6); 5382#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5381#L25-3 assume !(main_~d~0#1 < 6); 5380#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5379#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5378#L25-3 assume !!(main_~d~0#1 < 6); 5377#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5376#L25-3 assume !!(main_~d~0#1 < 6); 5375#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5374#L25-3 assume !!(main_~d~0#1 < 6); 5373#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5372#L25-3 assume !!(main_~d~0#1 < 6); 5371#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5370#L25-3 assume !!(main_~d~0#1 < 6); 5369#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5368#L25-3 assume !!(main_~d~0#1 < 6); 5367#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5366#L25-3 assume !(main_~d~0#1 < 6); 5365#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5364#L24-3 assume !!(main_~c~0#1 < 6);main_~d~0#1 := 0; 5350#L25-3 assume !!(main_~d~0#1 < 6); 5363#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5362#L25-3 assume !!(main_~d~0#1 < 6); 5361#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5360#L25-3 assume !!(main_~d~0#1 < 6); 5359#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5358#L25-3 assume !!(main_~d~0#1 < 6); 5357#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5356#L25-3 assume !!(main_~d~0#1 < 6); 5355#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5354#L25-3 assume !!(main_~d~0#1 < 6); 5353#L25-2 main_#t~pre4#1 := 1 + main_~d~0#1;main_~d~0#1 := 1 + main_~d~0#1;havoc main_#t~pre4#1; 5352#L25-3 assume !(main_~d~0#1 < 6); 5351#L24-2 main_#t~pre5#1 := 1 + main_~c~0#1;main_~c~0#1 := 1 + main_~c~0#1;havoc main_#t~pre5#1; 5349#L24-3 assume !(main_~c~0#1 < 6); 5348#L23-2 main_#t~pre6#1 := 1 + main_~b~0#1;main_~b~0#1 := 1 + main_~b~0#1;havoc main_#t~pre6#1; 5346#L23-3 assume !(main_~b~0#1 < 6); 5345#L22-2 main_#t~pre7#1 := 1 + main_~a~0#1;main_~a~0#1 := 1 + main_~a~0#1;havoc main_#t~pre7#1; 5344#L22-3 [2024-10-31 22:16:58,194 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:58,194 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2024-10-31 22:16:58,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:58,195 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546769466] [2024-10-31 22:16:58,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:58,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:58,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:58,201 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:58,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:58,205 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:58,206 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:58,206 INFO L85 PathProgramCache]: Analyzing trace with hash 247558537, now seen corresponding path program 6 times [2024-10-31 22:16:58,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:58,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769956885] [2024-10-31 22:16:58,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:58,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:58,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:58,386 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:58,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:58,606 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:16:58,608 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:16:58,608 INFO L85 PathProgramCache]: Analyzing trace with hash 1915499015, now seen corresponding path program 1 times [2024-10-31 22:16:58,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:16:58,609 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940287911] [2024-10-31 22:16:58,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:16:58,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:16:58,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:58,818 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:16:59,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:16:59,079 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:17:21,095 WARN L286 SmtUtils]: Spent 21.70s on a formula simplification. DAG size of input: 1170 DAG size of output: 870 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-10-31 22:17:24,067 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:17:24,067 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:17:24,068 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:17:24,068 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:17:24,068 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-10-31 22:17:24,068 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,068 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:17:24,068 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:17:24,069 INFO L132 ssoRankerPreferences]: Filename of dumped script: nested_4.c_Iteration9_Loop [2024-10-31 22:17:24,069 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:17:24,069 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:17:24,089 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,098 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,101 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,105 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,109 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,112 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,115 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,119 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,212 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:17:24,213 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-10-31 22:17:24,215 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,218 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,220 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-10-31 22:17:24,221 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,221 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,244 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:17:24,244 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~d~0#1=6} Honda state: {ULTIMATE.start_main_~d~0#1=6} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:17:24,263 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-10-31 22:17:24,264 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,264 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,266 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-10-31 22:17:24,269 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,269 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,285 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:17:24,285 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~b~0#1=6} Honda state: {ULTIMATE.start_main_~b~0#1=6} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:17:24,304 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2024-10-31 22:17:24,305 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,307 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,310 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-10-31 22:17:24,311 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,311 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,327 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:17:24,328 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~c~0#1=6} Honda state: {ULTIMATE.start_main_~c~0#1=6} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:17:24,345 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-10-31 22:17:24,346 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,350 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,353 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-10-31 22:17:24,354 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,354 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,371 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:17:24,371 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre6#1=0} Honda state: {ULTIMATE.start_main_#t~pre6#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:17:24,383 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2024-10-31 22:17:24,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,386 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,387 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-10-31 22:17:24,388 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,388 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,405 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:17:24,405 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre4#1=0} Honda state: {ULTIMATE.start_main_#t~pre4#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:17:24,418 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-10-31 22:17:24,418 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,418 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,420 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,422 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-10-31 22:17:24,423 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,423 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,435 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:17:24,435 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre7#1=0} Honda state: {ULTIMATE.start_main_#t~pre7#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:17:24,450 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-10-31 22:17:24,450 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,451 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,452 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,453 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-10-31 22:17:24,454 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,454 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,467 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-10-31 22:17:24,467 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_#t~pre5#1=0} Honda state: {ULTIMATE.start_main_#t~pre5#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-10-31 22:17:24,481 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2024-10-31 22:17:24,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,482 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,487 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-10-31 22:17:24,488 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-10-31 22:17:24,488 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,522 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-10-31 22:17:24,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,528 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,531 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-10-31 22:17:24,532 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-10-31 22:17:24,532 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-10-31 22:17:24,581 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2024-10-31 22:17:24,587 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-10-31 22:17:24,588 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:17:24,588 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:17:24,588 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:17:24,588 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:17:24,588 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-10-31 22:17:24,588 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,589 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:17:24,589 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:17:24,589 INFO L132 ssoRankerPreferences]: Filename of dumped script: nested_4.c_Iteration9_Loop [2024-10-31 22:17:24,589 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:17:24,589 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:17:24,590 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,595 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,599 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,601 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,604 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,606 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,609 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,611 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:17:24,671 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-10-31 22:17:24,675 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-10-31 22:17:24,676 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,677 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,677 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,679 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-10-31 22:17:24,680 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,692 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,692 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,692 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,692 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,692 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,694 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,694 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,697 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:17:24,709 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-10-31 22:17:24,710 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,710 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,711 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,712 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-10-31 22:17:24,713 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,724 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,724 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,724 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,724 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,725 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,726 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,726 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,730 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:17:24,748 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-10-31 22:17:24,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,749 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,751 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,754 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-10-31 22:17:24,755 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,770 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,770 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,770 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,770 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,770 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,771 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,771 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,773 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:17:24,791 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2024-10-31 22:17:24,792 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,794 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-10-31 22:17:24,797 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,811 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,811 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,811 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,811 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,812 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,812 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,813 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,815 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:17:24,834 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2024-10-31 22:17:24,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,835 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,836 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,841 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,843 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-10-31 22:17:24,855 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,855 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,855 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,855 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,855 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,856 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,856 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,859 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:17:24,877 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Ended with exit code 0 [2024-10-31 22:17:24,877 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,878 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,879 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,880 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-10-31 22:17:24,882 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,894 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,895 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,895 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,895 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,895 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,896 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,896 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,898 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:17:24,917 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2024-10-31 22:17:24,917 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,917 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,921 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,923 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-10-31 22:17:24,924 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,938 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,938 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,938 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,938 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,938 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,939 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,939 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,940 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-10-31 22:17:24,952 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2024-10-31 22:17:24,952 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,952 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,954 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,955 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2024-10-31 22:17:24,956 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-10-31 22:17:24,967 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-10-31 22:17:24,967 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-10-31 22:17:24,967 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-10-31 22:17:24,967 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-10-31 22:17:24,967 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-10-31 22:17:24,968 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-10-31 22:17:24,968 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-10-31 22:17:24,971 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-10-31 22:17:24,974 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2024-10-31 22:17:24,974 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2024-10-31 22:17:24,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:17:24,976 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:17:24,979 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:17:24,980 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-10-31 22:17:24,981 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-10-31 22:17:24,981 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2024-10-31 22:17:24,981 INFO L474 LassoAnalysis]: Proved termination. [2024-10-31 22:17:24,982 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~a~0#1) = -2*ULTIMATE.start_main_~a~0#1 + 11 Supporting invariants [] [2024-10-31 22:17:24,994 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ac15e4d3-3aee-456d-8a8a-4f95dfc7cfb2/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2024-10-31 22:17:24,996 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2024-10-31 22:17:25,022 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:17:25,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:25,031 INFO L255 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-10-31 22:17:25,032 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-31 22:17:25,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:17:25,266 INFO L255 TraceCheckSpWp]: Trace formula consists of 908 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-31 22:17:25,274 INFO L278 TraceCheckSpWp]: Computing forward predicates...