./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5d3b64744a19af136ca9c439b2264a15465f658e2e3d4a576a98d96e4b8aff92 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:00:42,533 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:00:42,598 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 22:00:42,603 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:00:42,603 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:00:42,625 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:00:42,626 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:00:42,626 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:00:42,627 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:00:42,628 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:00:42,628 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:00:42,629 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:00:42,629 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:00:42,630 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:00:42,631 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:00:42,631 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:00:42,631 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:00:42,632 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:00:42,632 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:00:42,633 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:00:42,633 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:00:42,634 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 22:00:42,634 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:00:42,635 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 22:00:42,635 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:00:42,636 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:00:42,653 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:00:42,654 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:00:42,654 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:00:42,655 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:00:42,655 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 22:00:42,655 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:00:42,656 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:00:42,656 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:00:42,657 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:00:42,657 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:00:42,658 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:00:42,659 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:00:42,659 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:00:42,660 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5d3b64744a19af136ca9c439b2264a15465f658e2e3d4a576a98d96e4b8aff92 [2024-10-31 22:00:43,089 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:00:43,129 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:00:43,132 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:00:43,135 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:00:43,135 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:00:43,137 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c Unable to find full path for "g++" [2024-10-31 22:00:45,290 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:00:45,513 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:00:45,514 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.BOUNDED-8.pals.c [2024-10-31 22:00:45,525 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/data/9d4e286a1/9565d60d52bf4e308c2a82849cdf5044/FLAG228188b04 [2024-10-31 22:00:45,872 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/data/9d4e286a1/9565d60d52bf4e308c2a82849cdf5044 [2024-10-31 22:00:45,875 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:00:45,877 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:00:45,878 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:00:45,878 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:00:45,883 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:00:45,884 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:00:45" (1/1) ... [2024-10-31 22:00:45,885 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46255d71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:45, skipping insertion in model container [2024-10-31 22:00:45,885 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:00:45" (1/1) ... [2024-10-31 22:00:45,923 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:00:46,170 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:00:46,191 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:00:46,235 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:00:46,255 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:00:46,255 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46 WrapperNode [2024-10-31 22:00:46,255 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:00:46,256 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:00:46,256 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:00:46,256 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:00:46,264 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,274 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,304 INFO L138 Inliner]: procedures = 22, calls = 15, calls flagged for inlining = 10, calls inlined = 10, statements flattened = 265 [2024-10-31 22:00:46,305 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:00:46,305 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:00:46,306 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:00:46,306 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:00:46,319 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,320 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,323 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,347 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-31 22:00:46,351 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,351 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,357 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,362 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,364 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,365 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,375 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:00:46,376 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:00:46,376 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:00:46,376 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:00:46,377 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (1/1) ... [2024-10-31 22:00:46,387 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:46,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:00:46,417 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:00:46,421 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a49080a1-13a1-4f93-9dbe-1ffd2c4eec1f/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:00:46,453 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-31 22:00:46,453 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-31 22:00:46,453 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:00:46,454 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:00:46,541 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:00:46,543 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:00:46,969 INFO L? ?]: Removed 33 outVars from TransFormulas that were not future-live. [2024-10-31 22:00:46,969 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:00:46,990 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:00:46,991 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-10-31 22:00:46,991 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:00:46 BoogieIcfgContainer [2024-10-31 22:00:46,991 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:00:46,992 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:00:46,992 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:00:46,997 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:00:46,998 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:00:46,998 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:00:45" (1/3) ... [2024-10-31 22:00:46,999 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7ca1e996 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:00:46, skipping insertion in model container [2024-10-31 22:00:46,999 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:00:46,999 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:00:46" (2/3) ... [2024-10-31 22:00:47,000 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7ca1e996 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:00:47, skipping insertion in model container [2024-10-31 22:00:47,000 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:00:47,000 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:00:46" (3/3) ... [2024-10-31 22:00:47,002 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.4.1.ufo.BOUNDED-8.pals.c [2024-10-31 22:00:47,074 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:00:47,074 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:00:47,074 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:00:47,074 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:00:47,074 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:00:47,075 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:00:47,075 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:00:47,075 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:00:47,079 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 69 states, 68 states have (on average 1.7058823529411764) internal successors, (116), 68 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:47,101 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-10-31 22:00:47,103 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:47,103 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:47,130 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:47,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:47,132 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:00:47,133 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 69 states, 68 states have (on average 1.7058823529411764) internal successors, (116), 68 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:47,138 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-10-31 22:00:47,139 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:47,139 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:47,140 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:47,140 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:47,148 INFO L745 eck$LassoCheckResult]: Stem: 37#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 46#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 54#L163true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 23#L163-1true init_#res#1 := init_~tmp~0#1; 28#init_returnLabel#1true main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 66#L312true assume !(0 == main_~i2~0#1); 15#L312-2true ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 10#L322-2true [2024-10-31 22:00:47,149 INFO L747 eck$LassoCheckResult]: Loop: 10#L322-2true assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 7#L61true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 53#L61-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 8#L89true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 19#L89-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 55#L114true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 47#L114-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 36#L139true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 20#L139-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 67#L264true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 17#L264-1true check_#res#1 := check_~tmp~1#1; 21#check_returnLabel#1true main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 24#L349true assume !(0 == assert_~arg#1 % 256); 38#L344true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 10#L322-2true [2024-10-31 22:00:47,162 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:47,162 INFO L85 PathProgramCache]: Analyzing trace with hash 1932780748, now seen corresponding path program 1 times [2024-10-31 22:00:47,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:47,207 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860681730] [2024-10-31 22:00:47,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:47,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:47,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:47,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:47,617 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:47,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860681730] [2024-10-31 22:00:47,619 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1860681730] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:00:47,619 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:00:47,620 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:00:47,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285369976] [2024-10-31 22:00:47,622 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:00:47,629 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:00:47,631 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:47,631 INFO L85 PathProgramCache]: Analyzing trace with hash 1387092797, now seen corresponding path program 1 times [2024-10-31 22:00:47,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:47,632 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205694766] [2024-10-31 22:00:47,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:47,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:47,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:48,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:48,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:48,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205694766] [2024-10-31 22:00:48,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1205694766] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:00:48,065 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:00:48,065 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:00:48,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817174855] [2024-10-31 22:00:48,066 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:00:48,068 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:00:48,070 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:48,107 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:00:48,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:00:48,113 INFO L87 Difference]: Start difference. First operand has 69 states, 68 states have (on average 1.7058823529411764) internal successors, (116), 68 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:48,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:00:48,263 INFO L93 Difference]: Finished difference Result 106 states and 170 transitions. [2024-10-31 22:00:48,265 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 106 states and 170 transitions. [2024-10-31 22:00:48,271 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:00:48,279 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 106 states to 97 states and 139 transitions. [2024-10-31 22:00:48,281 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2024-10-31 22:00:48,285 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2024-10-31 22:00:48,286 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 139 transitions. [2024-10-31 22:00:48,287 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:00:48,287 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 139 transitions. [2024-10-31 22:00:48,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 139 transitions. [2024-10-31 22:00:48,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 63. [2024-10-31 22:00:48,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.3333333333333333) internal successors, (84), 62 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:48,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 84 transitions. [2024-10-31 22:00:48,326 INFO L240 hiAutomatonCegarLoop]: Abstraction has 63 states and 84 transitions. [2024-10-31 22:00:48,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-31 22:00:48,331 INFO L425 stractBuchiCegarLoop]: Abstraction has 63 states and 84 transitions. [2024-10-31 22:00:48,332 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:00:48,332 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 84 transitions. [2024-10-31 22:00:48,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:00:48,334 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:48,334 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:48,335 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:48,335 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:48,336 INFO L745 eck$LassoCheckResult]: Stem: 237#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 238#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 244#L163 assume 0 == ~r1~0; 222#L164 assume ~id1~0 >= 0; 210#L165 assume 0 == ~st1~0; 211#L166 assume ~send1~0 == ~id1~0; 226#L167 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 203#L168 assume ~id2~0 >= 0; 204#L169 assume 0 == ~st2~0; 251#L170 assume ~send2~0 == ~id2~0; 247#L171 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 245#L172 assume ~id3~0 >= 0; 246#L173 assume 0 == ~st3~0; 250#L174 assume ~send3~0 == ~id3~0; 194#L175 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 195#L176 assume ~id4~0 >= 0; 248#L177 assume 0 == ~st4~0; 233#L178 assume ~send4~0 == ~id4~0; 234#L179 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 189#L180 assume ~id1~0 != ~id2~0; 190#L181 assume ~id1~0 != ~id3~0; 230#L182 assume ~id1~0 != ~id4~0; 231#L183 assume ~id2~0 != ~id3~0; 215#L184 assume ~id2~0 != ~id4~0; 216#L185 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 223#L163-1 init_#res#1 := init_~tmp~0#1; 224#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 228#L312 assume !(0 == main_~i2~0#1); 212#L312-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 202#L322-2 [2024-10-31 22:00:48,336 INFO L747 eck$LassoCheckResult]: Loop: 202#L322-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 196#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 198#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 199#L89 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 200#L89-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 219#L114 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 232#L114-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 235#L139 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 209#L139-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 220#L264 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 217#L264-1 check_#res#1 := check_~tmp~1#1; 218#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 221#L349 assume !(0 == assert_~arg#1 % 256); 225#L344 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 202#L322-2 [2024-10-31 22:00:48,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:48,337 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 1 times [2024-10-31 22:00:48,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:48,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880863641] [2024-10-31 22:00:48,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:48,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:48,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:48,404 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:48,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:48,482 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:48,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:48,483 INFO L85 PathProgramCache]: Analyzing trace with hash 1387092797, now seen corresponding path program 2 times [2024-10-31 22:00:48,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:48,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542186525] [2024-10-31 22:00:48,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:48,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:48,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:48,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:48,782 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:48,782 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [542186525] [2024-10-31 22:00:48,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [542186525] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:00:48,783 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:00:48,783 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:00:48,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052203937] [2024-10-31 22:00:48,784 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:00:48,784 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:00:48,784 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:48,785 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:00:48,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:00:48,785 INFO L87 Difference]: Start difference. First operand 63 states and 84 transitions. cyclomatic complexity: 22 Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:48,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:00:48,818 INFO L93 Difference]: Finished difference Result 66 states and 86 transitions. [2024-10-31 22:00:48,818 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 86 transitions. [2024-10-31 22:00:48,820 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:00:48,821 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 63 states and 81 transitions. [2024-10-31 22:00:48,821 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2024-10-31 22:00:48,821 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2024-10-31 22:00:48,821 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 81 transitions. [2024-10-31 22:00:48,822 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:00:48,822 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 81 transitions. [2024-10-31 22:00:48,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 81 transitions. [2024-10-31 22:00:48,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2024-10-31 22:00:48,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.2857142857142858) internal successors, (81), 62 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:48,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 81 transitions. [2024-10-31 22:00:48,828 INFO L240 hiAutomatonCegarLoop]: Abstraction has 63 states and 81 transitions. [2024-10-31 22:00:48,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-31 22:00:48,830 INFO L425 stractBuchiCegarLoop]: Abstraction has 63 states and 81 transitions. [2024-10-31 22:00:48,830 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:00:48,830 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 81 transitions. [2024-10-31 22:00:48,831 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:00:48,831 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:48,831 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:48,832 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:48,833 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:48,833 INFO L745 eck$LassoCheckResult]: Stem: 374#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 375#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 381#L163 assume 0 == ~r1~0; 359#L164 assume ~id1~0 >= 0; 347#L165 assume 0 == ~st1~0; 348#L166 assume ~send1~0 == ~id1~0; 363#L167 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 340#L168 assume ~id2~0 >= 0; 341#L169 assume 0 == ~st2~0; 388#L170 assume ~send2~0 == ~id2~0; 384#L171 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 382#L172 assume ~id3~0 >= 0; 383#L173 assume 0 == ~st3~0; 387#L174 assume ~send3~0 == ~id3~0; 331#L175 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 332#L176 assume ~id4~0 >= 0; 385#L177 assume 0 == ~st4~0; 370#L178 assume ~send4~0 == ~id4~0; 371#L179 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 326#L180 assume ~id1~0 != ~id2~0; 327#L181 assume ~id1~0 != ~id3~0; 367#L182 assume ~id1~0 != ~id4~0; 368#L183 assume ~id2~0 != ~id3~0; 352#L184 assume ~id2~0 != ~id4~0; 353#L185 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 360#L163-1 init_#res#1 := init_~tmp~0#1; 361#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 365#L312 assume !(0 == main_~i2~0#1); 349#L312-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 339#L322-2 [2024-10-31 22:00:48,833 INFO L747 eck$LassoCheckResult]: Loop: 339#L322-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 333#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 335#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 336#L89 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 337#L89-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 356#L114 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 369#L114-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 372#L139 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 346#L139-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 357#L264 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 328#L265 assume ~r1~0 >= 4; 329#$Ultimate##134 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 354#L264-1 check_#res#1 := check_~tmp~1#1; 355#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 358#L349 assume !(0 == assert_~arg#1 % 256); 362#L344 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 339#L322-2 [2024-10-31 22:00:48,834 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:48,834 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 2 times [2024-10-31 22:00:48,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:48,835 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132140710] [2024-10-31 22:00:48,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:48,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:48,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:48,872 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:48,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:48,912 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:48,913 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:48,913 INFO L85 PathProgramCache]: Analyzing trace with hash 140432589, now seen corresponding path program 1 times [2024-10-31 22:00:48,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:48,914 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279432522] [2024-10-31 22:00:48,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:48,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:48,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:00:48,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:00:48,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:00:48,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [279432522] [2024-10-31 22:00:48,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [279432522] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:00:48,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:00:48,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:00:48,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957523161] [2024-10-31 22:00:48,959 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:00:48,960 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:00:48,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:00:48,961 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:00:48,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:00:48,962 INFO L87 Difference]: Start difference. First operand 63 states and 81 transitions. cyclomatic complexity: 19 Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:49,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:00:49,001 INFO L93 Difference]: Finished difference Result 91 states and 122 transitions. [2024-10-31 22:00:49,001 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 122 transitions. [2024-10-31 22:00:49,002 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-10-31 22:00:49,003 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 91 states and 122 transitions. [2024-10-31 22:00:49,003 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2024-10-31 22:00:49,004 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2024-10-31 22:00:49,004 INFO L73 IsDeterministic]: Start isDeterministic. Operand 91 states and 122 transitions. [2024-10-31 22:00:49,004 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:00:49,005 INFO L218 hiAutomatonCegarLoop]: Abstraction has 91 states and 122 transitions. [2024-10-31 22:00:49,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states and 122 transitions. [2024-10-31 22:00:49,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2024-10-31 22:00:49,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.3406593406593406) internal successors, (122), 90 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:00:49,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 122 transitions. [2024-10-31 22:00:49,011 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 122 transitions. [2024-10-31 22:00:49,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:00:49,014 INFO L425 stractBuchiCegarLoop]: Abstraction has 91 states and 122 transitions. [2024-10-31 22:00:49,014 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:00:49,015 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 122 transitions. [2024-10-31 22:00:49,016 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-10-31 22:00:49,016 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:00:49,016 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:00:49,017 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:49,017 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:00:49,017 INFO L745 eck$LassoCheckResult]: Stem: 536#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 537#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 544#L163 assume 0 == ~r1~0; 519#L164 assume ~id1~0 >= 0; 506#L165 assume 0 == ~st1~0; 507#L166 assume ~send1~0 == ~id1~0; 523#L167 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 499#L168 assume ~id2~0 >= 0; 500#L169 assume 0 == ~st2~0; 552#L170 assume ~send2~0 == ~id2~0; 547#L171 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 545#L172 assume ~id3~0 >= 0; 546#L173 assume 0 == ~st3~0; 551#L174 assume ~send3~0 == ~id3~0; 490#L175 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 491#L176 assume ~id4~0 >= 0; 548#L177 assume 0 == ~st4~0; 532#L178 assume ~send4~0 == ~id4~0; 533#L179 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 486#L180 assume ~id1~0 != ~id2~0; 487#L181 assume ~id1~0 != ~id3~0; 529#L182 assume ~id1~0 != ~id4~0; 530#L183 assume ~id2~0 != ~id3~0; 512#L184 assume ~id2~0 != ~id4~0; 513#L185 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 520#L163-1 init_#res#1 := init_~tmp~0#1; 521#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 527#L312 assume !(0 == main_~i2~0#1); 508#L312-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 509#L322-2 [2024-10-31 22:00:49,018 INFO L747 eck$LassoCheckResult]: Loop: 509#L322-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 574#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 549#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 569#L89 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 568#L89-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 564#L114 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 562#L114-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 558#L139 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 556#L139-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 555#L264 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 554#L265 assume !(~r1~0 >= 4); 525#L268 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0; 526#$Ultimate##134 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 514#L264-1 check_#res#1 := check_~tmp~1#1; 515#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 518#L349 assume !(0 == assert_~arg#1 % 256); 522#L344 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 509#L322-2 [2024-10-31 22:00:49,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:49,018 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 3 times [2024-10-31 22:00:49,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:49,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452024199] [2024-10-31 22:00:49,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:49,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:49,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,039 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:49,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,061 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:49,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:49,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1705012919, now seen corresponding path program 1 times [2024-10-31 22:00:49,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:49,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43399708] [2024-10-31 22:00:49,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:49,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:49,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,096 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:49,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,135 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:49,136 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:00:49,136 INFO L85 PathProgramCache]: Analyzing trace with hash 1742065425, now seen corresponding path program 1 times [2024-10-31 22:00:49,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:00:49,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622474890] [2024-10-31 22:00:49,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:00:49,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:00:49,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,182 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:00:49,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:00:49,230 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:00:53,601 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:00:53,602 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:00:53,602 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:00:53,603 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:00:53,603 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-10-31 22:00:53,603 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:00:53,603 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:00:53,603 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:00:53,604 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.4.1.ufo.BOUNDED-8.pals.c_Iteration4_Loop [2024-10-31 22:00:53,604 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:00:53,604 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:00:53,652 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:53,665 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:53,672 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,722 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,725 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,727 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,730 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,733 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,736 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,738 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,741 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,747 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,749 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,752 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,758 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,765 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,769 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:55,776 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:00:57,726 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 26