./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4fc63b2a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9a8265a1502e23b0364b9cd16198377a0ca498fc346156a58eeb954c0e23f901 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-4fc63b2 [2024-10-31 22:13:12,834 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-31 22:13:12,910 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-10-31 22:13:12,915 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-31 22:13:12,915 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-31 22:13:12,940 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-31 22:13:12,941 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-31 22:13:12,942 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-31 22:13:12,942 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-10-31 22:13:12,943 INFO L153 SettingsManager]: * Use memory slicer=true [2024-10-31 22:13:12,943 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-31 22:13:12,944 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-31 22:13:12,944 INFO L153 SettingsManager]: * Use SBE=true [2024-10-31 22:13:12,945 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-10-31 22:13:12,945 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-10-31 22:13:12,946 INFO L153 SettingsManager]: * Use old map elimination=false [2024-10-31 22:13:12,946 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-10-31 22:13:12,947 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-10-31 22:13:12,947 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-10-31 22:13:12,948 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-31 22:13:12,948 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-10-31 22:13:12,952 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-31 22:13:12,952 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-31 22:13:12,953 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-31 22:13:12,953 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-31 22:13:12,953 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-10-31 22:13:12,954 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-10-31 22:13:12,954 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-10-31 22:13:12,954 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-31 22:13:12,955 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-10-31 22:13:12,955 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-31 22:13:12,967 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-31 22:13:12,967 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-10-31 22:13:12,967 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-31 22:13:12,968 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-31 22:13:12,968 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-31 22:13:12,968 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-31 22:13:12,969 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-31 22:13:12,969 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-10-31 22:13:12,970 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9a8265a1502e23b0364b9cd16198377a0ca498fc346156a58eeb954c0e23f901 [2024-10-31 22:13:13,259 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-31 22:13:13,283 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-31 22:13:13,286 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-31 22:13:13,288 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-31 22:13:13,288 INFO L274 PluginConnector]: CDTParser initialized [2024-10-31 22:13:13,290 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c Unable to find full path for "g++" [2024-10-31 22:13:15,442 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-31 22:13:15,672 INFO L384 CDTParser]: Found 1 translation units. [2024-10-31 22:13:15,673 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c [2024-10-31 22:13:15,689 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/data/968c42fed/6c9facd9fcb4421288497de95693d962/FLAGe6bb68189 [2024-10-31 22:13:15,712 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/data/968c42fed/6c9facd9fcb4421288497de95693d962 [2024-10-31 22:13:15,717 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-31 22:13:15,718 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-31 22:13:15,723 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-31 22:13:15,724 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-31 22:13:15,730 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-31 22:13:15,731 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:13:15" (1/1) ... [2024-10-31 22:13:15,732 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@64498a38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:15, skipping insertion in model container [2024-10-31 22:13:15,733 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.10 10:13:15" (1/1) ... [2024-10-31 22:13:15,766 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-31 22:13:16,029 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:13:16,045 INFO L200 MainTranslator]: Completed pre-run [2024-10-31 22:13:16,096 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-31 22:13:16,120 INFO L204 MainTranslator]: Completed translation [2024-10-31 22:13:16,121 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16 WrapperNode [2024-10-31 22:13:16,121 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-31 22:13:16,123 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-31 22:13:16,123 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-31 22:13:16,124 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-31 22:13:16,132 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,144 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,177 INFO L138 Inliner]: procedures = 22, calls = 15, calls flagged for inlining = 10, calls inlined = 10, statements flattened = 264 [2024-10-31 22:13:16,177 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-31 22:13:16,178 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-31 22:13:16,178 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-31 22:13:16,178 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-31 22:13:16,192 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,192 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,200 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,230 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-10-31 22:13:16,230 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,230 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,237 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,250 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,255 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,256 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,261 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-31 22:13:16,262 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-31 22:13:16,262 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-31 22:13:16,262 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-31 22:13:16,267 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (1/1) ... [2024-10-31 22:13:16,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:13:16,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/z3 [2024-10-31 22:13:16,303 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-10-31 22:13:16,307 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_594ec6c9-7b16-4164-b516-e27a7e193066/bin/uautomizer-verify-4GaUIPS5ZU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-10-31 22:13:16,343 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-31 22:13:16,343 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-10-31 22:13:16,344 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-31 22:13:16,344 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-31 22:13:16,479 INFO L238 CfgBuilder]: Building ICFG [2024-10-31 22:13:16,482 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-31 22:13:17,044 INFO L? ?]: Removed 33 outVars from TransFormulas that were not future-live. [2024-10-31 22:13:17,044 INFO L287 CfgBuilder]: Performing block encoding [2024-10-31 22:13:17,057 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-31 22:13:17,057 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-10-31 22:13:17,058 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:13:17 BoogieIcfgContainer [2024-10-31 22:13:17,058 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-31 22:13:17,059 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-10-31 22:13:17,059 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-10-31 22:13:17,063 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-10-31 22:13:17,063 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:13:17,064 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.10 10:13:15" (1/3) ... [2024-10-31 22:13:17,065 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7162b7f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:13:17, skipping insertion in model container [2024-10-31 22:13:17,065 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:13:17,065 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.10 10:13:16" (2/3) ... [2024-10-31 22:13:17,065 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7162b7f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.10 10:13:17, skipping insertion in model container [2024-10-31 22:13:17,066 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-10-31 22:13:17,066 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.10 10:13:17" (3/3) ... [2024-10-31 22:13:17,067 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.4.ufo.BOUNDED-8.pals.c [2024-10-31 22:13:17,122 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-10-31 22:13:17,122 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-10-31 22:13:17,122 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-10-31 22:13:17,122 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-10-31 22:13:17,122 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-10-31 22:13:17,123 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-10-31 22:13:17,123 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-10-31 22:13:17,123 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-10-31 22:13:17,127 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 69 states, 68 states have (on average 1.7058823529411764) internal successors, (116), 68 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:17,148 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-10-31 22:13:17,148 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:13:17,148 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:13:17,157 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:17,157 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:17,158 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-10-31 22:13:17,159 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 69 states, 68 states have (on average 1.7058823529411764) internal successors, (116), 68 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:17,168 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-10-31 22:13:17,168 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:13:17,168 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:13:17,169 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:17,169 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:17,181 INFO L745 eck$LassoCheckResult]: Stem: 30#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 37#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 14#L161true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 8#L161-1true init_#res#1 := init_~tmp~0#1; 21#init_returnLabel#1true main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 10#L310true assume !(0 == main_~i2~0#1); 4#L310-2true ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 15#L320-2true [2024-10-31 22:13:17,181 INFO L747 eck$LassoCheckResult]: Loop: 15#L320-2true assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 5#L61true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 44#L61-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 54#L87true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 7#L87-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 49#L112true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 60#L112-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 67#L137true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 45#L137-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 61#L262true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 25#L262-1true check_#res#1 := check_~tmp~1#1; 17#check_returnLabel#1true main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 43#L347true assume !(0 == assert_~arg#1 % 256); 35#L342true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 15#L320-2true [2024-10-31 22:13:17,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:17,200 INFO L85 PathProgramCache]: Analyzing trace with hash 1932780748, now seen corresponding path program 1 times [2024-10-31 22:13:17,216 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:17,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132386664] [2024-10-31 22:13:17,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:17,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:17,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:13:17,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:13:17,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:13:17,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132386664] [2024-10-31 22:13:17,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2132386664] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:13:17,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:13:17,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:13:17,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1848336437] [2024-10-31 22:13:17,574 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:13:17,578 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-10-31 22:13:17,580 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:17,581 INFO L85 PathProgramCache]: Analyzing trace with hash 1387092797, now seen corresponding path program 1 times [2024-10-31 22:13:17,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:17,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885674728] [2024-10-31 22:13:17,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:17,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:17,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:13:18,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:13:18,006 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:13:18,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [885674728] [2024-10-31 22:13:18,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [885674728] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:13:18,007 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:13:18,007 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:13:18,007 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [518375919] [2024-10-31 22:13:18,007 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:13:18,008 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:13:18,009 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:13:18,041 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:13:18,042 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:13:18,044 INFO L87 Difference]: Start difference. First operand has 69 states, 68 states have (on average 1.7058823529411764) internal successors, (116), 68 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:18,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:13:18,219 INFO L93 Difference]: Finished difference Result 106 states and 170 transitions. [2024-10-31 22:13:18,220 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 106 states and 170 transitions. [2024-10-31 22:13:18,228 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:13:18,239 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 106 states to 97 states and 139 transitions. [2024-10-31 22:13:18,240 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2024-10-31 22:13:18,244 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2024-10-31 22:13:18,245 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 139 transitions. [2024-10-31 22:13:18,246 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:13:18,246 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 139 transitions. [2024-10-31 22:13:18,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 139 transitions. [2024-10-31 22:13:18,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 63. [2024-10-31 22:13:18,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.3333333333333333) internal successors, (84), 62 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:18,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 84 transitions. [2024-10-31 22:13:18,287 INFO L240 hiAutomatonCegarLoop]: Abstraction has 63 states and 84 transitions. [2024-10-31 22:13:18,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-31 22:13:18,292 INFO L425 stractBuchiCegarLoop]: Abstraction has 63 states and 84 transitions. [2024-10-31 22:13:18,293 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-10-31 22:13:18,293 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 84 transitions. [2024-10-31 22:13:18,294 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:13:18,294 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:13:18,295 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:13:18,298 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:18,298 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:18,299 INFO L745 eck$LassoCheckResult]: Stem: 230#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 231#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 212#L161 assume 0 == ~r1~0; 213#L162 assume ~id1~0 >= 0; 233#L163 assume 0 == ~st1~0; 218#L164 assume ~send1~0 == ~id1~0; 207#L165 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 208#L166 assume ~id2~0 >= 0; 219#L167 assume 0 == ~st2~0; 200#L168 assume ~send2~0 == ~id2~0; 201#L169 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 251#L170 assume ~id3~0 >= 0; 238#L171 assume 0 == ~st3~0; 236#L172 assume ~send3~0 == ~id3~0; 237#L173 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 247#L174 assume ~id4~0 >= 0; 193#L175 assume 0 == ~st4~0; 194#L176 assume ~send4~0 == ~id4~0; 239#L177 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 228#L178 assume ~id1~0 != ~id2~0; 229#L179 assume ~id1~0 != ~id3~0; 189#L180 assume ~id1~0 != ~id4~0; 190#L181 assume ~id2~0 != ~id3~0; 223#L182 assume ~id2~0 != ~id4~0; 224#L183 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 202#L161-1 init_#res#1 := init_~tmp~0#1; 203#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 204#L310 assume !(0 == main_~i2~0#1); 191#L310-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 192#L320-2 [2024-10-31 22:13:18,299 INFO L747 eck$LassoCheckResult]: Loop: 192#L320-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 195#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 197#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 242#L87 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 198#L87-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 199#L112 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 245#L112-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 249#L137 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 240#L137-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 243#L262 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 210#L262-1 check_#res#1 := check_~tmp~1#1; 216#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 217#L347 assume !(0 == assert_~arg#1 % 256); 234#L342 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 192#L320-2 [2024-10-31 22:13:18,301 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:18,301 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 1 times [2024-10-31 22:13:18,301 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:18,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722190046] [2024-10-31 22:13:18,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:18,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:18,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,353 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:13:18,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,404 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:13:18,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:18,405 INFO L85 PathProgramCache]: Analyzing trace with hash 1387092797, now seen corresponding path program 2 times [2024-10-31 22:13:18,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:18,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638546988] [2024-10-31 22:13:18,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:18,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:18,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:13:18,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:13:18,672 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:13:18,672 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638546988] [2024-10-31 22:13:18,673 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1638546988] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:13:18,673 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:13:18,673 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-10-31 22:13:18,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1455458533] [2024-10-31 22:13:18,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:13:18,674 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:13:18,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:13:18,675 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-31 22:13:18,675 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-31 22:13:18,675 INFO L87 Difference]: Start difference. First operand 63 states and 84 transitions. cyclomatic complexity: 22 Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:18,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:13:18,731 INFO L93 Difference]: Finished difference Result 66 states and 86 transitions. [2024-10-31 22:13:18,731 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 86 transitions. [2024-10-31 22:13:18,733 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:13:18,734 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 63 states and 81 transitions. [2024-10-31 22:13:18,734 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2024-10-31 22:13:18,734 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2024-10-31 22:13:18,736 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 81 transitions. [2024-10-31 22:13:18,737 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:13:18,739 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 81 transitions. [2024-10-31 22:13:18,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 81 transitions. [2024-10-31 22:13:18,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2024-10-31 22:13:18,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.2857142857142858) internal successors, (81), 62 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:18,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 81 transitions. [2024-10-31 22:13:18,744 INFO L240 hiAutomatonCegarLoop]: Abstraction has 63 states and 81 transitions. [2024-10-31 22:13:18,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-31 22:13:18,746 INFO L425 stractBuchiCegarLoop]: Abstraction has 63 states and 81 transitions. [2024-10-31 22:13:18,746 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-10-31 22:13:18,746 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 81 transitions. [2024-10-31 22:13:18,747 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 34 [2024-10-31 22:13:18,747 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:13:18,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:13:18,748 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:18,748 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:18,749 INFO L745 eck$LassoCheckResult]: Stem: 367#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 368#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 348#L161 assume 0 == ~r1~0; 349#L162 assume ~id1~0 >= 0; 370#L163 assume 0 == ~st1~0; 354#L164 assume ~send1~0 == ~id1~0; 344#L165 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 345#L166 assume ~id2~0 >= 0; 355#L167 assume 0 == ~st2~0; 337#L168 assume ~send2~0 == ~id2~0; 338#L169 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 388#L170 assume ~id3~0 >= 0; 375#L171 assume 0 == ~st3~0; 373#L172 assume ~send3~0 == ~id3~0; 374#L173 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 384#L174 assume ~id4~0 >= 0; 330#L175 assume 0 == ~st4~0; 331#L176 assume ~send4~0 == ~id4~0; 376#L177 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 365#L178 assume ~id1~0 != ~id2~0; 366#L179 assume ~id1~0 != ~id3~0; 326#L180 assume ~id1~0 != ~id4~0; 327#L181 assume ~id2~0 != ~id3~0; 360#L182 assume ~id2~0 != ~id4~0; 361#L183 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 339#L161-1 init_#res#1 := init_~tmp~0#1; 340#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 341#L310 assume !(0 == main_~i2~0#1); 328#L310-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 329#L320-2 [2024-10-31 22:13:18,749 INFO L747 eck$LassoCheckResult]: Loop: 329#L320-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 332#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 334#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 379#L87 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 335#L87-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 336#L112 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 382#L112-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 386#L137 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 377#L137-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 380#L262 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 387#L263 assume ~r1~0 >= 4; 347#$Ultimate##134 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 359#L262-1 check_#res#1 := check_~tmp~1#1; 352#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 353#L347 assume !(0 == assert_~arg#1 % 256); 371#L342 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 329#L320-2 [2024-10-31 22:13:18,749 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:18,750 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 2 times [2024-10-31 22:13:18,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:18,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917102963] [2024-10-31 22:13:18,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:18,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:18,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:13:18,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,797 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:13:18,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:18,798 INFO L85 PathProgramCache]: Analyzing trace with hash 140432589, now seen corresponding path program 1 times [2024-10-31 22:13:18,798 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:18,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265426820] [2024-10-31 22:13:18,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:18,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:18,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-31 22:13:18,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-31 22:13:18,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-31 22:13:18,832 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265426820] [2024-10-31 22:13:18,832 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [265426820] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-31 22:13:18,832 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-31 22:13:18,833 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-31 22:13:18,833 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872393022] [2024-10-31 22:13:18,833 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-31 22:13:18,833 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-10-31 22:13:18,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-31 22:13:18,834 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-31 22:13:18,834 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-31 22:13:18,835 INFO L87 Difference]: Start difference. First operand 63 states and 81 transitions. cyclomatic complexity: 19 Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:18,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-10-31 22:13:18,869 INFO L93 Difference]: Finished difference Result 91 states and 122 transitions. [2024-10-31 22:13:18,869 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 122 transitions. [2024-10-31 22:13:18,871 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-10-31 22:13:18,872 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 91 states and 122 transitions. [2024-10-31 22:13:18,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2024-10-31 22:13:18,872 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2024-10-31 22:13:18,873 INFO L73 IsDeterministic]: Start isDeterministic. Operand 91 states and 122 transitions. [2024-10-31 22:13:18,873 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-10-31 22:13:18,873 INFO L218 hiAutomatonCegarLoop]: Abstraction has 91 states and 122 transitions. [2024-10-31 22:13:18,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states and 122 transitions. [2024-10-31 22:13:18,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2024-10-31 22:13:18,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.3406593406593406) internal successors, (122), 90 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-31 22:13:18,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 122 transitions. [2024-10-31 22:13:18,879 INFO L240 hiAutomatonCegarLoop]: Abstraction has 91 states and 122 transitions. [2024-10-31 22:13:18,880 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-31 22:13:18,880 INFO L425 stractBuchiCegarLoop]: Abstraction has 91 states and 122 transitions. [2024-10-31 22:13:18,881 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-10-31 22:13:18,881 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 122 transitions. [2024-10-31 22:13:18,882 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-10-31 22:13:18,882 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-10-31 22:13:18,882 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-10-31 22:13:18,883 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:18,883 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-31 22:13:18,883 INFO L745 eck$LassoCheckResult]: Stem: 528#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 529#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 508#L161 assume 0 == ~r1~0; 509#L162 assume ~id1~0 >= 0; 531#L163 assume 0 == ~st1~0; 515#L164 assume ~send1~0 == ~id1~0; 504#L165 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 505#L166 assume ~id2~0 >= 0; 516#L167 assume 0 == ~st2~0; 497#L168 assume ~send2~0 == ~id2~0; 498#L169 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 551#L170 assume ~id3~0 >= 0; 536#L171 assume 0 == ~st3~0; 534#L172 assume ~send3~0 == ~id3~0; 535#L173 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 547#L174 assume ~id4~0 >= 0; 490#L175 assume 0 == ~st4~0; 491#L176 assume ~send4~0 == ~id4~0; 537#L177 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 526#L178 assume ~id1~0 != ~id2~0; 527#L179 assume ~id1~0 != ~id3~0; 486#L180 assume ~id1~0 != ~id4~0; 487#L181 assume ~id2~0 != ~id3~0; 521#L182 assume ~id2~0 != ~id4~0; 522#L183 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 499#L161-1 init_#res#1 := init_~tmp~0#1; 500#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 501#L310 assume !(0 == main_~i2~0#1); 488#L310-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 489#L320-2 [2024-10-31 22:13:18,884 INFO L747 eck$LassoCheckResult]: Loop: 489#L320-2 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 572#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 544#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 567#L87 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 566#L87-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 562#L112 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 560#L112-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 556#L137 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 554#L137-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 553#L262 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 552#L263 assume !(~r1~0 >= 4); 506#L266 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0; 507#$Ultimate##134 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 576#L262-1 check_#res#1 := check_~tmp~1#1; 575#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 574#L347 assume !(0 == assert_~arg#1 % 256); 573#L342 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 489#L320-2 [2024-10-31 22:13:18,884 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:18,884 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 3 times [2024-10-31 22:13:18,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:18,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562725165] [2024-10-31 22:13:18,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:18,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:18,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,905 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:13:18,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,927 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:13:18,928 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:18,928 INFO L85 PathProgramCache]: Analyzing trace with hash 1705012919, now seen corresponding path program 1 times [2024-10-31 22:13:18,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:18,928 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165517368] [2024-10-31 22:13:18,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:18,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:18,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,957 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:13:18,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:18,978 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:13:18,979 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-31 22:13:18,979 INFO L85 PathProgramCache]: Analyzing trace with hash 1742065425, now seen corresponding path program 1 times [2024-10-31 22:13:18,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-31 22:13:18,979 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299910039] [2024-10-31 22:13:18,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-31 22:13:18,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-31 22:13:19,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:19,020 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-31 22:13:19,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-31 22:13:19,070 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-31 22:13:23,542 INFO L204 LassoAnalysis]: Preferences: [2024-10-31 22:13:23,543 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-10-31 22:13:23,544 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-10-31 22:13:23,544 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-10-31 22:13:23,544 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-10-31 22:13:23,544 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-10-31 22:13:23,544 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-10-31 22:13:23,544 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-10-31 22:13:23,545 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.4.ufo.BOUNDED-8.pals.c_Iteration4_Loop [2024-10-31 22:13:23,545 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-10-31 22:13:23,545 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-10-31 22:13:23,599 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,612 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,619 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,623 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,626 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,629 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,632 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,635 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,638 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,641 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,644 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,648 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,651 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,658 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,667 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,672 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:23,678 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:25,550 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-10-31 22:13:27,093 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 25